WO2003019663A1 - Memoire a semiconducteurs et procede de fabrication - Google Patents

Memoire a semiconducteurs et procede de fabrication Download PDF

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Publication number
WO2003019663A1
WO2003019663A1 PCT/JP2002/005613 JP0205613W WO03019663A1 WO 2003019663 A1 WO2003019663 A1 WO 2003019663A1 JP 0205613 W JP0205613 W JP 0205613W WO 03019663 A1 WO03019663 A1 WO 03019663A1
Authority
WO
WIPO (PCT)
Prior art keywords
misfet
semiconductor layer
multilayer structure
gate electrode
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/JP2002/005613
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English (en)
Japanese (ja)
Inventor
Takeshi Hashimoto
Hidetoshi Iwai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Publication of WO2003019663A1 publication Critical patent/WO2003019663A1/fr
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B10/00—Static random access memory [SRAM] devices
    • H10B10/12—Static random access memory [SRAM] devices comprising a MOSFET load element

Landscapes

  • Semiconductor Memories (AREA)

Abstract

L'invention concerne une cellule de mémoire de SRAM, constituée d'un composant MISFET de transfert, d'un composant MISFET d'attaque, et d'un composant MISFET de charge réalisé par dessus le composant MISFET d'attaque. Le composant MISFET de charge présente une structure verticale dans laquelle une électrode de grille (23) est placée sur la face latérale d'une structure multicouche (P) qui s'étend perpendiculairement à une surface majeure de substrat à semiconducteurs (1). Un film d'isolation de grille (22) est intercalé entre l'électrode de grille (23) est la structure multicouche (P), laquelle est constituée de films en silicium polycristallin: couche à semiconducteurs inférieure (13), couche à semi conducteurs intermédiaire (14), et couche à semiconducteurs supérieure (15), dans cet ordre depuis le bas.
PCT/JP2002/005613 2001-08-24 2002-06-06 Memoire a semiconducteurs et procede de fabrication Ceased WO2003019663A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2001255202A JP2003068883A (ja) 2001-08-24 2001-08-24 半導体記憶装置
JP2001-255202 2001-08-24

Publications (1)

Publication Number Publication Date
WO2003019663A1 true WO2003019663A1 (fr) 2003-03-06

Family

ID=19083220

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2002/005613 Ceased WO2003019663A1 (fr) 2001-08-24 2002-06-06 Memoire a semiconducteurs et procede de fabrication

Country Status (3)

Country Link
JP (1) JP2003068883A (fr)
TW (1) TW571433B (fr)
WO (1) WO2003019663A1 (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006090445A1 (fr) * 2005-02-23 2006-08-31 Fujitsu Limited Dispositif de circuit a semi-conducteur et son procede de fabrication
US7161215B2 (en) 2002-07-31 2007-01-09 Renesas Technology Corp. Semiconductor memory device and method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US7259052B2 (en) 2003-01-14 2007-08-21 Renesas Technology Corp. Manufacture of a semiconductor integrated circuit device including a pluarality of a columnar laminates having different spacing in different directions
US7279754B2 (en) 2002-07-08 2007-10-09 Renesas Technology Corp. Semiconductor memory device and a method of manufacturing the same
JP2014225491A (ja) * 2013-05-15 2014-12-04 猛英 白土 半導体装置

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4606006B2 (ja) * 2003-09-11 2011-01-05 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
JP2007013196A (ja) * 2006-08-23 2007-01-18 Renesas Technology Corp 半導体装置
JP2008159669A (ja) * 2006-12-21 2008-07-10 Matsushita Electric Ind Co Ltd 半導体記憶装置
US8183628B2 (en) 2007-10-29 2012-05-22 Unisantis Electronics Singapore Pte Ltd. Semiconductor structure and method of fabricating the semiconductor structure
JP5317343B2 (ja) 2009-04-28 2013-10-16 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置及びその製造方法
US8378425B2 (en) 2008-01-29 2013-02-19 Unisantis Electronics Singapore Pte Ltd. Semiconductor storage device
US8598650B2 (en) 2008-01-29 2013-12-03 Unisantis Electronics Singapore Pte Ltd. Semiconductor device and production method therefor
JP5299422B2 (ja) 2008-04-16 2013-09-25 日本電気株式会社 半導体装置およびその製造方法
JP4987926B2 (ja) 2009-09-16 2012-08-01 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置
JP5356970B2 (ja) 2009-10-01 2013-12-04 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置
CN102725842B (zh) 2010-02-05 2014-12-03 株式会社半导体能源研究所 半导体器件
WO2011111662A1 (fr) 2010-03-08 2011-09-15 日本ユニサンティスエレクトロニクス株式会社 Dispositif de capture de semi-conducteurs
US8487357B2 (en) 2010-03-12 2013-07-16 Unisantis Electronics Singapore Pte Ltd. Solid state imaging device having high sensitivity and high pixel density
JP5066590B2 (ja) 2010-06-09 2012-11-07 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置とその製造方法
JP5087655B2 (ja) 2010-06-15 2012-12-05 ユニサンティス エレクトロニクス シンガポール プライベート リミテッド 半導体装置及びその製造方法
CN102832221B (zh) * 2011-06-16 2016-10-26 三星电子株式会社 具有竖直装置和非竖直装置的半导体装置及其形成方法
US8564034B2 (en) 2011-09-08 2013-10-22 Unisantis Electronics Singapore Pte. Ltd. Solid-state imaging device
US8669601B2 (en) 2011-09-15 2014-03-11 Unisantis Electronics Singapore Pte. Ltd. Method for producing semiconductor device and semiconductor device having pillar-shaped semiconductor
US8772175B2 (en) 2011-12-19 2014-07-08 Unisantis Electronics Singapore Pte. Ltd. Method for manufacturing semiconductor device and semiconductor device
US8916478B2 (en) 2011-12-19 2014-12-23 Unisantis Electronics Singapore Pte. Ltd. Method for manufacturing semiconductor device and semiconductor device
US8748938B2 (en) 2012-02-20 2014-06-10 Unisantis Electronics Singapore Pte. Ltd. Solid-state imaging device

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01265558A (ja) * 1988-04-15 1989-10-23 Sony Corp 半導体メモリ
US5198683A (en) * 1991-05-03 1993-03-30 Motorola, Inc. Integrated circuit memory device and structural layout thereof
JPH06104405A (ja) * 1992-09-22 1994-04-15 Toshiba Corp スタティック型メモリ
US5627390A (en) * 1994-05-26 1997-05-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with columns
JPH09232447A (ja) * 1996-02-19 1997-09-05 Nec Corp 半導体メモリ装置
US5670803A (en) * 1995-02-08 1997-09-23 International Business Machines Corporation Three-dimensional SRAM trench structure and fabrication method therefor
US5994735A (en) * 1993-05-12 1999-11-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a vertical surround gate metal-oxide semiconductor field effect transistor, and manufacturing method thereof
JP2001028443A (ja) * 1999-05-13 2001-01-30 Hitachi Ltd 半導体装置およびその製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07153273A (ja) * 1993-11-26 1995-06-16 Hitachi Ltd 半導体集積回路装置

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01265558A (ja) * 1988-04-15 1989-10-23 Sony Corp 半導体メモリ
US5198683A (en) * 1991-05-03 1993-03-30 Motorola, Inc. Integrated circuit memory device and structural layout thereof
JPH06104405A (ja) * 1992-09-22 1994-04-15 Toshiba Corp スタティック型メモリ
US5994735A (en) * 1993-05-12 1999-11-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor device having a vertical surround gate metal-oxide semiconductor field effect transistor, and manufacturing method thereof
US5627390A (en) * 1994-05-26 1997-05-06 Mitsubishi Denki Kabushiki Kaisha Semiconductor device with columns
US5670803A (en) * 1995-02-08 1997-09-23 International Business Machines Corporation Three-dimensional SRAM trench structure and fabrication method therefor
JPH09232447A (ja) * 1996-02-19 1997-09-05 Nec Corp 半導体メモリ装置
JP2001028443A (ja) * 1999-05-13 2001-01-30 Hitachi Ltd 半導体装置およびその製造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
SHIGEYOSHI WATANABE ET AL.: "A novel circuit technology with surrounding gate transistors(SGT's) for ultra high density DRAM's", IEEE JOURNAL OF SOLID-STATE CIRCUITS, vol. 30, no. 9, September 1995 (1995-09-01), pages 960 - 971, XP000526202 *

Cited By (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7598133B2 (en) 2002-07-08 2009-10-06 Renesas Technology Corp Semiconductor memory device and a method of manufacturing the same
US7829952B2 (en) 2002-07-08 2010-11-09 Renesas Electronics Corporation Semiconductor memory device and a method of manufacturing the same
US8652895B2 (en) 2002-07-08 2014-02-18 Renesas Electronics Corporation Semiconductor memory device and a method of manufacturing the same
US7981738B2 (en) 2002-07-08 2011-07-19 Renesas Electronics Corporation Semiconductor memory device and a method of manufacturing the same
US7279754B2 (en) 2002-07-08 2007-10-09 Renesas Technology Corp. Semiconductor memory device and a method of manufacturing the same
US7161215B2 (en) 2002-07-31 2007-01-09 Renesas Technology Corp. Semiconductor memory device and method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US7701020B2 (en) 2002-07-31 2010-04-20 Renesas Technology Corp. Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US7495289B2 (en) 2002-07-31 2009-02-24 Renesas Technology Corp. Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US7972920B2 (en) 2002-07-31 2011-07-05 Hitachi Ulsi Systems Co., Ltd. Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US8476138B2 (en) 2002-07-31 2013-07-02 Hitachi Ulsi Systems Co., Ltd. Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US7190031B2 (en) 2002-07-31 2007-03-13 Renesas Technology Corp. Semiconductor memory device and a method of manufacturing the same, a method of manufacturing a vertical MISFET and a vertical MISFET, and a method of manufacturing a semiconductor device and a semiconductor device
US7306984B2 (en) 2003-01-14 2007-12-11 Renesas Technology Corp. Method of manufacture of a semiconductor integrated circuit device including a plurality of columnar laminates having different spacing in different directions
US7482650B2 (en) 2003-01-14 2009-01-27 Renesas Technology Corp. Method of manufacturing a semiconductor integrated circuit device having a columnar laminate
US7259052B2 (en) 2003-01-14 2007-08-21 Renesas Technology Corp. Manufacture of a semiconductor integrated circuit device including a pluarality of a columnar laminates having different spacing in different directions
WO2006090445A1 (fr) * 2005-02-23 2006-08-31 Fujitsu Limited Dispositif de circuit a semi-conducteur et son procede de fabrication
JP2014225491A (ja) * 2013-05-15 2014-12-04 猛英 白土 半導体装置

Also Published As

Publication number Publication date
TW571433B (en) 2004-01-11
JP2003068883A (ja) 2003-03-07

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