WO1998044451A1 - Module electronique pour carte a puce - Google Patents

Module electronique pour carte a puce Download PDF

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Publication number
WO1998044451A1
WO1998044451A1 PCT/FR1998/000500 FR9800500W WO9844451A1 WO 1998044451 A1 WO1998044451 A1 WO 1998044451A1 FR 9800500 W FR9800500 W FR 9800500W WO 9844451 A1 WO9844451 A1 WO 9844451A1
Authority
WO
WIPO (PCT)
Prior art keywords
electronic module
support
contact
module according
card
Prior art date
Application number
PCT/FR1998/000500
Other languages
English (en)
Inventor
Michael Zafrany
Philippe Patrice
Original Assignee
Gemplus S.C.A.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Gemplus S.C.A. filed Critical Gemplus S.C.A.
Priority to BR9808062-8A priority Critical patent/BR9808062A/pt
Priority to JP54121098A priority patent/JP3869860B2/ja
Priority to AU69225/98A priority patent/AU720691B2/en
Priority to CA002283692A priority patent/CA2283692A1/fr
Priority to US09/402,008 priority patent/US6435414B1/en
Priority to EP98914903A priority patent/EP0970437A1/fr
Publication of WO1998044451A1 publication Critical patent/WO1998044451A1/fr
Priority to HK00108190A priority patent/HK1028833A1/xx

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07743—External electrical contacts
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    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
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    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73267—Layer and HDI connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/76—Apparatus for connecting with build-up interconnects
    • H01L2224/7615—Means for depositing
    • H01L2224/76151—Means for direct writing
    • H01L2224/76152—Syringe
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
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    • H01L2924/01—Chemical elements
    • H01L2924/01013—Aluminum [Al]
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
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    • H01L2924/01058—Cerium [Ce]
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    • H01L2924/01—Chemical elements
    • H01L2924/01075—Rhenium [Re]
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    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Definitions

  • the present invention relates to electronic modules, in particular intended to be mounted in an electronic device in the form of a card, comprising a support comprising at least one face provided with contact tracks and a microcircuit which is fixed on said support and which comprises contact pads. output each connected to a contact track of the support.
  • Such card-shaped devices include, in particular, integrated circuit cards, also called smart cards, but also supports for electronic elements for television, video recorders, etc.
  • a smart card consists of a card body and a module comprising the chip and integrated into the card body.
  • a smart card module consists of a support, generally made of epoxy glass, which is metallized on one side so as to present contact tracks and a chip which is glued on the other side of the support and which comprises output pads on its outer face. Connection wells are arranged through the support for the passage of connection wires connecting an output pad to a contact track.
  • the connection wires made of stainless metal such as gold or aluminum, are welded using different technologies, such as ultrasonic or thermocompression welding, which require subsequent coating (“glob top”) of the wires. connection by means of a resin to protect them. It is sometimes necessary to fix a resin retaining barrier, such as a metal or silicon ring, on the support beforehand.
  • the mass of resin is deposited in an uncontrollable manner and, when it is polymerized, it forms a drop of great thickness which exceeds in height the specifications of the smart cards. It is therefore necessary to perform a milling operation to reduce the thickness of the module to the required value. This milling operation can damage the module, which is the main cause of manufacturing waste.
  • the body of the smart card there is a cavity which is intended to receive the module and which must be relatively deep to receive a module of significant height.
  • the thickness of the card body at the level of the cavity is small, which causes, when the smart card undergoes bending, a significant deformation of the card body which limits the reliability and the lifetime. from the menu.
  • the polymerization of this drop of resin causes the module to bulge.
  • This bulging can lead to deterioration of smart card readers.
  • the problem underlying the invention is to provide an electronic module of reduced height so as to eliminate the aforementioned drawbacks.
  • the electronic module according to the invention is notably remarkable in that the connections between the output pads and the contact tracks consist of a bead of adhesive conductive substance conforming to the relief of the support.
  • connections do not require a protective coating, which makes it possible to significantly reduce the height of the module.
  • the manufacturing is simplified and, in particular, the milling operation is eliminated, which greatly reduces the rate of manufacturing scrap.
  • the conductive substance is an isotropic conductive adhesive.
  • connection wells these are filled with the conductive substance.
  • the support may have two faces provided with contact tracks and the connections are made directly on two faces without using connection wells.
  • one of the faces of the support is covered by an activatable adhesive film.
  • the output pads of the microcircuit may have connection bumps so as to reduce the contact resistance
  • the invention also relates to a method of manufacturing an electronic module, characterized in that the cord is produced by depositing a viscous conductive substance
  • FIG. 1 is a diagram which represents, in cross section, an electronic module of known type
  • FIG. 2 represents an electronic module in accordance with the present invention
  • FIG. 3 is a top view of an embodiment of a module, the support of which has two faces provided with contact tracks,
  • FIG. 1 represents an electronic module of known type II comprises a support 10, for example made of epoxy glass
  • One of its faces 12 has contact tracks 14 produced by metallization
  • the other face 16 has a layer of adhesive 18 used to fix the lower face of a microcircuit 20 which has output pads 22 on its free upper face
  • the connections between the output pads 22 and the contact tracks 14 are produced by welding of metal wires 24 which each pass through a connection well 26 made in the support 10 After the welding operation of the wires 24, these are coated of a polymerizable resin which forms a drop 28 which is retained by a peripheral ring 30 of silicone
  • This drop 28 is applied in an uncontrolled manner and it has a significant thickness which increases considerably the height of the module so that it is necessary to level off its upper part by a machining operation, such as milling, as shown schematically by the dotted line 32. As indicated above, the presence of this drop 28 can reduce the mechanical resistance of the smart card at the level of the cavity receiving the module so that the mechanical resistance of the card at this level is insufficient and that, in addition, the card can have a bulge at this level.
  • FIG. 2 represents an electronic module in accordance with the present invention.
  • the support 40 has connection wells 42.
  • the lower face 44 of the support 40 is metallized and has contact tracks 46, 48 and 50.
  • the upper face 52 of the support 40 carries a layer 54 of glue used for fixing a chip 56 which comprises, on its upper face 58, output pads 60 and 62 which may be provided with contact bumps (bumps) not shown.
  • a coating 64 of insulating adhesive is applied to the periphery of the chip 56, on the face 52 of the support in the vicinity of the chip and in the connection wells 42.
  • connections 66 and 68 between the output pads 60 and 62 and the contact tracks 46 and 50 are constituted by a bead of adhesive conductive substance which marries the relief of the support, more particularly which is in contact with the adhesive coating 64 and the ends of which are in contact with the output pad and the associated contact track. This substance is applied in a viscous state.
  • this substance for example an isotropic conductive adhesive
  • a deposition technique called "dispensing" according to which a liquid or low viscosity substance is applied by means of a syringe or the like with controlled flow and opening.
  • This exemption operation is carried out for example by means of an installation marketed under the name CAM / ALOT by the American company Camelot Systems Inc. and used for the online production of electronic circuits.
  • the movement and opening of the syringe are controlled by a computer program.
  • connections can also be made using a metal deposited by screen printing.
  • the output pads may include contact bosses and the ends of the beads of conductive substance are in contact with them.
  • the invention also applies to the case where the support comprises two metallized faces comprising contact tracks.
  • FIG. 3 is a partial top view of the module where we see a chip 70 with its output pads 72, 74, 76, 78 and 80.
  • the pads 72, 74 and 76 are connected to a contact track on the underside of the support and the pads 78 and 80 are connected to a track 82, respectively 84, disposed on the upper face of the support, also by a bead of adhesive conductive substance 86, respectively 88.
  • the electronic module according to the invention can be covered with an activatable adhesive film, for example by heating or ultraviolet radiation, in order, on the one hand, to increase the protection of the chip and, on the other hand, to simplify the fixing operation of the module in the cavity of the card body.
  • an activatable adhesive film for example by heating or ultraviolet radiation
  • the invention makes it possible to eliminate the coating of the connections and, consequently, to reduce the thickness of the modules.
  • the resins used as conductive substance are very flexible, which increases the reliability of the module.
  • the operations related to the coating of the connections namely the installation of a retaining barrier such as a silicone ring, the deposition of the coating resin and the machining of the drop of resin, are eliminated. .
  • the invention makes it possible to have a greater thickness of the card body at the level of the module and, consequently, to increase the mechanical resistance of the card.
  • the dimensions of the modules can be reduced in the plane of the microcircuit, which makes it possible to manufacture the modules in a chain with two adjacent lines of modules.
  • the invention makes it possible to eliminate the bulging phenomenon and, consequently, to avoid deterioration of the readers.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

L'invention propose un module électronique, notamment destiné à être monté dans un dispositif électronique sous forme de carte, comprenant un support (40) comportant au moins une face (44) munie de pistes de contact (46; 48; 50) et un microcircuit (56) qui est fixé sur ledit support (40) et qui comporte des plots de sortie (60, 62) reliés chacun à une piste de contact du support, caractérisé en ce que les connexions (66, 68) entre les plots de sortie et les pistes de contact sont constituées par un cordon de substance conductrice adhésive épousant le relief du support. Avantageusement, la substance conductrice est une colle conductrice isotrope.

Description

MODULE ELECTRONIQUE POUR CARTE A PUCE
La présente invention concerne les modules électroniques, notamment destinés à être montés dans un dispositif électronique sous forme de carte, comprenant un support comportant au moins une face munie de pistes de contact et un microcircuit qui est fixé sur ledit support et qui comporte des plots de sortie reliés chacun à une piste de contact du support.
De tels dispositifs sous forme de carte comprennent, en particulier, les cartes à circuit(s) intégré(s), aussi appelées cartes à puce, mais aussi des supports d'éléments électroniques pour la télévision, les magnétoscopes, etc. Une carte à puce est constituée d'un corps de carte et d'un module comprenant la puce et intégré dans le corps de carte.
Un module de carte à puce est constitué d'un support, généralement en verre époxy, qui est métallisé sur une face de manière à présenter des pistes de contact et d'une puce qui est collée sur l'autre face du support et qui comporte des plots de sortie sur sa face extérieure. Des puits de connexion sont aménagés à travers le support pour le passage de fils de connexion reliant un plot de sortie à une piste de contact. Les fils de connexion, en métal inoxydable tel que l'or ou de l'aluminium, sont soudés en utilisant différentes technologies, telles que le soudage par ultrasons ou par thermocompression, qui nécessitent un enrobage ("glob top") ultérieur des fils de connexion au moyen d'une résine pour les protéger. Il est parfois nécessaire de fixer préalablement une barrière de retenue de la résine, telle qu'un anneau métallique ou en siiicone, sur le support.
La masse de résine est déposée de manière non contrôlable et, lorsqu'elle est polymérisée, elle forme une goutte de grande épaisseur qui dépasse en hauteur les spécifications des cartes à puce. Il est donc nécessaire d'effectuer une opération de fraisage pour réduire l'épaisseur du module à la valeur requise. Cette opération de fraisage peut endommager le module, ce qui constitue la cause principale des rebuts de fabrication.
Dans le corps de la carte à puce, on aménage une cavité qui est destinée à recevoir le module et qui doit être relativement profonde pour recevoir un module de hauteur importante. Il en résulte que l'épaisseur du corps de la carte au niveau de la cavité est faible, ce qui provoque, lorsque la carte à puce subit des flexions, une déformation importante du corps de la carte qui limite la fiabilité et la durée de vie de la carte. De plus, la polymérisation de cette goutte de résine provoque un phénomène de bombement du module.
Ce bombement peut entraîner une détérioration des lecteurs de carte à puce.
Le problème à la base de l'invention est de fournir un module électronique de hauteur réduite de manière à supprimer les inconvénients précités.
Le module électronique selon l'invention est notamment remarquable en ce que les connexions entre les plots de sortie et les pistes de contact sont constituées par un cordon de substance conductrice adhesive épousant le relief du support.
Ces connexions ne nécessitent pas d'enrobage de protection, ce qui permet de réduire notablement la hauteur du module. Il en résulte que la fabrication est simplifiée et que, en particulier, l'opération de fraisage est supprimée, ce qui réduit fortement le taux de rebuts de fabrication.
Avantageusement, la substance conductrice est une colle conductrice isotrope.
On peut aussi utiliser un métal déposé par sérigraphie. Dans le cas où le support comporte des puits de connexion, ceux-ci sont remplis par la substance conductrice.
Le support peut comporter deux faces munies de pistes de contact et les connexions sont réalisées directement sur deux faces sans utiliser de puits de connexion.
Avantageusement, une des faces du support est recouverte par un film adhésif activable.
Ceci constitue une protection supplémentaire du microcircuit et permet de simplifier l'opération de fixation du module dans le corps de la carte. Les plots de sortie du microcircuit peuvent comporter des bosses de connexion de manière à réduire la résistance de contact
L'invention a aussi pour objet un procédé de fabrication d'un module électronique, caractérisé en ce que le cordon est réalisé par dépôt d'une substance conductrice visqueuse
Cette technique de dépôt au moyen d'une seringue ou analogue est rapide et facile à mettre en oeuvre
L'invention a encore pour objet une carte à puce caractérisée en ce qu'elle comporte au moins un module électronique du type précité
D'autres caractéristiques et avantages de l'invention apparaîtront à la lecture de la description détaillée qui suit pour la compréhension de laquelle on se reportera aux dessins annexes dans lesquels
- la figure 1 est un schéma qui représente, en section transversale, un module électronique de type connu ,
- la figure 2 représente un module électronique conforme à la présente invention , - la figure 3 est une vue de dessus d'un mode de réalisation d'un module dont le support comporte deux faces munies de pistes de contact ,
La figure 1 représente un module électronique de type connu II comprend un support 10, par exemple en verre époxy
Une de ses faces 12 comporte des pistes de contact 14 réalisées par métallisation L'autre face 16 comporte une couche de colle 18 servant à fixer la face inférieure d'un microcircuit 20 qui comporte des plots de sortie 22 sur sa face supérieure libre Les connexions entre les plots de sortie 22 et les pistes de contact 14 sont réalisées par soudage de fils métalliques 24 qui passent chacun à travers un puits 26 de connexion réalisé dans le support 10 Après l'opération de soudure des fils 24, ceux-ci sont enrobés d'une résine polyméπsable qui forme une goutte 28 qui est retenue par un anneau périphérique 30 en silicone
Cette goutte 28 est appliquée de manière non contrôlée et elle présente une épaisseur importante qui augmente considérablement la hauteur du module si bien qu'il est nécessaire d'araser sa partie supérieure par une opération d'usinage, tel qu'un fraisage, comme schématisé par la ligne en pointillés 32. Comme indiqué plus haut, la présence de cette goutte 28 peut réduire la résistance mécanique de la carte à puce au niveau de la cavité recevant le module de telle sorte que la résistance mécanique de la carte à ce niveau est insuffisante et que, en outre, la carte peut présenter un bombement à ce niveau.
La figure 2 représente un module électronique conforme à la présente invention. Le support 40 comporte des puits de connexion 42. La face inférieure 44 du support 40 est métallisée et comporte des pistes de contact 46, 48 et 50. La face supérieure 52 du support 40 porte une couche 54 de colle servant à la fixation d'une puce 56 qui comporte, sur sa face supérieure 58, des plots de sortie 60 et 62 qui peuvent être munis de bosses de contact (bumps) non représentées. Un revêtement 64 d'adhésif isolant est appliqué sur la périphérie de la puce 56, sur la face 52 du support au voisinage de la puce et dans les puits de connexion 42.
Conformément à l'invention, les connexions 66 et 68 entre les plots de sortie 60 et 62 et les pistes de contact 46 et 50 sont constitués par un cordon de substance conductrice adhesive qui épouse le relief du support, plus particulièrement qui est en contact avec le revêtement adhésif 64 et dont les extrémités sont en contact le plot de sortie et la piste de contact associée. Cette substance est appliquée à l'état visqueux.
L'application de cette substance, par exemple une colle conductrice isotrope, est réalisée par une technique de dépôt dite de "dispense" selon laquelle on applique une substance liquide ou de faible viscosité au moyen d'une seringue ou analogue à débit et ouverture commandés.
Cette opération de dispense est réalisée par exemple au moyen d'une installation commercialisée sous la dénomination CAM/ALOT par la société américaine Camelot Systems Inc. et utilisée pour la réalisation en ligne de circuits électroniques. Le déplacement et l'ouverture de la seringue sont commandés par un programme informatique.
On peut aussi réaliser ces connexions en utilisant un métal déposé par sérigraphie. Pour améliorer le contact électrique, les plots de sortie peuvent comporter des bossages de contact et le contact des extrémités des cordons de substance conductrice se fait avec ces derniers.
L'invention s'applique aussi au cas où le support comporte deux faces métallisées comportant des pistes de contact.
Ceci est illustré sur la figure 3 qui est une vue partielle de dessus du module où l'on voit une puce 70 avec ses plots de sortie 72, 74, 76, 78 et 80. Les plots 72, 74 et 76 sont reliés à une piste de contact de la face inférieure du support et les plots 78 et 80 sont reliés à une piste 82, respectivement 84, disposée sur la face supérieure du support, également par un cordon de substance conductrice adhesive 86, respectivement 88.
Le module électronique selon l'invention peut être recouvert par un film adhésif activable, par exemple par chauffage ou rayonnement ultraviolet, afin, d'une part, d'augmenter la protection de la puce et, d'autre part, de simplifier l'opération de fixation du module dans la cavité du corps de carte. La réalisation de connexions directes selon la présente invention s'applique à la fabrication de tout dispositif électronique sous forme de carte tel que les cartes de commande d'appareils vidéo ou d'appareils ménagers.
On voit que l'invention permet de supprimer l'enrobage des connexions et, par suite, de réduire l'épaisseur des modules.
Par ailleurs, les résines utilisées comme substance conductrice sont très souples, ce qui augmente la fiabilité du module.
Les opérations liées à l'enrobage des connexions, à savoir la mise en place d'une barrière de retenue telle qu'un anneau de silicone, le dépôt de la résine d'enrobage et l'usinage de la goutte de résine, sont supprimées. Il en résulte une simplification de la fabrication et une réduction du coût de fabrication. L'invention permet d'avoir une épaisseur du corps de carte plus importante au niveau du module et, par conséquent, d'accroître la résistance mécanique de la carte.
Grâce à l'invention, on peut réduire les dimensions des modules dans le plan du microcircuit, ce qui permet de fabriquer les modules en chaîne avec deux lignes adjacentes de modules.
Enfin, l'invention permet de supprimer le phénomène de bombement et, par suite, d'éviter la détérioration des lecteurs.

Claims

REVENDICATIONS
1 . Module électronique (94), notamment destiné à être monté dans un dispositif électronique sous forme de carte, comprenant un support (10 ; 40 ; 108) comportant au moins une face (12 ; 44) munie de pistes de contact (14 ; 46 ; 48 ; 50) et un microcircuit (20 ; 56 ; 70 ; 98) qui est fixé sur ledit support (10 ; 40 ; 108) et qui comporte des plots de sortie (22 ; 60,62 ; 72, 74, 76, 78, 80) reliés chacun à une piste de contact du support, caractérisé en ce que les connexions (66, 68 ; 86, 88) entre les plots de sortie et les pistes de contact sont constituées par un cordon de substance conductrice adhesive épousant le relief du support.
2. Procédé de fabrication d'un module électronique selon la revendication 1 , caractérisé en ce que le cordon est réalisé par dépôt d'une substance conductrice visqueuse.
3. Module électronique selon la revendication 1 , caractérisé en ce que la substance conductrice est une colle conductrice isotrope.
4. Module électronique selon l'une quelconque des revendications 1 à 3, caractérisé en ce que le support comporte deux faces munies de pistes de contact.
5. Module électronique selon l'une quelconque des revendications 1 à 4, caractérisé en ce qu'une des faces du module est recouverte par un film adhésif activable.
6. Module électronique selon l'une quelconque des revendications 1 à 5, caractérisé en ce que les plots de sortie du microcircuit comportent des bosses de connexion.
7. Carte à puce caractérisée en ce qu'elle comporte au moins un module électronique selon l'une quelconque des revendications 1 à 6.
PCT/FR1998/000500 1997-03-27 1998-03-09 Module electronique pour carte a puce WO1998044451A1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
BR9808062-8A BR9808062A (pt) 1997-03-27 1998-03-09 Módulo eletrônico para cartão de microplaqueta
JP54121098A JP3869860B2 (ja) 1997-03-27 1998-03-09 チップカードのための電子モジュール
AU69225/98A AU720691B2 (en) 1997-03-27 1998-03-09 Electronic module for chip card
CA002283692A CA2283692A1 (fr) 1997-03-27 1998-03-09 Module electronique pour carte a puce
US09/402,008 US6435414B1 (en) 1997-03-27 1998-03-09 Electronic module for chip card
EP98914903A EP0970437A1 (fr) 1997-03-27 1998-03-09 Module electronique pour carte a puce
HK00108190A HK1028833A1 (en) 1997-03-27 2000-12-19 Electronic module for chip card.

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9704094A FR2761498B1 (fr) 1997-03-27 1997-03-27 Module electronique et son procede de fabrication et carte a puce comportant un tel module
FR97/04094 1997-03-27

Related Child Applications (2)

Application Number Title Priority Date Filing Date
US09/402,008 A-371-Of-International US6435414B1 (en) 1997-03-27 1998-03-09 Electronic module for chip card
US10/141,180 Continuation US6769619B2 (en) 1997-03-27 2002-05-09 Electronic module for chip card

Publications (1)

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WO1998044451A1 true WO1998044451A1 (fr) 1998-10-08

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US (2) US6435414B1 (fr)
EP (2) EP0970437A1 (fr)
JP (1) JP3869860B2 (fr)
CN (1) CN1183486C (fr)
AU (1) AU720691B2 (fr)
BR (1) BR9808062A (fr)
CA (1) CA2283692A1 (fr)
DE (1) DE69832104T2 (fr)
FR (1) FR2761498B1 (fr)
HK (1) HK1028833A1 (fr)
RU (1) RU2200975C2 (fr)
WO (1) WO1998044451A1 (fr)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2761498B1 (fr) * 1997-03-27 1999-06-18 Gemplus Card Int Module electronique et son procede de fabrication et carte a puce comportant un tel module
FR2785072B1 (fr) * 1998-10-23 2001-01-19 St Microelectronics Sa Circuit electronique autocollant
FR2797075B1 (fr) * 1999-07-26 2001-10-12 Gemplus Card Int Procede de fabrication de dispositif portable a circuits integres, de type carte a puce de format reduit par rapport au format standard
FR2797995B1 (fr) * 1999-08-25 2002-03-22 Gemplus Card Int Procede de protection de puces de circuit integre par depot de couche mince isolante
FR2797996B1 (fr) * 1999-08-25 2003-10-03 Gemplus Card Int Procede de protection de puces de circuit integre par depot de couche mince isolante
FR2799306B1 (fr) * 1999-10-04 2003-09-19 Gemplus Card Int Procede d'isolation de puce de circuit integre par depot de matiere sur la face active
FR2800198B1 (fr) * 1999-10-26 2002-03-29 Gemplus Card Int Procede de protection de puces de circuit integre par aspiration sous vide
FR2808920B1 (fr) * 2000-05-10 2003-10-03 Gemplus Card Int Procede de protection de puces de circuit integre
FR2818801B1 (fr) * 2000-12-21 2003-04-04 Gemplus Card Int Interconnexion par organe d'isolation decoupe et cordon de conduction
FR2818800B1 (fr) * 2000-12-21 2003-04-04 Gemplus Card Int Interconnexion par organe deformable pour dispositif electronique
FR2823011B1 (fr) * 2001-03-30 2004-11-19 Gemplus Card Int Connexion par depot de cordon conductrice sur zone de raccordement delimitee par masque isolant
FR2845805B1 (fr) * 2002-10-10 2005-06-03 Gemplus Card Int Adhesif d'encartage formant navette
FR2847365B1 (fr) * 2002-11-15 2005-03-11 Gemplus Card Int Connexion/raccordement simultane par un percage d'adhesif d'encartage
US7243421B2 (en) * 2003-10-29 2007-07-17 Conductive Inkjet Technology Limited Electrical connection of components
WO2007042071A1 (fr) * 2005-10-10 2007-04-19 Alphasem Ag Bloc de composants comprenant au moins deux elements cooperant de maniere electroconductrice et procede permettant de produire ledit bloc de composants
DE102006056361B4 (de) * 2006-11-29 2012-08-16 Infineon Technologies Ag Modul mit polymerhaltigem elektrischen Verbindungselement und Verfahren
DE102008019571A1 (de) 2008-04-18 2009-10-22 Giesecke & Devrient Gmbh Chipkarte und Verfahren zu deren Herstellung
TWM425346U (en) * 2011-05-20 2012-03-21 Mxtran Inc Integrated circuit film for smart card and mobile communication device
US8991711B2 (en) * 2012-07-19 2015-03-31 Infineon Technologies Ag Chip card module
MY184608A (en) * 2013-12-10 2021-04-07 Carsem M Sdn Bhd Pre-molded integrated circuit packages
DE102014105861B4 (de) * 2014-04-25 2015-11-05 Infineon Technologies Ag Sensorvorrichtung und Verfahren zum Herstellen einer Sensorvorrichtung

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4325458A1 (de) * 1993-07-29 1995-02-09 Orga Bond Technik Gmbh Trägerelement für einen IC-Baustein
JPH0839974A (ja) * 1994-07-27 1996-02-13 Dainippon Printing Co Ltd Ｉｃカード用ｉｃモジュールとその製造方法、及びｉｃカード
DE4441052A1 (de) * 1994-11-18 1996-05-23 Orga Kartensysteme Gmbh Trägerelement für einen IC-Baustein zum Einsatz in Chipkarten

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3338597A1 (de) * 1983-10-24 1985-05-02 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Datentraeger mit integriertem schaltkreis und verfahren zur herstellung desselben
US4999136A (en) * 1988-08-23 1991-03-12 Westinghouse Electric Corp. Ultraviolet curable conductive resin
US5255430A (en) * 1992-10-08 1993-10-26 Atmel Corporation Method of assembling a module for a smart card
US5689136A (en) * 1993-08-04 1997-11-18 Hitachi, Ltd. Semiconductor device and fabrication method
DE9315652U1 (de) * 1993-10-15 1993-12-23 Nordson Corp Auftragskopf zum Aufbringen von Klebstoff auf ein Substrat, insbesondere für eine Verklebung eines Chips mit einer Karte
US5423889A (en) * 1994-06-24 1995-06-13 Harris Corporation Process for manufacturing a multi-port adhesive dispensing tool
DE69635397T2 (de) * 1995-03-24 2006-05-24 Shinko Electric Industries Co., Ltd. Halbleitervorrichtung mit Chipabmessungen und Herstellungsverfahren
JPH08310172A (ja) * 1995-05-23 1996-11-26 Hitachi Ltd 半導体装置
FR2761498B1 (fr) * 1997-03-27 1999-06-18 Gemplus Card Int Module electronique et son procede de fabrication et carte a puce comportant un tel module
US6107109A (en) * 1997-12-18 2000-08-22 Micron Technology, Inc. Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4325458A1 (de) * 1993-07-29 1995-02-09 Orga Bond Technik Gmbh Trägerelement für einen IC-Baustein
JPH0839974A (ja) * 1994-07-27 1996-02-13 Dainippon Printing Co Ltd Ｉｃカード用ｉｃモジュールとその製造方法、及びｉｃカード
DE4441052A1 (de) * 1994-11-18 1996-05-23 Orga Kartensysteme Gmbh Trägerelement für einen IC-Baustein zum Einsatz in Chipkarten

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
PATENT ABSTRACTS OF JAPAN vol. 096, no. 006 28 June 1996 (1996-06-28) *

Also Published As

Publication number Publication date
FR2761498B1 (fr) 1999-06-18
US20020125329A1 (en) 2002-09-12
EP0970437A1 (fr) 2000-01-12
JP3869860B2 (ja) 2007-01-17
AU720691B2 (en) 2000-06-08
AU6922598A (en) 1998-10-22
HK1028833A1 (en) 2001-03-02
CN1183486C (zh) 2005-01-05
CN1257599A (zh) 2000-06-21
DE69832104T2 (de) 2006-11-23
DE69832104D1 (de) 2005-12-01
FR2761498A1 (fr) 1998-10-02
JP2002511188A (ja) 2002-04-09
US6769619B2 (en) 2004-08-03
BR9808062A (pt) 2000-03-08
EP1168240A2 (fr) 2002-01-02
EP1168240B1 (fr) 2005-10-26
EP1168240A3 (fr) 2002-01-30
RU2200975C2 (ru) 2003-03-20
CA2283692A1 (fr) 1998-10-08
US6435414B1 (en) 2002-08-20

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