WO1994025953A1 - Device and method for displaying image and computer - Google Patents
Device and method for displaying image and computer Download PDFInfo
- Publication number
- WO1994025953A1 WO1994025953A1 PCT/JP1994/000707 JP9400707W WO9425953A1 WO 1994025953 A1 WO1994025953 A1 WO 1994025953A1 JP 9400707 W JP9400707 W JP 9400707W WO 9425953 A1 WO9425953 A1 WO 9425953A1
- Authority
- WO
- WIPO (PCT)
- Prior art keywords
- display device
- dots
- lines
- crt display
- synchronizing signal
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G1/00—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data
- G09G1/06—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows
- G09G1/14—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible
- G09G1/16—Control arrangements or circuits, of interest only in connection with cathode-ray tube indicators; General aspects or details, e.g. selection emphasis on particular characters, dashed line or dotted line generation; Preprocessing of data using single beam tubes, e.g. three-dimensional or perspective representation, rotation or translation of display pattern, hidden lines, shadows the beam tracing a pattern independent of the information to be displayed, this latter determining the parts of the pattern rendered respectively visible and invisible the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2360/00—Aspects of the architecture of display systems
- G09G2360/02—Graphics controller able to handle multiple formats, e.g. input or output formats
Definitions
- the present invention relates to a video display device, a video display method, and a computer.
- the present invention relates to a device that displays a predetermined number of dots and a number of lines of video on a connected CRT display device.
- a video display device that displays video on a CRT display device generally uses a video controller (CRTC) that can set the resolution (dots X lines) of the video to be displayed to some extent.
- a video controller has registers for setting the frequency of the horizontal and vertical synchronizing signals included in the video signal, and is connected to a bus such as a computer.
- a value corresponding to the number of displayable dots and lines of the connected CRT display device is set as a default value or by the CPU.
- the video controller based on the value set in the register, converts the video signal having the horizontal synchronization signal and the vertical synchronization signal of the frequency corresponding to the number of dots and the number of lines that can be displayed by the CRT display device. Create and display the desired video on the CRT display.
- a CRT display device with a variable number of display dots and lines called a multi-sink has been proposed
- a normal CRT display device has a display dot number and a line number.
- the number of lines are fixed (640 dots x 400 lines, etc.), and the image display device can display, for example, 64 dots x 480 lines. If a compatible signal is output, the image cannot be displayed normally.
- the horizontal synchronization frequency increases (vertical).
- the synchronization frequency will be lower). Since the common output is not used for the video signal output side and the CRT display device side, the two signals cannot be completely identical. Therefore, in the CRT display device, the horizontal image is synchronized with the horizontal synchronization signal so that the video is properly arranged in the horizontal direction of the screen by the video signal interposed between the horizontal synchronization signals. Is taking. In the vertical direction, synchronization is similarly achieved using a vertical synchronization signal. Therefore, it is possible to display properly even if the frequency of the horizontal and vertical synchronizing signals is slightly shifted, but if a video signal with a frequency exceeding the allowable range is input, The images are out of sync and the video flows.
- An image display device and a computer according to the present invention have an object to solve such a problem and to enable display of an image whose number is equal to or more than the number of displayable dots or lines inherent in a CRT display device.
- a video display device of the present invention outputs a video signal having a horizontal synchronization signal and a vertical synchronization signal, and outputs the video signal to an external CRT display device by using the original number of dots of the CRT display device.
- a video display device for displaying an image with a number of dots or a number of lines larger than the number of lines, wherein at least one of the horizontal synchronizing signal and the vertical synchronizing signal is displayed.
- An initial frequency setting means for setting an initial value corresponding to the number of lines or the number of dots with which the CRT display device can synchronize at the beginning of display, and at least the set horizontal synchronizing signal. Or a setting for gradually changing the frequency of the vertical synchronizing signal to a value corresponding to the number of lines or the number of dots that is larger than the number of lines or the number of dots inherent in the CRT display device.
- frequency changing means I have.
- the video display device has a register for setting a horizontal synchronizing signal and a vertical synchronizing signal, and the initial frequency setting means and the set frequency changing means are means for setting a value in the register. May be provided.
- the CRT display device receives an externally input video signal corresponding to the original number of dots or the number of lines of the CRT display device and the CRT display device by the initial frequency setting means and the set frequency changing means.
- the video display device at least two or more connectors having different pin arrangements for outputting a video signal adjusted by the initial frequency setting unit and the set frequency changing unit to the CRT display device are provided. It is also possible to provide a configuration provided. Further, in the video display device described above, the video display device is attached to an expansion slot of a computer, and the set frequency changing unit is configured to control the computer to set a target frequency of the horizontal synchronization signal or the vertical synchronization signal. A configuration in which the value is gradually changed may be adopted.
- the initial frequency setting means synchronizes the frequency of the horizontal synchronization signal or the vertical synchronization signal of the video signal to be output with the CRT display device at the beginning of the display. And the initial value corresponding to the number of lines and dots that can be used, and synchronize the horizontal or vertical direction on the CRT display device. If the initial frequency setting means sets a value that allows synchronization in both the horizontal and vertical directions, the image on the CRT display device is displayed correctly. Of course, in the other of the horizontal direction and the vertical direction, it is not always possible to synchronize, and images may flow.
- the setting frequency changing means of the video display device gradually increases the frequency of the horizontal synchronization signal or the vertical synchronization signal, and may increase the number of lines or the number of dots which are larger than the number of dots inherent in the CRT display device. In other words, change over time to a value corresponding to the number of dots.
- the internal synchronizing circuit works to keep the frequency deviation within the allowable range and keeps synchronizing.
- the CRT display device cannot synchronize at all, but once the frequency is changed after synchronizing with a normal value in either direction once, However, it is possible to display an image different from the original number of lines or the number of dots.
- the video display device of the present invention there is an excellent effect that it is possible to try an environment with a high resolution without changing the hardware of the CRT display device.
- the video display device is mounted on an extended slot accessible from a processor. If a computer has an expansion slot to which a self-video display device can be installed, if an image display device is installed in this expansion slot, images with different numbers of dots or lines will be displayed. be able to.
- the video display method of the present invention outputs a video signal having a horizontal synchronizing signal and a vertical synchronizing signal, and outputs the video signal to an external CRT display device with a larger number of dots than the original dot number of the CRT display device or a larger number of lines
- the frequency of the horizontal synchronization signal or vertical synchronization signal is gradually changed to a value corresponding to the number of lines or the number of dots that is larger than the number of lines or dots originally intended for the CRT display device.
- the CRT display device The gist is to display an image on the CRT display device with the number of dots larger than the original number of dots or the number of lines or the number of lines.
- the secondary change of the target value is provided as a function of a device driver incorporated in an operating system of a computer, and when the operating system is started, the device is changed at the time of startup. It can be configured to be executed as a part of the initial processing of the driver.
- the frequency of the horizontal synchronizing signal or the vertical synchronizing signal of the video signal output to the CRT display device can be synchronized in the initial stage of the display. Initial value corresponding to the number of possible lines and dots Therefore, the horizontal or vertical synchronization of the CRT display device is established. After that, the frequency of the horizontal sync signal or vertical sync signal is gradually increased to correspond to the number of lines or dots larger than the original number of lines or dots of the CR display device.
- the internal synchronization circuit works to synchronize the frequency deviation within the allowable range on the CRT display device side.
- a video signal with a frequency separated from the normal value is output from the beginning, no synchronization can be achieved, but after synchronizing with the normal value in one direction and changing the frequency, For example, an image different from the original number of lines or the number of dots can be displayed.
- the video display method of the present invention it is possible to test an image having a large number of lines or dots inherent in the CRT display device, that is, an environment having a high resolution, without changing hardware for the CRT display device. It has an excellent effect of being able to see it.
- FIG. 1 is a schematic configuration diagram of a graphic board 20 according to an embodiment of the present invention
- FIG. 2 is a schematic diagram of a computer 40 equipped with the graphic board 20 and a CRT display device 50. Explanatory diagram showing the state of connection between
- FIG. 3 is a block diagram illustrating the internal configuration of the CRTC22
- FIG. 4 is an explanatory diagram showing the relationship between the registers inside the CRTC 22 and the display
- FIG. 5 is a flowchart showing a process executed by the converter 40 to change the number of display lines.
- FIG. 1 is a block diagram showing a schematic configuration of a graphic board 20 as an embodiment.
- the graphics board 20 is mounted on an expansion slot of a computer, and is electrically connected to a convenience bus by a connector CN1.
- the expansion slot is directly accessible from the CPU built into the computer.
- Dress bus ADB, data bus DB, control signal bus CTRLS, etc. are connected.
- the graphic board 20 operates by receiving these signals and power from the computer.
- the graphic board 20 adopts a CRTC 22, which has a higher function than the CRTC of the main unit, and a large-capacity and high-speed DRAM 24 for expanding image data, and a interface with the main unit.
- an inverter 38 that inverts the reset signal of the CRTC 22 so as to match the logic of the CRTC 22.
- the micro relay 34 switches between output of an external analog RGB signal (usually a signal from the computer) input via the connector CN2 and output of an analog RGB signal from the CRTC 22. It is a thing.
- the graphic board 20 of the embodiment includes two output connectors C N3 and C N4 having different bin arrangements for outputting video signals. The connection of these connectors will be briefly described. As shown in FIG. 2, the graphic board 20 is mounted on an expansion slot provided on the back of the computer 40, and the connectors CN2, CN3, and CN4 are provided. It will be exposed on the back of 40.
- the output connector CNP for analog RGB provided in the computer 40 is directly connected to the input connector CNR of the CRT display device 50 before the graphic board 20 is mounted.
- connection cable 42 Disconnect the connection cable 42 from the output connector CNP, and connect it to the connector CN3 on the graphic board 20.
- another cable 44 is used to connect the connector CNP of the connector 40 to the connector CN2 of the graphic board 20.
- the video signal output by 0 can be selectively output to the CRT display device 50.
- Switching of the microphone port relay 34 and the data selector circuit 36 is assigned to a predetermined I 0 address assigned to the graphic port 20. When the I 0 address is accessed, the output of the address decoder 28 becomes active, and the micro relay 34 and the data selector circuit 36 are driven by this signal. Therefore, if a program for accessing the I0 address is prepared on the computer 40 side, it is easy to switch the display.
- the connection inside the graphic port 20 will be briefly described.
- the upper 8 bits of the address bus (24 bits in total from A0 to A23) on the computer side are directly connected to the address inputs A16 to A23 of CRTC22.
- the lower 16 bits indicate that the I0 address (defined) used by this CRTC 22 overlaps with the address already defined on the computer side. It is connected to a bus converter circuit 26 that converts 0 addresses. Further, a control signal CTRLS for controlling data read / write via the bus is also connected to the bus converter circuit 26.
- the lower 16 bits of the address bus and the control signal CTRLS are connected to an address decoder 28 in addition to the pass converter circuit 26.
- the address decoder 28 is a circuit for generating a signal for driving the micro relay 34 and the data selector circuit 36 described above. When a predetermined data is written from the computer 40 to a predetermined address, Switch its output.
- the DRAM 24 consists of two 4K chips of 256 KX 16 bits, and the CRTC 22 is an address bus MAO to 8, RAS and CAS signals, and a 4-bit light source. Connected by enable signal WE0 to WE3, output enable signal 0E, and 32-bit data bus MD0 to MD31.
- the analog RGB signal, the horizontal synchronizing signal HSYNC, and the vertical synchronizing signal VSYNC output from the CRTC 22 are connected to the connectors CN 3 and CN 4 via the micro relay 34 and the data selection circuit 36 as described above.
- CRTC 22 is a VGA graphic manufactured by CIRRUS LOG IC.
- a chip called the FIC Controller CL-1 GD542X was used.
- This CRT C22 has functions such as an interface circuit with a computer, a graphic control function that handles graphics, and a memory in addition to the function as a normal CRTC. It has a memory control function to control access to the data, a pallet DAC function for analog RGB signals, etc., and almost all of the necessary graphics control in one chip. It has the function of The internal configuration of this CRTC 22 is shown as a block diagram in FIG.
- the CRTC 22 is a CPU interface that controls the interface with the signal on the computer 40 side, and temporarily transfers harmful data from the computer 40 side.
- CPU that includes a CPU buffer 62, a graphic controller 64 that draws graphics based on the written data, and an image generated by a graphic controller 64.
- Memory controller 66 that controls memory such as writing data to DRAM 24, CRTC core 70 that reads information stored in DRAM 24 through memory controller 66 and converts it into video signals, cursor Video FIF 072 that sequentially stores image data read out from the DRAM 24 for image display, including an image display, and an attribute controller that controls the attributes of the displayed image (inversion, underline, color, etc.) 74, de Pallet DAC 76 that converts digital data into analog RGB signals, dual clock generation circuit that generates all the clocks required inside CRTC 22 using the original oscillation frequency from oscillator 30 7 8 Is provided.
- the memory controller 66 is composed of a memory sequencer 67, a memory arbitrator 68, and a bit BLT 69, and is generated by the graphic controller 64. Control is performed such as writing image data to the DRAM 24 and reading data stored in the DRAM 24 in accordance with display timing. Since the writing of data from the computer 40 and the drawing of the accompanying image are not synchronized with the timing of reading the image data for display by the CRT C core 70, these You need a function to make adjustments.
- the bit BLT 69 is for performing rapid drawing of a rectangular image, and contributes to speeding up of drawing when a large number of windows are drawn.
- the CR TC 22 has various registers for image display in the CRT C core 70.
- FIG. 4 is an explanatory diagram showing the relationship between the effective display screen and various registers realizing this in the CRTC 22.
- the CRT display device 50 displays 30 screens (frames) per second, but requires horizontal scanning by an electron gun and horizontal return from the end to the next scanning start end. Also, since a vertical scan and a vertical regression to return from the end to the start of the next screen are necessary, a predetermined area (temporal period) is outside the effective display screen. Required.
- the horizontal length of the effective display screen is set in the register CR 1, and the vertical length is set in the register CR 12 similarly. The setting is performed using a maximum of 10 bits of data.
- the lower shelf of FIG. 4 shows which bit of each register is defined by which bit. [] Indicates the bit position in the register.
- Register CR2 Horizontal blanking start timing
- the computer 40 realizes an appropriate display by writing a value corresponding to the characteristics of the CRT display device 50 into these registers.
- the horizontal regression signal and the vertical displacement signal will be output repeatedly, but the 640
- the repeat interval is 40.3 ⁇ SEC for horizontal rotation and 17.73 mSEC for vertical regression.
- the frequency of this repetition is called the horizontal synchronizing frequency and the vertical synchronizing frequency, respectively. In the embodiment, they are 24.8 KH 256.4 Hz, respectively.
- the computer 40 performs the processing shown in FIG. 5 to display 640 X 480 on the CRT display device 50 of 640 dots X 400 lines. Perform When starting up the system at a specific OS, the computer 40 incorporates a device driver for image display, and executes a synchronous frequency stepping processing routine shown in FIG.
- the value corresponding to the frequency corresponding to 640 dots (24.8 kHz) is set, while for the vertical synchronization frequency, the value corresponding to 47.8 kHz is set.
- the corresponding value is set as an initial value in each register of the graphic board 20 (step S100).
- the reason why the frequency (56.4 Hz) corresponding to 400 lines is not set for the vertical synchronization frequency is as follows.
- the frequency adjustment is performed only for the horizontal synchronization frequency. We want the final number of lines to be 520 by adding the number of surplus lines that are not displayed (40), so the vertical repetition time T V calculated from the horizontal synchronization frequency of 24.8 KHz is
- the screen display is turned on (step S110), and the display is started.
- the horizontal synchronization frequency is an appropriate value of the CRT display device 50
- the CRT display device 50 synchronizes in the horizontal direction. Since the video is not synchronized in the vertical direction, the video is not completely normal. .
- step S120 it is determined whether the horizontal and vertical synchronization frequencies have reached the target values.
- the target values of the horizontal and vertical synchronization frequencies are the frequencies corresponding to 640 dots ⁇ 480 lines (27.4 kHz> 52.6 Hz).
- the judgment in step S120 is ⁇ 0 J, and the processing shifts to step S130 to perform processing for increasing the horizontal synchronization frequency.
- the rate of increase of the synchronization frequency is about 1.0 percent.
- the computer 40 executes a process of performing nothing for a predetermined number of times, thereby performing a process of waiting for a predetermined time (step S140).
- the waiting time in the example is about 14 mSEC.
- step S120 the determination as to whether the synchronization frequency has reached the target value is performed again.
- the horizontal and vertical synchronizing frequencies eventually reach the target values, and the determination in step S120 becomes ⁇ S”.
- the process ends.
- the horizontal synchronization frequency to 27.4 kHz
- the vertical repetition time T V becomes
- the frequency of the horizontal synchronization signal and the vertical synchronization signal of the video signal output from the graphic board 20 to the CRT display device 50 becomes 640 dots X 400 lines of the horizontal synchronization signal.
- the display changes from the value corresponding to the display to the value corresponding to the display of 640 dots X 480 lines over time.
- the CRT display device 50 cannot synchronize, but as in the embodiment, the synchronization is once performed by the normal value in the horizontal direction. If the frequency is gradually increased after taking, even if the video has the number of lines increased by 20%, it can be displayed normally in most cases.
- a display environment in which the vertical resolution of 640 dots X 480 lines is added to the display environment can be realized without adding hardware other than the graphic board 20.
- the CRT display device 50 in order to change from the 640 ⁇ 400 environment to the 640 ⁇ 480 environment, the CRT display device 50 must be replaced or an expensive multi-sync type CRT display device must be prepared in advance.
- the graphic board 20 of the present embodiment it is not necessary to change the hardware to be used for the CRT display device, and the user only needs to arrange the graphic board 20. You can immediately try out a high-resolution environment.
- the initial value of the horizontal and vertical synchronization frequencies may be set to a value corresponding to 640 x 400, and both the horizontal and vertical synchronization frequencies may be gradually changed.
- the initial value of the horizontal and vertical synchronizing frequencies may be set slightly higher than the theoretical value according to the characteristics of the CRT display device used.
- the present invention can also be applied to a video display device for a CRT display device having an S resolution of 640 X400 or higher.
- the number of dots in the horizontal direction can be increased.
- a configuration in which the horizontal and vertical synchronization frequencies are gradually increased by software or hardware on the graphic board 20 without depending on the software of the computer 40, and a video display device integrated with the computer. A built-in configuration is also suitable.
Landscapes
- Engineering & Computer Science (AREA)
- Radar, Positioning & Navigation (AREA)
- Remote Sensing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Controls And Circuits For Display Device (AREA)
- Synchronizing For Television (AREA)
Description
Claims
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/360,826 US5736971A (en) | 1993-04-27 | 1994-04-04 | Method and apparatus for increasing resolution of a computer graphics display |
EP94914560A EP0647932B1 (en) | 1993-04-27 | 1994-04-27 | Device and method for displaying image and computer |
DE69431827T DE69431827T2 (de) | 1993-04-27 | 1994-04-27 | Bildwiedergabevorrichtung und -verfahren und rechner. |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5125440A JP2956738B2 (ja) | 1993-04-27 | 1993-04-27 | 映像表示装置およびコンピュータ |
JP5/125440 | 1993-04-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
WO1994025953A1 true WO1994025953A1 (en) | 1994-11-10 |
Family
ID=14910145
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
PCT/JP1994/000707 WO1994025953A1 (en) | 1993-04-27 | 1994-04-27 | Device and method for displaying image and computer |
Country Status (5)
Country | Link |
---|---|
US (1) | US5736971A (ja) |
EP (1) | EP0647932B1 (ja) |
JP (1) | JP2956738B2 (ja) |
DE (1) | DE69431827T2 (ja) |
WO (1) | WO1994025953A1 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3344197B2 (ja) * | 1996-03-08 | 2002-11-11 | 株式会社日立製作所 | 映像信号の処理装置及びこれを用いた表示装置 |
JPH1039841A (ja) * | 1996-07-19 | 1998-02-13 | Nec Corp | 液晶表示装置 |
KR100283574B1 (ko) * | 1996-08-27 | 2001-03-02 | 윤종용 | 모니터 화면 사이즈 제어 회로 및 그 제어방법 |
TW312764B (en) * | 1997-02-05 | 1997-08-11 | Acer Peripherals Inc | Method and device for calibrating monitor mode |
US6300980B1 (en) * | 1997-02-19 | 2001-10-09 | Compaq Computer Corporation | Computer system design for distance viewing of information and media and extensions to display data channel for control panel interface |
US6011592A (en) * | 1997-03-31 | 2000-01-04 | Compaq Computer Corporation | Computer convergence device controller for managing various display characteristics |
US6313822B1 (en) * | 1998-03-27 | 2001-11-06 | Sony Corporation | Method and apparatus for modifying screen resolution based on available memory |
JP2004514147A (ja) * | 2000-11-17 | 2004-05-13 | レクロイ コーポレイション | 波形処理のためのストリーミングアーキテクチャ |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6392169A (ja) * | 1986-07-24 | 1988-04-22 | マイクロヴアイテツク ピ−エルシ− | 水平偏向装置 |
JPH01295297A (ja) * | 1988-05-23 | 1989-11-28 | Mitsubishi Electric Corp | ディジタル制御ディスプレイモニター |
JPH02259690A (ja) * | 1989-03-30 | 1990-10-22 | Matsushita Electric Ind Co Ltd | 水平偏向周波数切換装置 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4574279A (en) * | 1982-11-03 | 1986-03-04 | Compaq Computer Corporation | Video display system having multiple selectable screen formats |
JPH0786743B2 (ja) * | 1984-05-25 | 1995-09-20 | 株式会社アスキー | ディスプレイコントローラ |
JPH083698B2 (ja) * | 1986-12-11 | 1996-01-17 | ヤマハ株式会社 | 画像処理装置 |
CA2041819C (en) * | 1990-05-07 | 1995-06-27 | Hiroki Zenda | Color lcd display control system |
JPH0686315A (ja) * | 1990-10-11 | 1994-03-25 | Nec Ic Microcomput Syst Ltd | 文字表示装置 |
JP2502829B2 (ja) * | 1991-03-22 | 1996-05-29 | 松下電器産業株式会社 | 画像表示装置 |
DE69320123T2 (de) * | 1992-09-07 | 1999-01-07 | Kabushiki Kaisha Toshiba, Kawasaki, Kanagawa | Fernsehsignalverarbeitungsschaltung |
US5544315A (en) * | 1993-05-10 | 1996-08-06 | Communication Broadband Multimedia, Inc. | Network multimedia interface |
-
1993
- 1993-04-27 JP JP5125440A patent/JP2956738B2/ja not_active Expired - Fee Related
-
1994
- 1994-04-04 US US08/360,826 patent/US5736971A/en not_active Expired - Lifetime
- 1994-04-27 WO PCT/JP1994/000707 patent/WO1994025953A1/ja active IP Right Grant
- 1994-04-27 EP EP94914560A patent/EP0647932B1/en not_active Expired - Lifetime
- 1994-04-27 DE DE69431827T patent/DE69431827T2/de not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6392169A (ja) * | 1986-07-24 | 1988-04-22 | マイクロヴアイテツク ピ−エルシ− | 水平偏向装置 |
JPH01295297A (ja) * | 1988-05-23 | 1989-11-28 | Mitsubishi Electric Corp | ディジタル制御ディスプレイモニター |
JPH02259690A (ja) * | 1989-03-30 | 1990-10-22 | Matsushita Electric Ind Co Ltd | 水平偏向周波数切換装置 |
Non-Patent Citations (1)
Title |
---|
See also references of EP0647932A4 * |
Also Published As
Publication number | Publication date |
---|---|
EP0647932A4 (en) | 1996-05-22 |
EP0647932A1 (en) | 1995-04-12 |
US5736971A (en) | 1998-04-07 |
DE69431827T2 (de) | 2003-09-11 |
JP2956738B2 (ja) | 1999-10-04 |
EP0647932B1 (en) | 2002-12-04 |
JPH06314074A (ja) | 1994-11-08 |
DE69431827D1 (de) | 2003-01-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
USRE41480E1 (en) | Video display apparatus with on-screen display pivoting function | |
KR100853210B1 (ko) | 색 특성 보상 기능과 응답 속도 보상 기능을 갖는 액정표시 장치 | |
JPH05303348A (ja) | Lcdビデオ信号インタフェース装置 | |
KR20020062292A (ko) | 단일 수평 주사 범위 crt 모니터 | |
JPH1115425A (ja) | 表示モード切り替え制御ディスプレイ | |
WO1994025953A1 (en) | Device and method for displaying image and computer | |
JP4921642B2 (ja) | 情報処理装置および表示制御方法 | |
JPH0373897B2 (ja) | ||
JP3505038B2 (ja) | ディスプレイ装置およびコンピュータシステム | |
JP2002032063A (ja) | 液晶表示装置およびウィンドウ表示拡大制御方法 | |
JP3070333B2 (ja) | 画像表示装置 | |
JPH10333656A (ja) | 画像表示装置、画像表示方法、並びに、記憶媒体 | |
CN212257922U (zh) | Lvds转接装置 | |
JP3985451B2 (ja) | 画像処理装置および画像表示装置 | |
JPH0816128A (ja) | ディスプレイ装置 | |
JPH0895535A (ja) | 表示制御装置およびその装置におけるピクセルクロック切り替え方法 | |
JP2506959B2 (ja) | 表示デ―タ処理装置 | |
JP2003044025A (ja) | 表示機構 | |
JPH08140019A (ja) | 画像表示装置 | |
KR20000014526A (ko) | 저해상도 화상 데이터를 확대 표시하는 고해상도 액정 표시 장치 및 그 방법 | |
JPH0792934A (ja) | 記憶回路、アドレス信号発生回路及びフラットパネル駆動回路 | |
KR930007011B1 (ko) | 고해상도용 전용카드 및 vga카드 영상데이타 처리회로 | |
KR19980060010A (ko) | 디이 신호를 동기로 한 제어 신호 생성 회로 | |
JPH05265425A (ja) | テキスト画面グラフィックコントローラ | |
CN101166280A (zh) | 利用信号同步的影像输出装置及其方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AK | Designated states |
Kind code of ref document: A1 Designated state(s): US |
|
AL | Designated countries for regional patents |
Kind code of ref document: A1 Designated state(s): AT BE CH DE DK ES FR GB GR IE IT LU MC NL PT SE |
|
WWE | Wipo information: entry into national phase |
Ref document number: 08360826 Country of ref document: US |
|
WWE | Wipo information: entry into national phase |
Ref document number: 1994914560 Country of ref document: EP |
|
121 | Ep: the epo has been informed by wipo that ep was designated in this application | ||
WWP | Wipo information: published in national office |
Ref document number: 1994914560 Country of ref document: EP |
|
WWG | Wipo information: grant in national office |
Ref document number: 1994914560 Country of ref document: EP |