WO1992012542A1 - Procede de fabrication d'une pile solaire par croissance epitaxiale selective - Google Patents

Procede de fabrication d'une pile solaire par croissance epitaxiale selective Download PDF

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Publication number
WO1992012542A1
WO1992012542A1 PCT/JP1991/001745 JP9101745W WO9212542A1 WO 1992012542 A1 WO1992012542 A1 WO 1992012542A1 JP 9101745 W JP9101745 W JP 9101745W WO 9212542 A1 WO9212542 A1 WO 9212542A1
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layer
crystal
polycrystalline silicon
solar cell
polycrystalline
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PCT/JP1991/001745
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English (en)
Japanese (ja)
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Shoji Nishida
Takao Yonehara
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Canon Kabushiki Kaisha
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Priority to DE4193392A priority Critical patent/DE4193392C2/de
Publication of WO1992012542A1 publication Critical patent/WO1992012542A1/fr

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    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
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    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H01L31/077—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type the devices comprising monocrystalline or polycrystalline materials
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    • H01L31/182—Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
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    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a solar cell having a semiconductor layer made of a high-quality semiconductor crystal having a large grain size. More specifically, the present invention uses a metal substrate and forms a semiconductor layer by growing a large grain polycrystal on the metal substrate without requiring a transfer step to another substrate. And a method for manufacturing a solar cell. Background of the Invention
  • Solar cells are used as sources of driving energy for various devices.
  • Various types of solar cells have been proposed. These solar cells have a Pn junction or a piri junction in the active region.
  • single-crystal silicon or amorphous silicon is used as a constituent material of a semiconductor for forming such a junction.
  • Solar cells using crystalline silicon have been evaluated as favorable because of their high photoelectric conversion efficiency.However, in addition to high manufacturing costs, it is extremely difficult to increase the area and mass production is difficult. There is a problem.
  • solar cells using amorphous silicon are inferior in photoelectric conversion efficiency to solar cells using single crystals, but are easy to increase in area and can be mass-produced. It has the advantage of low cost.
  • the film formed by this proposed method is satisfactory in terms of crystal grain size, but has a rather high impurity concentration. Carrier recombination occurs frequently, and a sufficient photocurrent cannot be obtained.
  • Japanese Patent Application Laid-Open No. 63-188272 discloses that in a method for manufacturing a solar cell, the nucleation density on the substrate surface is sufficiently larger than that of the material on the substrate surface, and the A dissimilar material fine enough to grow only a single nucleus that becomes a single crystal is provided so as to constitute a nucleation surface, and then a nucleus is formed on the dissimilar material by deposition, and a crystal is grown by the nucleus.
  • a substantially single-crystal semiconductor layer of the first conductivity type is formed on the substrate surface, and a substantially single-crystal semiconductor layer of the second conductivity type is formed above the single-crystal layer.
  • a method of manufacturing a solar cell is disclosed, which describes that a thin solar cell having a sufficiently large crystal grain size and good photoelectric conversion efficiency can be obtained.
  • a metal material is used for a nucleation surface where nucleation occurs, and the metal material is used as one electrode, so that constituent atoms of the metal material are formed. Often they diffuse into the semiconductor layer and form an alloy with the semiconductor atoms, which breaks the junction. In addition, there is a problem that even if bonding rupture does not occur, a large amount of scattered metal atoms are taken into the crystal or crystal grain boundaries, etc., and increase the trapping level of the photogenerated carrier. is there.
  • U.S. Pat. No. 4,816,420 discloses that the surface of a single-crystal silicon substrate is covered with a mask made of an insulating film and the single-crystal silicon exposed through a perforated portion of the insulating film. Using silicon as a seed, silicon crystal is laterally grown on the insulating film, and the silicon crystal that has been grown in silicon is grounded. Describes a method for manufacturing a solar cell by transferring it from another single crystal substrate to another substrate.
  • a main object of the present invention is to solve the above-mentioned problems in the prior art and to provide a method capable of efficiently producing a polycrystalline solar cell having good characteristics.
  • Another object of the present invention is to efficiently produce a polycrystalline solar cell having good characteristics by forming a high-quality semiconductor crystal on a metal surface serving as an electrode without requiring a transfer step to another substrate. It is to provide a method that enables
  • a metal substrate is used to increase the grain size to enable efficient growth of a high-quality polycrystalline semiconductor layer, thereby enabling efficient production of a polycrystalline solar cell having good characteristics. It is to provide a way to do it.
  • Another object of the present invention is to form a large-grained polycrystalline semiconductor layer on a small-grained polycrystalline semiconductor layer as a seed crystal, thereby reducing the critical state density at grain boundaries.
  • An object of the present invention is to provide a method that enables efficient production of high-quality solar cells.
  • the present invention solves the above-mentioned problems in the prior art, and has been completed as a result of a dedicated study by the present inventors in order to achieve the above object.
  • a method of manufacturing a polycrystalline solar cell having good characteristics is provided. It is related to.
  • the method of manufacturing a polycrystalline solar cell according to the present invention has the following configuration. I) a step of depositing a non-single-crystal semiconductor layer on a metal substrate;
  • the method for manufacturing a polycrystalline solar cell of the present invention specifically includes the following three technical configurations.
  • Technical configuration 1 As shown in FIGS. 2 to 3, impurity atoms such as P are implanted into polycrystalline silicon 202 deposited on metal substrate 201 by ion implantation or thermal diffusion. To form a polycrystalline silicon layer serving as a mixed contact layer with the underlying metal by introducing into a supersaturated state and annealing, and to crystallize the polycrystalline silicon in the polycrystalline silicon. Abnormal grain growth is performed to form the first polycrystalline silicon layer (however, crystal grain boundaries are omitted in FIG. 2).
  • Technical configuration 2 As shown in FIGS.
  • the surface of said abnormally grain growth first polycrystalline silicon co down layer for example, an oxide film (S i 0 2) and whether Ranaru ⁇ layer 3 0 4 ⁇ , the surface of the insulating ⁇ 3 0
  • the silicon surface is exposed by periodically providing a minute opening in the insulating layer 304, and the insulating layer 304 is used as a non-nucleus forming surface.
  • a second polycrystalline silicon thin film layer having a larger grain size than the crystal grains constituting the polycrystalline layer 303.
  • selective epitaxial growth refers to the method of epitaxial growth using a vapor phase epitaxy, such as that of an it jaw formed on a silicon wafer 401.
  • Vapor phase growth is performed under conditions that do not cause nucleation on the green layer, and the exposed silicon surface in the opening 403 provided in the green layer 402 is used as a seed crystal to form this opening.
  • Department This is a selective crystal growth method in which epitaxial growth is performed.
  • the epitaxial layer filling the opening 403 continues to grow further, the crystal layer grows in the horizontal direction along the surface of the insulating layer while continuing to grow in the vertical direction. This is called the lateral growth method (EpitaxialLateral5Overgrowth).
  • the vertical to lateral growth ratio ⁇ the appearance of facets is generally determined by the formation conditions ⁇ the thickness of the layer ⁇
  • the present inventors have repeated many experiments and found that the size of the opening was a small area of, for example, 9 ⁇ m or less on each side, so that the vertical length was independent of the thickness of the greenery layer.
  • the growth ratio in the direction to the lateral direction is almost 1, and three-dimensionally
  • the present inventors have conducted further experiments and found that even if polycrystalline silicon was used instead of silicon wafer, the crystal grain size (average crystal grain size) would be the same as described above if the crystal grain size was larger than a certain size.
  • the present inventors conducted further experiments, and by appropriately selecting the film thickness of the first polycrystalline silicon layer deposited on the metal substrate, the second polycrystalline silicon layer grown on the first polycrystalline silicon was formed.
  • Metal atoms from the substrate can be prevented from being mixed into the polycrystalline silicon layer of the substrate, and abnormal grain growth due to annealing is simultaneously performed in the process of 0 at the interface between the metal substrate and the first polycrystalline silicon layer.
  • a good ohmic contact is obtained, and a ⁇ ⁇ layer is formed between the first polycrystalline silicon and the second polycrystalline grown thereon. It has been found that the intervening suppresses the 5 diffusion into the second polycrystalline layer in which the impurity atoms highly doped in the first polycrystalline silicon are growing.
  • the present invention has been completed as a result of further research based on the facts found through experiments.
  • a thermal oxide film 100 OA is formed as an insulating layer 402 on the surface of a (100) silicon wafer 401 having a thickness of 500 m.
  • Etching was performed using trisography, and square openings 403 each having an a side in an arrangement as shown in FIG. 11 were provided at intervals of b SO / ⁇ m.
  • three types of openings of 1.2; m, 2 «m, and 4 m were provided as the value of a.
  • selective crystal growth was performed using a normal low-pressure CVD apparatus (LPCVD apparatus) with the configuration shown in Fig. 13.
  • reference numeral 701 denotes a gas supply system
  • 702 denotes a heater
  • 703 denotes a quartz reaction tube
  • 704 denotes a substrate
  • 705 denotes a susceptor.
  • Single crystals with an ascent are arranged regularly on lattice points at intervals of 50 ⁇ m, and the selected crystal is selected according to the pattern of the openings 403 determined in Fig. 11. It was confirmed that growth was taking place. At this time, the ratio of the crystal grown to the opening was 100% for any value of a. In addition, the proportion of facets in the grown single crystal where the facet on the surface is clearly visible without losing (facet rate) depends on the value of a, and as shown in Table 2, a is small. It was found that the ratio of deviation was small.
  • Polycrystalline Shi Li co down surface known Lee on-injection well use a device accelerating ⁇ by implantation Ion Voltage 5 0 kappa V, dose 3. 2 1 0 1 ⁇ ⁇ - 2 conditions [delta] Tsuginiko And the impurity concentration was set to 8 ⁇ 10 2 ° cm ⁇ 3 .
  • the change in crystal grain size when the annealing temperature was changed for such a polycrystalline silicon film on a metal substrate was examined.
  • the annealing time was fixed at 3:10.
  • the crystal grain size in the polycrystalline silicon film was examined using a high-resolution scanning electron microscope and ECC (Electron Channeling Contrast), and as shown in Fig. 14, the annealing temperature increased. A large increase in the crystal grain size was observed in 1100, and an average of about 3 ⁇ m was obtained at 100 000 ⁇ . The crystal grain size was obtained. Furthermore, E C- ⁇ ( ⁇ 1 ectron Channeling Pattern) Examination of each crystal orientation by the method revealed that they were mainly oriented in the (110) direction.
  • the display is performed using a normal LPCVD apparatus as shown in FIG.
  • the ratio of the grown crystal to the opening was 100%.
  • the ratio of the single crystal to the total crystal obtained by growth was about 89%.
  • the length a of one side of the opening is set to 9 m or less, and the interval b is set to be substantially equal to or larger than the size of the grain grown by annealing, or (ii) the opening is formed.
  • a second polycrystalline layer (continuous film) with a larger grain size (approximately 50 m) than the crystals of the first polycrystalline layer, which is composed of a solid single crystal or a partial polycrystal aggregate was confirmed.
  • the height of the continuous film was about 40 from above the oxide film.
  • the surface of the film was ground to a few meters from the oxide layer by polishing, and the P concentration profile from the surface to the oxide layer was measured by secondary mass ion diffraction.
  • the state of diffusion of impurity atoms from the doped polycrystalline silicon layer into the grown crystal layer was investigated.
  • Second polycrystalline silicon co the surface of the down the ion-implantation by B 2 OK e V, 1 X 1 0 1 5 cm a large particle size obtained in Experiment 4 - 2 conditions striking Chikomi, 8
  • the p + layer was formed by annealing at 00 'C, 30 ra in.
  • First polycrystalline silicon co down a second polycrystalline silicon co down / S i 0 z Z small particle diameter and p + large particle size, which is created as of this (n +) / C r structure
  • the present invention has been completed as a result of further research based on the technical matters found through the above-described experiments.
  • the solar cell manufactured by the method of the present invention which has the above-described configuration of the method of manufacturing a solar cell of the present invention, has a first polycrystalline silicon layer doped with impurities on a metal substrate. And a second layer made of polycrystalline silicon having an average grain size larger than that of the polycrystalline silicon constituting the first layer, wherein the first layer and the second layer It has a layer structure in which an insulating layer is interposed between the layers.
  • the solar cell according to the present invention has a configuration schematically shown in FIG.
  • a silicon layer 102 containing metal atoms and a first polycrystalline silicon layer having a relatively small grain size doped with impurities at a high concentration are formed on a metal substrate 100 i. (N + or p + layer) 103, insulating layer 104, second polycrystalline silicon which is an aggregate of single crystals having a grain size larger than that of the first polycrystalline silicon layer
  • a p + or n + layer 106 is formed on the surface of the second polycrystalline silicon layer 105.
  • a transparent electrode 107 also serving as an antireflection film and a current collecting electrode 108 are provided.
  • the metal substrate material used in the solar cell of the present invention any metal that has good conductivity and forms a compound such as silicon and silicide is used. 0, Cr and the like. Of course, any other material may be used as long as it has a metal having the above-mentioned properties attached to the surface, and an inexpensive substrate other than a metal can be used.
  • the thickness of the insulating layer 104 is not particularly limited, but is preferably in the range of 200 to lm.
  • the particle size and thickness of the second polycrystalline silicon layer 105 having a large particle size are preferably 20 to 500, respectively, due to the requirements on the characteristics of the solar cell and the constraints of the process. More preferably, each is 30 to 500 m.
  • the crystals having a large grain size and a small grain size refer to the size of crystal grains as compared between the first polycrystalline layer and the second polycrystalline layer.
  • the thickness of the n + layer 106 depends on the amount of impurities to be introduced, but is preferably in the range of 0.05 to 1 ⁇ "m, more preferably 0.1 to 0.1. Desirably 5 m.
  • a polycrystalline silicon layer 802 (a grain boundary is omitted in the figure) is deposited on a metal substrate 801 by an LPCVD apparatus or the like. At this time, doping is performed at the time of deposition, or high-concentration impurity atoms (for example, P for n-type and B for P-type) are introduced into the supersaturated state by ion implantation or thermal diffusion after deposition (first fifteenth). Figure).
  • high-concentration impurity atoms for example, P for n-type and B for P-type
  • an insulating layer 803 is formed on the surface of the first polycrystalline silicon layer 802 (FIG. 16).
  • Annealing is performed at 800 to 1100 to cause abnormal grain growth in the polycrystalline silicon layer 802 to form a first polycrystalline silicon layer 802 and a metal substrate 800. 1 and the first polycrystalline silicon co down layer containing a metal atom (M) between the silicon co emission layer 8 0 2 (S i x M - x:! M, however, X is, 0 ⁇ X ⁇ 1) Form 804 (Fig. 17).
  • M metal atom
  • Microscopic openings 805 are periodically provided in the insulating layer 803 to expose the surface of the first polycrystalline silicon layer (FIG. 18), and are selected by a method described later.
  • the second polycrystalline silicon which is a continuous film, is formed by growing a crystal with a large grain size by growing a crystal from the minute opening 805 by the epitaxial growth method and the lateral growth method. Obtain layer 806 (Fig. 19).
  • a p + or n + layer 807 is formed on the surface of the grown crystal by ion implantation or impurity diffusion (FIG. 20), and finally a transparent conductive film 808 and a current collecting electrode 809 are provided. (Figure 21).
  • any method such as an LPCVD method, a plasma CVD method, an evaporation method, and a sputtering method may be used, but the LPCVD method is generally used.
  • the thickness of the first polycrystalline silicon layer is determined by factors such as the size of abnormal grains to be grown and the suppression of diffusion of metal atoms from the substrate, but is generally in the range of 0.1 to 1.0. It is desirable to set it in the range of m.
  • amorphous silicon a-Si
  • microcrystalline silicon ⁇ -Si
  • the first polycrystalline silicon layer can be similarly grown by introducing impurities into this layer to form a supersaturated state by introducing impurities into this layer. .
  • the impurities introduced for the purpose of causing abnormal grain growth to the polycrystalline silicon or the silicon such as a-Si and c-Si constituting the first layer include: For n-type, P, As, Sn, etc. are preferable, and for p-type, B> ⁇ £, etc. are preferable.
  • the amount of impurities to be introduced is appropriately determined depending on the desired size of abnormal grains and annealing conditions, but is generally 4 ⁇ 10 2 ° ⁇ - 3 or more.
  • the annealing temperature for forming a silicon layer having a metal atom forming an ohmic contact between a metal substrate and a polycrystalline silicon layer is determined by an annealing temperature for forming an abnormal grain. Since it is lower than the degree of annealing, the process can be simplified by forming it at the same time as annealing for forming abnormal grains as described above, but it goes without saying that it may be performed as a separate process.
  • the insulating layer formed on the silicon layer composed of polycrystalline silicon a-Si, ⁇ c-Si, etc.
  • nucleation occurs during selective crystal growth.
  • a material that has a sufficiently low nucleation density on its surface is used from the point of suppression. For example, oxide silicon co emissions (For example S i 0 2), such as nitride silicon co emissions (eg S i 3 N 4) is used as a representative.
  • LPCVD plasma CVD
  • plasma CVD plasma CVD
  • the like are used as a method for performing selective crystal growth used to grow a large-diameter silicon layer using the above-described abnormal-crystal-grown polycrystalline silicon as a seed crystal.
  • Method, photo-CVD, etc. can be used as appropriate, but LPCVD is particularly preferred.
  • S i H 2 F z, silanes and halogenated Sila emissions such as S i z F 6 can be mentioned as being algebraic 3 ⁇ 4 manner.
  • carrier gas or in addition to the above-mentioned source gas, ⁇ 2 is used for the purpose of obtaining a reducing atmosphere for promoting crystal growth.
  • the ratio of the introduction amount of the source gas and the hydrogen is appropriately determined as desired depending on the formation method, the type of the source gas, the absolute layer G, and the formation conditions.
  • ⁇ : i ′′ ⁇ 1: 1 The value is preferably not more than 0000, and more preferably not less than 1:20 and not more than 1: 800.
  • HC & is used for the purpose of suppressing the generation of nuclei on the insulating layer.
  • the amount of HC added to the raw material gas depends on the forming method, the type of the raw material gas, the material of the insulating layer, and the forming conditions.
  • the ratio is appropriately determined as desired, and preferably from 1: 0.1 to 1: 100, more preferably from 1: 0.2 to 1:80.
  • the temperature and pressure selective crystal growth crack I T in the present invention, forming method and the type of raw material gas to be used varies depending formation conditions such as flow rate of the source gas and Eta 2 and HC £, temperature About For example, in the case of the LPCVD method, it is appropriate that the temperature is controlled to 600 ° C.
  • the temperature is preferably from 20 O'c to 60 O'c, more preferably from 200 to 500 and below 500.
  • 1 0- z ⁇ 7 6 0 T orr are suitable, are rather to preferred Ri good 1 0 - 1 ⁇ 7 6 0 T range orr is desired arbitrary.
  • auxiliary energy is added for the purpose of decomposing the source gas or accelerating the crystal growth on the substrate surface in addition to the thermal energy applied to the substrate.
  • high-frequency energy is generally used
  • ultraviolet light energy is used.
  • the strength of the auxiliary energy varies depending on the forming method and the forming conditions, but the high-frequency energy has a high-frequency discharge power of 20 to 100 W, and the ultraviolet energy has an energy density of 20 to 500 mW.
  • a value such as erf is appropriate, and more preferably, the high-frequency discharge power is preferably 30 to 100 W, and the ultraviolet light energy density is 20 to 400 mWZen !.
  • the polycrystalline thin film formed by the method of the present invention can be subjected to doping with an impurity element during or after crystal growth to form a junction.
  • an impurity element to be used a P-type impurity, an element of Group A of the periodic table, for example, B, A £, G a, In, or the like is preferable.
  • Preferable examples include elements of group V of the periodic table, for example, P, As, Sb, Bi, and the like, but in particular, B, Ga, P, Sb, and the like. Is optimal.
  • the amount of the impurity to be doped is appropriately determined according to the desired electrical characteristics.
  • the substance (impurity 3 ⁇ 45 introduction substance) containing such an impurity element as a component a compound which is in a gaseous state at normal temperature and normal pressure or which can be easily vaporized by an appropriate vaporizer is selected.
  • Such compounds include PH 3 , P z H, PF, PF, PC ⁇ , As HAs F 3 , As F, As C £ a, S b H, S b F 5 , BF 3 , BC £ 3 , BB ra, BHBH 10 B 5 HSBHB ft H li
  • the compounds containing the impurity elements may be used alone or in combination of two or more.
  • the shape of the opening provided in the insulating layer when performing the selective crystal growth method used in the method for manufacturing a solar cell of the present invention is not particularly limited, but a square, a circle, and the like are typical examples. .
  • the size of the opening as shown in Experiment 1, the growing set of mountain-shaped single crystals collapses as the opening becomes larger. In other words, the crystallinity tends to be poor, and it is preferable that the thickness be 9 m or less in order to suppress the collapse of the facet. Actually, it depends on the pattern accuracy of photolithography. Therefore, when the shape is a square, a should be 1 to 5 m.
  • the interval b at which the opening is provided is preferably set to 10 ⁇ m to 500 ⁇ m in consideration of the size of the seed crystal to be grown.
  • the method of the present invention is not limited with respect to the configuration of the solar cell to be manufactured, and has various configurations such as a Schottky type, an MIS type, a pn junction type, a pin junction type, a hetero junction type, and a tandem type. Applicable to battery manufacturing.
  • formation of a desired solar cell by carrying out the present invention will be described in more detail, but the present invention is not limited to these examples.
  • Table 3 shows the deposition conditions for the glass. Immediately after deposition of the phosphorus glass, the temperature was kept at 950, and driving was performed for 5 minutes in an N 2 atmosphere. In this case the amount of P introduced into the polycrystalline sheet re co emissions was about 6 1 0 2 ° cm 3.
  • annealing treatment was performed at 1000 for 4 hours to cause abnormal grain growth. As a result, a first polycrystalline silicon layer having a crystal grain size of about 3 m was obtained.
  • the silicon thin film obtained at this time had a particle size and film thickness of about 50.
  • the thus obtained solar cell having the structure of ⁇ + large grain polycrystalline silicon ZS i 0 z / n + small grain polycrystalline silicon / Cr structure AM1.5 (10 0 mW / erf)
  • the cell area was 25 mm
  • the open voltage was 0.42 V
  • the short-circuit current was 26 mA cni
  • the fill factor was 0.66.
  • the energy conversion efficiency was 7.2%.
  • Such characteristics can be obtained with good reproducibility, and a small grain size polycrystalline silicon layer can be formed.
  • the characteristic variance was greatly improved compared to a solar cell in which large-diameter polycrystalline silicon was grown directly on a metal substrate without using it.
  • Table 5 shows how the characteristics varied depending on the presence or absence of the small grain size polycrystalline silicon layer.
  • a single-crystal aggregate was formed in the same manner as in Example 1, and an amorphous silicon carbide / polycrystalline silicon hetero-type solar cell was finally formed.
  • Selective crystal growth was performed by LPCVD under the conditions shown in Table 6 to form a second silicon layer having a large grain size.
  • FIGS. 22 to 28 show the process of producing the heterojunction solar cell in this example. However, in FIG. 62, the crystal grain boundaries are omitted.
  • This creation process is the same as the creation process in Embodiment 1 (FIGS. 15 to 21), except for the following. That is, as shown in FIG. 26, instead of the p + layer 807, a p-type amorphous silicon force of one byte 607 was formed on the polycrystalline silicon.
  • a P-type amorphous silicon carbide 607 was formed on the polycrystalline silicon 606.
  • the p-type amorphous silicon carrier layer 607 was deposited on a polycrystalline silicon surface with a thickness of 100 A by using a normal plasma CVD system, as shown in Table 6. I let it. At this time, the dark conductivity of the amorphous silicon film is about 10 — Z S ′ cm ⁇ 1 , and the composition ratio of C and Si in the film is 2: 3.
  • the transparent conductive film 608 was formed by electron beam evaporation of about 100 OA of ITO.
  • the AM-I.V characteristics of the amorphous silicon carbide Z-polycrystalline silicon hetero-type solar cell obtained in this manner were measured under AM I.5 light irradiation (cell area 0.16 ⁇ ), Open-circuit voltage 0.49 V, short-circuit photocurrent 21.5 mA / c, fill factor 0.55, and a high value of conversion efficiency of 5.8% was obtained. This is comparable to a conventional amorphous silicon carbide / polycrystalline silicon hetero-type solar cell using a sliced polycrystalline substrate.
  • a pi ⁇ -type polycrystalline solar cell as shown in FIG. 1 was prepared in the same manner as in Example 1. That, Micromax 0 depositing a polycrystalline silicon co down on the substrate was subjected to non-objects spread by out prayer re Ngarasu on the front surface. The S i 3 N 4 and 1 0 0 0 A deposited S i 0 polycrystalline silicon co down surface 2 in place Te conventional LPCVD apparatus after removing the re Ngarasu with HF aqueous solution, 1 0 5 0 * c, Anneal treatment was performed under the condition of 3 hours to cause abnormal grain growth. Thus, a first polycrystalline silicon layer having a crystal grain size of about 3.2 m was obtained.
  • tm a-nn * is-c ..-. s / appendix 4 / no 'no ⁇ / m r ⁇ "_ n heaven 'vt then t) v then ⁇ .
  • a £ is vacuum-deposited on the surface of large-grain silicon to form a + layer
  • the film thickness of the to RTA (R apid Thermal Anneal ing) process was carried out e the A is a 6 0 0 people conditions
  • RTA treatment was carried out at 8 0 0 'c, 1 5 seconds.
  • a transparent conductive film I T0 also serving as an anti-reflection film was formed by e-beam evaporation of about 100 A, and Cr was vacuum-deposited thereon as a current collecting electrode for 1 fm.
  • a nip-type polycrystalline solar cell as shown in FIG. 1 was prepared in the same manner as in Examples 1 to 3.
  • An LPCVD apparatus shown in the first 3 figure had K to C r substrates were deposited with multi ⁇ Shi Li co down of 4 m thickness by thermal decomposition of S i H 4 in 6 3 0 T.
  • An SiO 2 film was deposited at 800 A by a normal pressure CVD apparatus, and abnormal grains were grown in the polycrystalline silicon at I 00 under an annealing condition of 5 hours. Then, a first polycrystalline silicon layer was formed.
  • P is implanted into the surface of the large grain polycrystalline silicon layer by ion implantation under the conditions of 50 KeV, 1 ⁇ 10 15 cm 2 , and the temperature is reduced to 800 * C, 3 O min.
  • a high-quality polycrystalline silicon layer is formed on a metal substrate by using a small-grain polycrystalline silicon layer as a seed crystal and forming a large-grain polycrystalline silicon layer thereon. It is understood that since a polycrystalline silicon layer can be formed, an inexpensive solar cell with mass productivity can be manufactured.
  • a polycrystalline solar cell having good characteristics can be formed on a metal substrate, so that mass-produced inexpensive and high-quality solar cells are marketed. Can be provided.
  • FIG. 1 is a schematic cross-sectional view of the configuration of a Pi ⁇ -type solar cell prepared by the method of the present invention.
  • FIGS. 2 and 3 are schematic explanatory diagrams of abnormal grain growth, respectively.
  • FIG. 4 is a schematic diagram showing a state in which large-grain polycrystalline silicon is grown by selective crystal growth using the abnormally grown polycrystalline silicon as a seed crystal.
  • FIGS. 5 and 6 are schematic diagrams each showing a state in which a large-grain polycrystalline silicon is grown by selective crystal growth using the abnormally grown polycrystalline silicon as a seed crystal.
  • FIGS. 11 and 12 are schematic views showing a process in which a chevron crystal grows three-dimensionally in a selective crystal growth method.
  • FIG. 13 is a schematic view of an LPCVD device used in the process of manufacturing the solar cell of the present invention.
  • FIG. 14 is a characteristic diagram showing a change in crystal grain size when an annealing temperature is changed in an impurity-doped polycrystalline silicon film.
  • FIGS. 15 to 21 are schematic explanatory diagrams of the manufacturing process of the Pin solar cell according to the present invention shown in FIG.
  • FIGS. 22 to 28 are schematic explanatory diagrams of the manufacturing process of the heterojunction solar cell according to the present invention.

Abstract

Procédé efficace de fabrication d'une pile solaire peu coûteuse, selon lequel on forme sur un support métallique une couche semi-conductrice polycristalline à grains de grande taille; et procédé efficace de fabrication d'une pile solaire peu coûteuse de qualité élevée, selon lequel on réduit la densité des défauts aux frontières des grains en formant sur une couche semi-conductrice polycristalline à grains de petite taille une couche semi-conductrice polycristalline à grains de grande taille, la première servant de germes de cristal.
PCT/JP1991/001745 1990-12-26 1991-12-20 Procede de fabrication d'une pile solaire par croissance epitaxiale selective WO1992012542A1 (fr)

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JP2004296598A (ja) * 2003-03-26 2004-10-21 Canon Inc 太陽電池
JP4764469B2 (ja) 2008-10-31 2011-09-07 三菱重工業株式会社 光電変換装置及び光電変換装置の製造方法
KR101643021B1 (ko) 2009-06-05 2016-07-26 내셔날 인스티튜트 오브 어드밴스드 인더스트리얼 사이언스 앤드 테크놀로지 반도체 기판, 광전 변환 디바이스, 반도체 기판의 제조 방법 및 광전 변환 디바이스의 제조 방법
KR101912674B1 (ko) * 2011-01-21 2018-10-29 가부시키가이샤 한도오따이 에네루기 켄큐쇼 수소 발생체, 수소 발생 장치, 발전 장치 및 구동 장치
KR101490599B1 (ko) * 2013-06-25 2015-02-05 주식회사 포스코 비정질 실리콘 태양전지의 제조방법
KR102526398B1 (ko) * 2016-01-12 2023-04-27 상라오 징코 솔라 테크놀러지 디벨롭먼트 컴퍼니, 리미티드 태양 전지 및 이의 제조 방법

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