WO1992012542A1 - Method for manufacturing solar cell by selective epitaxial growth - Google Patents

Method for manufacturing solar cell by selective epitaxial growth Download PDF

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Publication number
WO1992012542A1
WO1992012542A1 PCT/JP1991/001745 JP9101745W WO9212542A1 WO 1992012542 A1 WO1992012542 A1 WO 1992012542A1 JP 9101745 W JP9101745 W JP 9101745W WO 9212542 A1 WO9212542 A1 WO 9212542A1
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layer
crystal
polycrystalline silicon
solar cell
polycrystalline
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PCT/JP1991/001745
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French (fr)
Japanese (ja)
Inventor
Shoji Nishida
Takao Yonehara
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Canon Kabushiki Kaisha
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Priority to DE4193392A priority Critical patent/DE4193392C2/en
Publication of WO1992012542A1 publication Critical patent/WO1992012542A1/en

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    • HELECTRICITY
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    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/072Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type
    • H01L31/0745Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
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    • H01L21/02518Deposited layers
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    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
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    • H01L31/03921Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by their semiconductor bodies characterised by their crystalline structure or particular orientation of the crystalline planes including thin films deposited on metallic or insulating substrates ; characterised by specific substrate materials or substrate features or by the presence of intermediate layers, e.g. barrier layers, on the substrate including only elements of Group IV of the Periodic System
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    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/075Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
    • H01L31/077Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type the devices comprising monocrystalline or polycrystalline materials
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    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
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    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H01L31/182Special manufacturing methods for polycrystalline Si, e.g. Si ribbon, poly Si ingots, thin films of polycrystalline Si
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
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    • Y02E10/548Amorphous silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to a method for manufacturing a solar cell having a semiconductor layer made of a high-quality semiconductor crystal having a large grain size. More specifically, the present invention uses a metal substrate and forms a semiconductor layer by growing a large grain polycrystal on the metal substrate without requiring a transfer step to another substrate. And a method for manufacturing a solar cell. Background of the Invention
  • Solar cells are used as sources of driving energy for various devices.
  • Various types of solar cells have been proposed. These solar cells have a Pn junction or a piri junction in the active region.
  • single-crystal silicon or amorphous silicon is used as a constituent material of a semiconductor for forming such a junction.
  • Solar cells using crystalline silicon have been evaluated as favorable because of their high photoelectric conversion efficiency.However, in addition to high manufacturing costs, it is extremely difficult to increase the area and mass production is difficult. There is a problem.
  • solar cells using amorphous silicon are inferior in photoelectric conversion efficiency to solar cells using single crystals, but are easy to increase in area and can be mass-produced. It has the advantage of low cost.
  • the film formed by this proposed method is satisfactory in terms of crystal grain size, but has a rather high impurity concentration. Carrier recombination occurs frequently, and a sufficient photocurrent cannot be obtained.
  • Japanese Patent Application Laid-Open No. 63-188272 discloses that in a method for manufacturing a solar cell, the nucleation density on the substrate surface is sufficiently larger than that of the material on the substrate surface, and the A dissimilar material fine enough to grow only a single nucleus that becomes a single crystal is provided so as to constitute a nucleation surface, and then a nucleus is formed on the dissimilar material by deposition, and a crystal is grown by the nucleus.
  • a substantially single-crystal semiconductor layer of the first conductivity type is formed on the substrate surface, and a substantially single-crystal semiconductor layer of the second conductivity type is formed above the single-crystal layer.
  • a method of manufacturing a solar cell is disclosed, which describes that a thin solar cell having a sufficiently large crystal grain size and good photoelectric conversion efficiency can be obtained.
  • a metal material is used for a nucleation surface where nucleation occurs, and the metal material is used as one electrode, so that constituent atoms of the metal material are formed. Often they diffuse into the semiconductor layer and form an alloy with the semiconductor atoms, which breaks the junction. In addition, there is a problem that even if bonding rupture does not occur, a large amount of scattered metal atoms are taken into the crystal or crystal grain boundaries, etc., and increase the trapping level of the photogenerated carrier. is there.
  • U.S. Pat. No. 4,816,420 discloses that the surface of a single-crystal silicon substrate is covered with a mask made of an insulating film and the single-crystal silicon exposed through a perforated portion of the insulating film. Using silicon as a seed, silicon crystal is laterally grown on the insulating film, and the silicon crystal that has been grown in silicon is grounded. Describes a method for manufacturing a solar cell by transferring it from another single crystal substrate to another substrate.
  • a main object of the present invention is to solve the above-mentioned problems in the prior art and to provide a method capable of efficiently producing a polycrystalline solar cell having good characteristics.
  • Another object of the present invention is to efficiently produce a polycrystalline solar cell having good characteristics by forming a high-quality semiconductor crystal on a metal surface serving as an electrode without requiring a transfer step to another substrate. It is to provide a method that enables
  • a metal substrate is used to increase the grain size to enable efficient growth of a high-quality polycrystalline semiconductor layer, thereby enabling efficient production of a polycrystalline solar cell having good characteristics. It is to provide a way to do it.
  • Another object of the present invention is to form a large-grained polycrystalline semiconductor layer on a small-grained polycrystalline semiconductor layer as a seed crystal, thereby reducing the critical state density at grain boundaries.
  • An object of the present invention is to provide a method that enables efficient production of high-quality solar cells.
  • the present invention solves the above-mentioned problems in the prior art, and has been completed as a result of a dedicated study by the present inventors in order to achieve the above object.
  • a method of manufacturing a polycrystalline solar cell having good characteristics is provided. It is related to.
  • the method of manufacturing a polycrystalline solar cell according to the present invention has the following configuration. I) a step of depositing a non-single-crystal semiconductor layer on a metal substrate;
  • the method for manufacturing a polycrystalline solar cell of the present invention specifically includes the following three technical configurations.
  • Technical configuration 1 As shown in FIGS. 2 to 3, impurity atoms such as P are implanted into polycrystalline silicon 202 deposited on metal substrate 201 by ion implantation or thermal diffusion. To form a polycrystalline silicon layer serving as a mixed contact layer with the underlying metal by introducing into a supersaturated state and annealing, and to crystallize the polycrystalline silicon in the polycrystalline silicon. Abnormal grain growth is performed to form the first polycrystalline silicon layer (however, crystal grain boundaries are omitted in FIG. 2).
  • Technical configuration 2 As shown in FIGS.
  • the surface of said abnormally grain growth first polycrystalline silicon co down layer for example, an oxide film (S i 0 2) and whether Ranaru ⁇ layer 3 0 4 ⁇ , the surface of the insulating ⁇ 3 0
  • the silicon surface is exposed by periodically providing a minute opening in the insulating layer 304, and the insulating layer 304 is used as a non-nucleus forming surface.
  • a second polycrystalline silicon thin film layer having a larger grain size than the crystal grains constituting the polycrystalline layer 303.
  • selective epitaxial growth refers to the method of epitaxial growth using a vapor phase epitaxy, such as that of an it jaw formed on a silicon wafer 401.
  • Vapor phase growth is performed under conditions that do not cause nucleation on the green layer, and the exposed silicon surface in the opening 403 provided in the green layer 402 is used as a seed crystal to form this opening.
  • Department This is a selective crystal growth method in which epitaxial growth is performed.
  • the epitaxial layer filling the opening 403 continues to grow further, the crystal layer grows in the horizontal direction along the surface of the insulating layer while continuing to grow in the vertical direction. This is called the lateral growth method (EpitaxialLateral5Overgrowth).
  • the vertical to lateral growth ratio ⁇ the appearance of facets is generally determined by the formation conditions ⁇ the thickness of the layer ⁇
  • the present inventors have repeated many experiments and found that the size of the opening was a small area of, for example, 9 ⁇ m or less on each side, so that the vertical length was independent of the thickness of the greenery layer.
  • the growth ratio in the direction to the lateral direction is almost 1, and three-dimensionally
  • the present inventors have conducted further experiments and found that even if polycrystalline silicon was used instead of silicon wafer, the crystal grain size (average crystal grain size) would be the same as described above if the crystal grain size was larger than a certain size.
  • the present inventors conducted further experiments, and by appropriately selecting the film thickness of the first polycrystalline silicon layer deposited on the metal substrate, the second polycrystalline silicon layer grown on the first polycrystalline silicon was formed.
  • Metal atoms from the substrate can be prevented from being mixed into the polycrystalline silicon layer of the substrate, and abnormal grain growth due to annealing is simultaneously performed in the process of 0 at the interface between the metal substrate and the first polycrystalline silicon layer.
  • a good ohmic contact is obtained, and a ⁇ ⁇ layer is formed between the first polycrystalline silicon and the second polycrystalline grown thereon. It has been found that the intervening suppresses the 5 diffusion into the second polycrystalline layer in which the impurity atoms highly doped in the first polycrystalline silicon are growing.
  • the present invention has been completed as a result of further research based on the facts found through experiments.
  • a thermal oxide film 100 OA is formed as an insulating layer 402 on the surface of a (100) silicon wafer 401 having a thickness of 500 m.
  • Etching was performed using trisography, and square openings 403 each having an a side in an arrangement as shown in FIG. 11 were provided at intervals of b SO / ⁇ m.
  • three types of openings of 1.2; m, 2 «m, and 4 m were provided as the value of a.
  • selective crystal growth was performed using a normal low-pressure CVD apparatus (LPCVD apparatus) with the configuration shown in Fig. 13.
  • reference numeral 701 denotes a gas supply system
  • 702 denotes a heater
  • 703 denotes a quartz reaction tube
  • 704 denotes a substrate
  • 705 denotes a susceptor.
  • Single crystals with an ascent are arranged regularly on lattice points at intervals of 50 ⁇ m, and the selected crystal is selected according to the pattern of the openings 403 determined in Fig. 11. It was confirmed that growth was taking place. At this time, the ratio of the crystal grown to the opening was 100% for any value of a. In addition, the proportion of facets in the grown single crystal where the facet on the surface is clearly visible without losing (facet rate) depends on the value of a, and as shown in Table 2, a is small. It was found that the ratio of deviation was small.
  • Polycrystalline Shi Li co down surface known Lee on-injection well use a device accelerating ⁇ by implantation Ion Voltage 5 0 kappa V, dose 3. 2 1 0 1 ⁇ ⁇ - 2 conditions [delta] Tsuginiko And the impurity concentration was set to 8 ⁇ 10 2 ° cm ⁇ 3 .
  • the change in crystal grain size when the annealing temperature was changed for such a polycrystalline silicon film on a metal substrate was examined.
  • the annealing time was fixed at 3:10.
  • the crystal grain size in the polycrystalline silicon film was examined using a high-resolution scanning electron microscope and ECC (Electron Channeling Contrast), and as shown in Fig. 14, the annealing temperature increased. A large increase in the crystal grain size was observed in 1100, and an average of about 3 ⁇ m was obtained at 100 000 ⁇ . The crystal grain size was obtained. Furthermore, E C- ⁇ ( ⁇ 1 ectron Channeling Pattern) Examination of each crystal orientation by the method revealed that they were mainly oriented in the (110) direction.
  • the display is performed using a normal LPCVD apparatus as shown in FIG.
  • the ratio of the grown crystal to the opening was 100%.
  • the ratio of the single crystal to the total crystal obtained by growth was about 89%.
  • the length a of one side of the opening is set to 9 m or less, and the interval b is set to be substantially equal to or larger than the size of the grain grown by annealing, or (ii) the opening is formed.
  • a second polycrystalline layer (continuous film) with a larger grain size (approximately 50 m) than the crystals of the first polycrystalline layer, which is composed of a solid single crystal or a partial polycrystal aggregate was confirmed.
  • the height of the continuous film was about 40 from above the oxide film.
  • the surface of the film was ground to a few meters from the oxide layer by polishing, and the P concentration profile from the surface to the oxide layer was measured by secondary mass ion diffraction.
  • the state of diffusion of impurity atoms from the doped polycrystalline silicon layer into the grown crystal layer was investigated.
  • Second polycrystalline silicon co the surface of the down the ion-implantation by B 2 OK e V, 1 X 1 0 1 5 cm a large particle size obtained in Experiment 4 - 2 conditions striking Chikomi, 8
  • the p + layer was formed by annealing at 00 'C, 30 ra in.
  • First polycrystalline silicon co down a second polycrystalline silicon co down / S i 0 z Z small particle diameter and p + large particle size, which is created as of this (n +) / C r structure
  • the present invention has been completed as a result of further research based on the technical matters found through the above-described experiments.
  • the solar cell manufactured by the method of the present invention which has the above-described configuration of the method of manufacturing a solar cell of the present invention, has a first polycrystalline silicon layer doped with impurities on a metal substrate. And a second layer made of polycrystalline silicon having an average grain size larger than that of the polycrystalline silicon constituting the first layer, wherein the first layer and the second layer It has a layer structure in which an insulating layer is interposed between the layers.
  • the solar cell according to the present invention has a configuration schematically shown in FIG.
  • a silicon layer 102 containing metal atoms and a first polycrystalline silicon layer having a relatively small grain size doped with impurities at a high concentration are formed on a metal substrate 100 i. (N + or p + layer) 103, insulating layer 104, second polycrystalline silicon which is an aggregate of single crystals having a grain size larger than that of the first polycrystalline silicon layer
  • a p + or n + layer 106 is formed on the surface of the second polycrystalline silicon layer 105.
  • a transparent electrode 107 also serving as an antireflection film and a current collecting electrode 108 are provided.
  • the metal substrate material used in the solar cell of the present invention any metal that has good conductivity and forms a compound such as silicon and silicide is used. 0, Cr and the like. Of course, any other material may be used as long as it has a metal having the above-mentioned properties attached to the surface, and an inexpensive substrate other than a metal can be used.
  • the thickness of the insulating layer 104 is not particularly limited, but is preferably in the range of 200 to lm.
  • the particle size and thickness of the second polycrystalline silicon layer 105 having a large particle size are preferably 20 to 500, respectively, due to the requirements on the characteristics of the solar cell and the constraints of the process. More preferably, each is 30 to 500 m.
  • the crystals having a large grain size and a small grain size refer to the size of crystal grains as compared between the first polycrystalline layer and the second polycrystalline layer.
  • the thickness of the n + layer 106 depends on the amount of impurities to be introduced, but is preferably in the range of 0.05 to 1 ⁇ "m, more preferably 0.1 to 0.1. Desirably 5 m.
  • a polycrystalline silicon layer 802 (a grain boundary is omitted in the figure) is deposited on a metal substrate 801 by an LPCVD apparatus or the like. At this time, doping is performed at the time of deposition, or high-concentration impurity atoms (for example, P for n-type and B for P-type) are introduced into the supersaturated state by ion implantation or thermal diffusion after deposition (first fifteenth). Figure).
  • high-concentration impurity atoms for example, P for n-type and B for P-type
  • an insulating layer 803 is formed on the surface of the first polycrystalline silicon layer 802 (FIG. 16).
  • Annealing is performed at 800 to 1100 to cause abnormal grain growth in the polycrystalline silicon layer 802 to form a first polycrystalline silicon layer 802 and a metal substrate 800. 1 and the first polycrystalline silicon co down layer containing a metal atom (M) between the silicon co emission layer 8 0 2 (S i x M - x:! M, however, X is, 0 ⁇ X ⁇ 1) Form 804 (Fig. 17).
  • M metal atom
  • Microscopic openings 805 are periodically provided in the insulating layer 803 to expose the surface of the first polycrystalline silicon layer (FIG. 18), and are selected by a method described later.
  • the second polycrystalline silicon which is a continuous film, is formed by growing a crystal with a large grain size by growing a crystal from the minute opening 805 by the epitaxial growth method and the lateral growth method. Obtain layer 806 (Fig. 19).
  • a p + or n + layer 807 is formed on the surface of the grown crystal by ion implantation or impurity diffusion (FIG. 20), and finally a transparent conductive film 808 and a current collecting electrode 809 are provided. (Figure 21).
  • any method such as an LPCVD method, a plasma CVD method, an evaporation method, and a sputtering method may be used, but the LPCVD method is generally used.
  • the thickness of the first polycrystalline silicon layer is determined by factors such as the size of abnormal grains to be grown and the suppression of diffusion of metal atoms from the substrate, but is generally in the range of 0.1 to 1.0. It is desirable to set it in the range of m.
  • amorphous silicon a-Si
  • microcrystalline silicon ⁇ -Si
  • the first polycrystalline silicon layer can be similarly grown by introducing impurities into this layer to form a supersaturated state by introducing impurities into this layer. .
  • the impurities introduced for the purpose of causing abnormal grain growth to the polycrystalline silicon or the silicon such as a-Si and c-Si constituting the first layer include: For n-type, P, As, Sn, etc. are preferable, and for p-type, B> ⁇ £, etc. are preferable.
  • the amount of impurities to be introduced is appropriately determined depending on the desired size of abnormal grains and annealing conditions, but is generally 4 ⁇ 10 2 ° ⁇ - 3 or more.
  • the annealing temperature for forming a silicon layer having a metal atom forming an ohmic contact between a metal substrate and a polycrystalline silicon layer is determined by an annealing temperature for forming an abnormal grain. Since it is lower than the degree of annealing, the process can be simplified by forming it at the same time as annealing for forming abnormal grains as described above, but it goes without saying that it may be performed as a separate process.
  • the insulating layer formed on the silicon layer composed of polycrystalline silicon a-Si, ⁇ c-Si, etc.
  • nucleation occurs during selective crystal growth.
  • a material that has a sufficiently low nucleation density on its surface is used from the point of suppression. For example, oxide silicon co emissions (For example S i 0 2), such as nitride silicon co emissions (eg S i 3 N 4) is used as a representative.
  • LPCVD plasma CVD
  • plasma CVD plasma CVD
  • the like are used as a method for performing selective crystal growth used to grow a large-diameter silicon layer using the above-described abnormal-crystal-grown polycrystalline silicon as a seed crystal.
  • Method, photo-CVD, etc. can be used as appropriate, but LPCVD is particularly preferred.
  • S i H 2 F z, silanes and halogenated Sila emissions such as S i z F 6 can be mentioned as being algebraic 3 ⁇ 4 manner.
  • carrier gas or in addition to the above-mentioned source gas, ⁇ 2 is used for the purpose of obtaining a reducing atmosphere for promoting crystal growth.
  • the ratio of the introduction amount of the source gas and the hydrogen is appropriately determined as desired depending on the formation method, the type of the source gas, the absolute layer G, and the formation conditions.
  • ⁇ : i ′′ ⁇ 1: 1 The value is preferably not more than 0000, and more preferably not less than 1:20 and not more than 1: 800.
  • HC & is used for the purpose of suppressing the generation of nuclei on the insulating layer.
  • the amount of HC added to the raw material gas depends on the forming method, the type of the raw material gas, the material of the insulating layer, and the forming conditions.
  • the ratio is appropriately determined as desired, and preferably from 1: 0.1 to 1: 100, more preferably from 1: 0.2 to 1:80.
  • the temperature and pressure selective crystal growth crack I T in the present invention, forming method and the type of raw material gas to be used varies depending formation conditions such as flow rate of the source gas and Eta 2 and HC £, temperature About For example, in the case of the LPCVD method, it is appropriate that the temperature is controlled to 600 ° C.
  • the temperature is preferably from 20 O'c to 60 O'c, more preferably from 200 to 500 and below 500.
  • 1 0- z ⁇ 7 6 0 T orr are suitable, are rather to preferred Ri good 1 0 - 1 ⁇ 7 6 0 T range orr is desired arbitrary.
  • auxiliary energy is added for the purpose of decomposing the source gas or accelerating the crystal growth on the substrate surface in addition to the thermal energy applied to the substrate.
  • high-frequency energy is generally used
  • ultraviolet light energy is used.
  • the strength of the auxiliary energy varies depending on the forming method and the forming conditions, but the high-frequency energy has a high-frequency discharge power of 20 to 100 W, and the ultraviolet energy has an energy density of 20 to 500 mW.
  • a value such as erf is appropriate, and more preferably, the high-frequency discharge power is preferably 30 to 100 W, and the ultraviolet light energy density is 20 to 400 mWZen !.
  • the polycrystalline thin film formed by the method of the present invention can be subjected to doping with an impurity element during or after crystal growth to form a junction.
  • an impurity element to be used a P-type impurity, an element of Group A of the periodic table, for example, B, A £, G a, In, or the like is preferable.
  • Preferable examples include elements of group V of the periodic table, for example, P, As, Sb, Bi, and the like, but in particular, B, Ga, P, Sb, and the like. Is optimal.
  • the amount of the impurity to be doped is appropriately determined according to the desired electrical characteristics.
  • the substance (impurity 3 ⁇ 45 introduction substance) containing such an impurity element as a component a compound which is in a gaseous state at normal temperature and normal pressure or which can be easily vaporized by an appropriate vaporizer is selected.
  • Such compounds include PH 3 , P z H, PF, PF, PC ⁇ , As HAs F 3 , As F, As C £ a, S b H, S b F 5 , BF 3 , BC £ 3 , BB ra, BHBH 10 B 5 HSBHB ft H li
  • the compounds containing the impurity elements may be used alone or in combination of two or more.
  • the shape of the opening provided in the insulating layer when performing the selective crystal growth method used in the method for manufacturing a solar cell of the present invention is not particularly limited, but a square, a circle, and the like are typical examples. .
  • the size of the opening as shown in Experiment 1, the growing set of mountain-shaped single crystals collapses as the opening becomes larger. In other words, the crystallinity tends to be poor, and it is preferable that the thickness be 9 m or less in order to suppress the collapse of the facet. Actually, it depends on the pattern accuracy of photolithography. Therefore, when the shape is a square, a should be 1 to 5 m.
  • the interval b at which the opening is provided is preferably set to 10 ⁇ m to 500 ⁇ m in consideration of the size of the seed crystal to be grown.
  • the method of the present invention is not limited with respect to the configuration of the solar cell to be manufactured, and has various configurations such as a Schottky type, an MIS type, a pn junction type, a pin junction type, a hetero junction type, and a tandem type. Applicable to battery manufacturing.
  • formation of a desired solar cell by carrying out the present invention will be described in more detail, but the present invention is not limited to these examples.
  • Table 3 shows the deposition conditions for the glass. Immediately after deposition of the phosphorus glass, the temperature was kept at 950, and driving was performed for 5 minutes in an N 2 atmosphere. In this case the amount of P introduced into the polycrystalline sheet re co emissions was about 6 1 0 2 ° cm 3.
  • annealing treatment was performed at 1000 for 4 hours to cause abnormal grain growth. As a result, a first polycrystalline silicon layer having a crystal grain size of about 3 m was obtained.
  • the silicon thin film obtained at this time had a particle size and film thickness of about 50.
  • the thus obtained solar cell having the structure of ⁇ + large grain polycrystalline silicon ZS i 0 z / n + small grain polycrystalline silicon / Cr structure AM1.5 (10 0 mW / erf)
  • the cell area was 25 mm
  • the open voltage was 0.42 V
  • the short-circuit current was 26 mA cni
  • the fill factor was 0.66.
  • the energy conversion efficiency was 7.2%.
  • Such characteristics can be obtained with good reproducibility, and a small grain size polycrystalline silicon layer can be formed.
  • the characteristic variance was greatly improved compared to a solar cell in which large-diameter polycrystalline silicon was grown directly on a metal substrate without using it.
  • Table 5 shows how the characteristics varied depending on the presence or absence of the small grain size polycrystalline silicon layer.
  • a single-crystal aggregate was formed in the same manner as in Example 1, and an amorphous silicon carbide / polycrystalline silicon hetero-type solar cell was finally formed.
  • Selective crystal growth was performed by LPCVD under the conditions shown in Table 6 to form a second silicon layer having a large grain size.
  • FIGS. 22 to 28 show the process of producing the heterojunction solar cell in this example. However, in FIG. 62, the crystal grain boundaries are omitted.
  • This creation process is the same as the creation process in Embodiment 1 (FIGS. 15 to 21), except for the following. That is, as shown in FIG. 26, instead of the p + layer 807, a p-type amorphous silicon force of one byte 607 was formed on the polycrystalline silicon.
  • a P-type amorphous silicon carbide 607 was formed on the polycrystalline silicon 606.
  • the p-type amorphous silicon carrier layer 607 was deposited on a polycrystalline silicon surface with a thickness of 100 A by using a normal plasma CVD system, as shown in Table 6. I let it. At this time, the dark conductivity of the amorphous silicon film is about 10 — Z S ′ cm ⁇ 1 , and the composition ratio of C and Si in the film is 2: 3.
  • the transparent conductive film 608 was formed by electron beam evaporation of about 100 OA of ITO.
  • the AM-I.V characteristics of the amorphous silicon carbide Z-polycrystalline silicon hetero-type solar cell obtained in this manner were measured under AM I.5 light irradiation (cell area 0.16 ⁇ ), Open-circuit voltage 0.49 V, short-circuit photocurrent 21.5 mA / c, fill factor 0.55, and a high value of conversion efficiency of 5.8% was obtained. This is comparable to a conventional amorphous silicon carbide / polycrystalline silicon hetero-type solar cell using a sliced polycrystalline substrate.
  • a pi ⁇ -type polycrystalline solar cell as shown in FIG. 1 was prepared in the same manner as in Example 1. That, Micromax 0 depositing a polycrystalline silicon co down on the substrate was subjected to non-objects spread by out prayer re Ngarasu on the front surface. The S i 3 N 4 and 1 0 0 0 A deposited S i 0 polycrystalline silicon co down surface 2 in place Te conventional LPCVD apparatus after removing the re Ngarasu with HF aqueous solution, 1 0 5 0 * c, Anneal treatment was performed under the condition of 3 hours to cause abnormal grain growth. Thus, a first polycrystalline silicon layer having a crystal grain size of about 3.2 m was obtained.
  • tm a-nn * is-c ..-. s / appendix 4 / no 'no ⁇ / m r ⁇ "_ n heaven 'vt then t) v then ⁇ .
  • a £ is vacuum-deposited on the surface of large-grain silicon to form a + layer
  • the film thickness of the to RTA (R apid Thermal Anneal ing) process was carried out e the A is a 6 0 0 people conditions
  • RTA treatment was carried out at 8 0 0 'c, 1 5 seconds.
  • a transparent conductive film I T0 also serving as an anti-reflection film was formed by e-beam evaporation of about 100 A, and Cr was vacuum-deposited thereon as a current collecting electrode for 1 fm.
  • a nip-type polycrystalline solar cell as shown in FIG. 1 was prepared in the same manner as in Examples 1 to 3.
  • An LPCVD apparatus shown in the first 3 figure had K to C r substrates were deposited with multi ⁇ Shi Li co down of 4 m thickness by thermal decomposition of S i H 4 in 6 3 0 T.
  • An SiO 2 film was deposited at 800 A by a normal pressure CVD apparatus, and abnormal grains were grown in the polycrystalline silicon at I 00 under an annealing condition of 5 hours. Then, a first polycrystalline silicon layer was formed.
  • P is implanted into the surface of the large grain polycrystalline silicon layer by ion implantation under the conditions of 50 KeV, 1 ⁇ 10 15 cm 2 , and the temperature is reduced to 800 * C, 3 O min.
  • a high-quality polycrystalline silicon layer is formed on a metal substrate by using a small-grain polycrystalline silicon layer as a seed crystal and forming a large-grain polycrystalline silicon layer thereon. It is understood that since a polycrystalline silicon layer can be formed, an inexpensive solar cell with mass productivity can be manufactured.
  • a polycrystalline solar cell having good characteristics can be formed on a metal substrate, so that mass-produced inexpensive and high-quality solar cells are marketed. Can be provided.
  • FIG. 1 is a schematic cross-sectional view of the configuration of a Pi ⁇ -type solar cell prepared by the method of the present invention.
  • FIGS. 2 and 3 are schematic explanatory diagrams of abnormal grain growth, respectively.
  • FIG. 4 is a schematic diagram showing a state in which large-grain polycrystalline silicon is grown by selective crystal growth using the abnormally grown polycrystalline silicon as a seed crystal.
  • FIGS. 5 and 6 are schematic diagrams each showing a state in which a large-grain polycrystalline silicon is grown by selective crystal growth using the abnormally grown polycrystalline silicon as a seed crystal.
  • FIGS. 11 and 12 are schematic views showing a process in which a chevron crystal grows three-dimensionally in a selective crystal growth method.
  • FIG. 13 is a schematic view of an LPCVD device used in the process of manufacturing the solar cell of the present invention.
  • FIG. 14 is a characteristic diagram showing a change in crystal grain size when an annealing temperature is changed in an impurity-doped polycrystalline silicon film.
  • FIGS. 15 to 21 are schematic explanatory diagrams of the manufacturing process of the Pin solar cell according to the present invention shown in FIG.
  • FIGS. 22 to 28 are schematic explanatory diagrams of the manufacturing process of the heterojunction solar cell according to the present invention.

Abstract

A method for manufacturing efficiently a solar cell of a low price, in which a large-grain-size-polycrystalline semiconductor layer is formed on a metallic base, and a method for manufacturing efficiently a high quality solar cell of a low price, by which the defect level density of the grain boundaries is lowered by forming a large-grain-size-polycrystalline semiconductor layer on a small-grain-size-polycrystalline semiconductor layer, using the latter as seed crystals.

Description

明 細 書  Specification
選択的ェビタキシャル成長による太陽電池の製造方法  Method for manufacturing solar cell by selective epitaxial growth
発明の分野  Field of the invention
本発明は、 良質にして大粒径の半導体結晶からなる半導体層を有 する太陽電池の製造方法に関する。 より詳細には、 本発明は金属基 体を使用し、 別基体への転写工程を必要とせずに、 前記金属基体上 に大粒径の多結晶を成長させることによ .り半導体層を形成して太陽 電池を製造する方法に関する。 発明の背景  The present invention relates to a method for manufacturing a solar cell having a semiconductor layer made of a high-quality semiconductor crystal having a large grain size. More specifically, the present invention uses a metal substrate and forms a semiconductor layer by growing a large grain polycrystal on the metal substrate without requiring a transfer step to another substrate. And a method for manufacturing a solar cell. Background of the Invention
各種機器の駆動エネルギ—源として太陽電池が利用されている。 そう した太陽電池として各種のものが提案されている。 それらの太 陽電池は、 活性領域に P n接合か又は p i ri接合を有する構成のも のである。 そう した接合を形成する半導体の構成材料としては一般 に単結晶シリ コ ン又はァモルファスシリ コ ンが用いられている。 結晶シリ コ ンを用いた太陽電池は、 光電変換効率が高いことから好 ま しいものとして評価されているが、 製造コス トが高いことの他、 大面積化が極めて難し く かつ多量生産が難しいという問題がある。 一方アモルフ ァ スシリ コ ンを用いた太陽電池は、 単結晶を用いた 太陽電池に比べ、 光電変換効率の点では劣るものの、 大面積化が容 易であり、 多量生産が可能であり、 したがって製造コス トが安いと いう利点を有する。  2. Description of the Related Art Solar cells are used as sources of driving energy for various devices. Various types of solar cells have been proposed. These solar cells have a Pn junction or a piri junction in the active region. In general, single-crystal silicon or amorphous silicon is used as a constituent material of a semiconductor for forming such a junction. Solar cells using crystalline silicon have been evaluated as favorable because of their high photoelectric conversion efficiency.However, in addition to high manufacturing costs, it is extremely difficult to increase the area and mass production is difficult. There is a problem. On the other hand, solar cells using amorphous silicon are inferior in photoelectric conversion efficiency to solar cells using single crystals, but are easy to increase in area and can be mass-produced. It has the advantage of low cost.
ところで、 最近、 単結晶シリ コ ン太陽電池なみの高光電変換効率 が達成できかつアモルファ スシリ コ ン太陽電池なみの低コス トで提 供できるとして多結晶シリ コ ンを用いた太陽電池が注目され、 該太 陽電池について研究がなされ、 各種の提案がなされている。 多詰晶 ン ソ ¾¾έ ヽ ¾¾ Λ ソ ス し、 これをスライ スして板状体として用いる提案があるが、 この場 合該板状体の厚さは最も薄く て 0. 3 «程度が限度でありそれ以上に 薄くするのは極めて難しい。 こう したことから、 得られる多結晶シ リ コン太陽電池は、 その活性化領域 (即ち、 半導体層) は不可避的 に必要以上に厚いものになってしまい、 材料の有効利用が不十分で あり、 かつ光電変換効率も十分ではなく 、 その上コス ト高のものに なってしまう という問題がある。 By the way, recently, solar cells using polycrystalline silicon have attracted attention because they can achieve high photoelectric conversion efficiency comparable to that of single-crystal silicon solar cells and can be provided at a low cost comparable to amorphous silicon solar cells. Studies have been made on the solar battery, and various proposals have been made. There is a proposal to use a multi-packed crystal so that it can be sliced and used as a plate, but in this case, the thickness of the plate is the thinnest and is limited to about 0.3%. And more It is extremely difficult to make it thin. As a result, in the obtained polycrystalline silicon solar cell, the active region (ie, the semiconductor layer) is inevitably thicker than necessary, and the effective use of materials is insufficient. In addition, the photoelectric conversion efficiency is not sufficient, and the cost is high.
こう したことから、 C V D法などの薄膜形成技術を用いて多結 晶シリ コ ンの薄膜を形成する提案がい く つかなされているが、 い ずれの場合にあっても、 形成される膜の結晶粒径はせいぜい百分 の数ミ ク ロ ン程度にしかならず、 当該膜を使用した太陽電沲は、 上述した塊状多結晶シリ コ ンスラ イ ス法により作成した太陽電池 に比べても光電変換効率の点で劣るという問題がある。 この C V D 法における問題の解決策として、 C V D法により形成した多結晶 シリ コ ン薄膜に Pなどの不純物をイ オ ン打ち込みにより膜中に導 入して過飽和状態にした後、 高温でァニールするこ とにより、 結晶 粒径を膜厚の約 1 0倍程度に ^犬させるいわゆる異常立崁 £技衛が 報告されている ( Y asuo Wada and S higeru Nishimatsu, J ournal of E lectrochemical Society , Solid S tate Science and Technology , 1 2 5 ( 1 9 7 8 ) 1 4 9 9参照) 。  For this reason, some proposals have been made to form a polycrystalline silicon thin film by using a thin film forming technique such as a CVD method. The particle size is at most only a few hundredths of a micron, and the solar cell using this film has a higher photoelectric conversion efficiency than the solar cell made by the above-mentioned bulk polycrystalline silicon slice method. There is a problem that it is inferior in point. As a solution to the problem of the CVD method, an impurity such as P is introduced into the polycrystalline silicon thin film formed by the CVD method by ion implantation to make the film supersaturated, and then annealed at a high temperature. According to this report, a so-called anomalous technology that makes the crystal grain size about 10 times larger than the film thickness has been reported (Yasuo Wada and Shigeru Nishimatsu, Japan of Electrochemical Society, Solid State Science and Technology, 125 (19778) 14999).
しかしこの提案方法により形成される膜は、 結晶粒径の点では満 足のゆく ものではあるものの不純物濃度がかなり高いものである こ とから、 これを使用して作成した太陽電池は、 光生成キャ リ アの再 結合が多発し十分な光電流を得るこ とのできないという問題を伴う。  However, the film formed by this proposed method is satisfactory in terms of crystal grain size, but has a rather high impurity concentration. Carrier recombination occurs frequently, and a sufficient photocurrent cannot be obtained.
これとは別に、 C V D法により形成した多結晶シリ コ ン薄膜にレ 一ザ光を照射して溶融し再結晶化させて結晶粒径を大き くする方法 が提案されているが、 この方法は、 一定品質の膜を定常的に得るの は難しく、 所望の膜が形成できたにしてもその製造コス 卜はかなり のものになってしまう問題があるところ実用的ではない。  Separately, a method has been proposed in which a polycrystalline silicon thin film formed by the CVD method is irradiated with laser light to melt and recrystallize, thereby increasing the crystal grain size. However, it is difficult to constantly obtain a film of a constant quality, and even if a desired film can be formed, the manufacturing cost is considerably high, but it is not practical.
上述したところは、 G a A s , Z n S eなどの化合物半導体の場 合にあっても同様である。 ところで、 特開昭 6 3 - 1 8 2 8 7 2号公報には、 太陽電池の製 造方法において、 基体表面上に該基体表面の材料より も核形成密度 が十分に大き く かつ結晶成長後単結晶となる単一の核だけが成長す る程度に十分微細な異種材料を、 核形成面を構成するように設け、 次いで堆積により該異種材料に核を形成させ、 該核によって結晶を 成長させて上記基体表面上に第 1 の導電型の実質的に単結晶の半導 体層を形成し、 該単結晶層の上方に第 2の導電型の実質的に単結晶 の半導体層を形成することを特徴とする太陽電池の製造方法が開示 され、 この方法によれば、 薄型で結晶粒径の十分大きい、 良好な光 電変換効率を有する太陽電池が得られる旨記載されている。 The same applies to the case of compound semiconductors such as GaAs and ZnSe. By the way, Japanese Patent Application Laid-Open No. 63-188272 discloses that in a method for manufacturing a solar cell, the nucleation density on the substrate surface is sufficiently larger than that of the material on the substrate surface, and the A dissimilar material fine enough to grow only a single nucleus that becomes a single crystal is provided so as to constitute a nucleation surface, and then a nucleus is formed on the dissimilar material by deposition, and a crystal is grown by the nucleus. Thus, a substantially single-crystal semiconductor layer of the first conductivity type is formed on the substrate surface, and a substantially single-crystal semiconductor layer of the second conductivity type is formed above the single-crystal layer. A method of manufacturing a solar cell is disclosed, which describes that a thin solar cell having a sufficiently large crystal grain size and good photoelectric conversion efficiency can be obtained.
しかしながら、 上記公開公報に記載の方法においては、 核形成が 起こる核形成面に金属材料を採用し、 該金属材料を一方の電極とし て用いているために、 この金属材料の構成原子が形成される半導体 層内に拡散し、 半導体原子と合金を形成しこれが接合を破壌するこ とがしばしばある。 また、 接合破壌が起こらずとも抵散した金属原 子が結晶内や結晶粒界などに多 く取り込まれ、 光生成キ ヤ リ アを ト ラ ップする準位を増加させてしまう問題がある。  However, in the method described in the above publication, a metal material is used for a nucleation surface where nucleation occurs, and the metal material is used as one electrode, so that constituent atoms of the metal material are formed. Often they diffuse into the semiconductor layer and form an alloy with the semiconductor atoms, which breaks the junction. In addition, there is a problem that even if bonding rupture does not occur, a large amount of scattered metal atoms are taken into the crystal or crystal grain boundaries, etc., and increase the trapping level of the photogenerated carrier. is there.
また、 米国特許第 4 , 8 1 6 , 4 2 0号には、 単結晶シリ コ ン基板の 表面を絶緣膜からなるマスクで覆い、 該絶緣膜の穿孔部を介して露 出した単結晶シ リ コ ンをシー ド として該絶緣膜上にシ リ コ ン結晶を ラテラル ォ 一ノ 'ーグロ ス (l a tera l ov erg rou th ) させ、 ォ ー ノ、'一 グロスしたシリ コ ン結晶を下地の単結晶基板から剝離して別の基板 上に転写して太陽電池を製造する方法が記載されている。  U.S. Pat. No. 4,816,420 discloses that the surface of a single-crystal silicon substrate is covered with a mask made of an insulating film and the single-crystal silicon exposed through a perforated portion of the insulating film. Using silicon as a seed, silicon crystal is laterally grown on the insulating film, and the silicon crystal that has been grown in silicon is grounded. Describes a method for manufacturing a solar cell by transferring it from another single crystal substrate to another substrate.
しかしながら、 この方法は、 単結晶シリ コ ンを基板として用いて いるが故に、 大面積化が困難であるという問題がある。 即ち、 こ の 方法により大面積の太陽電池パネルを形成するとなれば、 上述した よ つ に して开ク レた シ ソ コ ン iffi を sx ¾ ,½、 レ、 てれりを入面預の 別基板上に付与するようにすることが必要になり、 製造工程が複雑 になるという問題がある他、 こう して得られる太陽電池はコス ト高 のものになるという問題もある。 発明の要約 However, this method has a problem that it is difficult to increase the area because single crystal silicon is used as a substrate. In other words, if a large-area solar cell panel is formed by this method, then the silicon substrate iffi that has been completed as described above can be stored in the sx ¾, ½, 、, 、, and the territory. It is necessary to apply it on another substrate, which complicates the manufacturing process, and the solar cell obtained in this way is costly. There is also the problem of becoming something. Summary of the Invention
本発明の主たる目的は、 上述した従来技術における諸問題を解決 し、 特性の良好な多結晶太陽電池の効率的製造を可能にする方法を 提供することにある。  A main object of the present invention is to solve the above-mentioned problems in the prior art and to provide a method capable of efficiently producing a polycrystalline solar cell having good characteristics.
本発明の他の目的は、 別の基板への転写工程を必要とせずに、 電 極となる金属面上に良質の半導体結晶形成ができて、 特性の良好な 多結晶太陽電池の効率的製造を可能にする方法を提供することにあ る。  Another object of the present invention is to efficiently produce a polycrystalline solar cell having good characteristics by forming a high-quality semiconductor crystal on a metal surface serving as an electrode without requiring a transfer step to another substrate. It is to provide a method that enables
本発明の他の B的は、 金属基体を使用して大粒径にして良質の多 結晶半導体層の効率的成長を可能にし、 もって特性の良好な多結晶 太陽電池の効率的製造を可能にする方法を提供することにある。 本発明の他の目的は、 小粒径多結晶半導体層を種結晶としてその 上に大粒痊多結晶半導^層を^成することにより、 粒界での欠酷準 位密度を滅らして、 高品質の太陽電池の効率的製造を可能にする方 法を提供することにある。  According to another aspect of the present invention, a metal substrate is used to increase the grain size to enable efficient growth of a high-quality polycrystalline semiconductor layer, thereby enabling efficient production of a polycrystalline solar cell having good characteristics. It is to provide a way to do it. Another object of the present invention is to form a large-grained polycrystalline semiconductor layer on a small-grained polycrystalline semiconductor layer as a seed crystal, thereby reducing the critical state density at grain boundaries. An object of the present invention is to provide a method that enables efficient production of high-quality solar cells.
本発明は、 上述の従来技術における諸問題を解決し、 上記の目的 を達成すべく本発明者らによる銳意研究の結果完成に至ったもので あり、 特性の良好な多結晶太陽電池の製造方法に係わるものである。 本発明の多結晶太陽電池の製造方法は、 下述する構成内容のもの である。 即ち、 )金属基体上に非単結晶半導体層を堆積させる工程、 The present invention solves the above-mentioned problems in the prior art, and has been completed as a result of a dedicated study by the present inventors in order to achieve the above object. A method of manufacturing a polycrystalline solar cell having good characteristics is provided. It is related to. The method of manufacturing a polycrystalline solar cell according to the present invention has the following configuration. I) a step of depositing a non-single-crystal semiconductor layer on a metal substrate;
(b)前記非単結晶半導体層に不純物を導入して過飽和状態にする工程、(b) introducing an impurity into the non-single-crystal semiconductor layer to put it in a supersaturated state,
(c)前記非単結晶半導体層の表面に絶緣層を形成する工程、 (d)ァニー ルすることにより前記非単結晶半導体層の結晶粒径を大き く し多結 晶半導体層を形成する工程、 (e)前記絶緣層に前記多結晶半導体層の 平均結晶粒例より も '、さな穿孔部を複数設けて前記多結晶半導体層 の表面を露出させる工程、 (f)気相成長法により前記穿孔部を介して 結晶成長を行い前記絶緣層上に 3次元的にオーバーグロ—スさせて 前記多結晶半導体層の平均結晶粒径より も大きな粒径を有する複数 の半導体単結晶体を形成する工程、 及び (g)前記複数の半導体単結晶 体上に電極を形成する工程の (a)乃至 (g)の工程からなる こ とを特徴と する太陽電池の製造方法である。 (c) a step of forming an insulating layer on the surface of the non-single-crystal semiconductor layer, and (d) a step of increasing the crystal grain size of the non-single-crystal semiconductor layer by annealing to form a polycrystalline semiconductor layer. (E) a step of providing a plurality of smaller perforations in the insulating layer than the average crystal grain of the polycrystalline semiconductor layer to expose the surface of the polycrystalline semiconductor layer; The crystal is grown through the perforated portion and three-dimensionally overgrown on the insulating layer. (A) forming a plurality of semiconductor single crystals having a grain size larger than the average crystal grain size of the polycrystalline semiconductor layer; and (g) forming an electrode on the plurality of semiconductor single crystals. A method for manufacturing a solar cell, comprising the steps of (g) to (g).
本発明の多結晶太陽電池の製造方法は、 具体的には、 次の 3つの 技術構成から成る。 即ち、 技術構成 1 : 第 2乃至 3図に示されるよ うに金属基板 2 0 1上に堆積された多結晶シリ コ ン 2 0 2に対し P などの不純物原子を、 イ オン打ち込みまたは熱拡散などにより導入 して過飽和状態にし、 ァニールすることで下地金属との才― ミ ッ ク コ ンタ ク ト層となる多結晶シリ コ ン層を形成するとともに、 該多結 晶シリ コ ン中の結晶を異常粒成長を行わせて第 1 の多結晶シリ コ ン 層とする (ただし第 2図においては結晶粒界を省略している。 ) ; 技術構成 2 : 第 4乃至 6図に示すよう に、 異常粒成長させた前記第 1 の多結晶シリ コ ン層の表面に、 例えば酸化膜 ( S i 0 2 ) などか らなる铯緣層 3 0 4を澎成し、 該絶緣層 3 0 の表面に周期的に微 小な開口部を設けてシリ コ ン表面を露出し、 該絶縁層 3 0 4を非核 形成面とし、 単結晶シリ コ ンのシー ドを形成する ; そして技術構成 3 : 前記絶緣層と前記各個のシー ドについて選択的ヱビタキシャル 成長および横方向成長を行い、 大きさ (粒径) の揃った単結晶体を 成長させ、 多結晶層 3 0 3を構成する結晶粒より も大粒柽である第 2 の多結晶シリ コ ン薄膜層を形成する、 3つの技術構成からなる。 以上の 3つの技術構成の具体的内容については後に詳述する。 The method for manufacturing a polycrystalline solar cell of the present invention specifically includes the following three technical configurations. Technical configuration 1: As shown in FIGS. 2 to 3, impurity atoms such as P are implanted into polycrystalline silicon 202 deposited on metal substrate 201 by ion implantation or thermal diffusion. To form a polycrystalline silicon layer serving as a mixed contact layer with the underlying metal by introducing into a supersaturated state and annealing, and to crystallize the polycrystalline silicon in the polycrystalline silicon. Abnormal grain growth is performed to form the first polycrystalline silicon layer (however, crystal grain boundaries are omitted in FIG. 2). Technical configuration 2: As shown in FIGS. 4 to 6, the surface of said abnormally grain growth first polycrystalline silicon co down layer, for example, an oxide film (S i 0 2) and whether Ranaru铯緣layer 3 0 4澎成, the surface of the insulating緣層3 0 The silicon surface is exposed by periodically providing a minute opening in the insulating layer 304, and the insulating layer 304 is used as a non-nucleus forming surface. Forming a seed of single crystal silicon; and technology configuration 3: performing selective epitaxial growth and lateral growth on the insulating layer and each of the seeds to form a single crystal having a uniform size (grain size). Are grown to form a second polycrystalline silicon thin film layer having a larger grain size than the crystal grains constituting the polycrystalline layer 303. The specific contents of the above three technical configurations will be described later in detail.
こ こで、 本発明においていう選択的ェビタキシャル成長法の一般 的原理について簡単に説明しておく こととする。  Here, the general principle of the selective epitaxial growth method according to the present invention will be briefly described.
選択的ェビタキシャル成長法とは、 第 7乃至 8図に示したように、 気相成長法を用いてェビタキシャル成長を行う場合に、 シリ コ ンゥ ェハ 4 0 1 上に形成された it朕などの絶緑層上では核形成か起き ないような条件の下で気相成長を行い、 絶緣層 4 0 2に設けられた 開口部 4 0 3内の露出したシリ コ ン表面を種結晶としてこの開口部 内でヱビタキシ ャル成長を行う選択的結晶成長法である。 開口部 4 0 3を埋めたヱピタキシャル層がさらに成長を続けた場合には、 結晶層は縦方向の成長を続けながら絶縁層の表面に沿って横方 向にも成長していく。 これが横方向成長法 (E p i tax i a l L a tera l 5 O vergrow th ) と呼ばれるもので、 この時の縦方向対横方向の成長 比ゃファセッ トの出現は一般に形成条件ゃ絶緣層の厚さに依存する < 本発明者らは幾多の実験を重ねることにより、 開口部の大きさを 例えば一辺が 9 μ m以下の微小な領域とすることにより、 絶緑層の 厚さに関係な く縦方向対横方向の成長比がほぼ 1 で三次元的に铯緣As shown in Figs. 7 and 8, selective epitaxial growth refers to the method of epitaxial growth using a vapor phase epitaxy, such as that of an it jaw formed on a silicon wafer 401. Vapor phase growth is performed under conditions that do not cause nucleation on the green layer, and the exposed silicon surface in the opening 403 provided in the green layer 402 is used as a seed crystal to form this opening. Department This is a selective crystal growth method in which epitaxial growth is performed. When the epitaxial layer filling the opening 403 continues to grow further, the crystal layer grows in the horizontal direction along the surface of the insulating layer while continuing to grow in the vertical direction. This is called the lateral growth method (EpitaxialLateral5Overgrowth). At this time, the vertical to lateral growth ratio 成長 the appearance of facets is generally determined by the formation conditions 形成 the thickness of the layer <The present inventors have repeated many experiments and found that the size of the opening was a small area of, for example, 9 μm or less on each side, so that the vertical length was independent of the thickness of the greenery layer. The growth ratio in the direction to the lateral direction is almost 1, and three-dimensionally
10 層上で結晶成長していく こと、 明瞭なファセッ 卜が現れて山型の単 結晶体 4 0 4が得られることを見い出した (第 9乃至 1 0図) 。 It was found that the crystal grows on the 10 layers and that a clear facet appears and a mountain-shaped single crystal 404 is obtained (Figs. 9 to 10).
また本発明者らはさらに実験を重ねることにより、 シ リ コ ンゥェ ハの代わりに多結晶シリ コ ンを用いても結晶粒径 (平均結晶粒径) がある大きさ以上であれば上述と同様な方法により山型の単結晶体 In addition, the present inventors have conducted further experiments and found that even if polycrystalline silicon was used instead of silicon wafer, the crystal grain size (average crystal grain size) would be the same as described above if the crystal grain size was larger than a certain size. Single-crystal body
Ι δ が得られることを見い ffiした。 We found that Ι δ was obtained.
また本発明者らはさらに実験を行い、 金属基板上に堆積した第 1 の多結晶シリ コ ン層の膜厚を適当に選ぶことで第 1 の多結晶シリ コ ン上に成長させた第 2の多結晶シリ コ ン層に基板からの金属原子が 混入することが阻止できること、 ァニールにより異常粒成長を行う 0 過程で同時に金属基板 -第 1 の多結晶シ リ コ ン層界面でシリ サイ ド などの中間層が形成され良好なォー ミ ック接触が得られることおよ び第 1 の多結晶シリ コ ンとその上に成長させた第 2 の多結晶との間 に铯緣層が介在することにより第 1 の多結晶シリ コ ン中に高濃度に ド—ビングされた不純物原子が成長している第 2の多結晶層中への 5 拡散が抑えられることを見い出した。 本発明は、 実験を介して見い 出した事実に基づいて更なる研究の結果完成に至つたものである。  Further, the present inventors conducted further experiments, and by appropriately selecting the film thickness of the first polycrystalline silicon layer deposited on the metal substrate, the second polycrystalline silicon layer grown on the first polycrystalline silicon was formed. Metal atoms from the substrate can be prevented from being mixed into the polycrystalline silicon layer of the substrate, and abnormal grain growth due to annealing is simultaneously performed in the process of 0 at the interface between the metal substrate and the first polycrystalline silicon layer. And a good ohmic contact is obtained, and a 铯 緣 layer is formed between the first polycrystalline silicon and the second polycrystalline grown thereon. It has been found that the intervening suppresses the 5 diffusion into the second polycrystalline layer in which the impurity atoms highly doped in the first polycrystalline silicon are growing. The present invention has been completed as a result of further research based on the facts found through experiments.
- - ~r. 一 》 、、  --~ r.
^ ド ^ t >^j ^B つ レン つ / 夭 ^ vrt ^ ^ o 験 1 (選択的結晶成長) 第 7図に示した場合と同様にして、 5 0 0 m厚の( 1 0 0 )シリ コ ンウェハ 4 0 1 の表面に絶緣層 4 0 2 として熱酸化膜 1 0 0 O A 形成し、 フ ォ ト リ ソグラフィ 一を用いてエ ッチングを行い、 第 1 1 図に示すような配置で一辺が aであるような正方形の開口部 4 0 3 を b S O /^ mの間隔で設けた。 ここで aの値として 1. 2 ; m、 2 « m、 4 mの 3種類の開口部を設けた。 次に第 1 3図に示した構 成の通常の減圧 C V D装置 ( L P C V D装置) を用いて選択的結晶 成長を行った。 ^ De ^ t> ^ j ^ B len one / young ^ vrt ^ ^ o Experiment 1 (selective crystal growth) In the same manner as in the case shown in FIG. 7, a thermal oxide film 100 OA is formed as an insulating layer 402 on the surface of a (100) silicon wafer 401 having a thickness of 500 m. Etching was performed using trisography, and square openings 403 each having an a side in an arrangement as shown in FIG. 11 were provided at intervals of b SO / ^ m. Here, three types of openings of 1.2; m, 2 «m, and 4 m were provided as the value of a. Next, selective crystal growth was performed using a normal low-pressure CVD apparatus (LPCVD apparatus) with the configuration shown in Fig. 13.
第 1 3図において、 7 0 1 はガス供給系、 7 0 2 はヒータ—、 7 0 3 は石英反応管、 7 0 4 は基板、 7 0 5 はサセプタである。 原 料ガスには S i H z C 2を用い、 キャ リ アガスとして H 2 を用い、 さ らに絶緣層 4 0 2 の酸化膜上での核の発生を抑制する ために H C £を添加した。 こ の時の成長条件は表 1 に示すようにした。 成長終了後、 ウェハ表面の様子を光学顕微鏡で観察したところ、 第 9図あるいは第 1 2図に示すように、 ど ® a ®値に封しても粒径 が約 2 0 mの山型フ ァ セ 'ン トを有する単結晶体 4 0 4が 5 0 μ m 間隔で格子点上に規則正しく配列しており、 第 1 1図で決められた 開口部 4 0 3 のバタ一ンに従って選択結晶成長が行われていること が確かめられた。 このとき、 開口部に対して成長した結晶が占める 割合はどの a の値に対しても 1 0 0 %であった。 また、 成長した単 結晶体の中で表面のファセ ッ トがく ずれないで明確に出ているもの の割合 (ファセ ッ ト率) は a の値に依存し、 表 2に示すように aが 小さい程く ずれている割合は少ないことがわかった。 In FIG. 13, reference numeral 701 denotes a gas supply system, 702 denotes a heater, 703 denotes a quartz reaction tube, 704 denotes a substrate, and 705 denotes a susceptor. Using S i H z C 2 in the raw material gas, and H 2 is used as calibration Li Agasu was added HC £ to suppress the generation of nuclei on absolute緣層4 0 2 oxide film to be al . Table 1 shows the growth conditions at this time. After the growth was completed, the surface of the wafer was observed with an optical microscope. As shown in FIG. 9 or FIG. 12, even when sealed to any value, the peak shape with a particle size of about 20 m was obtained. Single crystals with an ascent are arranged regularly on lattice points at intervals of 50 μm, and the selected crystal is selected according to the pattern of the openings 403 determined in Fig. 11. It was confirmed that growth was taking place. At this time, the ratio of the crystal grown to the opening was 100% for any value of a. In addition, the proportion of facets in the grown single crystal where the facet on the surface is clearly visible without losing (facet rate) depends on the value of a, and as shown in Table 2, a is small. It was found that the ratio of deviation was small.
また、 得られた単結晶体は全て互いに方位が揃っており、 基板で あるシリ コ ンウェハの結晶方位を正確に受け継いでいることがわか つ / o 実験 2 (金属基板上の多結晶シリ コ ン中の異常粒成長) 基体と して厚さ 0. 8 «の ク ロ ム基板上にタ ングス テ ン (W) を 1 0 0 O A真空蒸着しその上に通常の L P C V D装置により S i H 4 を 6 3 0 'Cで熱分解して 0. 4 m多結晶シリ コ ンを堆積させた。 こ のときの多結晶シリ コ ンの結晶粒径は X線回折で調べたところ約In addition, all the obtained single crystal bodies have the same orientation to each other, and it can be seen that the crystal orientation of the silicon wafer, which is the substrate, is accurately inherited./o Experiment 2 (polycrystalline silicon on a metal substrate) Tungsten (W) on a 0.8 mm thick chromium substrate as a substrate S i H 4 and the 6 3 0 'C pyrolyzed by depositing 0. 4 m polycrystalline silicon co emissions at the 1 0 0 OA vacuum deposition and conventional LPCVD apparatus thereon. The crystal grain size of the polycrystalline silicon at this time was approximately
8 0 人であった。 80 people.
δ 次にこ の多結晶シ リ コ ンの表面に周知のイ オ ン注入装置を用 いてィォン打ち込みにより Ρを加速電圧 5 0 Κ V、 ドーズ量 3. 2 1 0 1 δαπ-2の条件で打ち込み、 不純物濃度を 8 X 1 0 2° cm-3とした。 このような金属基板上の多結晶シリ コ ン膜に対してァニール温度 を変えたときの結晶粒径の変化を調べた。 なおァニール時間ば 3時 10 間一定とした。 Polycrystalline Shi Li co down surface known Lee on-injection well use a device accelerating Ρ by implantation Ion Voltage 5 0 kappa V, dose 3. 2 1 0 1 δ απ- 2 conditions [delta] Tsuginiko And the impurity concentration was set to 8 × 10 2 ° cm− 3 . The change in crystal grain size when the annealing temperature was changed for such a polycrystalline silicon film on a metal substrate was examined. The annealing time was fixed at 3:10.
ァニール後に高分解能走査型電子顕微鏡および E C C (E lectron Channel ing C ontrast ) 法により多結晶シリ コ ン膜中の結晶粒径 を調べたところ、 第 1 4図に示すようにァニール温度の増加ととも に結晶粒径の大幅な増大が見られ、 1 0 0 0 で平均約 3 β mの結 】 Γι 晶粒径が得られた- さらに E C- Ρ ( Ε 1 ec tron C hannc l ing Pattern) 法で各々の結晶方位を調べたところ、 主に ( 1 1 0 ) 方向に配向し ていることがわかつた。  After annealing, the crystal grain size in the polycrystalline silicon film was examined using a high-resolution scanning electron microscope and ECC (Electron Channeling Contrast), and as shown in Fig. 14, the annealing temperature increased. A large increase in the crystal grain size was observed in 1100, and an average of about 3 β m was obtained at 100 000 Γ. The crystal grain size was obtained. Furthermore, E C- Ρ (Ρ 1 ectron Channeling Pattern) Examination of each crystal orientation by the method revealed that they were mainly oriented in the (110) direction.
また、 ァニール後の金属基板 多結晶シリ コ ン界面付近の組成分 折を行ったところ、 界面では Wと S i が反応してタングステンシリ 0 サイ ド ( W X S i ,— x : 0 < X < 1 ) が形成されていることが分か つた。 このときのシリ サイ ドの組成は大部分が W S i 2 であった。 実験 3 (金属基板/多結晶シリ コ ン層上への選択的結晶成長) 金属基板上に、 実験 2 と同様な方法で多結晶シリ コ ン層を形成し、 5 その多結晶シリ コ ン層を用いて選択的結晶成長の実験を行った。 In addition, when compositional analysis was performed near the metal substrate polycrystalline silicon interface after annealing, W and Si reacted at the interface, and the tungsten silicon 0 side (WXS i, — x : 0 <X <1 ) Was formed. The composition of the silicon rhino de at this time were mostly WS i 2. Experiment 3 (Selective crystal growth on metal substrate / polycrystalline silicon layer) On the metal substrate, a polycrystalline silicon layer was formed in the same manner as in Experiment 2, and 5 the polycrystalline silicon layer. An experiment of selective crystal growth was performed using.
形成した第 1 の多結晶シリ コ ン層の表面に実験 1 と同様の方法で ¾ 層としての熱酸化膜を約 1 0 0 0 A形成し、 フォ ト リ ソグラ -ノ ィ ーを用いてエ ッチングを行い、 一辺が a = 1. 2 mであるような 正方形の開口部を b = 5 0 mの間隔で格子点状に設け、 第 1 の多 結晶シリ コ ンの表面を露出させた。 On the surface of the first polycrystalline silicon layer thus formed, a thermal oxide film of about 100 A was formed as a で layer in the same manner as in Experiment 1 and etched using photolithography. First, a square opening with a side of a = 1.2 m is provided at grid points of b = 50 m. The surface of the crystalline silicon was exposed.
次いで、 第 1 3図に示すような通常の L P C V D装置を用いて表 Next, the display is performed using a normal LPCVD apparatus as shown in FIG.
1 に示す成長条件で選択的結晶成長を行った。 成長終了後、 第 1 の 多結晶シリ コ ン層ノ酸化膜表面の様子を光学顕微鏡で観察したとこ ろ、 実験 1 と同様に粒径が約 2 0 の山型ファセ ッ トを有する単 結晶体あるいは一部多結晶体が 5 0 m間隔で格子点上に規則正し く配列している様子が見られ、 選択的結晶成長が行われていること が確認された。 Selective crystal growth was performed under the growth conditions shown in FIG. After the growth was completed, the surface of the first polycrystalline silicon layer oxide film was observed with an optical microscope, and as in Experiment 1, a single crystal with mountain-shaped facets with a particle size of about 20 was observed. Alternatively, some polycrystals were regularly arranged on the lattice points at 50 m intervals, confirming that selective crystal growth was occurring.
このとき、 開口部に対して成長した結晶が占める割合は 1 0 0 %て あった。 また、 成長で得られた全結晶中に対して単結晶が占める割 合は約 8 9 %であった。  At this time, the ratio of the grown crystal to the opening was 100%. The ratio of the single crystal to the total crystal obtained by growth was about 89%.
得られた単結晶体について微小 X線回折により配向の様子を調べ たところ、 ほとんど ( 1 1 0 ) 方向に配向していた。 これは各単結 晶体は開口部を介してそれぞれの種結晶である第 1 の多結晶シリ コ ン層の結晶粒の方位を正確に受け維いでおり 、 これらの結晶粒の方 位は実験 2で述べたように主として ( 1 1 0 ) であるためである。  When the state of orientation of the obtained single crystal was examined by micro X-ray diffraction, it was almost oriented in the (110) direction. This is because each single crystal accurately receives the orientation of the crystal grains of the first polycrystalline silicon layer, which is the seed crystal, through the opening, and the orientation of these crystal grains is determined in Experiment 2. This is mainly because (1 1 0) as described in (1).
また、 ( i ) 開口部の一辺の長さ aを 9 m以下とし、 間隔 bを ァニールにより成長する粒径の大き さ とほぼ等しいかそれ以上の 大きさにするか、 あるいは ( ii ) 開口部の一辺の長さ a の約 2倍以 上の平均粒径をもつ多結晶を下地の半導体層として選択するか、 の ( i ) または ( ii ) の少な く ともいずれか一方の条件を満足する場 合には、 該開口部より露出した種結晶より 1 つの単結晶が形成され る確率が 8 0 %以上になることが判明した。 更に、 開口部に下地の 第 1多結晶層の粒界が露出し単結晶成長しない場合であっても、 他 のシー ド上にきちんと成長した単結晶の約半分程度の粒径をもつ多 結晶が成長し、 太陽電池としての歩留まりや光電変換効率には実質 的な影響を及ぼさないこ が《明した。 実験 4 (連繞膜の形成) 実験 3に引き続いて、 さらに成長時間を 9 0 m i n .と長く して選択 的成長を行った。 成長終了後実験 3 と同様に多結晶シリ コ ンノ酸化 膜表面を光学顕微鏡で観察したところ、 結晶体は隣接するもの同士 が完全に接触しており、 基板上方からみてほぼマス目状に整然と並 んだ単結晶体あるいは一部多結晶体の集合からなる第 1 の多結晶層 の結晶より大粒径 (約 5 0 m ) の第 2 の多結晶層 (連続膜) が得 られていることが確かめられた。 このときの連続膜の高さは酸化膜 上から約 4 0 であった。 In addition, (i) the length a of one side of the opening is set to 9 m or less, and the interval b is set to be substantially equal to or larger than the size of the grain grown by annealing, or (ii) the opening is formed. Select a polycrystal having an average grain size of at least about twice the length a of one side as the underlying semiconductor layer, or satisfy at least one of the conditions (i) and (ii) In this case, it was found that the probability of forming one single crystal from the seed crystal exposed from the opening was 80% or more. Furthermore, even when the grain boundary of the underlying first polycrystalline layer is exposed in the opening and single crystal growth does not occur, the polycrystal having a grain size of about half of that of a single crystal properly grown on another seed. Has grown, and has virtually no effect on the yield and photoelectric conversion efficiency of the solar cell. Experiment 4 (Formation of the surrounding film) Subsequent to Experiment 3, selective growth was performed by further increasing the growth time to 90 min. After the growth was completed, the surface of the polycrystalline silicon oxide film was observed with an optical microscope in the same manner as in Experiment 3, and the adjacent crystals were completely in contact with each other. A second polycrystalline layer (continuous film) with a larger grain size (approximately 50 m) than the crystals of the first polycrystalline layer, which is composed of a solid single crystal or a partial polycrystal aggregate Was confirmed. At this time, the height of the continuous film was about 40 from above the oxide film.
また、 連統膜形成後に膜の表面を研磨により酸化層から数 mの ところまで削り、 その後 2次質量イ オ ン分折により表面から酸化層 までの Pの濃度プロファ ィルを測定し、 高濃度に ド―プされた多結 晶シリ コ ン層からの不純物原子の成長結晶層への拡散の様子を調へ た。  After the continuous film formation, the surface of the film was ground to a few meters from the oxide layer by polishing, and the P concentration profile from the surface to the oxide layer was measured by secondary mass ion diffraction. The state of diffusion of impurity atoms from the doped polycrystalline silicon layer into the grown crystal layer was investigated.
その結果、 酸化層が介在するために Pは第 2の多結晶層へはほと んど拔散しておらず、 遷移領镇はわずか 2 0 0 G A程度であった。 さらに、 基板側からの金属原子の成長層への混入についても ドープ された第 1 の多結晶シリ コ ン層が間にあるために第 2の多結晶シリ コ ン層内では金属原子は検出されなかつた。 実験 5 (太陽電池の形成)  As a result, P hardly escaped to the second polycrystalline layer due to the intervening oxide layer, and the transition region was only about 200 GA. In addition, metal atoms from the substrate side are mixed into the growth layer because metal atoms are detected in the second polycrystalline silicon layer because the doped first polycrystalline silicon layer is interposed therebetween. Never Experiment 5 (Formation of solar cell)
実験 4で得られた大粒径である第 2 の多結晶シリ コ ンの表面に イ オン打ち込みにより Bを 2 O K e V , 1 X 1 0 1 5 cm - 2の条件で打 ち込み、 8 0 0 'C , 3 0 ra i n .でァニールして p + 層を形成した。 こ のようにして作成した p + 大粒径である第 2の多結晶シリ コ ン/ S i 0 z Z小粒径である第 1 の多結晶シリ コ ン ( n + ) / C r構造 の太陽電池について A M 1. 5 ( 1 0 0 m W / cnf ) 光照射下での I - V特性について測定を ί7つたところ、 セル面積 G. ;! 6 αίで開放電圧 0. 4 0 V、 短絡光電流 2 5 m Aノ αί、 曲線因子 0. 6 8 となり、 6. S %の変換効率を得た。 このように、 金属基板上に形成した大粒径で ある第 2 の多結晶シリ コ ン薄膜を用いて良好な太陽電池が形成可能 であることが判明した。 好ま しい態様の詳細な説明 Second polycrystalline silicon co the surface of the down the ion-implantation by B 2 OK e V, 1 X 1 0 1 5 cm a large particle size obtained in Experiment 4 - 2 conditions striking Chikomi, 8 The p + layer was formed by annealing at 00 'C, 30 ra in. First polycrystalline silicon co down a second polycrystalline silicon co down / S i 0 z Z small particle diameter and p + large particle size, which is created as of this (n +) / C r structure About solar cell AM 1.5 (100mW / cnf) I-V characteristics under light irradiation were measured ί7 times, cell area G.;! 6αί, open voltage 0.40V, short circuit The photocurrent was 25 mA, αί, and the fill factor was 0.68. A conversion efficiency of 6. S% was obtained. In this way, the large particle size formed on the metal substrate It has been found that a good solar cell can be formed using a certain second polycrystalline silicon thin film. Detailed description of the preferred embodiment
本発明は、 上述した実験を介して判明した技術事項に基づいて更 なる研究の結果完成に至ったものである。 本発明の太陽電池の製造 方法の上述した構成内容のものであるが、 本発明の方法により製造 される太陽電池は、 金属基板上に、 不純物で ドープされた第 1 の多 結晶シリ コ ン層と、 該第 1 の層を構成する多結晶シリ コ ンより平均 粒径の大きい多結晶シリ コ ンで構成された第 2 の層を有し、 前記第 1 の層と前記第 2 の層との間に絶緣層が介在した層構成を有するも のである。  The present invention has been completed as a result of further research based on the technical matters found through the above-described experiments. The solar cell manufactured by the method of the present invention, which has the above-described configuration of the method of manufacturing a solar cell of the present invention, has a first polycrystalline silicon layer doped with impurities on a metal substrate. And a second layer made of polycrystalline silicon having an average grain size larger than that of the polycrystalline silicon constituting the first layer, wherein the first layer and the second layer It has a layer structure in which an insulating layer is interposed between the layers.
本発明による上記太陽電池は、 具体的には第 1 図に模式的に示す 構成のものである。  Specifically, the solar cell according to the present invention has a configuration schematically shown in FIG.
第 i図において、 金属基板 1 0 i上に、 金属原子を舍むシリ コ ン 層 1 0 2、 高濃度に不純物の ドープされた比較的小粒径である第 1 の多結晶シリ コ ン層 ( n + または p + 層) 1 0 3、 絶緣層 1 0 4 、 第 1 の多結晶シリ コ ン層の結晶粒径より大粒径の単結晶の集合体て ある第 2 の多結晶シリ コ ン層 1 0 5が積層されており、 第 2の多結 晶シリ コ ン層 1 0 5 の表面には p + または n + 層 1 0 6が形成され ている。  In FIG. I, a silicon layer 102 containing metal atoms and a first polycrystalline silicon layer having a relatively small grain size doped with impurities at a high concentration are formed on a metal substrate 100 i. (N + or p + layer) 103, insulating layer 104, second polycrystalline silicon which is an aggregate of single crystals having a grain size larger than that of the first polycrystalline silicon layer A p + or n + layer 106 is formed on the surface of the second polycrystalline silicon layer 105.
P + または n + 層 1 0 6 の上には反射防止膜を兼ねた透明電極 1 0 7 と集電電極 1 0 8が備えられている。 本発明の太陽電池に使 用される金属基板材料としては導電性が良好でシリ コ ンとシリ サイ ドなどの化合物を形成する任意の金属が用いられ、 代表的なものと して W , M 0 , C rなどが挙げられる。 もちろん、 それ以外であつ ても表面に丄述の ¾質を有する金属が付着しているものであれば何 でもよ く 、 従って金属以外の安価な基板も使用可能である。 小粒径 である第 1 の多結晶シリ コ ン層 1 0 3 の粒径としては絶緣層 1 0 4 に設けられる微小開口部の寸法 (好適には、 a = l 〜 5 m) との 兼ね合いから l 〜 2 0 «« mとするのが好ま しく、 1. S l O mと するのがより好ましい。 絶緣層 1 0 4の厚さについては特に規定は ないが、 2 0 0 人〜 l mの範囲とするのが適当である。 また大粒 径である第 2の多結晶シリ コ ン層 1 0 5の粒径および膜厚について は太陽電池の特性上の要求とプロセスの制約から、 それぞれ 2 0 〜 5 0 0 が適当であり、 より好ま し く はそれぞれ 3 0 〜 5 0 0 mが望ましい。 尚ここでいう大粒径、 小粒径の結晶とは第 1 の多 結晶層と第 2の多結晶層とを比較した結晶粒の大きさのことを示し ている。 また、 または n + 層 1 0 6の厚さとしては導入される 不純物の量にもよるが 0. 0 5 〜 1 <" mの範囲とするのが好ましく 、 より好ましく は 0. 1 〜 0. 5 mとするのが望ましい。 On the P + or n + layer 106, a transparent electrode 107 also serving as an antireflection film and a current collecting electrode 108 are provided. As the metal substrate material used in the solar cell of the present invention, any metal that has good conductivity and forms a compound such as silicon and silicide is used. 0, Cr and the like. Of course, any other material may be used as long as it has a metal having the above-mentioned properties attached to the surface, and an inexpensive substrate other than a metal can be used. The grain size of the first polycrystalline silicon layer 103 having a small grain size is an absolute layer 104 It is preferable to set l to 20 «« m in consideration of the size of the small opening provided in the (preferably, a = l to 5 m), and it is more preferable to set it to 1. . The thickness of the insulating layer 104 is not particularly limited, but is preferably in the range of 200 to lm. Also, the particle size and thickness of the second polycrystalline silicon layer 105 having a large particle size are preferably 20 to 500, respectively, due to the requirements on the characteristics of the solar cell and the constraints of the process. More preferably, each is 30 to 500 m. Here, the crystals having a large grain size and a small grain size refer to the size of crystal grains as compared between the first polycrystalline layer and the second polycrystalline layer. The thickness of the n + layer 106 depends on the amount of impurities to be introduced, but is preferably in the range of 0.05 to 1 <"m, more preferably 0.1 to 0.1. Desirably 5 m.
以下に、 上述した構成の太陽電池を製造する本発明の方法を、 第 1 5乃至 2 1図に示す工程図を用いて説明する。  Hereinafter, the method of the present invention for manufacturing the solar cell having the above-described configuration will be described with reference to the process charts shown in FIGS. 15 to 21.
まず、. 金属基板 8 0 1上に L P C V D装置などで多結晶シリ コ ン 層 8 0 2 (但し図中では粒界を略して示している。 ) を堆積させる。 このとき堆積時に ドーピングするか、 または堆積後にイオン打ち込 みあるいは熱拡散により高濃度の不純物原子 (例えば n型ならば P、 P型ならば B ) を導入して過飽和状態にする (第 1 5図) 。  First, a polycrystalline silicon layer 802 (a grain boundary is omitted in the figure) is deposited on a metal substrate 801 by an LPCVD apparatus or the like. At this time, doping is performed at the time of deposition, or high-concentration impurity atoms (for example, P for n-type and B for P-type) are introduced into the supersaturated state by ion implantation or thermal diffusion after deposition (first fifteenth). Figure).
ついで、 第 1 の多結晶シリ コ ン層 8 0 2の表面に絶緣層 (例えば 熱酸化あるいは常圧 C V D法による酸化膜) 8 0 3を形成する (第 1 6図) 。  Next, an insulating layer (for example, an oxide film formed by thermal oxidation or normal pressure CVD) 803 is formed on the surface of the first polycrystalline silicon layer 802 (FIG. 16).
8 0 0 〜 1 1 0 0 ででァニールして多結晶シリ コ ン層 8 0 2内に 異常粒成長を生じさせ第 1 の多結晶シリ コ ン層 8 0 2 とし、 また金 属基板 8 0 1 と第 1 の多結晶シリ コ ン層 8 0 2 との間に金属原子 (M) を含有する シリ コ ン層 ( S i xM!— x : M、 但し、 X は、 0 < X < 1 ) 8 0 4を形成する (第 1 7図) 。 Annealing is performed at 800 to 1100 to cause abnormal grain growth in the polycrystalline silicon layer 802 to form a first polycrystalline silicon layer 802 and a metal substrate 800. 1 and the first polycrystalline silicon co down layer containing a metal atom (M) between the silicon co emission layer 8 0 2 (S i x M - x:! M, however, X is, 0 <X < 1) Form 804 (Fig. 17).
絶緣層 8 0 3に周期的に微小の開口部 8 0 5を設けて第 1 の多結 晶シリ コン層表面を露出させ (第 1 8図) 、 後述する方法により選 択的ヱ ピタキ シ ャ ル成長法および横方向成長法により微小開口部 8 0 5から結晶成長を行って大粒径シリ コ ンを成長させ連続膜であ る第 2 の多結晶シ リ コ ン層 8 0 6を得る (第 1 9図) 。 Microscopic openings 805 are periodically provided in the insulating layer 803 to expose the surface of the first polycrystalline silicon layer (FIG. 18), and are selected by a method described later. (2) The second polycrystalline silicon, which is a continuous film, is formed by growing a crystal with a large grain size by growing a crystal from the minute opening 805 by the epitaxial growth method and the lateral growth method. Obtain layer 806 (Fig. 19).
イ オ ン打ち込み、 あるいは不純物拡散などにより成長結晶表面に p + または n + 層 8 0 7を形成し (第 2 0図) 、 最後に透明導電膜 8 0 8ノ集電電極 8 0 9を設ける (第 2 1図) 。 A p + or n + layer 807 is formed on the surface of the grown crystal by ion implantation or impurity diffusion (FIG. 20), and finally a transparent conductive film 808 and a current collecting electrode 809 are provided. (Figure 21).
金属基板上に多結晶シリ コ ンを堆積させる方法としては、 L P C V D法、 プラズマ C V D法、 蒸着法、 スパッタ法など何でもよいが 一般的には L P C V D法が用いられる。 第 1 の多結晶シ リ コ ン層の 厚さは、 成長させる異常粒の大きさや基板からの金属原子の拡散の 抑制などの要因によつて決められるが、 一般には 0. 1 〜 1. 0 mの 範囲とするのが望ま しい。  As a method of depositing polycrystalline silicon on a metal substrate, any method such as an LPCVD method, a plasma CVD method, an evaporation method, and a sputtering method may be used, but the LPCVD method is generally used. The thickness of the first polycrystalline silicon layer is determined by factors such as the size of abnormal grains to be grown and the suppression of diffusion of metal atoms from the substrate, but is generally in the range of 0.1 to 1.0. It is desirable to set it in the range of m.
本発明においては、 基板上に始めに形成する上記多結晶シリ コ ン層に替えてアモルフ ァ ス シ リ コ ン ( a — S i ) 、 微結晶シ リ コ ン ( μ - S i ) などで構成したシリ コ ン層にしてもよ く 、 この層に 不純物を導入して過飽和状態とすることにより同様に異常粒を成長 させ第 1 の多結晶シ リ コ ン層とするこ とができ る。  In the present invention, amorphous silicon (a-Si), microcrystalline silicon (μ-Si), or the like is used instead of the above-mentioned polycrystalline silicon layer formed first on the substrate. The first polycrystalline silicon layer can be similarly grown by introducing impurities into this layer to form a supersaturated state by introducing impurities into this layer. .
また上記第 1 の層を構成する多結晶シ リ コ ンまたは a - S i 、 c - S i などのシ リ コ ンに対して異常粒成長を行わせる目的で導 入される不純物としては、 n型では P, A s , S nなどが好ま し く 、 p型では B > Α £などが好ましい。 導入される不純物の量としては、 所望の異常粒の大きさおよびァニール処理条件によつて適宜決めら れるが、 一般には、 4 X 1 0 2° η- 3以上とされる。 The impurities introduced for the purpose of causing abnormal grain growth to the polycrystalline silicon or the silicon such as a-Si and c-Si constituting the first layer include: For n-type, P, As, Sn, etc. are preferable, and for p-type, B> Α £, etc. are preferable. The amount of impurities to be introduced is appropriately determined depending on the desired size of abnormal grains and annealing conditions, but is generally 4 × 10 2 ° η- 3 or more.
金属基板と多結晶シ リ コ ン層との間のォー ミ ックコ ンタク トを形 成する金属原子を舍有するシリ コ ン層を形成するためのァニール温 度は、 異常粒を形成するためのァニール 度より も低いため、 前述 したように異常粒- 形成するためのァニールと同時に形成するこ と によって工程の簡略化が図れるが、 別の工程と して行ってもよいこ とは言うまでもない。 本発明の太陽電池において、 多結晶シリ コ ン、 a - S i , μ c - S i などで構成されるシリ コ ン層の上に形成される絶緣層としては 選択結晶成長中に核発生を抑制する点からその表面での核形成密度 が十分小さいような材質が用いられる。 例えば、 酸化シリ コ ン (例 えば S i 0 2 ) 、 窒化シリ コ ン (例えば S i 3 N 4 ) などが代表的な ものとして使用される。 The annealing temperature for forming a silicon layer having a metal atom forming an ohmic contact between a metal substrate and a polycrystalline silicon layer is determined by an annealing temperature for forming an abnormal grain. Since it is lower than the degree of annealing, the process can be simplified by forming it at the same time as annealing for forming abnormal grains as described above, but it goes without saying that it may be performed as a separate process. In the solar cell of the present invention, as the insulating layer formed on the silicon layer composed of polycrystalline silicon, a-Si, μc-Si, etc., nucleation occurs during selective crystal growth. A material that has a sufficiently low nucleation density on its surface is used from the point of suppression. For example, oxide silicon co emissions (For example S i 0 2), such as nitride silicon co emissions (eg S i 3 N 4) is used as a representative.
本発明において上述の異常粒成長させた多結晶シリ コ ンを種結 晶として大粒径シリ コ ン層を成長させる目的で用いられる選択的結 晶成長を行う手法としては、 L P C V D法、 ブラズマ C V D法、 光 C V D法などを適宜採用できるが、 中でも L P C V D法が好ま しく 用いられる。  In the present invention, LPCVD, plasma CVD, and the like are used as a method for performing selective crystal growth used to grow a large-diameter silicon layer using the above-described abnormal-crystal-grown polycrystalline silicon as a seed crystal. Method, photo-CVD, etc. can be used as appropriate, but LPCVD is particularly preferred.
本発明に使用 される選択的結晶成長用の原料ガス と しては S i H z C ^ z , S i C £ 4 , S i H C ί 3 , S i H 4 , S i 2 H 6 . S i H 2 F z , S i z F 6 などのシラン類およびハロゲン化シラ ン類が 代 ¾的なものとして挙げられる。 またキヤ リ ァガスとして、 あるい は結晶成長を促進させる還元雰西気を得る目的で前記の原料ガス に加えて Η 2 が使. さ る。 前記原料ガスと水素との導入量の割合 は、 形成方法および原料ガスの種類や絶緣層 Gお 、 さ らに形成^ 件により適宜所望に従って決められるが、 好ましく は ί : i " 丄 1 : 1 0 0 0以下が適当であり、 より好ま し ぐは 1 : 2 0以上 1 : 8 0 0以下とするのが望ましい。 Is a raw material gas for the selective crystal growth for use in the present invention S i H z C ^ z, S i C £ 4, S i HC ί 3, S i H 4, S i 2 H 6. S i H 2 F z, silanes and halogenated Sila emissions such as S i z F 6 can be mentioned as being algebraic ¾ manner. As carrier gas, or in addition to the above-mentioned source gas, 原料2 is used for the purpose of obtaining a reducing atmosphere for promoting crystal growth. The ratio of the introduction amount of the source gas and the hydrogen is appropriately determined as desired depending on the formation method, the type of the source gas, the absolute layer G, and the formation conditions. Preferably, ί: i ″ 丄 1: 1 The value is preferably not more than 0000, and more preferably not less than 1:20 and not more than 1: 800.
本発明において、 絶緣層上での核の発生を抑制する目的で H C & が用いられるが、 原料ガスに対する H C の添加量は形成方法およ び原料ガスの種類ゃ絶緣層の材質、 さらに形成条件により適宜所望 に従って決められるが、 1 : 0. 1以上 1 : 1 0 0以下が好まし く 、 より好ましく は 1 : 0. 2以上 1 : 8 0以下とされるのが望ましい。 本発明において選択的結晶成長が ί Τわれる温度および圧力として は、 形成方法および使用する原料ガスの種類、 原料ガスと Η 2 およ び H C £ との流量比などの形成条件によって異なるが、 温度につい ては、 例えば L P C V D法による場合、 6 0 0 ΐ以上 1 2 5 0 'c以 下が適当であり、 より好ま し く は 6 5 0 て以上 1 2 0 0 で以下に制 御されるのが望ま しい。 またプラズマ C V D法などの低温プロセス による場合、 2 0 O 'c以上 6 0 O 'c以下が適当であり 、 より好ま し く は 2 0 0 で以上 5 0 0 で以下に制御されるのが望ま しい。 In the present invention, HC & is used for the purpose of suppressing the generation of nuclei on the insulating layer. However, the amount of HC added to the raw material gas depends on the forming method, the type of the raw material gas, the material of the insulating layer, and the forming conditions. The ratio is appropriately determined as desired, and preferably from 1: 0.1 to 1: 100, more preferably from 1: 0.2 to 1:80. The temperature and pressure selective crystal growth crack I T in the present invention, forming method and the type of raw material gas to be used, varies depending formation conditions such as flow rate of the source gas and Eta 2 and HC £, temperature About For example, in the case of the LPCVD method, it is appropriate that the temperature is controlled to 600 ° C. or more and 125 ° C. or less, and more preferably, to be controlled to 65 ° C. or more and 120 ° C. or less. Desirable. When a low-temperature process such as a plasma CVD method is used, the temperature is preferably from 20 O'c to 60 O'c, more preferably from 200 to 500 and below 500. New
同様に圧力については、 1 0— z〜 7 6 0 T orr が適当であり、 よ り好ま し く は 1 0 - 1〜 7 6 0 T orr の範囲が望ま しい。 For pressure Similarly, 1 0- z ~ 7 6 0 T orr are suitable, are rather to preferred Ri good 1 0 - 1 ~ 7 6 0 T range orr is desired arbitrary.
選択的結晶成長法と してプラズマ C V D法などの低温プロセスを 用いる場合には、 基板に付与される熱エネルギ—以外に原料ガスの 分解または基板表面での結晶成長促進の目的で補助エネルギーが付 与される。 例えばプラズマ C V D法の場合には一般に高周波エネル ギ一が用いられ、 光 C V D法の場合には紫外光エネルギーが用いら れる。 補助エネルギーの強度と しては形成方法および形成条件によ つて異なるが、 高周波エネルギーについては高周波放電パワー 2 0 〜 1 0 0 W、 紫外 ¾ェネルギ―においてはエネルギー密度 2 0〜 5 0 0 m Wノ erf といった値が適当であり、 より好ま し く は高周波放 電パヮ一 3 0 〜 : I 0 0 W、 紫外光エネルギー密度 2 0〜 4 0 0 m W Z en!とするのが望ま しい。  When a low-temperature process such as a plasma CVD method is used as the selective crystal growth method, auxiliary energy is added for the purpose of decomposing the source gas or accelerating the crystal growth on the substrate surface in addition to the thermal energy applied to the substrate. Given. For example, in the case of the plasma CVD method, high-frequency energy is generally used, and in the case of the optical CVD method, ultraviolet light energy is used. The strength of the auxiliary energy varies depending on the forming method and the forming conditions, but the high-frequency energy has a high-frequency discharge power of 20 to 100 W, and the ultraviolet energy has an energy density of 20 to 500 mW. A value such as erf is appropriate, and more preferably, the high-frequency discharge power is preferably 30 to 100 W, and the ultraviolet light energy density is 20 to 400 mWZen !.
本発明の方法により形成される多結晶薄膜は結晶成長中、 あるい は成長後に不純物元素で ドービングして接合を形成する こ とが可能 である。 使用する不純物元素と しては、 P型不純物して、 周期律表 第 DI族 Aの元素、 例えば B , A £ , G a , I nなどが好適なものと して挙げられ、 n型不純物と しては、 周期律表第 V族の元素、 例え ば P , A s , S b , B i などが好適なものと して挙げられるが、 特 に B , G a , P , S b などが最適である。 ドー ピングされる不純物 の量は、 所望される電気的特性に応じて適宜決定される。  The polycrystalline thin film formed by the method of the present invention can be subjected to doping with an impurity element during or after crystal growth to form a junction. As the impurity element to be used, a P-type impurity, an element of Group A of the periodic table, for example, B, A £, G a, In, or the like is preferable. Preferable examples include elements of group V of the periodic table, for example, P, As, Sb, Bi, and the like, but in particular, B, Ga, P, Sb, and the like. Is optimal. The amount of the impurity to be doped is appropriately determined according to the desired electrical characteristics.
かかる不純 ¾元素を成分と して む ¾實 (不純 ¾5導入用物質) と しては、 常温常圧でガス状態であるか、 または適宜の気化装置で容 易に気化し得る化合物を選択するのが好ま しい。 このよう な化合物 としては、 P H 3 , P z H , P F , P F , P C ^ , A s H A s F 3 , A s F , A s C £ a , S b H , S b F 5 , B F 3 , B C £ 3 , B B r a , B H B H 10 B 5 H S B H B ft H liAs the substance (impurity ¾5 introduction substance) containing such an impurity element as a component, a compound which is in a gaseous state at normal temperature and normal pressure or which can be easily vaporized by an appropriate vaporizer is selected. Is preferred. Such compounds Include PH 3 , P z H, PF, PF, PC ^, As HAs F 3 , As F, As C £ a, S b H, S b F 5 , BF 3 , BC £ 3 , BB ra, BHBH 10 B 5 HSBHB ft H li
B 6 H 12, A C £ 3などを挙げることができる。 不純物元素を舍む 化合物は、 1種用いても 2種以上併用してもよい。 B 6 H 12 , AC £ 3 and the like. The compounds containing the impurity elements may be used alone or in combination of two or more.
本発明の太陽電池の製造方法に用いられる選択的結晶成長法を 行う際に絶緣層に設けられる開口部の形状については特に規定はな いが、 正方形、 円などが代表的なものとして挙げられる。 開口部の 大きさとしては、 成長する山型単結晶体のフ 7セ ッ トは実験 1 で示 したように開口部が大き く なるにつれて崩れていく 。 すなわち結晶 性が悪く なる傾向があり、 ファセッ トの崩れを抑えるために 9 m またはそれ以下とするのが望ましい。 現実的にはフォ ト リ ソグラフ ィ —のパターン精度に依るため、 形状が正方形とした場合に、 a は 1 以上 5 m以下が適当となる。 また、 開口部の設けられる間 隔 b と しては-. 成長させる種結晶の大きさを考慮して 1 0 μ m乃至 5 0 0 mとするのが望ましい。  The shape of the opening provided in the insulating layer when performing the selective crystal growth method used in the method for manufacturing a solar cell of the present invention is not particularly limited, but a square, a circle, and the like are typical examples. . Regarding the size of the opening, as shown in Experiment 1, the growing set of mountain-shaped single crystals collapses as the opening becomes larger. In other words, the crystallinity tends to be poor, and it is preferable that the thickness be 9 m or less in order to suppress the collapse of the facet. Actually, it depends on the pattern accuracy of photolithography. Therefore, when the shape is a square, a should be 1 to 5 m. Further, the interval b at which the opening is provided is preferably set to 10 μm to 500 μm in consideration of the size of the seed crystal to be grown.
本発明の方法は、 製造する太陽電池の構成について限定はな く 、 シ ョ ッ トキ一型、 M I S型、 p n接合型、 p i n接合型、 ヘテロ接 合型、 タ ンデム型など各種の構成の太陽電池の製造に適用できる。 以下、 本発明を実施して所望の太陽電池を形成するところをより 詳細に説明するが、 本発明はこれらの実施例に何ら限定されるもの ではない。 実施例 1  The method of the present invention is not limited with respect to the configuration of the solar cell to be manufactured, and has various configurations such as a Schottky type, an MIS type, a pn junction type, a pin junction type, a hetero junction type, and a tandem type. Applicable to battery manufacturing. Hereinafter, formation of a desired solar cell by carrying out the present invention will be described in more detail, but the present invention is not limited to these examples. Example 1
上述した実験 2〜 5 と同様にして第 1図に示した構成の大粒径多 結晶シ リ コ ン p i n型太陽電池を作成した。 該 p i n型太陽電池は、 上逮した第 1 5 7 至 2 1図に示した作成プロセスに従って作成した。 基体としての金属基板には厚さ 0. 9 «の M 0板を用いた。 こ の上に 第 1 3図に示した L P C V D装置を用いて S i H 4 を 6 3 0 °cで^ 分解して 0. 4 多結晶シ リ コ ンを堆積させた。 In the same manner as in Experiments 2 to 5 described above, large-diameter polycrystalline silicon pin-type solar cells having the configuration shown in Fig. 1 were fabricated. The pin-type solar cell was manufactured according to the manufacturing process shown in Fig. 157 to 21 arrested above. An M 0 plate having a thickness of 0.9 was used as a metal substrate as a base. S i H 4 by using the LPCVD apparatus shown in the first 3 Figure on this at 6 3 0 ° c ^ After decomposition, 0.4 polycrystalline silicon was deposited.
次にこ の多結晶シ リ コ ンの表面にリ ンガラ スを堆積させて不純物 拡散を行った。 その際のリ ンガラ スの堆積条件は表 3 に示したよ う にした。 リ ンガラス堆積直後に温度を 9 5 0 でのままにして N 2 雰 囲気中で 5分間 ドライ ブした。 このとき多結晶シ リ コ ン中に導入さ れた Pの量は約 6 1 02 ° cm 3であった。 Next, a layer of glass was deposited on the surface of the polycrystalline silicon to diffuse impurities. Table 3 shows the deposition conditions for the glass. Immediately after deposition of the phosphorus glass, the temperature was kept at 950, and driving was performed for 5 minutes in an N 2 atmosphere. In this case the amount of P introduced into the polycrystalline sheet re co emissions was about 6 1 0 2 ° cm 3.
不純物拡散が終了した後に H ? : ^{ 20 = 1 : 1 0 の 11 ?水溶液 で リ ンガラスを除去し、 熱酸化によ り 多結晶シ リ コ ンの表面に S i 0 z 層を 1 0 0 0 A形成した。 次に 1 0 0 0 で 4時間の条件で ァニール処理を行い、 異常粒成長をさせた。 これによ り結晶粒径は 約 3 mである第 1 の多結晶シ リ コ ン層を得た。 After the impurity diffusion is completed, the phosphorus glass is removed with an 11? Aqueous solution of H?: ^ { 20 = 1: 10 and the Si0z layer is formed on the surface of the polycrystalline silicon by thermal oxidation. 0 0 0 A was formed. Next, annealing treatment was performed at 1000 for 4 hours to cause abnormal grain growth. As a result, a first polycrystalline silicon layer having a crystal grain size of about 3 m was obtained.
また金属/多結晶シ リ コ ン層の界面では M o S i 2 が形成されて いることが同一条件で作成した別のサンプルから確認された。 It was also confirmed from another sample prepared under the same conditions that MoSi 2 was formed at the interface between the metal and the polycrystalline silicon layer.
S i 0 z 層に開口部を a = 2 m、 b = 5 O mの間隔で周期的 に設け、 第 i 3図に示した L P C V [、装置により表 4の連続条拌で 選択結晶成長を行い大粒径である第 2 の多結晶シ リ コ ンからなる連 続薄膜を得た。 このとき得られたシ リ コ ン薄膜の粒径と膜厚はとも に約 5 0 つであった。  Openings are provided periodically in the S i 0 z layer at intervals of a = 2 m and b = 5 Om, and the LPCV shown in Fig. As a result, a continuous thin film composed of a second polycrystalline silicon having a large grain size was obtained. The silicon thin film obtained at this time had a particle size and film thickness of about 50.
こ の大粒径である第 2 の多結晶シ リ コ ン層の表面にイ オ ン打 ち込みにより Bを 2 0 K e V , 1 x 1 0 15 cm - 2の条件で打ち込み、 8 0 0 *C , 3 0 rain でァニールして p + 層を形成した。 最後に E B ( E lectron Beam)蒸着により I T O透明導電膜ノ集電電極 ( C r / A g / C r ) を ρ + 層上に形成した。 2 0 B by narrowing Chi Lee on-strokes on the surface of the second polycrystalline sheet re co down layer is a large particle size of this K e V, 1 x 1 0 15 cm - implanted in two conditions, 8 0 Annealing was performed with 0 * C and 30 rain to form a p + layer. Finally, an ITO transparent conductive film collector electrode (Cr / Ag / Cr) was formed on the ρ + layer by EB (Electron Beam) evaporation.
このようにして得られた Ρ +ノ大粒径多結晶シ リ コ ン Z S i 0 z/ n + 小粒径多結晶シ リ コ ン/ C r構造の太陽電池について A M 1. 5 ( 1 0 0 m W / erf ) 光照射下での I — V特性について測定したと こ ろ、 セル面積 2 5 ίて開放電圧 0. 4 2 V、 短絡電流 2 6 m A cni、 曲線因子 0. 6 6 となり、 エネルギー変換効率 7. 2 %を得た。 The thus obtained solar cell having the structure of ノ+ large grain polycrystalline silicon ZS i 0 z / n + small grain polycrystalline silicon / Cr structure AM1.5 (10 0 mW / erf) When the I-V characteristics were measured under light irradiation, the cell area was 25 mm, the open voltage was 0.42 V, the short-circuit current was 26 mA cni, and the fill factor was 0.66. The energy conversion efficiency was 7.2%.
こ のよ う な特性は再現性良く得られ、 小粒径多結晶シ リ コ ン層を 用いないで直接金属基板上に大粒径多桔晶シリ コ ンを成長させた太 陽電池に比べて特性のバラッキは大幅に改善された。 表 5 に小粒径 多結晶シリ コ ン層の有無による特性のバラツキの様子を示した。 Such characteristics can be obtained with good reproducibility, and a small grain size polycrystalline silicon layer can be formed. The characteristic variance was greatly improved compared to a solar cell in which large-diameter polycrystalline silicon was grown directly on a metal substrate without using it. Table 5 shows how the characteristics varied depending on the presence or absence of the small grain size polycrystalline silicon layer.
このように金属基板上に成長させた大粒径シリコ ン層を用いて良 好な特性を示す多結晶太陽電池が作成できた。 実施例 2  Thus, a polycrystalline solar cell exhibiting good characteristics was produced using the large-diameter silicon layer grown on the metal substrate. Example 2
実施例 1 と同様にして単結晶の集合体を形成し、 最終的にァモル フ ァ ス シリ コ ンカーバイ トノ多結晶シリ コ ンヘテロ型太陽電池を作 成した。 金属基板 6 0 1 には C rを用い、 その上にプラズマ C V D 法で S i H 4 ÷ A s H 3の分解により微結晶を含む第 1 のシリ コ ン層 を 0. 4 m堆積した。 このときの ド一 ビング量は A s H 3 / S i H = 1. 6 x 1 0 2 (流量比) とした。 A single-crystal aggregate was formed in the same manner as in Example 1, and an amorphous silicon carbide / polycrystalline silicon hetero-type solar cell was finally formed. The metal substrate 6 0 1 using C r, and 0. 4 m depositing a first silicon co down layer containing microcrystals by decomposition of S i H 4 ÷ A s H 3 by plasma CVD thereon. De one Bing amount at this time was set to A s H 3 / S i H = 1. 6 x 1 0 2 ( flow rate ratio).
常圧 C V D法により シ リ コ ン層の上に S i 0 2 膜を 5 0 0 A堆積 さ 、. 開口部は大きさを a = i. 2 A' in、 b = 5 0 μ の間隔で設け た。 L P C V D法により表 6の条件で選択結晶成長を行い、 大粒径 である第 2のシリ コ ン層を形成した。 第 2 2乃至 2 8図に、 本実施 例におけるヘテロ接合型太陽電池の作成プ口セスを示した。 但し、 図中 6 0 2 においては結晶粒界を省略した。 この作成プロセスは、 実施例 1 における作成プロセス (第 1 5乃至 2 1図) の場合と、 次 のところを除いて同じである。 即ち、 第 2 6図に示すように p + 層 8 0 7 の代わりに p型アモルフ ァ スシリ コ ン力 一バイ ト 6 0 7を多 結晶シ リ コ ン上に形成した。 Atmospheric pressure by a CVD method on the sheet re co down layer S i 0 2 film 5 0 0 A deposition of,. The opening size a = i. 2 A 'in , at intervals of b = 5 0 mu Provided. Selective crystal growth was performed by LPCVD under the conditions shown in Table 6 to form a second silicon layer having a large grain size. FIGS. 22 to 28 show the process of producing the heterojunction solar cell in this example. However, in FIG. 62, the crystal grain boundaries are omitted. This creation process is the same as the creation process in Embodiment 1 (FIGS. 15 to 21), except for the following. That is, as shown in FIG. 26, instead of the p + layer 807, a p-type amorphous silicon force of one byte 607 was formed on the polycrystalline silicon.
次いで P型アモルフ ァ ス シ リ コ ンカーバイ ト 6 0 7を多結晶シ リ コ ン 6 0 6上に形成した。  Next, a P-type amorphous silicon carbide 607 was formed on the polycrystalline silicon 606.
p型ア モ ルフ ァ ス シ リ コ ンカ ーノ ィ ト層 6 0 7 は通常のプ - ズマ C V D装置を^いて表 6に示す条伴 多結晶シ リ コ ン表面上に 1 0 0 A堆積させた。 この時のアモルフ ァ ス シ リ コ ン力一バイ ト膜 の暗導電率は〜 1 0 — Z S ' cm - 1であり、 Cと S i の膜中の組成比は 2 : 3であった。 The p-type amorphous silicon carrier layer 607 was deposited on a polycrystalline silicon surface with a thickness of 100 A by using a normal plasma CVD system, as shown in Table 6. I let it. At this time, the dark conductivity of the amorphous silicon film is about 10 — Z S ′ cm −1 , and the composition ratio of C and Si in the film is 2: 3.
そして、 透明導電膜 6 0 8 と しては I T Oを約 1 0 0 O A電子ビ ーム蒸着して形成した。  The transparent conductive film 608 was formed by electron beam evaporation of about 100 OA of ITO.
このよう にして得られたアモルファ スシリ コ ンカーバイ ト Z多結 晶シリ コ ンヘテロ型太陽電池の A M I. 5光照射下での I — V特性の 測定を行ったところ (セル面積 0. 1 6 αί) 、 開放電圧 0. 4 9 V、 短 絡光電流 2 1. 5 m A /c 、 曲線因子 0. 5 5 となり、 変換効率 5. 8 % という高い値が得られた。 これは従来のスライ ス した多結晶基板を 用いたアモルファ スシリ コ ンカーバイ 卜 /多結晶シリ コ ンヘテロ型 太陽電池に比べて遜色のない結果となっている。 実施例 3  The AM-I.V characteristics of the amorphous silicon carbide Z-polycrystalline silicon hetero-type solar cell obtained in this manner were measured under AM I.5 light irradiation (cell area 0.16 αί ), Open-circuit voltage 0.49 V, short-circuit photocurrent 21.5 mA / c, fill factor 0.55, and a high value of conversion efficiency of 5.8% was obtained. This is comparable to a conventional amorphous silicon carbide / polycrystalline silicon hetero-type solar cell using a sliced polycrystalline substrate. Example 3
実施例 1 と同様にして第 1 図に示すような p i η型多結晶太陽電 池を作成した。 即ち、 Μ 0基板上に多結晶シリ コ ンを堆積させ、 表 面にリ ンガラスを祈出させて不 物拡散を行った。 H F水溶液でリ ンガラスを除去した後に S i 02 に替えて通常の L P C V D装置て 多結晶シリ コ ンの表面に S i 3 N 4 を 1 0 0 0 A堆積し、 1 0 5 0 *c , 3時間の条件でァニール処理を行い、 異常粒成長をさせた。 このよ う にして結晶粒径は約 3. 2 mの第 1 の多結晶シリ コ ン層を得た。 A pi η-type polycrystalline solar cell as shown in FIG. 1 was prepared in the same manner as in Example 1. That, Micromax 0 depositing a polycrystalline silicon co down on the substrate was subjected to non-objects spread by out prayer re Ngarasu on the front surface. The S i 3 N 4 and 1 0 0 0 A deposited S i 0 polycrystalline silicon co down surface 2 in place Te conventional LPCVD apparatus after removing the re Ngarasu with HF aqueous solution, 1 0 5 0 * c, Anneal treatment was performed under the condition of 3 hours to cause abnormal grain growth. Thus, a first polycrystalline silicon layer having a crystal grain size of about 3.2 m was obtained.
S i3 N 層に開口部を a - L S mとし、 b = l 0 0 mの間隔 で周期的に設け、 第 2 0図の L P C V D装置により表 7 の連続成長 条件で選択的結晶成長を行い大粒径である第 2 の多結晶シリ コ ンか らなる連続薄膜を得た。 Openings are formed in the Si 3 N layer at a-LS m and periodically provided at intervals of b = 100 m.Selective crystal growth is performed by the LPCVD apparatus in Fig. 20 under the continuous growth conditions shown in Table 7. A continuous thin film made of a second polycrystalline silicon having a large grain size was obtained.
このとき表 7 の条件において選択的結晶成長中に微量の不純物を 混入させて ド一 ビングを行った。 不純物として P H 3 を用い、 原料 ガス S i H 2 C jg 2 に対して P H 3 / S i H Z C £ z = 2 1 0 " 6 iAt this time, a small amount of impurities were mixed during the selective crystal growth under the conditions shown in Table 7 to perform driving. Using PH 3 as an impurity, PH 3 / S i H Z C £ z = 2 1 0 " 6 i with respect to the raw material gas S i H 2 C jg 2
B > . » t , tm a- n n* is- し ハ .. ― 。 s / 付 り 4 / ノ 'ノ ·/ m
Figure imgf000021_0001
r±" _ n天 ' vt し t) vし リ υ μ であった。
B>. »T, tm a-nn * is-c ..-. s / appendix 4 / no 'no · / m
Figure imgf000021_0001
r ± "_ n heaven 'vt then t) v then υμ.
Ρ + 層を形成するために A £を大粒径シリ コ ンの表面に真空蒸着 して R T A ( R apid Thermal Anneal ing) 処理を行った e した A の膜厚は 6 0 0 人であり、 R T A処理の条件は 8 0 0 'c 、 1 5秒で行った。 A £ is vacuum-deposited on the surface of large-grain silicon to form a + layer The film thickness of the to RTA (R apid Thermal Anneal ing) process was carried out e the A is a 6 0 0 people conditions RTA treatment was carried out at 8 0 0 'c, 1 5 seconds.
最後に反射防止膜を兼ねた透明導電膜 I T 0を約 1 0 0 0 A電子 ビーム蒸着して形成し、 さ らにその上に集電電極として C rを 1 fi m真空蒸着した。  Finally, a transparent conductive film I T0 also serving as an anti-reflection film was formed by e-beam evaporation of about 100 A, and Cr was vacuum-deposited thereon as a current collecting electrode for 1 fm.
このよう にして作成した P i n型多結晶太陽電池 A M 1. 5光照射 下での I - V特性を調べたところ、 セル面積 0. 1 6 で開放電圧 0. 4 7 V、 短絡光電流 2 8 m A / oil曲線因子 0. 6 7 となり、 8. 8 % という高い変換効率が得られた。 実施例 4  Investigation of the IV characteristics of the P-type polycrystalline solar cell AM1.5 under light irradiation produced in this manner revealed that the cell area was 0.16, the open circuit voltage was 0.47 V, and the short-circuit photocurrent 2 The fill factor of 8 mA / oil was 0.67, and a high conversion efficiency of 8.8% was obtained. Example 4
実施例 1 〜 3 と同様にして第 1図に示すような n i p型多結晶太 陽電池を作成した。 C r基板上に第 1 3図に示した L P C V D装置 を Kいて、 S i H 4 を 6 3 0 Tで熱分解して 4 m厚の多桔晶シ リ コ ンを堆積させた。 この多結晶シリ コ ンの表面に Bを打ち込みェ ネルギー 2 0 K e V、 ドーズ量 2 1 0 1 6 cm 2の条件でイ オ ン打ち 込みを行い、 不純物濃度を 5 1 0 2 ° cm- 3とした。 A nip-type polycrystalline solar cell as shown in FIG. 1 was prepared in the same manner as in Examples 1 to 3. An LPCVD apparatus shown in the first 3 figure had K to C r substrates were deposited with multi桔晶Shi Li co down of 4 m thickness by thermal decomposition of S i H 4 in 6 3 0 T. The polycrystalline silicon co emissions 0 E energy 2 implanted B on the surface of the K e V, performs Lee on-beating inclusive at a dose of 2 1 0 1 6 cm 2, the impurity concentration 5 1 0 2 ° cm- It was set to 3 .
常圧 C V D装置により S i 02 膜を 8 0 0 A堆積させ、 I 0 0 0 で、 5時間のァニール条件で多結晶シリ コ ン中の異常粒成長をさせ た。 そして第 1 の多結晶シリ コ ン層を形成した。 An SiO 2 film was deposited at 800 A by a normal pressure CVD apparatus, and abnormal grains were grown in the polycrystalline silicon at I 00 under an annealing condition of 5 hours. Then, a first polycrystalline silicon layer was formed.
この後、 S i 02 層に開口部を a = 1. 2 〃 m、 b = 5 0 mの間 隔て'周期的に設け、 L P C V D法により表 4の条件で選択結晶成長 を行い、 大粒径である第 2 の多結晶シ リ コ ンからなる薄膜層を 得た。 大粒径多結晶シリ コ ン層の表面にイ オン打ち込みで Pを 5 0 K e V , l X 1 0 1 5cm 2の条件で打ち込み、 8 0 0 *C , 3 O min.でァ レ レ u j苣 'Tノ Iク / レ / o 取仪 m iru ¾ im し' i i し' 集電電極を形成して太陽電池の作成を完了した。 Thereafter, S i 0 provided two layers of opening a = 1. 2 〃 m, b = 5 0 between separated 'periodically in m, and selects the crystal growth under the conditions shown in Table 4 by LPCVD, large A thin film layer composed of a second polycrystalline silicon having a diameter was obtained. P is implanted into the surface of the large grain polycrystalline silicon layer by ion implantation under the conditions of 50 KeV, 1 × 10 15 cm 2 , and the temperature is reduced to 800 * C, 3 O min. Re uj chichi 'T no Iku / re / o taking miruru im im' ii shishi 'Forming the collecting electrode, completed the creation of the solar cell.
このよう にして作成した n i p型多結晶太陽電池の A M 1. 5光照 射下での I - V特性を調べたところ、 セル面積 0. 1 6 cn!で開放電圧 0. 4 6 V、 短絡光電流 2 6 m A / αί . 曲線因子 0. 6 9 となり 、 変換 効率 8. 3 %を得た。 AM1.5 light of the nip-type polycrystalline solar cell created in this way Investigation of the I-V characteristics under irradiation revealed that the cell area was 0.16 cn !, the open voltage was 0.46 V, the short-circuit photocurrent was 26 mA / αί. The fill factor was 0.69, and the conversion efficiency was 8. 3% was obtained.
以上詳述したように、 本発明によれば、 小粒径多結晶シリ コ ン層 を種結晶としてその上に大粒柽多結晶シリ コ ン層を形成することに より金属基板上に高品質な多結晶シリ コ ン層が形成できることから 量産性のある安価な太陽電池を製造することができることが理解さ れる。  As described in detail above, according to the present invention, a high-quality polycrystalline silicon layer is formed on a metal substrate by using a small-grain polycrystalline silicon layer as a seed crystal and forming a large-grain polycrystalline silicon layer thereon. It is understood that since a polycrystalline silicon layer can be formed, an inexpensive solar cell with mass productivity can be manufactured.
以上述べてきたように、 本発明によれば、 特性の良好な多結晶太 陽電池を金属基板上に形成することが可能であることから、 量産性 のある安価で良質の太陽電池を市場に提供することができる。  As described above, according to the present invention, a polycrystalline solar cell having good characteristics can be formed on a metal substrate, so that mass-produced inexpensive and high-quality solar cells are marketed. Can be provided.
Figure imgf000023_0001
Figure imgf000023_0001
Figure imgf000023_0002
0 Q
Figure imgf000023_0002
0 Q
Figure imgf000024_0001
Figure imgf000024_0001
4 ガ ス 流量比 基板温度 圧 力 成長時間 ( ί /min) CO ( Ί orr) (min) ΰ / p 一 3/2.0/100 950 100 20 4 Gas flow ratio Substrate temperature Pressure Growth time (ί / min) CO (Ί orr) (min) ΰ / p-1 3 / 2.0 / 100 950 100 20
I  I
+ + 3/1.6/100 950 100 40 i i + + 3 / 1.6 / 100 950 100 40 i i
3/2.0/100 1060 100 90 ί ! \ 3/0.5/100 1060 100 i 10  3 / 2.0 / 100 1060 100 90 ί! \ 3 / 0.5 / 100 1060 100 i 10
! 1
Figure imgf000025_0001
ガ ス 流量 比 基板温度 圧 力 放電電力
Figure imgf000025_0002
! 1
Figure imgf000025_0001
Gas flow ratio Substrate temperature Pressure Discharge power
Figure imgf000025_0002
350 *c 0.5 T or r 8W 350 * c 0.5 T or r 8W
B2H6/SiH4 = l.5 x 10"z B 2 H 6 / SiH 4 = l.5 x 10 " z
Figure imgf000025_0003
図面の簡単な説明
Figure imgf000025_0003
BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 本発明の方法により作成した P i η型太陽電池の構成 の模式的断面図である。  FIG. 1 is a schematic cross-sectional view of the configuration of a Pi η-type solar cell prepared by the method of the present invention.
第 2乃至 3図は、 それぞれ異常粒成長についての模式的説明図で ある。  FIGS. 2 and 3 are schematic explanatory diagrams of abnormal grain growth, respectively.
第 4図は、 異常成長させた多結晶シリ コ ンを種結晶として選択的 結晶成長法により大粒径多結晶シリ コ ンを成長させている様子を示 した模式図である。  FIG. 4 is a schematic diagram showing a state in which large-grain polycrystalline silicon is grown by selective crystal growth using the abnormally grown polycrystalline silicon as a seed crystal.
第 5乃至 6図は、 それぞれ異常成長させた多結晶シリ コ ンを種結 晶として選択的結晶成長法により大粒径多結晶シリ コ ンを成長させ ている様子を示した模式図である。  FIGS. 5 and 6 are schematic diagrams each showing a state in which a large-grain polycrystalline silicon is grown by selective crystal growth using the abnormally grown polycrystalline silicon as a seed crystal.
第 7乃至 8図は、 それぞれ選択的結晶成長法についての模式的説 明図である。  7 and 8 are schematic explanatory views of the selective crystal growth method, respectively.
第 1 1乃至 1 2図は、 選択的結晶成長法において山型結晶が三次 元的に琅長していく過程を示す模式的説萌図である。  FIGS. 11 and 12 are schematic views showing a process in which a chevron crystal grows three-dimensionally in a selective crystal growth method.
第 1 3図は、 本発明の太陽電池の製造過程において使用した L P C V D装置の概略図である。  FIG. 13 is a schematic view of an LPCVD device used in the process of manufacturing the solar cell of the present invention.
第 1 4図は、 不純物ドープした多結晶シ リ コ ン膜においてァニ ー ル温度を変えたときの結晶粒径の変化を示す特性図である。  FIG. 14 is a characteristic diagram showing a change in crystal grain size when an annealing temperature is changed in an impurity-doped polycrystalline silicon film.
第 1 5乃至 2 1 図は、 第 1図に示した本発明による P i n型太陽 電池の製造工程の模式的説明図である。  FIGS. 15 to 21 are schematic explanatory diagrams of the manufacturing process of the Pin solar cell according to the present invention shown in FIG.
第 2 2乃至 2 8図は、 本発明によるへテロ接合型太陽電池の製造 工程の模式的説明図である。  FIGS. 22 to 28 are schematic explanatory diagrams of the manufacturing process of the heterojunction solar cell according to the present invention.

Claims

請求 の 範面 Claim scope
1. 金属基体上に非単結晶半導体層を堆積させる工程と、 前記非単 結晶半導体層に不純物を導入して過飽和状態にする工程と、 前記非単結晶半導体層の表面に絶縁層を形成する工程と、 ァ ニ—ルすることにより前記非単結晶半導体層の結晶粒径を大 き く し多結晶半導体層を形成する工程と、 1. a step of depositing a non-single-crystal semiconductor layer on a metal substrate; a step of introducing an impurity into the non-single-crystal semiconductor layer to make it supersaturated; and forming an insulating layer on a surface of the non-single-crystal semiconductor layer. Forming a polycrystalline semiconductor layer by annealing to increase the crystal grain size of the non-single-crystal semiconductor layer;
前記絶縁層に前記多結晶半導体層の平均結晶粒径より も小さな 開口部を複数設けて該多結晶半導体層の表面を露出させる工程と 気相成長法により前記開口部から結晶成長を行い前記絶縁層上 にオーバ—グロー スさせて前記第 1 の多結晶半導体層の平均結晶 粒径より も大きな粒径を有する複数の半導体単結晶体を形成する 工程と、  Providing a plurality of openings in the insulating layer that are smaller than the average crystal grain size of the polycrystalline semiconductor layer to expose the surface of the polycrystalline semiconductor layer; Forming a plurality of semiconductor single crystals having a grain size larger than an average crystal grain size of the first polycrystalline semiconductor layer by over-growing on the layer;
前記複数の半導体単結晶体上に電極を形成する工程と、 からなる太陽電池の製造方法。  Forming an electrode on the plurality of semiconductor single crystals; and a method for manufacturing a solar cell.
2. 前記複数の半導体単結晶休の平均粒径が 2 0 m以上 5 0 0 m以下である請求項 1記載の太陽電池の製造方法。  2. The method for producing a solar cell according to claim 1, wherein the average grain size of the plurality of semiconductor single crystal grains is 20 m or more and 500 m or less.
3. 前記多結晶半導体層の平均粒径が 1 m以上 2 0 m以下であ る請求項 1記載の太陽電池の製造方法。  3. The method for manufacturing a solar cell according to claim 1, wherein the polycrystalline semiconductor layer has an average particle size of 1 m or more and 20 m or less.
4. 前記多結晶半導体層が多結晶シ リ コ ン層であって、 4 X 1 0 cm - 3以上の不純物原子を舍む請求項 1 、 請求項 2、 又は請求項 3 記載の太陽電池の製造方法。 4. The solar cell according to claim 1, wherein the polycrystalline semiconductor layer is a polycrystalline silicon layer, and contains 4 × 10 cm −3 or more of impurity atoms. Production method.
PCT/JP1991/001745 1990-12-26 1991-12-20 Method for manufacturing solar cell by selective epitaxial growth WO1992012542A1 (en)

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