JP2624577B2 - Solar cell and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solar cell and a method for manufacturing the same, and more particularly, to a solar cell having good energy conversion efficiency and a method for manufacturing the same.

[0002]

2. Description of the Related Art In various devices, a solar cell is used as a driving energy source.

[0003] A solar cell uses a pn junction for a functional part, and silicon is generally used as a semiconductor constituting the pn junction. From the viewpoint of the efficiency of converting light energy into electromotive force, it is preferable to use single crystal silicon, but from the viewpoint of increasing the area and reducing the cost, amorphous silicon is advantageous.

[0004] In recent years, the use of polycrystalline silicon has been studied for the purpose of obtaining low cost comparable to amorphous silicon and high energy conversion efficiency comparable to single crystal silicon. However, it is difficult to reduce the thickness to 0.3 mm or less in the conventionally proposed method since the bulk polycrystal is sliced into a plate-like body and used, and thus it is difficult to sufficiently absorb the light amount. The thickness was more than necessary, and in this respect, the effective utilization of the material was not sufficient. That is, it is necessary to reduce the thickness sufficiently in order to reduce the cost.

Attempts have been made to form a polycrystalline silicon thin film by using a thin film forming technique such as chemical vapor deposition (CVD). However, the crystal grain size is only several hundredths of a micron at most. Also, the energy conversion efficiency is lower than that of the bulk polycrystalline silicon slicing method.

In addition, impurity atoms such as P are introduced into the polycrystalline silicon thin film formed by the above-mentioned CVD method by ion implantation to make the polycrystalline silicon thin film supersaturated, and then annealed at a high temperature so that the crystal grain size is 10 times or more the film thickness. A so-called abnormal grain growth technology has been reported (Yasuo Wada
and Shigeru Nishimatsu, Journal of Electrochemic
al Society, Solid State Science and Technology, 12
5 (1978) 1499). However, in this method, the impurity concentration to be introduced is too high and cannot be used for an active layer that generates a photocurrent.

Further, attempts have been made to increase the crystal grain size by irradiating a polycrystalline silicon thin film with a laser beam to melt and recrystallize it. However, cost reduction is not sufficient, and stable production is difficult. is there.

Such a situation is a common problem not only in silicon but also in compound semiconductors.

On the other hand, in the method disclosed in JP-A-63-182872, that is, in the method of manufacturing a solar cell, the nucleation density on the surface of the substrate is sufficiently larger than that of the material on the surface of the substrate. A dissimilar material (constituting a nucleation surface) fine enough to grow only a single nucleus that becomes a single crystal after crystal growth is provided, and then a nucleus is formed on the dissimilar material by deposition, and the crystal is grown by the nucleus. Forming a substantially single crystal layer of a semiconductor of the first conductivity type on the surface of the substrate, and forming a substantially single crystal layer of a semiconductor of the second conductivity type above the single crystal layer. It was shown that the solar cell manufacturing method characterized in that a thin solar cell having a sufficiently large crystal grain size and good energy conversion efficiency can be obtained.

[0010]

In the above-mentioned method, when single crystal bodies grown by nuclei formed of fine dissimilar materials serving as nucleation surfaces contact each other, crystal grain boundaries (hereinafter abbreviated as grain boundaries) are formed. Is done.

In general, in a polycrystalline semiconductor, a large number of single crystal grains having various crystal orientations form a large number of grain boundaries, and there are atoms having dangling bonds in the grain boundaries. For this reason, a defect level is formed in the forbidden band. The characteristics of the semiconductor device are closely related to the defect density of the semiconductor layer to be manufactured, but since a large number of defect levels are formed at the grain boundaries as described above, impurities and the like are easily precipitated, As a result, device characteristics are degraded. Therefore, in a polycrystalline semiconductor, it is considered that device characteristics are greatly affected by control of grain boundaries. That is, in order to improve the characteristics of a semiconductor device using polycrystalline semiconductor layers, it is effective to reduce the amount of grain boundaries existing in the semiconductor layers. The method described above aims at reducing the amount of grain boundaries by increasing the grain size. However, in the above-described method, when a metal is used as a substrate for the purpose of cost reduction, the metal atoms of the substrate are taken into crystals or grain boundaries during growth, which adversely affects device characteristics and reproducibility. There was a problem to be solved.

[0012]

An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a polycrystalline solar cell having a large grain size and good quality, and a method for manufacturing the same.

An object of the present invention is to provide an inexpensive solar cell using a metal substrate and growing a polycrystalline semiconductor layer having a large grain size. Another object of the present invention is to form a large-grained polycrystalline semiconductor layer on a small-grained polycrystalline semiconductor layer as a seed crystal, thereby reducing the density of defect states at grain boundaries and providing high-quality It is to provide a solar cell.

[0014]

Means for Solving the Problems The present invention solves the above-mentioned problems in the prior art, and has been completed as a result of intensive studies by the present inventors to achieve the above objects.
The present invention relates to a thin polycrystalline solar cell having good characteristics and a method for manufacturing the same.

That is, the solar cell of the present invention selectively epitaxially grows at least from the metal-semiconductor intermediate layer, the first semiconductor layer, the insulating layer having a plurality of openings, and the plurality of openings on the metal base. A solar cell characterized by having a second semiconductor layer composed of a set of formed chevron-shaped crystal grains in this stacking order.

Further, the method for manufacturing a solar cell according to the present invention includes a step of depositing a polycrystalline semiconductor layer on a metal substrate; a step of introducing a high concentration of impurity atoms into the polycrystalline semiconductor layer to make it supersaturated; Forming an insulating layer on the surface of the polycrystalline semiconductor layer, annealing to cause abnormal grain growth in the polycrystalline semiconductor layer, and a metal-semiconductor between the metal base and the polycrystalline semiconductor layer. Forming an intermediate layer, providing a minute opening in the insulating layer to expose the surface of the polycrystalline semiconductor, and performing crystal growth from the minute opening by selective epitaxial growth and lateral growth. And a method for manufacturing a solar cell.

In the following description, silicon will be described as a semiconductor material used in the present invention, but the present invention is not limited to silicon.

As shown in FIGS. 2 and 3, the main technique of the present invention is to supersaturate polycrystalline silicon 202 deposited on a metal substrate 201 by introducing impurity atoms such as P by ion implantation or thermal diffusion. A first polycrystalline silicon having a small grain size by forming an intermediate layer of metal-silicon which becomes an ohmic contact layer by annealing and forming an abnormal grain growth in the polycrystalline silicon. (However, crystal grain boundaries are omitted in FIG. 2.) Then, as shown in FIGS. 4, 5, and 6, an oxide film is formed on the surface of the small-grain polycrystalline silicon layer having abnormal grain growth. An insulating layer 304 of (SiO ₂ ) or the like is formed, and a minute opening is periodically formed on the surface of the insulating layer 304 to expose the silicon surface. The insulating layer 304 is used as a non-nucleation surface, and the silicon portion is nucleated. surface Selective epitaxial growth and lateral growth are performed on the non-nucleation surface and the nucleation surface to grow a single crystal having a uniform size (grain size), thereby forming a second crystal having a large grain size. Forming a crystalline silicon thin film layer.

Here, the general principle of the selective epitaxial growth method will be briefly described. In the selective epitaxial growth method, when epitaxial growth is performed using a vapor phase growth method, nucleation occurs on an insulating layer such as an oxide film formed on a silicon wafer 401 as shown in FIGS. This is a selective crystal growth method in which the exposed silicon surface in the opening 403 provided in the insulating layer 402 is used as a seed crystal under such conditions to perform epitaxial growth only in this opening. When the epitaxial layer filling the opening 403 continues to grow, the crystal layer grows in the horizontal direction along the surface of the insulating layer while continuing to grow in the vertical direction. This is the lateral growth method (EpitaxialLateral Overgro
The growth ratio in the vertical direction to the horizontal direction and the appearance of facets at this time generally depend on the forming conditions and the thickness of the insulating layer.

The present inventors have carried out a number of experiments to determine that the size of the opening is a small area of several μm or less, so that the growth ratio in the vertical direction to the horizontal direction is independent of the thickness of the insulating layer. Is approximately 1, and the crystal grows three-dimensionally on the insulating layer, a clear facet appears, and a mountain-shaped single crystal 404 is formed.
Was obtained (FIGS. 9 and 10).

Further, the present inventors have conducted further experiments, and have found that even if polycrystalline silicon is used instead of a silicon wafer, the same method as described above can be used if the crystal grain size (average crystal grain size) is larger than a certain size. As a result, a mountain-shaped single crystal was obtained.

The present inventors have further conducted experiments, and by appropriately selecting the film thickness of the first polycrystalline silicon layer deposited on the metal substrate, the second polycrystalline silicon layer grown on the first polycrystalline silicon has been selected.
That metal atoms from the substrate can be prevented from being mixed into the polycrystalline silicon layer, and an intermediate layer such as a silicide is formed at the interface between the metal substrate and the first polycrystalline silicon layer at the same time during the process of abnormal grain growth by annealing. High ohmic contact and high concentration of doping in the first polycrystalline silicon due to the presence of an insulating layer between the first polycrystalline silicon and the second polycrystalline grown thereon. It has been found that the diffusion of the impurity atoms into the growing second polycrystalline layer is suppressed, and the present invention has been completed. Hereinafter, an experiment performed by the present inventors will be described in detail.

(Experiment 1) Selective crystal growth As shown in FIG. 7, a thermal oxide film 1000 as an insulating layer 402 was formed on the surface of a (100) silicon wafer 401 having a thickness of 500 μm.
Å Formed and etched using photolithography, and square openings 403 each having a side of a in the arrangement shown in FIG. 11 were provided at intervals of b = 50 μm.
Here, three types of openings of 1.2 μm, 2 μm, and 4 μm were provided as the value of a. Next, selective crystal growth was performed using a normal low pressure CVD apparatus (LPCVD apparatus) as shown in FIG.

In FIG. 20, reference numeral 701 denotes a gas supply system;
02 is a heater, 703 is a quartz reaction tube, 704 is a substrate,
705 is a susceptor. SiH ₂ Cl ₂ was used as a source gas, H ₂ was added as a carrier gas, and HCl was added to suppress generation of nuclei on the oxide film of the insulating layer 402. Table 1 shows the growth conditions at this time.

Table 1 After the growth was completed, the state of the wafer surface was observed with an optical microscope. As shown in FIG. 9 or 12, a single crystal 404 having a mountain-shaped facet having a grain size of about 20 μm was obtained for any value of a. It was confirmed that the crystals were regularly arranged on the lattice points at intervals of 50 μm, and that the selective crystal growth was performed in accordance with the pattern of the opening 403 determined in FIG. At this time, the ratio of the crystal grown to the opening was 100% for any value of a. Also, the ratio (facet ratio) of the grown single crystal in which the facet on the surface clearly appears without being distorted is a
And as shown in Table 2, the smaller the value of a, the smaller the ratio of deviation.

Table 2 It was found that all of the obtained single crystal bodies had the same orientation as each other, and correctly inherited the crystal orientation of the silicon wafer as the substrate.

(Experiment 2) Abnormal grain growth in polycrystalline silicon on a metal substrate Tungsten (W) was vacuum-deposited on a 0.8 mm-thick chromium substrate as a substrate at 1000 ° C., and SiH ₄ was deposited thereon by an ordinary LPCVD apparatus. Pyrolysis at 630 ° C. deposited 0.4 μm polycrystalline silicon. At this time, the crystal grain size of the polycrystalline silicon was about 80 ° as determined by X-ray diffraction.

Next, P is accelerated by ion implantation into the surface of the polycrystalline silicon at an acceleration voltage of 50 KV and a dose of 3.2 × 10 ^16.
The implantation impurity concentration was set to 8 × 10 ²⁰ cm ^{−3 under} the condition of cm ⁻² .

The change in crystal grain size when the annealing temperature was changed for such a polycrystalline silicon film on a metal substrate was examined. The annealing time was constant for 3 hours.

After the annealing, the crystal grain size in the polycrystalline silicon film was examined by a high-resolution scanning electron microscope and ECC (Electron Channeling Contrast) method. As shown in FIG. The average grain size at 1000 ° C. was about 3 μm. ECP (Electron Channeling Pattern)
Examination of each crystal orientation by the method revealed that the orientation was mainly in the (110) direction.

Further, when a composition analysis near the metal substrate / polycrystalline silicon interface after annealing was performed, W
And Si reacted to form silicide. The composition of the silicide at this time was mostly WSi ₂ .

(Experiment 3) Selective crystal growth on metal substrate / polycrystalline silicon layer A polycrystalline silicon layer is formed on a metal substrate in the same manner as in Experiment 2, and the polycrystalline silicon layer is used for selection. An experimental experiment on crystal growth was performed.

On the surface of the first polycrystalline silicon layer thus formed, a thermal oxide film as an insulating
Å Formed and etched using photolithography, providing square openings with a side of a = 1.2 μm in lattice points at b = 50 μm intervals to expose the surface of the first polycrystalline silicon I let it.

Next, selective crystal growth was carried out under the growth conditions shown in Table 1 using an ordinary LPCVD apparatus as shown in FIG. After completion of the growth, the state of the surface of the first polycrystalline silicon layer / oxide film was observed with an optical microscope. As in Experiment 1, a single crystal or a partial polycrystal having a mountain-shaped facet having a grain size of about 20 μm was obtained. Were regularly arranged on lattice points at intervals of 50 μm, and it was confirmed that selective crystal growth was performed. At this time, the ratio of the grown crystal to the opening was 100%. The ratio of the single crystal to all the crystals obtained by the growth was about 89%.

When the state of orientation of the obtained single crystal was examined by micro X-ray diffraction, it was almost oriented in the (110) direction. This is because each single crystal body accurately inherits the orientation of the crystal grains of the first polycrystalline silicon layer, which is the seed crystal, through the opening, and the orientation of these crystal grains is mainly as shown in Experiment 3. This is because (110).

(Experiment 4) Formation of Continuous Film Subsequent to Experiment 3, the growth time was further increased to 90 minutes to perform selective crystal growth. After the growth was completed, the surface of the polycrystalline silicon layer / oxide film was observed with an optical microscope in the same manner as in Experiment 3, and the adjacent crystals were completely in contact with each other. It is confirmed that a second polycrystalline layer (continuous film) having a larger grain size (about 50 μm) than the crystal of the first polycrystalline layer, which is composed of a set of aligned single crystals or a part of polycrystals, is obtained. Was done. At this time, the height of the continuous film was about 40 μm from above the oxide film.

After the continuous film was formed, the surface of the film was polished to a depth of several μm from the oxide layer, and then the concentration profile of P from the surface to the oxide layer was measured by secondary mass ion analysis. The state of diffusion of impurity atoms from the polycrystalline silicon layer into the grown crystal layer was examined.

As a result, P was hardly diffused into the second polycrystalline layer due to the interposition of the oxide layer, and the transition region was only about 2000 °. Furthermore, regarding the incorporation of metal atoms into the growth layer from the substrate side, no metal atoms were detected in the second polycrystalline silicon layer because the doped first polycrystalline silicon layer was present therebetween.

(Experiment 5) Formation of Solar Cell B was implanted into the surface of the second polycrystalline silicon having a large grain size obtained in Experiment 4 by ion implantation under the conditions of ²⁰ KeV and 1 × 10 ¹⁵ cm ⁻² . Annealing was performed at 800 ° C. for 30 minutes to form ap ⁺ layer. The solar cell having the structure of p ⁺ / second polycrystalline silicon having a large particle diameter / SiO ₂ / first polycrystalline silicon (n ⁺ ) having a small particle diameter / Cr structure manufactured in this manner has AM1.5 ( 100 mW / cm ² ) When the IV characteristics under light irradiation were measured, the cell area was 0.16.
cm ² in the open-circuit voltage 0.40V, short-circuit photoelectric current 25mA / cm
^{2. The} fill factor was 0.68, and a conversion efficiency of 6.8% was obtained. Thus, it was shown that a good solar cell can be formed using the second polycrystalline silicon thin film having a large grain size formed on a metal substrate.

As described above, the present invention, which has been completed based on the experimental results described above, maintains electrical contact between the second polycrystalline silicon layer that generates a photocurrent on the metal substrate and the metal substrate. A first polycrystalline silicon layer, an insulating layer between the second silicon layer and the first silicon layer, and a metal-silicon layer between the metal substrate and the small silicon layer. The present invention relates to a polycrystalline silicon solar cell having an intermediate layer and a method for manufacturing the same.

FIG. 1 shows the structure of the solar cell of the present invention. A metal-silicon intermediate layer 102 on a metal substrate 101,
A first polycrystalline silicon layer (n.sup. ⁺ Or ^{p.sup. +} Layer) 103 having a small grain size doped at a high concentration, an insulating layer 104,
A second polycrystalline silicon layer 105 having a grain size larger than the crystal grain size of the polycrystalline silicon layer is stacked, and a p ⁺ or n ⁺ layer 106 is formed on the surface of the second polycrystalline silicon layer 105.
Are formed.

On the p ⁺ or n ⁺ layer 106, a transparent electrode 107 also serving as an antireflection film and a current collecting electrode 108 are provided. As the metal substrate material used in the solar cell of the present invention, any metal having good conductivity and forming a compound such as silicon and silicide is used, and typical examples thereof include W, Mo, and Cr. Of course, any other material may be used as long as the metal having the above-mentioned properties is adhered to the surface, and an inexpensive substrate other than the metal can be used. The first polycrystalline silicon layer 103 having a small particle diameter has a particle diameter of 1 to 5 in consideration of the size (a = 1 to 5 μm) of the minute opening provided in the insulating layer 104.
The thickness is suitably 20 μm, and preferably 1.5 to 10 μm. Although there is no particular limitation on the thickness of the insulating layer 104, it is appropriate that the thickness be in the range of 200 to 1 μm. The diameter and thickness of the second polycrystalline silicon layer 105 having a large grain size are preferably 20 to 500 μm, and more preferably 30 to 500 μm, respectively, from the requirements on the characteristics of the solar cell and the process restrictions. Is desirable. Here, the crystals having a large grain size and a small grain size refer to the size of crystal grains obtained by comparing the first polycrystalline layer and the second polycrystalline layer. The thickness of the p ⁺ or n ⁺ layer 106 is 0.05 to 1 μm depending on the amount of impurities to be introduced.
And preferably 0.1 to 0.5 μm.
m is desirable.

Next, a method of manufacturing the solar cell of the present invention shown in FIG. 1 will be described with reference to the manufacturing process diagrams shown in FIGS. First, a polycrystalline silicon layer 802 (a grain boundary is omitted in the drawing) is deposited on a metal substrate 801 by an LPCVD apparatus or the like. At this time, doping is performed at the time of deposition, or high concentration of impurity atoms (for example, P, P for n-type) by ion implantation or thermal diffusion after deposition.
If it is a mold, B) is introduced to bring it into a supersaturated state (FIG. 21).

Next, an insulating layer (for example, an oxide film formed by thermal oxidation or normal pressure CVD) 803 is formed on the surface of the first polycrystalline silicon layer 802 (FIG. 22). Annealing is performed at 800 to 1100 ° C. to cause abnormal grain growth in the polycrystalline silicon layer 802 to form a first polycrystalline silicon layer 802, and a metal layer between the metal substrate 801 and the first polycrystalline silicon layer 802. Silicon intermediate layer (silicide or compound) 8
04 is formed (FIG. 23). Small openings 805 are periodically provided in the insulating layer 803 to expose the surface of the first polycrystalline silicon layer (FIG. 24), and crystal growth is performed from the small openings 805 by selective epitaxial growth and lateral growth. To grow a large grain size silicon to obtain a second polycrystalline silicon layer 806 as a continuous film (FIG. 25). P ⁺ is added to the grown crystal surface by ion implantation or impurity diffusion.
Alternatively, an n ⁺ layer 807 is formed (FIG. 26), and finally a transparent conductive film 808 / current collecting electrode 809 is provided (FIG. 27).

As a method of depositing polycrystalline silicon on a metal substrate, LPCVD, plasma CVD, vapor deposition,
Any method such as a sputtering method may be used, but an LPCVD method is generally used. The thickness of the first polycrystalline silicon layer is determined by factors such as the size of the abnormal grains to be grown and suppression of diffusion of metal atoms from the substrate, but is preferably in the range of about 0.1 to 1.0 μm.

In place of the polycrystalline silicon formed on the substrate, a silicon layer containing an amorphous phase such as amorphous silicon (a-Si) or microcrystalline silicon (μc-Si) may be used. By introducing impurities into this layer to bring it into a supersaturated state, abnormal grains can be similarly grown to form a first polycrystalline silicon layer.

The first polycrystalline silicon or a
As impurities introduced for the purpose of causing abnormal grain growth to silicon such as -Si, μc-Si, etc., P, As, Sn, etc. are selected for n-type and B, Al, etc. are selected for p-type.
The amount of impurities to be introduced is appropriately determined depending on the desired size of abnormal grains and annealing conditions, but is generally about 4 ×.
10 ²⁰ cm ^-3 or more.

Since the annealing temperature for forming the metal-silicon intermediate layer for forming an ohmic contact between the metal substrate and the polycrystalline silicon layer is lower than the annealing temperature for forming abnormal grains, the above-described process is performed. As described above, the process can be simplified by performing the annealing at the same time as the annealing for forming the abnormal grains. However, it goes without saying that the process may be performed as another process.

In the solar cell of the present invention, the insulating layer formed on the polycrystalline silicon or the silicon layer of a-Si, μc-Si or the like is formed on the surface thereof in order to suppress nucleation during selective crystal growth. A material whose nucleation density is much smaller than that of silicon is used. For example, SiO ₂ , Si ₃ N _{4 and the} like are typically used.
In the present invention, LPCVD is used as a selective crystal growth technique used for growing a large grain silicon layer using the above-described abnormal grain grown polycrystalline silicon as a seed crystal.
, A plasma CVD method, a photo CVD method and the like, but an LPCVD method is generally used.

The source gas for selective crystal growth used in the present invention is SiH ₂ Cl ₂ , SiCl ₄ , SiHCl ₃ , SiH ₄ , Si ₂ H
₆ , silanes such as SiH ₂ F ₂ and Si ₂ F ₆ and halogenated silanes are typical examples. H ₂ is added as a carrier gas or in addition to the above-mentioned source gas for the purpose of obtaining a reducing atmosphere for promoting crystal growth.
The ratio of the introduction amount of the source gas and hydrogen is appropriately determined as desired depending on the forming method, the type of the source gas, the material of the insulating layer, and the formation conditions, but is preferably 1:10 or more and 1: 1000 or less. Yes, more preferably 1:20 or more and 1: 800 or less.

In the present invention, HCl is used for the purpose of suppressing generation of nuclei on the insulating layer. The amount of HCl added to the source gas depends on the forming method, the type of the source gas, the material of the insulating layer, and the forming conditions. Is appropriately determined as desired, but it is generally appropriate that the ratio be 1: 0.1 or more and 1: 100 or less, more preferably 1: 0.2 or more and 1:80 or less.

The temperature and pressure at which the selective crystal growth is carried out in the present invention vary depending on the forming method, the kind of the raw material gas used, the flow rate ratio between the raw material gas and H ₂ and HCl, and the like. For example, in a normal LPCVD method, it is appropriate that the temperature is suitably about 600 ° C. or more and 1250 ° C. or less, more preferably, 650 ° C. or more and 1200 ° C. or less. In a low-temperature process such as a plasma CVD method, a temperature of approximately 200 ° C. to 600 ° C. is appropriate.
More preferably, the temperature is controlled to be 200 ° C. or more and 500 ° C. or less.

Similarly, the pressure is about 10 ^-2 Torr to 76
0 Torr is appropriate, and more preferably 10 ^-1 Torr to 760.
A Torr range is desirable.

When a low-temperature process such as a plasma CVD method is used as the selective crystal growth method, auxiliary energy is applied for the purpose of decomposing a source gas or promoting crystal growth on the substrate surface, in addition to the thermal energy applied to the substrate. You. For example, high frequency energy is generally used in the case of the plasma CVD method, and ultraviolet light energy is used in the case of the optical CVD method. Although the intensity of the auxiliary energy varies depending on the forming method and the forming conditions, the high-frequency energy is suitably a high-frequency discharge power of 20 to 100 W, and the ultraviolet light energy is preferably an energy density of 20 to 500 mW / cm ² , more preferably Discharge power 30 to 100 W, ultraviolet energy density 20 to 400
Desirably, it is set to mW / cm ² .

Further, the polycrystalline thin film formed by the method of the present invention can form a junction by doping with an impurity element during or after crystal growth. The impurity element to be used is a p-type impurity,
Suitable elements include Group I elements such as B, Al, Ga, and In. Examples of the n-type impurities include Group V elements such as P, As, Sb, and Bi. In particular, B, Ga, P, Sb, etc. are most suitable. The amount of the impurity to be doped is appropriately determined according to the desired electrical characteristics.

As a substance containing such an impurity element as a component (impurity introduction substance), it is preferable to select a compound which is in a gaseous state at normal temperature and normal pressure or a compound which can be easily vaporized by an appropriate vaporizer. Such compounds include:
_{PH 3, P 2 H 4,} PF 3, PF 5, PCl 3, AsH 3, AsF 3, AsF 5, As
_{Cl 3, SbH 3, SbF 5} , BF 3, BCl 3, BBr 3, B 2 H 6, B 4 H 10,
_{B 5 H 9, B 5 H} 11, B 6 H 10, B 6 H 12, AlCl 3 and the like. Even if one kind of compound containing an impurity element is used,
More than one species may be used in combination.

The shape of the opening provided in the insulating layer when performing the selective crystal growth method used in the method of manufacturing the solar cell of the present invention is not particularly limited, but a square, a circle, and the like are typical. No. Regarding the size of the opening, the facet of the growing mountain-shaped single crystal body collapses as the opening increases as shown in Experiment 1, that is, the crystallinity tends to deteriorate, and the collapse of the facet is suppressed. Therefore, it is desirable that the thickness be several μm or less. Actually, since it depends on the pattern accuracy of photolithography, when the shape is a square, a is appropriately 1 μm or more and 5 μm or less. Further, it is appropriate that the interval b at which the openings are provided is set to 10 μm or more and 500 μm or less in consideration of the size of the seed crystal to be grown.

The type of the solar cell of the present invention is not particularly limited. As shown in the above-mentioned experimental examples and examples described later, Schottky type, Mls type, pn junction type, pin junction type, hetero junction type , Tandem type, etc.

[0059]

Hereinafter, the formation of a desired solar cell by carrying out the present invention will be described in more detail, but the present invention is not limited to these examples.

Example 1 As described above, Experiments 2 to 5
A large grain polycrystalline silicon pin type solar cell on a metal substrate as shown in FIG. 21 to 27 show the manufacturing process. An Mo plate having a thickness of 0.9 mm was used as a metal substrate as a base. Then, SiH ₄ was thermally decomposed at 630 ° C. using an LPCVD apparatus shown in FIG.
μm polycrystalline silicon was deposited.

Next, phosphorus glass was deposited on the surface of the polycrystalline silicon to diffuse impurities. Table 3 shows the deposition conditions of the phosphorus glass. Immediately after deposition of phosphorus glass,
The apparatus was driven in an N ₂ atmosphere for 5 minutes while being kept at 0 ° C.
At this time, the amount of P introduced into the polycrystalline silicon is about 6 ×
It was 10 ²⁰ cm ^-3 .

After the impurity diffusion is completed, HF: H ₂ O = 1:
Phosphorus glass was removed with a 10 HF aqueous solution, and a SiO ₂ layer was formed on the surface of the polycrystalline silicon by thermal oxidation to a thickness of 1000Å. Then 1000
Annealing was performed at 4 ° C. for 4 hours to cause abnormal grain growth. Thereby, a first polycrystalline silicon layer having a crystal grain size of about 3 μm was obtained.

Table 3 In addition, it was confirmed from another sample manufactured under the same conditions that MoSi ₂ was formed at the interface between the metal and the polycrystalline silicon layer.

In the SiO ₂ layer, openings are a = 2 μm, b = 50 μm
Then, selective crystal growth was performed under the continuous conditions shown in Table 4 by the LPCVD apparatus shown in FIG. 20 to obtain a continuous thin film made of second polycrystalline silicon having a large grain size. The particle size and thickness of the silicon thin film obtained at this time were both about 50 μm.

B is applied to the surface of the second polycrystalline silicon layer having a large grain size by ion implantation to make B 20 KeV, 1 × 10 ¹⁵ cm.
Driving ^-2 of conditions, Table 4 Annealing was performed at 800 ° C. for 30 minutes to form ap ⁺ layer. Finally, an ITO transparent conductive film / collecting electrode (Cr / Ag / Cr) was formed on the p ⁺ layer by EB (Electron Beam) evaporation.

The thus obtained solar cell having a p ⁺ / large grain size polycrystalline silicon / SiO ₂ / n ⁺ small grain size polycrystalline silicon / Cr structure was irradiated with AM1.5 (100 mW / cm ² ) light. Was measured for IV characteristics at a cell area of 0.25
Open voltage 0.42V in cm ² , short circuit current 26mA / cm ² , fill factor
It was 0.66, and the energy conversion efficiency was 7.2%.

Such characteristics can be obtained with good reproducibility, and the variation in characteristics is large as compared with a solar cell in which large-grain polycrystalline silicon is grown directly on a metal substrate without using a small-grain polycrystalline silicon layer. Was improved. Table 5 shows how the characteristics vary depending on the presence or absence of the small grain size polycrystalline silicon layer.

Table 5 Thus, a polycrystalline solar cell exhibiting good characteristics was produced using the large grain silicon layer grown on the metal substrate.

Example 2 An amorphous silicon carbide / polycrystalline silicon hetero-type solar cell was produced in the same manner as in Example 1. Cr was used as a metal substrate, and a first silicon layer containing microcrystals was deposited thereon by plasma CVD to a thickness of 0.4 μm by decomposition of SiH ₄ + AsH ₃ . The doping amount at this time was AsH ₃ / SiH ₄ = 1.6 × 10 ^-2 (flow rate ratio).

An SiO ₂ layer was formed on the silicon layer by a normal pressure CVD method.
A film is deposited at 500 °, and the opening has a size of a = 1.2 μm.
m and b were provided at intervals of 50 μm. Table 6 by LPCVD method
Selective crystal growth was performed under the conditions described above to form a second silicon layer having a large grain size. 13 to 19 show processes of the manufactured hetero solar cell. However, in 602, crystal grain boundaries are omitted. 21 and 2 shown in the first embodiment.
7, but p ⁺ in FIG.
Instead of the layer 807, a p-type amorphous silicon carbide 607 is formed on the polycrystalline silicon.

Table 6 The p-type amorphous silicon carbide layer 607 was deposited on the surface of the polycrystalline silicon at 100 ° by a usual plasma CVD apparatus under the conditions shown in Table 6. At this time, the dark conductivity of the amorphous silicon carbide film is about 10 ⁻² S · cm ^−1.
And the composition ratio of C and Si in the film was 2: 3.

Further, the transparent conductive film 608 was formed by electron beam evaporation of ITO at about 1000 °.

A of the amorphous silicon carbide / polycrystalline silicon hetero solar cell thus obtained
M1.5 Measurement of IV characteristics under light irradiation (cell area 0.16 cm ² ), open-circuit voltage 0.49 V, short-circuit photocurrent 2
1.5 mA / cm ² and a fill factor of 0.55 were obtained, and a high value of 5.8% in conversion efficiency was obtained. This is comparable to a conventional amorphous silicon carbide / polycrystalline silicon hetero-type solar cell using a sliced polycrystalline substrate.

Example 3 A pin-type polycrystalline solar cell as shown in FIG. 1 was produced in the same manner as in Example 1. As described above, polycrystalline silicon was deposited on the Mo substrate, and phosphorus glass was deposited on the surface to diffuse impurities. HF
After removing phosphorus glass with aqueous solution, replace with SiO ₂
1000 L of Si ₃ N ₄ was deposited on the surface of polycrystalline silicon using an LPCVD apparatus, and annealed at 1050 ° C. for 3 hours to grow abnormal grains. In this way, the grain size is about 3.2 μm
Of the first polycrystalline silicon layer was obtained.

The opening is made a = 1.2 μm in the Si ₃ N ₄ layer, and b
= 100 μm periodically, and selective crystal growth was performed by the LPCVD apparatus of FIG. 20 under the continuous growth conditions shown in Table 7, to obtain a continuous thin film made of second polycrystalline silicon having a large grain size.

Table 7 At this time, doping was performed by mixing a small amount of impurities during the selective crystal growth under the conditions shown in Table 7. PH ₃ was used as an impurity, and PH ₃ / SiH ₂ Cl was used for the raw material gas SiH ₂ Cl ₂ .
₂ = 2 × 10 ⁻⁶ . The particle diameter and thickness of the obtained silicon thin film were both about 90 μm.

In order to form ap ⁺ layer, Al is vacuum-deposited on the surface of silicon having a large particle diameter, and RTA (Rapid Thermal Anneal).
ing) Processing was performed. The thickness of the deposited Al is 600Å
The RTA treatment was performed at 800 ° C. for 15 seconds.

Finally, a transparent conductive film ITO also serving as an anti-reflection film
Was formed by electron beam evaporation at about 1000 °, and Cr was vacuum-deposited thereon as a current collecting electrode to a thickness of 1 μm.

When the IV characteristics of the pin type polycrystalline solar cell AM1.5 thus manufactured under light irradiation were examined, an open circuit voltage of 0.47 V, a short-circuit photocurrent of 28 and a cell area of 0.16 cm ² were obtained.
The mA / cm ² fill factor was 0.67, and a high conversion efficiency of 8.8% was obtained.

Example 4 A nip-type polycrystalline solar cell as shown in FIG. 1 was produced in the same manner as in Examples 1-3. Cr
630 of SiH ₄ was formed on the substrate by using the LPCVD apparatus shown in FIG.
Pyrolysis at ℃ deposited 0.4 μm polycrystalline silicon.
B is implanted on the surface of this polycrystalline silicon and the energy is 20
Ion implantation was performed under the conditions of KeV and a dose of 2 × 10 ¹⁶ cm ⁻² , and the impurity concentration was set to 5 × 10 ²⁰ cm ⁻³ . An SiO ₂ film was deposited at 800 ° C. by a normal pressure CVD apparatus, and abnormal grains were grown in polycrystalline silicon under an annealing condition of 1000 ° C. for 5 hours.
Then, a first polycrystalline silicon layer was formed. After this, Si
Openings are periodically provided at intervals of a = 1.2 μm and b = 50 μm in the O ₂ layer, and selective crystal growth is performed by the LPCVD method under the conditions shown in Table 4, and is made of second polycrystalline silicon having a large grain size. A thin film layer was obtained. The P in ion implantation on the surface of the large-grain polycrystalline silicon layer implanted with 50KeV, 1 × 10 ¹⁵ cm- ² conditions,
Annealing was performed at 800 ° C. for 30 minutes to form an n ⁺ layer. Finally, an ITO / collecting electrode was formed in the same manner as in Example 4 to complete the manufacture of the solar cell. N produced in this way
When the IV characteristics of the ip-type polycrystalline solar cell under AM1.5 light irradiation were examined, the open area voltage was 0.46 V, the cell area was 0.16 cm ² ,
Short-circuit photocurrent 26 mA / cm ² , fill factor 0.69, conversion efficiency
8.3% was obtained. As described above, according to the present invention, a high-quality polysilicon layer is formed on a metal substrate by forming a large-grain polysilicon layer on a small-grain polysilicon layer as a seed crystal. Since it can be formed, it was shown that an inexpensive solar cell with mass productivity can be manufactured.

[0081]

As described above, according to the present invention, a polycrystalline solar cell having good characteristics can be formed on a metal substrate. This has made it possible to provide mass-produced inexpensive and high-quality solar cells to the market.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a pin solar cell manufactured by a method of the present invention.

FIG. 2 is a diagram illustrating abnormal grain growth.

FIG. 3 is a diagram illustrating abnormal grain growth.

FIG. 4 is a diagram showing a state in which large-grain-size polycrystalline silicon is grown by a selective crystal growth method using polycrystalline silicon that has been abnormally grown as a seed crystal.

FIG. 5 is a diagram showing a state in which large grain polycrystalline silicon is grown by a selective crystal growth method using abnormally grown polycrystalline silicon as a seed crystal.

FIG. 6 is a diagram showing a state in which large grain polycrystalline silicon is grown by a selective crystal growth method using polycrystalline silicon that has been abnormally grown as a seed crystal.

FIG. 7 is a diagram illustrating a selective crystal growth method.

FIG. 8 is a diagram illustrating a selective crystal growth method.

FIG. 9 is a diagram illustrating a selective crystal growth method.

FIG. 10 is a diagram illustrating a selective crystal growth method.

FIG. 11 is a diagram illustrating a process in which a mountain-shaped crystal grows three-dimensionally in a selective crystal growth method.

FIG. 12 is a diagram illustrating a process in which a mountain-shaped crystal grows three-dimensionally in a selective crystal growth method.

FIG. 13 is a view showing a manufacturing process of a hetero solar cell manufactured by the method of the present invention.

FIG. 14 is a diagram showing a manufacturing process of a hetero solar cell manufactured by the method of the present invention.

FIG. 15 is a view showing a manufacturing process of a hetero solar cell manufactured by the method of the present invention.

FIG. 16 is a view showing a process of manufacturing a hetero-type solar cell manufactured by the method of the present invention.

FIG. 17 is a diagram showing a manufacturing process of a hetero solar cell manufactured by the method of the present invention.

FIG. 18 is a diagram illustrating a manufacturing process of a hetero solar cell manufactured by the method of the present invention.

FIG. 19 is a diagram showing a manufacturing process of a hetero solar cell manufactured by the method of the present invention.

FIG. 20 is a schematic view of an LPCVD apparatus used in the manufacturing process of the solar cell of the present invention.

FIG. 21 is a diagram illustrating a manufacturing process of the pin solar cell of FIG.

FIG. 22 is a diagram illustrating a manufacturing process of the pin solar cell of FIG.

FIG. 23 is a view illustrating a manufacturing process of the pin solar cell of FIG. 1;

FIG. 24 is a view illustrating a manufacturing process of the pin solar cell of FIG. 1;

FIG. 25 is a diagram illustrating a manufacturing process of the pin solar cell of FIG. 1;

FIG. 26 is a diagram illustrating a manufacturing process of the pin solar cell of FIG. 1;

FIG. 27 is a view illustrating a manufacturing process of the pin solar cell of FIG. 1;

FIG. 28 is a characteristic diagram showing a change in crystal grain size when an annealing temperature is changed in an impurity-doped polycrystalline silicon film.

[Explanation of symbols]

101 metal substrate, 201 metal substrate, 301 metal substrate, 601 metal substrate, 801 metal substrate, 103 polycrystalline silicon layer, 202 polycrystalline silicon layer, 303
Polycrystalline silicon layer, 602 Polycrystalline silicon layer, 802
Polycrystalline silicon layer, 102 metal-silicon intermediate layer,
203 metal-silicon intermediate layer, 302 metal-silicon intermediate layer, 604 metal-silicon intermediate layer, 804 metal-silicon intermediate layer, 104 insulating layer, 304 insulating layer, 402 insulating layer, 603 insulating layer, 803 insulating layer,
105 silicon crystal, 305 silicon crystal, 4
04 silicon crystal, 606 silicon crystal, 80
6 silicon crystal, 106 p ⁺ layer or n ⁺ layer, 8
07 p ⁺ layer or n ⁺ layer, 607 p-type amorphous silicon carbide, 107 transparent conductive layer, 608 transparent conductive layer, 808 transparent conductive layer, 108 current collecting electrode, 6
09 collecting electrode, 809 collecting electrode, 403 opening,
605 opening, 805 opening, 701 gas supply system, 702 heater, 703 quartz reaction tube, 704
Substrate, 705 susceptor.

Claims (9)

(57) [Claims] At least a metal-semiconductor intermediate layer, a first semiconductor layer, an insulating layer having a plurality of openings, and mountain-shaped crystal grains selectively epitaxially grown from the plurality of openings on a metal base. A second semiconductor layer consisting of an assembly,
A solar cell characterized by having the layers in this stacking order. 2. The chevron-shaped crystal grains having an average grain size of 20
The solar cell according to claim 1, wherein the thickness is from 500 to 500 µm. 3. The solar cell according to claim 1, wherein said first semiconductor layer has an average crystal grain size of 1 to 20 μm. 4. The method according to claim 1, wherein the first semiconductor layer has a size of 4 × 10 ²⁰ cm ^−3.
The solar cell according to claim 1, comprising the above impurity atoms. 5. The solar cell according to claim 1, wherein the size of the opening is 1 to 5 μm. 6. The distance between the openings is 10 to 500 μm.
The solar cell according to claim 1, wherein 7. A step of depositing a polycrystalline semiconductor layer on a metal substrate; a step of introducing high-concentration impurity atoms into the polycrystalline semiconductor layer; and a step of forming an insulating layer on a surface of the polycrystalline semiconductor layer. A step of causing abnormal grain growth in the polycrystalline semiconductor layer by annealing and forming a metal-semiconductor intermediate layer between the metal substrate and the polycrystalline semiconductor layer; Forming a micro-opening on the surface to expose the polycrystalline semiconductor surface; and performing crystal growth from the micro-opening by selective epitaxial growth and lateral growth. . 8. The method according to claim 7, wherein the polycrystalline semiconductor is polycrystalline silicon, and the impurity atom is selected from one of P, As, Sn, B, and Al. 9. The method of claim 1, wherein the selective epitaxial growth is performed by thermal CV.
The method for manufacturing a solar cell according to claim 7, wherein the method is performed by Method D.