KR101490599B1 - Method for manufacturing amorphous silicon solar cell - Google Patents
Method for manufacturing amorphous silicon solar cell Download PDFInfo
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- KR101490599B1 KR101490599B1 KR20130073327A KR20130073327A KR101490599B1 KR 101490599 B1 KR101490599 B1 KR 101490599B1 KR 20130073327 A KR20130073327 A KR 20130073327A KR 20130073327 A KR20130073327 A KR 20130073327A KR 101490599 B1 KR101490599 B1 KR 101490599B1
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- 229910021417 amorphous silicon Inorganic materials 0.000 title claims abstract description 74
- 238000000034 method Methods 0.000 title claims description 10
- 238000004519 manufacturing process Methods 0.000 title abstract description 8
- 229910052751 metal Inorganic materials 0.000 claims description 17
- 239000002184 metal Substances 0.000 claims description 17
- 239000000758 substrate Substances 0.000 claims description 13
- 238000010438 heat treatment Methods 0.000 claims description 12
- 229910021332 silicide Inorganic materials 0.000 claims description 7
- 238000000137 annealing Methods 0.000 claims description 6
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 claims description 5
- 239000012299 nitrogen atmosphere Substances 0.000 claims description 3
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 claims description 2
- 239000013078 crystal Substances 0.000 abstract description 2
- 230000031700 light absorption Effects 0.000 abstract 1
- 238000002425 crystallisation Methods 0.000 description 5
- 230000008025 crystallization Effects 0.000 description 5
- 230000007423 decrease Effects 0.000 description 4
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 3
- 239000010409 thin film Substances 0.000 description 3
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 2
- 206010010144 Completed suicide Diseases 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910001220 stainless steel Inorganic materials 0.000 description 2
- 239000010935 stainless steel Substances 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- ZLMJMSJWJFRBEC-UHFFFAOYSA-N Potassium Chemical compound [K] ZLMJMSJWJFRBEC-UHFFFAOYSA-N 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical group [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 229910000831 Steel Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 229910021419 crystalline silicon Inorganic materials 0.000 description 1
- 125000004122 cyclic group Chemical group 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 229910052700 potassium Inorganic materials 0.000 description 1
- 239000011591 potassium Substances 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000010959 steel Substances 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- 229910052720 vanadium Inorganic materials 0.000 description 1
- LEONUFNNVUYDNQ-UHFFFAOYSA-N vanadium atom Chemical compound [V] LEONUFNNVUYDNQ-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/20—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials
- H01L31/202—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof such devices or parts thereof comprising amorphous semiconductor materials including only elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
- H01L31/1884—Manufacture of transparent electrodes, e.g. TCO, ITO
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
- H01L31/075—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type
- H01L31/077—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PIN type the devices comprising monocrystalline or polycrystalline materials
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Abstract
본 발명은 비정질 실리콘 태양전지의 제조방법에 관한 것으로, 보다 구체적으로 본 발명은 광흡수층의 균일한 결정화가 가능하고, 양질의 결정립을 구현할 수 있어, 기존의 비정질 실리콘 태양전지에 비해 향상된 광특성을 가질 수 있다.The present invention relates to a method of manufacturing an amorphous silicon solar cell, and more particularly, to a method of manufacturing an amorphous silicon solar cell, in which a light absorption layer can be uniformly crystallized and high quality crystal grains can be realized, Lt; / RTI >
Description
본 발명은 비정질 실리콘 태양전지의 제조방법에 관한 것이다.
The present invention relates to a method of manufacturing an amorphous silicon solar cell.
실리콘 태양전지의 가장 기본적인 구조는 p-n 접합으로 구성된 다이오드 형태이나, 비정질 실리콘 박막의 경우 캐리어의 확산거리(diffusion length)가 결정질 실리콘 기판에 비해 매우 낮아 p-n 구조로 제조될 경우 빛에 의해 생성된 전자-정공쌍(electron-hole pairs)의 수집 효율이 낮다.
The most basic structure of a silicon solar cell is a diode composed of a pn junction, but in the case of an amorphous silicon thin film, the diffusion length of the carrier is much lower than that of a crystalline silicon substrate, The collection efficiency of electron-hole pairs is low.
이러한 문제를 해결하기 위한 하나의 대안으로서, 비정질 실리콘 태양전지는 도핑이 되지 않은 무첨가(intrinsic, i형) 비정질 실리콘 광흡수층을 p형 비정질 실리콘과 n형 비정질 실리콘층 중간에 삽입한 p-i-n 구조로 제조된다. 그러나, p-i-n 구조의 태양전지의 효율이 4~5% 정도로 여전히 poly-Si 태양전지나 CIGS에 비해 낮다.
As an alternative to solve this problem, an amorphous silicon solar cell is manufactured by a pin structure in which an intrinsic (i-type) amorphous silicon light absorbing layer not doped is inserted between a p-type amorphous silicon layer and an n-type amorphous silicon layer do. However, the efficiency of the pin-type solar cell is about 4-5%, which is still lower than that of the poly-Si solar cell or CIGS.
최근에는 광흡수층을 결정화 혹은 준결정화시킴으로써 기존의 비정질 실리콘 태양전지보다 높은 효율의 태양전지를 제조하기도 한다.In recent years, by crystallizing or quasicrystallizing the light absorbing layer, a solar cell having higher efficiency than conventional amorphous silicon solar cells has been produced.
비정질 실리콘을 결정화하는 방법은 여러 가지가 알려져 있으며, 가장 대표적인 방법으로 비정질 실리콘에 YAG 레이저, 특히 Nd:YAG 레이저의 레이저광선을 주사하는 방법을 사용하고 있다. 하지만, 이러한 레이저 주사방법은 결정화가 빠르지 못하고 균일하지 못한 단점이 있고, 이는 제조공정 및 박막 태양전지의 효율을 높이는데 걸림돌이 되고 있다. 따라서 신속하고 균일하게 결정화시키는 박막 태양전지 제조방법의 개발이 필요하다.
A variety of methods for crystallizing amorphous silicon have been known. As a typical method, a method of scanning a laser beam of a YAG laser, particularly an Nd: YAG laser, is used for amorphous silicon. However, such a laser scanning method has a disadvantage that the crystallization is not fast and is not uniform, which is a hindrance to the manufacturing process and the efficiency of the thin film solar cell. Therefore, it is necessary to develop a thin film solar cell manufacturing method which crystallizes quickly and uniformly.
본 발명의 일 측면은, 광흡수층으로 사용되는 비정질 실리콘의 결정화로부터 결함 농도를 효과적으로 낮춤으로써 고효율의 태양전지를 제조하는 방법을 제공하고자 하는 것이다.
One aspect of the present invention is to provide a method for manufacturing a solar cell with high efficiency by effectively lowering the defect concentration from crystallization of amorphous silicon used as a light absorbing layer.
본 발명의 일 측면은, According to an aspect of the present invention,
금속 기판을 준비하는 단계;Preparing a metal substrate;
상기 금속 기판 상에 투명전극층을 형성하는 단계;Forming a transparent electrode layer on the metal substrate;
상기 투명전극층 상부에 비정질 실리콘층을 형성한 후 700℃ 이상에서 1 시간 이상, 질소분위기에서 열처리하여 상기 비정질 실리콘층을 결정화하는 단계; 및Crystallizing the amorphous silicon layer by forming an amorphous silicon layer on the transparent electrode layer and then heat-treating the amorphous silicon layer at 700 ° C or more for 1 hour or more in a nitrogen atmosphere; And
상기 결정화된 비정질 실리콘층 상부에 후면전극층을 형성하는 단계를 포함하고,And forming a rear electrode layer on the crystallized amorphous silicon layer,
상기 열처리 후 투명전극층과 상기 비정질 실리콘층 사이에 금속규화물(metal silicide)이 형성되는 비정질 실리콘 태양전지의 제조방법을 제공한다.
And a metal silicide is formed between the transparent electrode layer and the amorphous silicon layer after the heat treatment.
본 발명에 의하면, 고온 열처리로부터 광흡수층의 균일한 결정화가 가능하고, 양질의 결정립을 구현하여 태양전지의 성능을 개선할 수 있다.
According to the present invention, it is possible to uniformly crystallize the light absorbing layer from a high-temperature heat treatment, and to realize high quality crystal grains and improve the performance of the solar cell.
도 1a 내지 1c는 본 발명의 일 실시예에 따른, 열처리 전·후에 따른 비정질 실리콘의 결정화를 도식화하여 나타낸 것이다.FIGS. 1A to 1C are diagrammatic representations of crystallization of amorphous silicon before and after a heat treatment, according to an embodiment of the present invention.
이하, 본 발명에 대하여 상세히 설명한다.
Hereinafter, the present invention will be described in detail.
본 발명의 일 측면인 비정질 실리콘 태양전지를 제조하는 방법은, 금속 기판을 준비하는 단계; 상기 금속 기판 상에 투명전극층을 형성하는 단계; 상기 투명전극층 상부에 비정질 실리콘층을 형성한 후 700℃ 이상에서 1시간 이상 열처리하여 상기 비정질 실리콘층을 결정화하는 단계; 및 상기 결정화된 비정질 실리콘층 상부에 후면전극층을 형성하는 단계를 포함하여 이루어질 수 있다.
According to an aspect of the present invention, there is provided a method of manufacturing an amorphous silicon solar cell, comprising: preparing a metal substrate; Forming a transparent electrode layer on the metal substrate; Crystallizing the amorphous silicon layer by forming an amorphous silicon layer on the transparent electrode layer and then heat-treating the amorphous silicon layer at 700 ° C or more for 1 hour or more; And forming a rear electrode layer on the crystallized amorphous silicon layer.
본 발명에서 상기 금속 기판은 비정질 실리콘 태양전지에 사용될 수 있는 기판이면 그 종류를 특별히 제한하는 것은 아니나, 바람직한 예로는 스테인리스 스틸(STS)을 적용할 수 있다.
In the present invention, the metal substrate is not particularly limited as long as it is a substrate that can be used in an amorphous silicon solar cell, but a preferred example thereof is stainless steel (STS).
상기 금속 기판 상에 투명전극층을 형성한다.A transparent electrode layer is formed on the metal substrate.
통상, 투명전극층으로서 투명전도성 산화물(TCO; transparent conducting oxide)을 스퍼터링법 또는 MOCVD(Metal Organic Chemical Vapor Deposition)법 등을 이용하여 형성하는데, 이때 투명전도성 산화물로는 인듐-주석 산화물(ITO; indium-tin oxide), ZnO:Al, ZnO-Al2O3 등과 같은 투명한 도전물질을 주로 사용한다.
Typically, a transparent conductive oxide (TCO) is formed as a transparent electrode layer by sputtering or MOCVD (Metal Organic Chemical Vapor Deposition). At this time, indium-tin oxide (ITO) tin oxide), ZnO: a transparent conductive material such as Al, ZnO-Al 2 O 3 is mainly used.
본 발명자들은 상술한 바와 같은 투명전도성 산화물로 투명전극층을 형성한 후 그 위에 비정질 실리콘층을 형성하여 고온 열처리하는 경우, ITO는 반사도가 저하되고, Al 원자는 상부의 비정질 실리콘층으로 이동하여 갈바닉(galvanic) 현상을 유발함과 동시에 효율의 저하를 야기하는 것을 확인하였다.
When a transparent electrode layer is formed of a transparent conductive oxide as described above and then an amorphous silicon layer is formed on the transparent electrode layer, the reflectivity of ITO decreases and the Al atoms move to the upper amorphous silicon layer, galvanic phenomenon and decrease the efficiency.
이에, 고온에서도 잘 견디는 물질로 투명전극층을 형성함이 바람직할 것인바, 본 발명자들은 고내열성이 우수한 몰리브덴(Mo)을 활용하여 Mo 전극층을 형성하였으며, 이로 인해 상기의 문제점을 해결할 수 있다.Accordingly, it is preferable to form a transparent electrode layer with a material that can withstand high temperatures. The inventors of the present invention have solved the above problems by using Mo having excellent heat resistance.
본 발명에서 상기 Mo 전극층은 순수 Mo 또는 텅스텐이 합금된 MoW일 수 있으며, 이러한 Mo 전극층은 스퍼터링법을 이용하여 형성할 수 있다.
In the present invention, the Mo electrode layer may be MoW alloyed with pure Mo or tungsten, and the Mo electrode layer may be formed by sputtering.
상기 Mo 전극층 상부에 비정질 실리콘층을 플라즈마화학기상증착(PECVD; plasma-enhanced chemical vapor deposition) 방법으로 형성할 수 있다.
An amorphous silicon layer may be formed on the Mo electrode layer by a plasma-enhanced chemical vapor deposition (PECVD) method.
비정질 실리콘으로는 a-Si:H로 표현되는 수소화된 비정질 실리콘을 이용할 수 있으며, i(intrinsic)형 비정질 실리콘은 불순물이 첨가되지 않은 상태를 의미하며, p(positive)형과 n(negative)형은 비정질 실리콘에 불순물을 첨가하여 도핑된 상태를 의미한다. 이중 p형 비정질 실리콘을 형성하기 위해서는 3가 원소인 붕소, 칼륨 등을 첨가하고, n형 비정질 실리콘을 형성하기 위해서는 5가 원소인 인, 바소, 안티몬 등을 첨가할 수 있다.
As the amorphous silicon, hydrogenated amorphous silicon represented by a-Si: H can be used. Intrinsic amorphous silicon means a state in which no impurity is added, and p (positive) and n (negative) Refers to a doped state in which an impurity is added to amorphous silicon. In order to form the p-type amorphous silicon, boron, potassium or the like as a trivalent element may be added. In order to form an n-type amorphous silicon, phosphorus, vanadium, antimony and the like which are pentavalent elements may be added.
본 발명에서 상기 Mo 전극층 상부에 형성되는 비정질 실리콘층은 n형, n-i형 및 p-i형 중에서 선택된 1종의 비정질 실리콘층인 것이 바람직하다.
In the present invention, the amorphous silicon layer formed on the Mo electrode layer is preferably an amorphous silicon layer selected from n-type, ni-type and pi-type.
상기한 비정질 실리콘층을 형성한 후 이를 질소분위기에서 고온 열처리하여 상기 비정질 실리콘층을 결정화하는 것이 바람직하다.
After forming the amorphous silicon layer, it is preferable to crystallize the amorphous silicon layer by performing a high-temperature heat treatment in a nitrogen atmosphere.
본 발명에서 비정질 실리콘층을 형성한 후 고온 열처리를 행하는 것은, 기존 p-i-n형 구조를 갖는 태양전지의 낮은 효율을 극복하기 위한 것으로서, 상기와 같이 비정질 실리콘층에 고온 열처리를 행하게 되면 상기 비정질 실리콘층의 막질이 다결정 실리콘(polycrystalline silicon)으로 변형됨에 따라 광특성이 개선되는 효과를 얻을 수 있다.
The high-temperature annealing after forming the amorphous silicon layer in the present invention is intended to overcome the low efficiency of the conventional solar cell having the pin-type structure. When the amorphous silicon layer is subjected to the high-temperature annealing as described above, As the film quality is changed into polycrystalline silicon, the optical characteristic can be improved.
상술한 바와 같이, 비정질 실리콘층의 막질을 변형시키기 위해서는 700℃ 이상의 온도에서 1시간 이상 열처리함이 바람직하다.As described above, in order to modify the film quality of the amorphous silicon layer, it is preferable to perform heat treatment at a temperature of 700 DEG C or more for 1 hour or more.
열처리 온도가 700℃ 미만이거나 열처리 시간이 1시간 미만으로 충분하지 못하며, 비정질 실리콘층이 다결정 실리콘으로 모두 변형되지 않고 일부가 비정질 실리콘으로 남아 광특성 개선 효과가 충분하지 못하다. 다만, 열처리 온도가 750℃를 초과하거나, 열처리 시간이 2시간을 초과하면 열처리 효과가 포화될 뿐만 아니라, 스틸 기판에서 Fe 원자가 상부 전자소자로 확산되기 때문에, 소자 특성에 영향을 미친다.
The annealing temperature is less than 700 ° C. or the annealing time is less than 1 hour. The amorphous silicon layer is not deformed into the polycrystalline silicon, and a part of the amorphous silicon remains as amorphous silicon. However, if the heat treatment temperature exceeds 750 ° C or the heat treatment time exceeds 2 hours, not only the heat treatment effect is saturated but also Fe atoms are diffused into the upper electronic device on the steel substrate, which affects the device characteristics.
상기 열처리 후 투명전극층과 상기한 비정질 실리콘층 사이에 금속 규화물(metal silicide)이 형성되는데, 본 발명의 경우 상기 금속 규화물을 형성할 수 있는 금속은 Mo이며, 형성된 금속 규화물은 Mo-Silicide이다 (도 1a 내지 1c 참조).After the heat treatment, a metal silicide is formed between the transparent electrode layer and the amorphous silicon layer. In the present invention, the metal capable of forming the metal suicide is Mo and the metal suicide formed is Mo-Silicide 1a to 1c).
상기 금속은 연속적이지 않은 형태로 분산되어 표면에 존재하며, 그 상부에 비정질 실리콘층을 형성한 후 고온 열처리를 행하여 결정화를 진행할 경우 Mo와 실리콘이 금속 규화물을 형성하여 계면 특성을 향상시키므로 서로 다른 이종 물질 사이에 발생하는 직렬 저항이 감소하게 되어, 전자소자 특성 향상에 기여한다.
When the amorphous silicon layer is formed on the surface of the amorphous silicon layer and the amorphous silicon layer is formed on the surface of the amorphous silicon layer, the molybdenum and silicon form a metal silicide to improve the interfacial characteristics when crystallization proceeds. The series resistance occurring between the materials decreases, contributing to the improvement of electronic device characteristics.
이와 같이 비정질 실리콘층의 결정화가 완료되면, 그 위에 후면전극층을 형성하기 전에, 다른 비정질 실리콘층을 더 형성하는 것이 바람직하다.When the crystallization of the amorphous silicon layer is completed in this manner, it is preferable to form another amorphous silicon layer before forming the rear electrode layer thereon.
이때, 상기 비정질 실리콘층이 n형인 경우에는 그 위에 i-p형 비정질 실리콘층을 더 형성하고, 상기 비정질 실리콘층이 n-i형인 경우에는 그 위에 p형 비정질 실리콘층을 더 형성하고, 상기 비정질 실리콘층이 p-i형인 경우에는 그 위에 n형 비정질 실리콘층을 더 포함하는 것이 바람직하다.
If the amorphous silicon layer is n-type, a p-type amorphous silicon layer is further formed on the amorphous silicon layer, and if the amorphous silicon layer is a n-type, a p-type amorphous silicon layer is formed thereon. It is preferable to further include an n-type amorphous silicon layer thereon.
상술한 바와 같이, 비정질 실리콘층의 형성이 완료되면, 그 위에 후면전극층을 형성할 수 있으며, 이때 후면전극층은 ITO 또는 Al 산화물로 이루어질 수 있다.As described above, when the formation of the amorphous silicon layer is completed, a rear electrode layer may be formed thereon, and the rear electrode layer may be made of ITO or Al oxide.
상기 후면전극층을 Al 산화물로 형성할 경우, ZnO:Al, ZnO-Al2O3 등과 같은 투명한 도전물질을 주로 사용할 수 있다.
When the rear electrode layer is formed of Al oxide, a transparent conductive material such as ZnO: Al, ZnO-Al 2 O 3 or the like may be mainly used.
본 발명에 따른 비정질 실리콘 태양전지는 기존의 비정질 실리콘 태양전지, 예컨대 기판 상에 주기적인 표면 요철을 형성한 후 비정질 실리콘층 형성시킨 태양전지나, p형과 n형 비정질 실리콘 사이에 i형 비정질 실리콘층을 갖는 p-i-n형 구조의 태양전지에 비해 우수한 광특성 효과를 가질 수 있다. 즉, 고온 열처리에 따른 비정질 실리콘층의 상변화에 의해 밴드갭(bandgap)이 낮아짐에 따라 높은 에너지의 빛을 흡수할 수 있어, 태양전지의 효율이 극대화될 수 있는 것이다.The amorphous silicon solar cell according to the present invention can be applied to a conventional amorphous silicon solar cell, for example, a solar cell in which an amorphous silicon layer is formed on a substrate after cyclic surface irregularities are formed on the substrate, or an amorphous silicon layer is formed between the p- It is possible to have an excellent optical property effect as compared with a solar cell having a pin-type structure. That is, as the bandgap decreases due to the phase change of the amorphous silicon layer due to the high-temperature heat treatment, the energy of the high energy can be absorbed and the efficiency of the solar cell can be maximized.
Claims (6)
상기 금속 기판 상에 투명전극층을 형성하는 단계;
상기 투명전극층 상부에 n형, n-i형 및 p-i형 중에서 선택된 1종의 비정질 실리콘층을 형성한 후 700℃~750℃에서 1 시간~2 시간, 질소분위기에서 열처리하여 상기 비정질 실리콘층을 결정화하는 단계; 및
상기 결정화된 비정질 실리콘층 상부에 후면전극층을 형성하는 단계를 포함하고,
상기 비정질 실리콘층이 n형인 경우 상기 열처리 후 i-p형 비정질 실리콘층을 형성시키는 단계를 더 포함하고, 상기 비정질 실리콘층이 n-i형인 경우 상기 열처리 후 p형 비정질 실리콘층을 형성시키는 단계를 더 포함하고, 상기 비정질 실리콘층이 p-i형인 경우 상기 열처리 후 n형 비정질 실리콘층을 형성시키는 단계를 더 포함하고,
상기 열처리 후 투명전극층과 상기 비정질 실리콘층 사이에 금속규화물(metal silicide)이 형성되는 비정질 실리콘 태양전지의 제조방법.
Preparing a metal substrate;
Forming a transparent electrode layer on the metal substrate;
Forming one amorphous silicon layer selected from the group consisting of n-type, ni-type and pi-type on the transparent electrode layer, and then heat-treating the amorphous silicon layer in a nitrogen atmosphere at 700 ° C to 750 ° C for 1 hour to 2 hours ; And
And forming a rear electrode layer on the crystallized amorphous silicon layer,
Type amorphous silicon layer after the annealing when the amorphous silicon layer is n-type, and forming a p-type amorphous silicon layer after the annealing when the amorphous silicon layer is ni-type, And forming the n-type amorphous silicon layer after the heat treatment when the amorphous silicon layer is of the pi type,
Wherein a metal silicide is formed between the transparent electrode layer and the amorphous silicon layer after the heat treatment.
상기 투명전극층은 Mo 전극층인 것을 특징으로 하는 비정질 실리콘 태양전지의 제조방법.
The method according to claim 1,
Wherein the transparent electrode layer is a Mo electrode layer.
상기 후면전극층은 ITO(indium-tin oxide) 또는 Al 산화물로 이루어지는 비정질 실리콘 태양전지의 제조방법.
The method according to claim 1,
Wherein the back electrode layer is made of ITO (indium-tin oxide) or an Al oxide.
상기 금속규화물(metal silicide)은 Mo-Silicide인 비정질 실리콘 태양전지의 제조방법.The method according to claim 1,
Wherein the metal silicide is Mo-Silicide.
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| JP2624577B2 (en) * | 1990-12-26 | 1997-06-25 | キヤノン株式会社 | Solar cell and method of manufacturing the same |
| KR20100022394A (en) * | 2008-08-19 | 2010-03-02 | 주식회사 티지솔라 | Solar cell module and method for fabricating the same |
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| KR20100022394A (en) * | 2008-08-19 | 2010-03-02 | 주식회사 티지솔라 | Solar cell module and method for fabricating the same |
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