Classifications

• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
  • H01L21/3063—Electrolytic etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
  • H01L21/30604—Chemical etching
  • H01L21/30608—Anisotropic liquid etching
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
  • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
  • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
  • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
  • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
  • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
  • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
  • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials

Definitions

• the invention relates to a method for anisotropic etching of semiconducting materials using an etching liquid which contains a hydroxide and water which is compatible with the manufacturing processes of integrated circuits and is suitable for use in clean rooms.
• Such methods are used in microsystem technology when micromechanical or micro-optical components are integrated monolithically into a chip together with microelectronic components.
• the clean room compatibility of the etching liquid is decisive for the usability of an etching process for the common monolithic integration.
• KOH is eliminated because no alkali-containing etching components can be tolerated in IC production.
• EDP ethylenediamine, pyrocatechol and water
• Hydrazine is very toxic and explosive, so its use requires a lot of safety precautions.
• Alkali-free etching liquids are known from several publications. In “Thi Film Processes", Academic Press 1978, pp. 444 and 452f, JL Vossen and Werner Kern suggest the use of ⁇ ir ⁇ noriiumhydroxid (NH OH) for etching silicon Gallium arsenide. US Pat. No. 3,898,141 describes a process for the electrolytic etching of compound semiconductors using an NH.OH solution. The anisotropic etching of silicon using a hydroxide and water is known from GDR patent specification DD 24 19 75.
• the known etching liquids are not compatible with the standard metallization processes in IC production.
• aluminum with 1% silicon is now used as the conductor material.
• the aluminum is usually deposited using sputtering techniques and alloyed in a forming gas.
• micromechanical structures are generally formed as one of the last process stages in the production of multifunctional microsystems, the microelectronic components are already integrated in the chip when the chip is exposed to the anisotropic etching liquid.
• the invention is based on the object of specifying an etching process using an etching liquid which contains a hydroxide and water, which is suitable for use in clean rooms and which has a selective action with respect to aluminum.
• This object is achieved in that silicon is added to the etching liquid to increase the ratio of the etching rate in the semiconducting material to the etching rate of aluminum.
• the pyrophyllite-containing silicates can passivate the aluminum surface and prevent attack by the etching liquid.
• the etching liquid is heated to 75 C before the etching process. At this temperature, the stability of the etching liquid is guaranteed and the etched surface has less surface roughness.
• tetramethylammonium hydroxide N (CH) OH
• etching liquid consists of 0.6% (percent by weight) N (CH_) .OH and deionized water and at least 1.3 g silicon are added per liter.
• the method is carried out at a temperature of 85 °, since the stability of the etching liquid is ensured at this temperature and the etched surface has low roughness.
• Hydrogen peroxide in the etching solution has proven to be particularly favorable during the entire etching period.
• the etching rate of the etching solution in silicon increases, and at the same time the roughness of the etched surfaces decreases, since the formation of pimples on the etched surface, which is frequently observed in etching processes, due to the addition of hydrogen peroxide is avoided.
• the selectivity of the method compared to aluminum offers the advantage that the areas of the semiconductor surface from which the etching liquid must be kept can be protected by applying a passivation layer made of aluminum.
• the method can be used in the same clean room in which the IC manufacturing processes are carried out. This eliminates the need to transport wafers from a clean room to other process rooms.
• the method according to the invention also acts selectively with respect to SiO and silicon nitride. As a result, these materials can also serve as passivation layers.
• the etching rate in the case of highly borated silicon is negligibly low compared to the etching rate in undoped silicon. Therefore the etching process can be ended with the help of the p-etching stop.
• the etching process can be stopped in a defined manner with this method by suitably applying a voltage to the pn junction of a sample to be etched with the aid of electrochemical processes.
• Figure 1 The relative etching rate of aluminum in relation to the etching rate of silicon (100) depending on the concentration of the dissolved silicon in an etching liquid which contains NH OH.
• FIG. 2 The relative etching rate of aluminum in relation to the etching rate of silicon (100) as a function of the concentration of the dissolved silicon in an etching liquid which contains N (CH) OH.
• Figure 3 The etching rate for silicon in an etching liquid as a function of the N (CH) OH concentration.
• the process according to the invention is carried out in a double-walled, thermated glass vessel.
• the etching liquid is produced by diluting a commercially available ammonia solution in VLSI quality (for use for the very arge s_cale. Integration) with preheated, deionized water and adding silicon.
• the NH.OH concentration is measured during the entire etching period. For the same reason, the temperature must not be chosen too high. On the other hand, the temperature must not be too low, since the etching rate decreases with falling temperature. Good results are achieved at a temperature of the etching liquid of 75 ° C.
• the etching rate depends on the concentration of NH OH in the etching solution. The highest etching rate (30 ⁇ m / h) is reached at a concentration of approx. 9%. However, a concentration of 3.7% (weight percent) is recommended for the method according to the invention, since the etching surfaces at this concentration have low roughness at a high etching rate.
• the etching solution which contains N (CH) .OH, tolerates higher temperatures and is heated to 85 ° C. before the etching process.
• the optimal concentration of the hydride portion is 0.6% (weight percent) N (CH-) OH, whereby a silicon etching rate of over 50 ⁇ m / h is achieved.
• FIGS. 1 and 2 The effect of adding silicon to the etching liquid is shown in FIGS. 1 and 2 for two different etching liquids.
• the ratio of the etching rates of aluminum and silicon (100) is plotted on the vertical axis.
• the horizontal axis shows the amount of dissolved silicon in grams per liter. Without the addition of silicon, aluminum is etched almost as quickly as silicon.
• FIG. 3 shows the etching rate of the etching solution in silicon as a function of the N (CH) OH concentration.
• the etching rate in the 100 direction is plotted in silicon in the vertical direction, and the concentration of N (CH_) .OH in the etching solution in percent by weight in the horizontal direction.
• a weight fraction of 0.6% has proven to be the optimum concentration of the hydroxide, an etching rate of approximately 55 ⁇ m / h being achieved in silicon.
• the etching rate drops sharply at higher and lower concentrations.
• the curve shown was obtained at a temperature of 85 ° C., the etching time being 4 hours at each concentration.

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• Engineering & Computer Science (AREA)
• Physics & Mathematics (AREA)
• Condensed Matter Physics & Semiconductors (AREA)
• General Physics & Mathematics (AREA)
• Manufacturing & Machinery (AREA)
• Computer Hardware Design (AREA)
• Microelectronics & Electronic Packaging (AREA)
• Power Engineering (AREA)
• Chemical & Material Sciences (AREA)
• Chemical Kinetics & Catalysis (AREA)
• General Chemical & Material Sciences (AREA)
• Weting (AREA)

Applications Claiming Priority (2)

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Citations (3)

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• 1989
  • 1989-06-23 DE DE19893920644 patent/DE3920644C1/de not_active Expired - Lifetime
• 1990
  • 1990-06-01 WO PCT/DE1990/000418 patent/WO1991000614A1/de unknown

Patent Citations (3)

Non-Patent Citations (2)

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