WO1988005990A1 - Revetement de substrats avec des motifs metalliques epais formant des circuits - Google Patents

Revetement de substrats avec des motifs metalliques epais formant des circuits Download PDF

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Publication number
WO1988005990A1
WO1988005990A1 PCT/US1988/000116 US8800116W WO8805990A1 WO 1988005990 A1 WO1988005990 A1 WO 1988005990A1 US 8800116 W US8800116 W US 8800116W WO 8805990 A1 WO8805990 A1 WO 8805990A1
Authority
WO
WIPO (PCT)
Prior art keywords
resist
circuit
metallization
conductive material
step comprises
Prior art date
Application number
PCT/US1988/000116
Other languages
English (en)
Inventor
Robert Lawrence
Richard N. Leyden
Original Assignee
Hughes Aircraft Company
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hughes Aircraft Company filed Critical Hughes Aircraft Company
Publication of WO1988005990A1 publication Critical patent/WO1988005990A1/fr
Priority to DK545588A priority Critical patent/DK545588A/da

Links

Classifications

    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23F—NON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00—Etching metallic material by chemical means
    • C23F1/02—Local etching
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/062—Etching masks consisting of metals or alloys or metallic inorganic compounds
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/09—Treatments involving charged particles
    • H05K2203/095—Plasma, e.g. for treating a substrate to improve adhesion with a conductor or for cleaning holes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/381—Improvement of the adhesion between the insulating substrate and the metal by special treatment of the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/388—Improvement of the adhesion between the insulating substrate and the metal by the use of a metallic or inorganic thin film adhesion layer

Definitions

  • the present invention relates to a method for forming circuits on insulative substrates and, in particular, circuit lines of 2 mil and lesser widths without electrical shorting between the lines.
  • Size reduction of interconnections in electronic devices has been an on-going effort to provide narrower leads and closer center-to-center spacing between the leads, thus to reduce the size, weight, cost and number of layers of multilayer printed wiring boards. It has also been an aim to provide greater shock and vibration resistance to such electronic devices which is possible if size reduction and consequent shorter spans between supports can be properly effected.
  • Conventional printed wiring boards are produced from one or more rolled or electroplated copper sheets which are laminated to "B-staged" substrates of polymer- glass, such as of a polyimide, an epoxy, and combinations thereof.
  • the thinnest copper sheet is commonly 1/2 oz. or 0.7 mils thick.
  • the result from presently available technology, using resist, patterning and etching techniques, are circuits whose narrowest lines and spaces measure 5 mils, respectively, over line lengths of less than 5 inches, and at a premium cost. Under laboratory conditions, shorter lines with spaces and line widths of 2 to 3 mils are obtainable. However, if 1/2 oz.
  • Narrow lines and close center-to-center spacing between the lines result in higher density in electronic packaging because of decreased size of printed wiring boards and a decrease in the number of layers in multilayer printed wiring boards, thus lowering the weight and cost of such boards. Because of shorter spans between supports in and for the boards, resistance to shock and vibration is enhanced.
  • FIG. 1 is a view of a section of a substrate for a printed wiring board, one surface thereof in process of being etched;
  • FIG. 2 illustrates the placement of an Angstroms thick layer of metallization on the etched surface;
  • FIG. 3 shows a photoresist pattern of a fine line portion of a circuit configuration;
  • FIG. 4 depicts metal deposited into the resist pattern openings to define the circuit fine lines
  • FIG. 5 is a view of the printed wiring board following stripping of the resist pattern.
  • FIG. 6 illustrates the completed wiring board, following removal of the metallization, using the fine line circuitry as a resist.
  • a substrate 10 such as of polymer material, polyimide-glass or epoxy-glass, is illustrated for having one surface 12 thereof etched. Etching is preferably accomplished by an oxygen plasma etch, such as is represented by arrows 14, in a conventional manner, to prepare the surface for subsequent adhesion to it by metallization.
  • an oxygen plasma etch such as is represented by arrows 14, in a conventional manner, to prepare the surface for subsequent adhesion to it by metallization.
  • metallization 16 is then sputtered or vacuum deposited or otherwise suitably deposited onto etched surface 12 to ensure optimum adhesion to the substrate.
  • titanium and chromium were deposited onto surface 12 in thicknesses of about 250 to 500 Angstroms, and gold and copper were deposited onto the chromium and titanium in respective thicknesses of 1,000 and up to 20,000 Angstroms.
  • the thickness of this composite is selected to withstand deleterious effects thereon of subsequent processing.
  • the sputtered-metal surface is then cleaned so that it is "water-break-free," that is, there are no deposits on metallization 16 to impede flow of water thereover.
  • a dry film resist 18 e.g., "Riston” (trademark of E.I. DuPont de Nemours and Company) and "Laminar” O 88/05990 '
  • a liquid resist may be used; however, a dry film is preferred as providing the greater thicknesses desired, such thicknesses typically being 1/2 to 1-1/2 mils.
  • the type of resist used will depend upon the circuit line thickness desired. A negative defining the desired circuitry is placed atop the resist and exposed to light. Portions of the resist are removed to form the resist into a pattern 20 (see FIG. 3) defining the desired electronic circuit, openings 22 comprising a portion of the pattern. All the foregoing resist treating procedures are in accordance with conventional techniques.
  • metal 24 which forms the desired circuitry, is then deposited, preferably by conventional electroplating techniques, in the thickness desired, e.g., 1/2 to 1-1/2 mils, onto metallization 16 exposed by openings 22. Resist pattern 20 is then stripped from the metallization, see FIG. 5. Using metal 24 as a resist, unprotected portions of metallization 16 are removed to provide free-standing electrical lines or traces on substrate 10, with no electrical shorting between the lines, as depicted in FIG. 6. If desired, a liquid or dry film resist may also be used to protect the deposited metal lines, especially when the metal lines and the below metallization comprise the same metal.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Metallurgy (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Organic Chemistry (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

Selon un procédé de formation de circuits sur la surface d'un substrat isolant (10) on fait adhérer à la surface du substrat une couche de métallisation (16) de quelques Angstroms d'épaisseur, on place un matériau photoconducteur (24) sur la couche de métallisation à travers un motif (20) en matière de masquage photographique formant le circuit, on enlève le motif de masquage du substrat, puis on enlève la partie de la couche de métallisation qui n'est pas recouverte par le circuit en matériau conducteur en utilisant le matériau conducteur comme matériau de masquage.
PCT/US1988/000116 1987-02-05 1988-01-19 Revetement de substrats avec des motifs metalliques epais formant des circuits WO1988005990A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DK545588A DK545588A (da) 1987-02-05 1988-09-30 Fremgangsmaade til dannelse af et kredsloeb paa et isolerende underlags overflade

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1094587A 1987-02-05 1987-02-05
US010,945 1987-02-05

Publications (1)

Publication Number Publication Date
WO1988005990A1 true WO1988005990A1 (fr) 1988-08-11

Family

ID=21748157

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US1988/000116 WO1988005990A1 (fr) 1987-02-05 1988-01-19 Revetement de substrats avec des motifs metalliques epais formant des circuits

Country Status (4)

Country Link
JP (1) JPH01502228A (fr)
ES (1) ES2006071A6 (fr)
IL (1) IL85197A0 (fr)
WO (1) WO1988005990A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2228372A (en) * 1988-12-09 1990-08-22 Minnesota Mining & Mfg Making printed circuits
GR880100623A (el) * 1988-09-19 1990-10-31 Hughes Aircraft Co Επενδυσις υποστρωματων δια σχεδιασματων κυκλωματων εκ παχεως μεταλλου

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2089863A5 (en) * 1970-04-21 1972-01-07 Rca Corp Chemical treatment of uncured adhesiveimproving bond
DE2655997A1 (de) * 1976-01-21 1977-07-28 Ibm Verfahren zur herstellung von schaltkarten mit gedruckten leiterzuegen
FR2425790A1 (fr) * 1978-05-08 1979-12-07 Limours Const Meca Elect El Perfectionnements aux circuits imprimes et a leurs procedes de fabrication
US4444848A (en) * 1982-01-04 1984-04-24 Western Electric Co., Inc. Adherent metal coatings on rubber-modified epoxy resin surfaces
EP0158536A2 (fr) * 1984-04-12 1985-10-16 Peter Leslie Moran Procédés et appareil pour former des dessins conducteurs sur un substrat
EP0194908A2 (fr) * 1985-02-13 1986-09-17 Shin-Etsu Chemical Co., Ltd. Laminé flexible résistant à la chaleur utilisé comme substrat de circuit imprimé et son procédé de fabrication
US4622106A (en) * 1983-05-23 1986-11-11 Marui Industry Co., Ltd. Methods for producing printed circuits

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2089863A5 (en) * 1970-04-21 1972-01-07 Rca Corp Chemical treatment of uncured adhesiveimproving bond
DE2655997A1 (de) * 1976-01-21 1977-07-28 Ibm Verfahren zur herstellung von schaltkarten mit gedruckten leiterzuegen
FR2425790A1 (fr) * 1978-05-08 1979-12-07 Limours Const Meca Elect El Perfectionnements aux circuits imprimes et a leurs procedes de fabrication
US4444848A (en) * 1982-01-04 1984-04-24 Western Electric Co., Inc. Adherent metal coatings on rubber-modified epoxy resin surfaces
US4622106A (en) * 1983-05-23 1986-11-11 Marui Industry Co., Ltd. Methods for producing printed circuits
EP0158536A2 (fr) * 1984-04-12 1985-10-16 Peter Leslie Moran Procédés et appareil pour former des dessins conducteurs sur un substrat
EP0194908A2 (fr) * 1985-02-13 1986-09-17 Shin-Etsu Chemical Co., Ltd. Laminé flexible résistant à la chaleur utilisé comme substrat de circuit imprimé et son procédé de fabrication

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GR880100623A (el) * 1988-09-19 1990-10-31 Hughes Aircraft Co Επενδυσις υποστρωματων δια σχεδιασματων κυκλωματων εκ παχεως μεταλλου
GB2228372A (en) * 1988-12-09 1990-08-22 Minnesota Mining & Mfg Making printed circuits
GB2228372B (en) * 1988-12-09 1993-06-23 Minnesota Mining & Mfg Patterning process and product
US5294476A (en) * 1988-12-09 1994-03-15 Minnesota Mining And Manufacturing Company Patterning process and microparticles of substantially the same geometry and shape

Also Published As

Publication number Publication date
IL85197A0 (en) 1988-07-31
ES2006071A6 (es) 1989-04-01
JPH01502228A (ja) 1989-08-03

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