WO1979000860A1 - Condensateur en ceramique et methode pour sa fabrication - Google Patents

Condensateur en ceramique et methode pour sa fabrication Download PDF

Info

Publication number
WO1979000860A1
WO1979000860A1 PCT/JP1979/000078 JP7900078W WO7900860A1 WO 1979000860 A1 WO1979000860 A1 WO 1979000860A1 JP 7900078 W JP7900078 W JP 7900078W WO 7900860 A1 WO7900860 A1 WO 7900860A1
Authority
WO
WIPO (PCT)
Prior art keywords
ceramic
sintering
condenser
conductive metal
metal layers
Prior art date
Application number
PCT/JP1979/000078
Other languages
English (en)
Japanese (ja)
Inventor
G Suzuki
M Asai
F Mizuno
Original Assignee
Ngk Insulators Ltd
G Suzuki
M Asai
F Mizuno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP4281478U external-priority patent/JPS54156753U/ja
Priority claimed from JP3859578A external-priority patent/JPS54131760A/ja
Application filed by Ngk Insulators Ltd, G Suzuki, M Asai, F Mizuno filed Critical Ngk Insulators Ltd
Publication of WO1979000860A1 publication Critical patent/WO1979000860A1/fr

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672Superposed layout, i.e. in different planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Abstract

Condensateur en ceramique comprenant un panneau de circuits en ceramique prepare selon les etapes suivantes: application d'une ou plusieurs couches isolantes sur une feuille brute de ceramique, formation de couches metalliques conductrices selon une configuration voulue de telle sorte que chacune desdites couches metalliques conductrices soit intercalee entre deux couches isolantes, disposition d'autres couches metalliques conductrices a travers lesdites couches isolantes pour connecter ensemble les premieres couches metalliques conductrices aux endroits qui forment les electrodes des elements condensateurs apres frittage ulterieur, et frittage de ladite feuille verte de ceramique dans une atmosphere non-oxydante pour obtenir le panneau de circuits en ceramique dans lequel le circuit conducteur d'une configuration voulue ainsi que les elements condensateurs sont formes integralement. Une electrode du condensateur en ceramique est faite simultanement lors du frittage du substrat de ceramique dans une atmosphere non-oxydante. Cependant, une autre electrode peut etre prevue sur la surface superieure de la couche dielectrique apres frittage. Ce dispositif peut etre utilise comme bloc fonctionnel en y montant des composants electroniques tels que les elements semi-conducteurs ou autres. Selon cette invention, une partie ou la totalite de ces elements condensateurs est formee conjointement avec les circuits conducteurs de connexion ayant la configuration voulue, simultanement au frittage du substrat ceramique en atmosphere non-oxydante, de sorte que les circuits de connexion conducteurs et les elements condensateurs soient imprimes lors du frittage, la phase de cablage apres le frittage n'etant plus necessaire.
PCT/JP1979/000078 1978-04-01 1979-03-29 Condensateur en ceramique et methode pour sa fabrication WO1979000860A1 (fr)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
WOJP79/00078 1978-04-01
JP4281478U JPS54156753U (fr) 1978-04-01 1978-04-01
JP3859578A JPS54131760A (en) 1978-04-01 1978-04-01 Ceramic condenser

Publications (1)

Publication Number Publication Date
WO1979000860A1 true WO1979000860A1 (fr) 1979-11-01

Family

ID=26377865

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1979/000078 WO1979000860A1 (fr) 1978-04-01 1979-03-29 Condensateur en ceramique et methode pour sa fabrication

Country Status (1)

Country Link
WO (1) WO1979000860A1 (fr)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0508600A2 (fr) * 1991-03-22 1992-10-14 Vitramon, Incorporated Réseau connecté par série à deux terminaux
CN113270240A (zh) * 2021-05-17 2021-08-17 深圳聚德寿科技有限公司 一种陶瓷平膜压阻芯片及其制备方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4967149A (fr) * 1972-11-02 1974-06-28
JPS4968258A (fr) * 1972-11-06 1974-07-02
JPS5111163A (en) * 1974-07-19 1976-01-29 Hitachi Ltd Judososhino seiho

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4967149A (fr) * 1972-11-02 1974-06-28
JPS4968258A (fr) * 1972-11-06 1974-07-02
JPS5111163A (en) * 1974-07-19 1976-01-29 Hitachi Ltd Judososhino seiho

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0508600A2 (fr) * 1991-03-22 1992-10-14 Vitramon, Incorporated Réseau connecté par série à deux terminaux
EP0508600A3 (en) * 1991-03-22 1993-03-03 Vitramon, Incorporated Two-terminal series-connected network
CN113270240A (zh) * 2021-05-17 2021-08-17 深圳聚德寿科技有限公司 一种陶瓷平膜压阻芯片及其制备方法
CN113270240B (zh) * 2021-05-17 2022-07-19 深圳聚德寿科技有限公司 一种陶瓷平膜压阻芯片及其制备方法

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Designated state(s): FR