WO1979000860A1 - Ceramic condenser and method of manufacturing the same - Google Patents

Ceramic condenser and method of manufacturing the same Download PDF

Info

Publication number
WO1979000860A1
WO1979000860A1 PCT/JP1979/000078 JP7900078W WO7900860A1 WO 1979000860 A1 WO1979000860 A1 WO 1979000860A1 JP 7900078 W JP7900078 W JP 7900078W WO 7900860 A1 WO7900860 A1 WO 7900860A1
Authority
WO
WIPO (PCT)
Prior art keywords
ceramic
sintering
condenser
conductive metal
metal layers
Prior art date
Application number
PCT/JP1979/000078
Other languages
French (fr)
Japanese (ja)
Inventor
G Suzuki
M Asai
F Mizuno
Original Assignee
Ngk Insulators Ltd
G Suzuki
M Asai
F Mizuno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP4281478U external-priority patent/JPS54156753U/ja
Priority claimed from JP3859578A external-priority patent/JPS54131760A/en
Application filed by Ngk Insulators Ltd, G Suzuki, M Asai, F Mizuno filed Critical Ngk Insulators Ltd
Publication of WO1979000860A1 publication Critical patent/WO1979000860A1/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/09672—Superposed layout, i.e. in different planes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Manufacturing & Machinery (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A ceramic condenser comprising a ceramic circuit board prepared by the steps of: providing one or more insulating layers on a ceramic green sheet, forming conductive metal layers of a desired pattern such that said conductive metal layers are each arranged between any adjacent two layers of said insulating layers, providing other conductive metal layers arranged so as to run through said insulating layers for connecting together the first mentioned conductive metal layers at their portions which make electrodes of the condenser elements after a subsequent sintering treatment, and sintering said ceramic green sheet in a non-oxidizing atmosphere to thereby obtain the ceramic circuit board in which the conductive circuit of a desired pattern and the condenser elements are formed integrally. An electrode of the ceramic condenser is simultaneously made upon sintering the ceramic substrate in the non-oxidizing atmosphere. However, another electrode of the ceramic condenser may be provided on the top surface of the dielectric layer after sintering treatment. This may be used as a functional block by mounting thereon electronic parts such as semiconductor elements or the like. According to this invention, a part or the whole of the condenser elements is formed together with the conductive connection circuits of the desired pattern, simultaneously with sintering the ceramic substrate in the non-oxidizing atmosphere, so that conductive connection circuit and the condenser elements are printed upon sintering and wiring step after sintering is not necessary.
PCT/JP1979/000078 1978-04-01 1979-03-29 Ceramic condenser and method of manufacturing the same WO1979000860A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
WOJP79/00078 1978-04-01
JP4281478U JPS54156753U (en) 1978-04-01 1978-04-01
JP3859578A JPS54131760A (en) 1978-04-01 1978-04-01 Ceramic condenser

Publications (1)

Publication Number Publication Date
WO1979000860A1 true WO1979000860A1 (en) 1979-11-01

Family

ID=26377865

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP1979/000078 WO1979000860A1 (en) 1978-04-01 1979-03-29 Ceramic condenser and method of manufacturing the same

Country Status (1)

Country Link
WO (1) WO1979000860A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0508600A2 (en) * 1991-03-22 1992-10-14 Vitramon, Incorporated Two-terminal series-connected network
CN113270240A (en) * 2021-05-17 2021-08-17 深圳聚德寿科技有限公司 Ceramic flat membrane piezoresistive chip and preparation method thereof

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4967149A (en) * 1972-11-02 1974-06-28
JPS4968258A (en) * 1972-11-06 1974-07-02
JPS5111163A (en) * 1974-07-19 1976-01-29 Hitachi Ltd Judososhino seiho

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4967149A (en) * 1972-11-02 1974-06-28
JPS4968258A (en) * 1972-11-06 1974-07-02
JPS5111163A (en) * 1974-07-19 1976-01-29 Hitachi Ltd Judososhino seiho

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0508600A2 (en) * 1991-03-22 1992-10-14 Vitramon, Incorporated Two-terminal series-connected network
EP0508600A3 (en) * 1991-03-22 1993-03-03 Vitramon, Incorporated Two-terminal series-connected network
CN113270240A (en) * 2021-05-17 2021-08-17 深圳聚德寿科技有限公司 Ceramic flat membrane piezoresistive chip and preparation method thereof
CN113270240B (en) * 2021-05-17 2022-07-19 深圳聚德寿科技有限公司 Ceramic flat membrane piezoresistive chip and preparation method thereof

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Designated state(s): CH DE DK GB SE US

AL Designated countries for regional patents

Designated state(s): FR