USRE48737E1 - Scan driver and organic light-emitting display using same - Google Patents
Scan driver and organic light-emitting display using same Download PDFInfo
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- USRE48737E1 USRE48737E1 US16/416,284 US201416416284A USRE48737E US RE48737 E1 USRE48737 E1 US RE48737E1 US 201416416284 A US201416416284 A US 201416416284A US RE48737 E USRE48737 E US RE48737E
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
- G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0283—Arrangement of drivers for different directions of scanning
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/08—Details of timing specific for flat panels, other than clock recovery
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0219—Reducing feedthrough effects in active matrix panels, i.e. voltage changes on the scan electrode influencing the pixel voltage due to capacitive coupling
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/02—Details of power systems and of start or stop of display operation
- G09G2330/021—Power management, e.g. power saving
Definitions
- the present invention relates to organic light-emitting diode displays and in particular to a scanning driver capable of reducing power consumption and an organic light-emitting display using the scanning driver.
- OLEDs organic light-emitting diodes
- TFTs thin film transistors
- LCDs LCDs
- a conventional scanning driver circuit is formed by a plurality of transistors, a starting signal line IN, timing clock lines CLK 1 and CLK 2 , a high-level power supply VGH and a low-level power supply VGL.
- a weak reverse current is generated in the circuit. Therefore, a reverse current of several or more milliamperes may be generated when N rows in the entire screen work collaboratively, thereby leading to non-uniform display on the screen and excessively high power consumption.
- a device is provided to reduce the reverse current of a scanning driver of an OLED display.
- the present invention provides a scanning driver, including: a plurality of cascaded structures receiving signals from a first timing clock line and a second timing clock line with opposite phases, the cascaded structures successively generating scanning signals.
- Each of the cascaded structures includes: a first transistor connected to a starting signal line or to a scanning output line of a previous cascaded structure; a second transistor connected to the second timing clock line and to a scanning output line; a third transistor connected to a high-level power supply VGH, the third transistor including a gate connected to an output terminal of the second transistor; a fourth transistor connected to a low-level power supply VGL and to an output terminal of the third transistor, the fourth transistor including a gate connected to the first timing clock line; a fifth transistor connected to a high-level power supply VGH and to a scanning output line, the fifth transistor including a gate connected to an output terminal of the fourth transistor and to an output terminal of the third transistor; and a first capacitor connected between an output terminal of the first transistor and the scanning output line
- each of the cascaded structures further includes a second capacitor connected between an output terminal of the first transistor and a fixed potential.
- the fixed potential is a low-level power supply VGL.
- the fixed potential is a high-level power supply VGH.
- a first clock terminal of an odd one of the cascade structures is connected to the first timing clock line, and a second clock terminal thereof is connected to the second timing clock line; and a first clock terminal of an even one of the cascade structures is connected to the second timing clock line, and a second clock terminal thereof is connected to the first timing clock line.
- the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
- the present invention further provides an organic light-emitting display, including: a pixel array, connected to a data line and a scanning output line; a data driver, configured to provide data signals to the data line; a scanning driver, configured to provide scanning signals to the scanning output line; and a timing controller, configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
- a pixel array connected to a data line and a scanning output line
- a data driver configured to provide data signals to the data line
- a scanning driver configured to provide scanning signals to the scanning output line
- a timing controller configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver.
- the present invention provides the following beneficial effects: By adding a first capacitor C 1 between the output terminal of M 1 and the scanning output line, the first capacitor C 1 prevents slight-ON of M 2 when the second timing clock line hops, thus reducing the reverse current of the scanning driver, reducing the power consumption, and improving the quality of display of the screen.
- FIG. 1 is a circuit diagram of an organic light-emitting display according to an embodiment of the present invention.
- FIG. 2 is a circuit diagram of a pixel display unit in the organic light-emitting display
- FIG. 3 is a circuit diagram of a scanning driver according to the present invention.
- FIG. 4 is a circuit diagram of a cascaded structure 1 of FIG. 3 according to a first embodiment
- FIG. 5 is a circuit timing diagram of the cascaded structure 1 of FIG. 4 in one frame
- FIG. 6 is a circuit diagram of the cascaded structure 1 of FIG. 3 according to a second embodiment.
- FIG. 7 is a circuit diagram of the cascaded structure 1 of FIG. 3 according to a third embodiment.
- FIG. 1 is a circuit diagram an organic light-emitting display according to an embodiment of the present invention.
- this organic light-emitting display includes a data driver 110 configured to provide data signals to a data line, a scanning driver 111 configured to successively provide scanning signals to scanning output lines, a timing controller 112 configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver 111 , and a display unit 113 for a plurality of pixels.
- the function of a scanning driver circuit is to successively generate scanning signals which are to be provided to a display panel to drive pixels in the display panel.
- FIG. 2 is a circuit diagram of a pixel display unit in the organic light-emitting display.
- this pixel circuit includes a transistor T 1 , a transistor T 2 and a capacitor C 0 .
- the gate of T 1 is connected to a scanning output line of a scanning driver, and the source of T 1 is connected to a data line of a data driver.
- One terminal of the capacitor C 0 is connected to a fixed power supply, and the other terminal thereof is connected to the drain of T 1 .
- the gate of T 2 is connected to the drain of T 1 , the source thereof is connected to the fixed power supply, and the drain thereof is connected to an OLED.
- a scanning driver provides scanning signals to T 1 via the scanning output line, and the data driver provides data signals to T 1 ; and when T 1 is turned on, a data voltage is transmitted to the gate of T 2 , and the TFT T 2 generates a corresponding current which flows to the OLED such that the OLED emits light.
- the scanning driver 111 uses the scanning driver in the following embodiment.
- FIG. 3 is a circuit diagram of a scanning driver according to the present invention.
- the scanning driver includes a plurality of cascaded structures, and each of the cascaded structures is connected to timing clock lines CLK 1 and CLK 2 with opposite phases, and each of the cascaded structures successively generates output signals, i.e., scanning signals, to scanning output lines S 1 to SN.
- a first clock terminal of an odd one of the cascade structures is connected to a first timing clock line, and a second clock thereof is connected to a second timing clock line; and the first clock terminal of an even one of the cascade structures is connected to the second timing clock line, and the second clock terminal is connected to the first timing clock line.
- a first clock terminal of an odd one of the cascade structures is connected to a second timing clock line, and a second clock thereof is connected to a first timing clock line; and the first clock terminal of an even one of the cascade structures is connected to the first timing clock line, and the second clock terminal is connected to the second timing clock line.
- FIG. 4 is a circuit diagram of a first embodiment of the cascaded structure 1 of FIG. 3 .
- the cascaded structure 1 includes a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , a fourth transistor M 4 , the fifth transistor M 5 , a first capacitor C 1 , a starting signal line IN, a first timing clock line CLK 1 , a second timing clock line CLK 2 , a high-level power supply VGH and a low-level power supply VGL.
- the gate of the first transistor M 1 is connected to the first timing clock line CLK 1 , the source of M 1 is connected to the starting signal line IN, and the drain thereof is connected to the gate of the second transistor M 2 .
- the source of the second transistor M 2 is connected to the second timing clock line CLK 2 , and the drain thereof is connected to the scanning output line.
- the gate of the third transistor M 3 is connected to the drain of the second transistor, the source thereof is connected to the high-level power supply VGH, and the drain thereof is connected to the source of the fourth transistor M 4 .
- the gate of the fourth transistor M 4 is connected to the first timing clock line CLK 1 , the source thereof is connected to the drain of M 3 , and the drain of M 4 is connected to the low-level power supply VGL.
- the gate of the fifth transistor M 5 is connected to the source of M 4 , the source of M 5 is connected to the high-level power supply VGH, and the drain of the M 5 is connected to the scanning output line.
- One terminal of the first capacitor C 1 is connected to the drain of M 1 , and the other terminal thereof is connected to the scanning output line.
- the transistors M 1 , M 2 , M 3 , M 4 , M 5 employ a bidirectional PMOS transistor or a bidirectional P-type thin film field effect transistor, and the source and the drain thereof are replaceable.
- FIG. 5 is a timing diagram of the cascaded structure of FIG. 4 in one frame.
- IN is a timing diagram of a starting signal line
- CLK 1 is a timing diagram of a first timing clock line
- CLK 2 is a timing diagram of a second timing clock line
- N 1 is a timing diagram of an output terminal of M 1
- S 1 to SN respectively are timing diagrams of scanning output lines of cascaded structures 1 to n.
- the working principle of the circuit of the cascaded structure 1 is as follows.
- the gate of M 3 is in a low level and the source thereof is in a high level, such that M 3 is turned on and outputs a high level.
- the gate of M 5 is in a high level, such that M 5 is turned off.
- S 1 may be maintained to output a stable low level.
- the capacitor C 1 can maintain the original high level of the terminal N 1 , thereby preventing the slight-ON of M 2 , reducing the power consumption of the scanning driver, and improving the quality of display of the screen.
- the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
- the cascaded structures 2 to n successively receive signals from a scanning output line of a previous cascaded structure, and the timing hopping thereof is as shown in FIG. 5 .
- the first capacitor C 1 prevents slight-ON of M 2 when the second timing clock line hops, thus reducing the reverse current of the scanning driver, reducing the power consumption, and improving the quality of display of the screen.
- FIG. 6 is a circuit diagram of the cascaded structure 1 of FIG. 3 according to a second embodiment.
- the circuit further includes a second capacitor C 2 connected between the output terminal of the first transistor M 1 and the fixed potential.
- the fixed potential is a low-level power supply VGL.
- the second transistor C 2 can further maintain the voltage of terminal N 1 stable and minimize the voltage difference of the first capacitor C 1 and the current leakage.
- FIG. 7 is a circuit diagram of the cascaded structure 1 of FIG. 3 according to a third embodiment.
- the circuit further includes a second capacitor C 2 connected between the output terminal of the first transistor M 1 and the fixed potential.
- the fixed potential is a high-level power supply VGH.
- the second transistor C 2 can further maintain the voltage of terminal N 1 stable and minimize the voltage difference of the first capacitor C 1 and the current leakage.
- the organic light-emitting display includes a data driver configured to provide data signals to a data line, a scanning driver configured to successively provide scanning signals to scanning output lines, a timing controller configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver, and a display unit for a plurality of pixels.
- the function of a scanning driver circuit is to successively generate scanning signals provided to a display panel to drive pixels in the display panel.
- the scanning driver includes a plurality of cascaded structures, and each of the cascaded structures is connected to timing clock lines CLK 1 and CLK 2 with opposite phases, and each of the cascaded structures successively generates output signals, i.e., scanning signals, to scanning output lines S 1 to SN.
- Each of the cascaded structures specifically includes a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , a fourth transistor M 4 , a fifth transistor M 5 , a first capacitor C 1 , a starting signal line IN, a first timing clock line CLK 1 , a second timing clock line CLK 2 , a high-level power supply VGH and a low-level power supply VGL.
- a first clock terminal of an odd one of the cascade structures is connected to a first timing clock line, and a second clock thereof is connected to a second timing clock line; and the first clock terminal of an even one of the cascade structures is connected to the second timing clock line, and the second clock terminal is connected to the first timing clock line.
- the transistors are bidirectional PMOS transistors or bidirectional P-type thin film field effect transistors.
- the first capacitor C 1 prevents slight-ON of M 2 when the second timing clock line hops, thus reducing the reverse current of the scanning driver, reducing the power consumption, and improving the quality of display of the screen.
- the organic light-emitting display includes a data driver configured to provide data signals to a data line, a scanning driver configured to successively provide scanning signals to scanning output lines, a timing controller configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver, and a display unit for a plurality of pixels.
- the function of a scanning driver circuit is to successively generate scanning signals provided to a display panel to drive pixels in the display panel.
- the scanning driver includes a plurality of cascaded structures, and each of the cascaded structures is connected to timing clock lines CLK 1 and CLK 2 with opposite phases, and each of the cascaded structures successively generates output signals, i.e., scanning signals, to scanning output lines S 1 to SN.
- Each of the cascaded structures specifically includes a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , a fourth transistor M 4 , a fifth transistor M 5 , a first capacitor C 1 , a starting signal line IN, a first timing clock line CLK 1 , a second timing clock line CLK 2 , a high-level power supply VGH and a low-level power supply VGL.
- the circuit further includes a second transistor C 2 connected between the output terminal of the first transistor M 1 and the fixed potential.
- the fixed potential is a low-level power supply VGL.
- the second transistor C 2 can further maintain the voltage of terminal N 1 stable and minimize the voltage difference of the first capacitor C 1 and the current leakage.
- the organic light-emitting display includes a data driver configured to provide data signals to a data line, a scanning driver configured to successively provide scanning signals to scanning output lines, a timing controller configured to provide timing signals and a high-level power supply VGH and a low-level power supply VGL to the scanning driver, and a display unit for a plurality of pixels.
- the function of a scanning driver circuit is to successively generate scanning signals provided to a display panel to drive pixels in the display panel.
- the scanning driver includes a plurality of cascaded structures, and each of the cascaded structures is connected to timing clock lines CLK 1 and CLK 2 with opposite phases, and each of the cascaded structures successively generates output signals, i.e., scanning signals, to scanning output lines S 1 to SN.
- Each of the cascaded structures specifically includes a first transistor M 1 , a second transistor M 2 , a third transistor M 3 , a fourth transistor M 4 , a fifth transistor M 5 , a first capacitor C 1 , a starting signal line IN, a first timing clock line CLK 1 , a second timing clock line CLK 2 , a high-level power supply VGH and a low-level power supply VGL.
- the circuit further includes a second transistor C 2 connected between the output terminal of the first transistor M 1 and the fixed potential.
- the fixed potential is a high-level power supply VGH.
- the second transistor C 2 can further maintain the voltage of terminal N 1 stable and minimize the voltage difference of the first capacitor C 1 and the current leakage.
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
- Electroluminescent Light Sources (AREA)
Priority Applications (1)
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US16/416,284 USRE48737E1 (en) | 2013-12-25 | 2014-12-24 | Scan driver and organic light-emitting display using same |
Applications Claiming Priority (4)
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CN201310725080.2A CN104751769A (zh) | 2013-12-25 | 2013-12-25 | 扫描驱动器及使用该扫描驱动器的有机发光显示器 |
PCT/CN2014/094751 WO2015096721A1 (zh) | 2013-12-25 | 2014-12-24 | 扫描驱动器及使用该扫描驱动器的有机发光显示器 |
US15/108,284 US9847062B2 (en) | 2013-12-25 | 2014-12-24 | Scan driver and organic light-emitting display using same |
US16/416,284 USRE48737E1 (en) | 2013-12-25 | 2014-12-24 | Scan driver and organic light-emitting display using same |
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USRE48737E1 true USRE48737E1 (en) | 2021-09-14 |
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US16/416,284 Active 2035-02-15 USRE48737E1 (en) | 2013-12-25 | 2014-12-24 | Scan driver and organic light-emitting display using same |
US15/108,284 Ceased US9847062B2 (en) | 2013-12-25 | 2014-12-24 | Scan driver and organic light-emitting display using same |
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US15/108,284 Ceased US9847062B2 (en) | 2013-12-25 | 2014-12-24 | Scan driver and organic light-emitting display using same |
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US (2) | USRE48737E1 (ja) |
EP (1) | EP3067878A4 (ja) |
JP (1) | JP2017503217A (ja) |
KR (1) | KR101844701B1 (ja) |
CN (1) | CN104751769A (ja) |
TW (1) | TWI525597B (ja) |
WO (1) | WO2015096721A1 (ja) |
Families Citing this family (17)
Publication number | Priority date | Publication date | Assignee | Title |
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CN104183219B (zh) * | 2013-12-30 | 2017-02-15 | 昆山工研院新型平板显示技术中心有限公司 | 扫描驱动电路和有机发光显示器 |
CN104537979B (zh) * | 2015-01-28 | 2017-03-15 | 京东方科技集团股份有限公司 | 移位寄存器及其驱动方法、栅极驱动电路 |
CN104835531B (zh) * | 2015-05-21 | 2018-06-15 | 京东方科技集团股份有限公司 | 一种移位寄存器单元及其驱动方法、移位寄存器和显示装置 |
CN106920498B (zh) * | 2015-12-25 | 2019-10-25 | 昆山工研院新型平板显示技术中心有限公司 | Gip电路及其驱动方法和平板显示装置 |
CN106157893B (zh) * | 2016-09-09 | 2018-12-11 | 京东方科技集团股份有限公司 | 移位寄存器单元及其驱动方法、驱动电路和显示装置 |
KR101914546B1 (ko) | 2017-02-10 | 2018-11-05 | 성균관대학교산학협력단 | 게이트 구동 회로 및 그 구동 방법 |
CN108573679B (zh) * | 2017-03-07 | 2019-12-24 | 昆山工研院新型平板显示技术中心有限公司 | 控制信号驱动电路与驱动方法以及像素电路驱动方法 |
CN108573677B (zh) * | 2017-03-07 | 2019-12-24 | 昆山工研院新型平板显示技术中心有限公司 | 控制信号驱动电路与驱动方法以及像素电路驱动方法 |
KR101996893B1 (ko) | 2017-03-16 | 2019-07-05 | 한양대학교 산학협력단 | 게이트 드라이버 및 그 구동 방법 |
CN108665838A (zh) * | 2017-03-27 | 2018-10-16 | 昆山工研院新型平板显示技术中心有限公司 | 扫描驱动电路及其驱动方法和平板显示装置 |
CN108665854A (zh) * | 2017-03-27 | 2018-10-16 | 昆山工研院新型平板显示技术中心有限公司 | 控制信号驱动电路与驱动方法以及像素电路驱动方法 |
CN108665853B (zh) * | 2017-03-27 | 2020-11-13 | 昆山工研院新型平板显示技术中心有限公司 | 控制信号驱动电路与驱动方法以及像素电路驱动方法 |
CN108665837B (zh) * | 2017-03-27 | 2021-07-30 | 昆山工研院新型平板显示技术中心有限公司 | 扫描驱动电路及其驱动方法和平板显示装置 |
CN107978277B (zh) | 2018-01-19 | 2019-03-26 | 昆山国显光电有限公司 | 扫描驱动器及其驱动方法、有机发光显示器 |
KR102693252B1 (ko) * | 2018-11-23 | 2024-08-12 | 삼성디스플레이 주식회사 | 주사 구동부 |
KR102707324B1 (ko) | 2019-11-21 | 2024-09-20 | 삼성디스플레이 주식회사 | 유기 발광 표시 장치 |
CN112333879B (zh) * | 2020-11-20 | 2022-01-28 | 珠海格力电器股份有限公司 | 一种led驱动电路的控制方法及控制装置 |
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Also Published As
Publication number | Publication date |
---|---|
KR101844701B1 (ko) | 2018-04-02 |
EP3067878A1 (en) | 2016-09-14 |
CN104751769A (zh) | 2015-07-01 |
TW201525969A (zh) | 2015-07-01 |
WO2015096721A1 (zh) | 2015-07-02 |
KR20160089451A (ko) | 2016-07-27 |
EP3067878A4 (en) | 2016-12-07 |
JP2017503217A (ja) | 2017-01-26 |
TWI525597B (zh) | 2016-03-11 |
US9847062B2 (en) | 2017-12-19 |
US20160314745A1 (en) | 2016-10-27 |
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