US6329673B1 - Liquid-crystal display apparatus, transistor, and display apparatus - Google Patents

Liquid-crystal display apparatus, transistor, and display apparatus Download PDF

Info

Publication number
US6329673B1
US6329673B1 US09/363,747 US36374799A US6329673B1 US 6329673 B1 US6329673 B1 US 6329673B1 US 36374799 A US36374799 A US 36374799A US 6329673 B1 US6329673 B1 US 6329673B1
Authority
US
United States
Prior art keywords
circuit
display apparatus
substrate
driving
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
US09/363,747
Other languages
English (en)
Inventor
Masayuki Iida
Yuji Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Assigned to SONY CORPORATION reassignment SONY CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HAYASHI, YUJI, IIDA, MASAYUKI
Application granted granted Critical
Publication of US6329673B1 publication Critical patent/US6329673B1/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3685—Details of drivers for data electrodes
    • G09G3/3688—Details of drivers for data electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78651—Silicon transistors
    • H01L29/7866—Non-monocrystalline silicon transistors
    • H01L29/78672—Polycrystalline or microcrystalline silicon transistor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate

Definitions

  • the present invention relates to display apparatuses, and more particularly, to a driving circuit formed of circuit devices having large variations in characteristics such as thin-film transistors (TFTs), used for a display apparatus, such as a liquid-crystal display apparatus.
  • TFTs thin-film transistors
  • liquid-crystal display apparatuses such as liquid-crystal display apparatuses, especially in so-called “driving-circuit-integrated liquid-crystal display apparatuses,” in each of which a driving circuit for driving pixels is integratedly built in an active-matrix liquid-crystal panel in which the pixels formed of thin-film transistors serving as active devices are disposed in a matrix, the driving circuit itself is also constructed of thin-film transistors.
  • thin-film transistors have variations in characteristics, such as on-current characteristics, because they have uneven crystalline grain coarsenesses, i.e., uneven-sized crystalline grains.
  • a driving circuit for a display apparatus especially a switching section and an input-voltage conversion circuit for an analog-operation video line
  • a switching section and an input-voltage conversion circuit for an analog-operation video line are formed of circuit devices having large variations in characteristics, such as thin-film transistors, these device-characteristic variations adversely affect circuit operations.
  • the video-signal switching section may cause a vertical line to appear, deteriorating uniformity.
  • circuit malfunction may occur.
  • Another object of the present invention is to provide transistors having suppressed characteristic variations.
  • a liquid-crystal display apparatus including a first substrate in which a pixel section having pixel electrodes and a driving section for driving the pixel section are formed; a second substrate disposed such that it opposes the first substrate with a predetermined gap therebetween; and a liquid-crystal layer held between the first substrate and the second substrate; wherein a circuit device constituting the driving circuit for driving the pixel section is made from a transistor having a gate length of nL and a gate width of nW (n is any number exceeding one), where L indicates the shortest gate length determined from the dielectric strength and W indicates the gate width determined from a given ratio of W/L according to the shortest gate length L.
  • a transistor including a substrate; a channel region on the substrate; a gate insulating film on the substrate; a source region having a source electrode on the substrate; a drain region having a drain electrode on the substrate; and a gate electrode on the substrate having a gate length of nL and a gate width of nW (n is any number exceeding one), where L indicates the shortest gate length determined from the dielectric strength and W indicates the gate width determined from a given ratio of W/L according to the shortest gate length L.
  • a display apparatus including a substrate; a pixel section on the substrate; and a driving section for driving the pixel section on the substrate; wherein a circuit device constituting the driving circuit for driving the pixel section is made from a transistor having a gate length of nL and a gate width of nW (n is any number exceeding one), where L indicates the shortest gate length determined from the dielectric strength and W indicates the gate width determined from a given ratio of W/L according to the shortest gate length L.
  • the gate length of a transistor is determined from its dielectric strength. To reduce the size of a circuit, it is necessary, in general, to reduce the size of the transistors used.
  • the shortest gate length L determined from the dielectric strength is set first.
  • a gate width W is set from the ratio W/L (gate width/gate length) by the use of the shortest gate length L according to the purpose of use.
  • FIG. 1 is a schematic structural view of an active-matrix liquid-crystal display apparatus according to an embodiment of the present invention.
  • FIG. 2 is a circuit diagram of a level conversion circuit.
  • FIG. 3A is a view of a transistor having a conventional size.
  • FIG. 3B is a view of a transistor having a size according to the present embodiment.
  • FIG. 1 is a schematic structural view of an active-matrix liquid-crystal display apparatus according to an embodiment of the present invention. (An opposing electrode or a liquid-crystal layer is not shown in the figure.)
  • a clock signal group having a peak-to-peak voltage of 5 V is input from a peripheral driving system (not shown) to a level conversion circuit 11 formed, for example, of thin-film transistors.
  • the clock signal group includes a horizontal start pulse HST and first and second horizontal clock pulses HCK 1 and HCK 2 for horizontal driving, and a vertical start pulse VST and first and second vertical clock pulses VCK 1 and VCK 2 for vertical driving.
  • the level conversion circuit 11 converts clock signals having a peak-to-peak voltage of 5 V to those having a peak-to-peak voltage of, for example, 15 V to match inside driving circuits.
  • a horizontal start pulse HST′ and first and second horizontal clock pulses HCK 1 ′ and HCK 2 ′ for horizontal driving which have been level-converted to have a peak-to-peak voltage of 15 V by the level conversion circuit 11 , are input to a horizontal driving circuit 12 formed of a shift register and are made, for example, from thin-film transistors.
  • a vertical start pulse VST′ and first and second vertical clock pulses VCK 1 ′ and VCK 2 ′ for vertical driving are input to a vertical driving circuit 13 formed of a shift register and are made, for example, from thin-film transistors.
  • the horizontal driving circuit 12 sequentially generates horizontal scanning pulses according to the horizontal start pulse HST′ and the first and second horizontal clock pulses HCK 1 ′ and HCK 2 ′. These horizontal scanning pulses are sequentially applied to the gates of analog switches 15 - 1 , 15 - 2 , . . . , 15 -n that pass a video signal to n signal lines 14 - 1 , 14 - 2 , . . . , 14 -n each disposed for each vertical pixel column and made, for example, from Al.
  • the analog switches 15 - 1 , 15 - 2 , . . . , 15 -n are made, for example, from thin-film transistors.
  • the vertical driving circuit 13 sequentially generates vertical scanning pulses according to the vertical start pulse VST′ and the first and second vertical clock pulses VCK 1 ′ and VCK 2 ′. These vertical scanning pulses are sequentially applied to m gate lines 16 - 1 , 16 - 2 , . . . , 16 -m each disposed for each horizontal pixel row and are made, for example, from polycrystalline silicon.
  • a thin-film transistor 17 made, for example, from polycrystalline silicon is formed.
  • the source electrode of the thin-film transistor 17 is connected to one of the signal lines 14 - 1 to 14 -n, and the gate electrode thereof is connected to one of the gate lines 16 - 1 to 16 -m.
  • the drain electrode of the thin-film transistor 17 is connected to the transparent pixel electrode made, for example, from indium tin oxide (ITO) of one of liquid-crystal cells (pixels) 18 disposed in the matrix.
  • ITO indium tin oxide
  • FIG. 2 shows a circuit structure example of the level conversion circuit 11 .
  • the level conversion circuit 11 is formed of a chopper-type comparator, and as circuit devices, thin-film transistors (TFTs) are used, for example.
  • TFTs thin-film transistors
  • a CMOS inverter 21 is formed of a p-channel TFT Qp 11 and an n-channel TFT Qn 11 connected in series between the ground and a power source VDD of, for example, 15 V. Between the common gate connection point of the CMOS inverter 21 and an input terminal 22 of the circuit, a capacitor 23 for DC blocking is connected.
  • a p-channel TFT Qp 12 is connected as a reset switching device. An input signal is sent to the gate electrode of this reset p-channel TFT Qp 12 through the input terminal 22 .
  • the TFT Qp 12 is turned on and off converse to the input signal.
  • the common drain connection point of the CMOS inverter 21 is connected to an output terminal 24 of the circuit.
  • thin-film transistors for example, are used, especially in a circuit portion handling analog signals in the driving circuit, such as the analog switches 15 - 1 to 15 -n and the circuit devices constituting the level conversion circuit 11 .
  • the gate length of a transistor is determined by its dielectric strength. To reduce the size of a circuit, it is generally necessary to reduce the size of the transistors used. Therefore, the shortest gate length L determined from the dielectric strength is set as shown in FIG. 3 A. Usually the shortest gate length is set to about 7 ⁇ m. A gate width W is set from the ratio W/L by using the shortest gate length L according to the purpose of use.
  • circuits may malfunction. For example, circuit malfunction may occur in the level conversion circuit 11 , and operation malfunction in the analog switches 15 - 1 to 15 -n may cause image-quality deterioration.
  • the transistor size is set to a particular value in the present embodiment. Specifically, whereas the transistor size is conventionally specified with the shortest gate length L determined from the dielectric strength and the gate width W determined from the ratio W/L according to the shortest gate length L, as shown in FIG. 3A, the transistor size is specially set in the present embodiment to have, for example, twice the gate length and the gate width with the ratio W/L being maintained.
  • the gate length and the gate width are set to twice those conventionally. However, they are not limited to twice the conventional size.
  • the transistor size can be set to n times (n can be any value exceeding one) the conventional size according to a required stability of transistor characteristics. Preferable characteristic results have been obtained when the gate length and the gate width are set to about twice those of the conventional size.
  • the present invention is applied to the circuit devices constituting the level conversion circuit 11 and the analog switches 15 - 1 to 15 -n.
  • the present invention is not limited to this case. When it is applied to circuit devices constituting a circuit portion handling an analog signal, an effective result is obtained.
  • a liquid-crystal display apparatus is used as an example; however, the present invention is not so limited. It can be also applied to other display apparatuses in which a driving circuit is formed together with a pixel section as a unit, including electroluminescent display apparatuses, such as organic electroluminescent display apparatuses.
  • thin-film transistors are used as circuit devices; however, the present invention is not so limited. It can be also applied to general transistors having large characteristic variations.
  • transistors having a gate length of nL and a gate width of nW are used as circuit devices constituting driving circuits for driving pixels, where L indicates the shortest gate length determined from the dielectric strength, and W indicates the gate width determined by a given ratio of W/L according to the shortest gate length L, the area below the gate electrode is extended and thereby variations in the sizes of silicon crystalline grains can be ignored. Transistor characteristics are thereby improved, and yield and image quality are also thereby improved.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Nonlinear Science (AREA)
  • Liquid Crystal (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Thin Film Transistor (AREA)
  • Shift Register Type Memory (AREA)
  • Liquid Crystal Display Device Control (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
US09/363,747 1998-08-06 1999-07-30 Liquid-crystal display apparatus, transistor, and display apparatus Expired - Lifetime US6329673B1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP22255298A JP2000056330A (ja) 1998-08-06 1998-08-06 液晶表示装置
JP10-222552 1998-08-06

Publications (1)

Publication Number Publication Date
US6329673B1 true US6329673B1 (en) 2001-12-11

Family

ID=16784245

Family Applications (1)

Application Number Title Priority Date Filing Date
US09/363,747 Expired - Lifetime US6329673B1 (en) 1998-08-06 1999-07-30 Liquid-crystal display apparatus, transistor, and display apparatus

Country Status (3)

Country Link
US (1) US6329673B1 (ko)
JP (1) JP2000056330A (ko)
KR (1) KR100634271B1 (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150287378A1 (en) * 2014-04-03 2015-10-08 Samsung Display Co., Ltd. Display device

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100934842B1 (ko) * 2003-05-15 2009-12-31 엘지디스플레이 주식회사 유기전계발광표시소자
JP2005309048A (ja) * 2004-04-21 2005-11-04 Sony Corp 表示装置
KR101127219B1 (ko) 2005-10-20 2012-03-29 엘지디스플레이 주식회사 액정표시장치용 게이트 구동회로 및 이를 이용한액정표시장치

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6023075A (en) * 1990-12-25 2000-02-08 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0798460A (ja) * 1992-10-21 1995-04-11 Seiko Instr Inc 半導体装置及び光弁装置
JP2586785B2 (ja) * 1993-02-01 1997-03-05 日本電気株式会社 信号レベル変換回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6023075A (en) * 1990-12-25 2000-02-08 Semiconductor Energy Laboratory Co., Ltd. Electro-optical device and method for manufacturing the same

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Muller et al, Device Electronics for Integrated Circuits, p. 439, 1986. *

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150287378A1 (en) * 2014-04-03 2015-10-08 Samsung Display Co., Ltd. Display device
US9530374B2 (en) * 2014-04-03 2016-12-27 Samsung Display Co., Ltd. Display device
US9852678B2 (en) 2014-04-03 2017-12-26 Samsung Display Co., Ltd. Display device

Also Published As

Publication number Publication date
KR20000017104A (ko) 2000-03-25
KR100634271B1 (ko) 2006-10-13
JP2000056330A (ja) 2000-02-25

Similar Documents

Publication Publication Date Title
US20190259350A1 (en) Gate driving circuit and display apparatus having the same
JP4785271B2 (ja) 液晶表示装置、電子機器
KR100519686B1 (ko) 액티브매트릭스 표시패널, 및 그를 구비한 화상표시장치
KR100303899B1 (ko) 매트릭스형 액정 디스플레이 장치
US8049704B2 (en) Liquid crystal display device
US10475409B2 (en) Gate drive circuit, display panel, and driving method for the gate drive circuit
US20180095315A1 (en) Display panel and borderless type display including the same
US6275210B1 (en) Liquid crystal display device and driver circuit thereof
US20180047364A1 (en) Circuit for powering off a liquid crystal panel, peripheral drive device and liquid crystal panel
US7573456B2 (en) Semiconductor integrated circuit device and liquid crystal display driving semiconductor integrated circuit device
JPH08137443A (ja) 画像表示装置
US7742044B2 (en) Source-follower type analogue buffer, compensating operation method thereof, and display therewith
US20220114938A1 (en) Shift register unit comprising input circuit, first control circuit, blanking control circuit, first output circuit, and second output circuit, driving method, gate driving circuit, and display device
US20020140660A1 (en) Liquid crystal display apparatus having level conversion circuit
US6292163B1 (en) Scanning line driving circuit of a liquid crystal display
JP4860765B2 (ja) 半導体装置及び電子機器
KR100367527B1 (ko) 화상표시장치
US6329673B1 (en) Liquid-crystal display apparatus, transistor, and display apparatus
US9407267B2 (en) Level conversion circuit and liquid crystal display device using the same
JPH0695073A (ja) 液晶表示装置
JP5493023B2 (ja) 表示装置
JP5719956B2 (ja) 表示装置
JP6167133B2 (ja) 表示装置
JP5847969B2 (ja) 表示装置
JPH11272240A (ja) アレイ基板及び液晶表示装置

Legal Events

Date Code Title Description
AS Assignment

Owner name: SONY CORPORATION, JAPAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:IIDA, MASAYUKI;HAYASHI, YUJI;REEL/FRAME:010392/0170

Effective date: 19991021

STCF Information on status: patent grant

Free format text: PATENTED CASE

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 4

FEPP Fee payment procedure

Free format text: PAYOR NUMBER ASSIGNED (ORIGINAL EVENT CODE: ASPN); ENTITY STATUS OF PATENT OWNER: LARGE ENTITY

FPAY Fee payment

Year of fee payment: 8

FPAY Fee payment

Year of fee payment: 12