US5407848A - Method for forming a gate electrode having a polycide structure - Google Patents

Method for forming a gate electrode having a polycide structure Download PDF

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Publication number
US5407848A
US5407848A US08/242,474 US24247494A US5407848A US 5407848 A US5407848 A US 5407848A US 24247494 A US24247494 A US 24247494A US 5407848 A US5407848 A US 5407848A
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Prior art keywords
oxide film
thermal oxide
film
forming
silicon substrate
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US08/242,474
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English (en)
Inventor
Sang Hoon Park
Ho Gi Jeong
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SK Hynix Inc
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Hyundai Electronics Industries Co Ltd
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Assigned to HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. reassignment HYUNDAI ELECTRONICS INDUSTRIES CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: JEONG, HO GI, PARK, SANG HOON
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66636—Lateral single gate silicon transistors with source or drain recessed by etching or first recessed by etching and then refilled
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4916—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen
    • H01L29/4925—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement
    • H01L29/4933—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET the conductor material next to the insulator being a silicon layer, e.g. polysilicon doped with boron, phosphorus or nitrogen with a multiple layer structure, e.g. several silicon layers with different crystal structure or grain arrangement with a silicide layer contacting the silicon layer, e.g. Polycide gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H01L29/7834—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's with a non-planar structure, e.g. the gate or the source or the drain being non-planar

Definitions

  • This invention relates to a method for forming a gate electrode having a polycide structure.
  • it relates to a method to increase the effective channel length of a gate electrode thereby improving the electric characteristics of a semiconductor device.
  • a conventional method for forming a gate electrode having a polycide structure shown in FIG. 1 is as follows:
  • a gate oxide film 2, a polysilicon film 3 and a silicide film 4 is sequentially formed on a silicon substrate 1.
  • a photo mask(not shown) is arranged on the silicide film 4 and then the photo mask is patterned with a desired width by the photolithography method.
  • the gate oxide film 2 exposed by the photolithography method, the polysilicon film 3 and the silicide film 4 are sequentially etched, thereby forming a gate electrode.
  • a thermal oxide film 5 is formed on the entire surface of the gate electrode and then N - type impurity is implanted on the silicon substrate 1.
  • a spacer oxide film 7 is formed on side walls of the gate electrode and then impurity regions 6 are formed on the silicon substrate 1 by implanting the n + type impurity thereon, thereby completing the gate electrode having a polycide structure.
  • the gate electrode formed according to the conventional method has a short effective channel length, which has the effect of not only decreasing the threshold voltage and the breakdown voltage of a semiconductor device but also increasing the substrate current. As a result, the above described conventional method has the shortcoming of reducing the electrical characteristics of the semiconductor device.
  • the object of the invention is to provide a method for forming a gate electrode with an increased effective channel length by having a polycide structure with an extrusion on a silicon substrate.
  • Another object of the invention is to provide a method for forming an improved gate electrode having a polycide structure by simply forming the LDD(Lightly Doped Drain) region without formation of the spacer oxide film.
  • FIG. 1 illustrates a cross sectional view showing a formation of a gate electrode on a silicon substrate according to the conventional method
  • FIG. 2A through 2E illustrate cross sectional views showing a formation of a gate electrode having a polycide structure on a silicon substrate according to the present invention.
  • FIG. 2A through 2E illustrate cross sectional views showing a formation of a gate electrode having a polycide structure on a silicon substrate according to the present invention.
  • FIG. 2A illustrates a first thermal oxide film 9 formed on a silicon substrate 1 with a thickness of 1000 to 5000A.
  • a photo mask 8 which is patterned by the photolithography method is formed on the first thermal oxide film 9.
  • FIG. 2B illustrates a cross sectional view of the structure in which the first thermal oxide film 9 exposed by the photolithography method and a portion of the substrate 1 are sequentially etched with a desired depth, and then the photoresist 8 is removed by the conventional method.
  • FIG. 2C illustrates a second thermal oxide film 10 formed on the entire surface of the substrate 1 and the first thermal oxide film 9 with a thickness of 100 to 500A. Thereafter, first impurity regions are formed on the substrate 1 by implanting a low concentration impurity.
  • FIG. 2D the first thermal oxide film 9 and the second thermal oxide film 10 have been removed by the HF etchant.
  • a gate oxide film 12 is formed on the entire surface of the resulting silicon substrate 1.
  • a doped polysilicon film 13 and a silicide film 14 are sequentially formed on the gate oxide film 12.
  • the doped polysilicon film 13 and the silicide film 14 is patterned by the photolithography method, thereby forming a gate electrode.
  • the polysilicon film 13 is etched so as to have a gradient.
  • FIG. 2E illustrates a third thermal oxide film or a nitride film 15 sequentially formed on the entire surface of the resulting structure. Then, the second impurity regions 16 are formed on the substrate 1 by implanting a high concentration impurity.
  • the gate electrode having a polycide structure according to the present invention increases the effective channel length, thereby not only increasing the threshold voltage and the breakdown voltage but also decreasing the substrate current. As a consequence, the electric characteristics of a semiconductor device is improved. Also the LDD region is simply formed without a formation of a spacer oxide film.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
US08/242,474 1993-05-13 1994-05-13 Method for forming a gate electrode having a polycide structure Expired - Lifetime US5407848A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR93-8192 1993-05-13
KR1019930008192A KR960014720B1 (ko) 1993-05-13 1993-05-13 폴리 사이드 구조를 갖는 게이트 전극 형성 방법

Publications (1)

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US5407848A true US5407848A (en) 1995-04-18

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US08/242,474 Expired - Lifetime US5407848A (en) 1993-05-13 1994-05-13 Method for forming a gate electrode having a polycide structure

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US (1) US5407848A (ja)
JP (1) JPH07153953A (ja)
KR (1) KR960014720B1 (ja)
DE (1) DE4416735C2 (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5527725A (en) * 1993-12-28 1996-06-18 Hyundai Electronics Industries Co., Ltd. Method for fabricating a metal oxide semiconductor field effect transistor
US5693549A (en) * 1994-09-13 1997-12-02 Lg Semicon Co., Ltd. Method of fabricating thin film transistor with supplementary gates
US6197673B1 (en) * 1999-06-08 2001-03-06 United Semiconductor Corp. Method of fabricating passivation of gate electrode
US6316322B1 (en) * 1999-09-24 2001-11-13 Advanced Micro Devices, Inc. Method for fabricating semiconductor device

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002184716A (ja) * 2000-12-11 2002-06-28 Sharp Corp 半導体装置の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0376126A (ja) * 1989-08-18 1991-04-02 Oki Electric Ind Co Ltd 半導体装置の製造方法
US5089432A (en) * 1990-08-17 1992-02-18 Taiwan Semiconductor Manufacturing Company Polycide gate MOSFET process for integrated circuits
US5147814A (en) * 1989-03-28 1992-09-15 Seiko Epson Corporation Method of manufacturing an lddfet having an inverted-t shaped gate electrode
US5262337A (en) * 1991-03-13 1993-11-16 Gold Star Electron Co., Ltd. Method of making a metal oxide semiconductor field effect transistor having a convex channel region

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5147814A (en) * 1989-03-28 1992-09-15 Seiko Epson Corporation Method of manufacturing an lddfet having an inverted-t shaped gate electrode
JPH0376126A (ja) * 1989-08-18 1991-04-02 Oki Electric Ind Co Ltd 半導体装置の製造方法
US5089432A (en) * 1990-08-17 1992-02-18 Taiwan Semiconductor Manufacturing Company Polycide gate MOSFET process for integrated circuits
US5262337A (en) * 1991-03-13 1993-11-16 Gold Star Electron Co., Ltd. Method of making a metal oxide semiconductor field effect transistor having a convex channel region

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5527725A (en) * 1993-12-28 1996-06-18 Hyundai Electronics Industries Co., Ltd. Method for fabricating a metal oxide semiconductor field effect transistor
US5610424A (en) * 1993-12-28 1997-03-11 Hyundai Electronics Industries Co., Ltd. Metal oxide semiconductor field effect transistor
US5693549A (en) * 1994-09-13 1997-12-02 Lg Semicon Co., Ltd. Method of fabricating thin film transistor with supplementary gates
US5952690A (en) * 1994-09-13 1999-09-14 Lg Semicon Co., Ltd. Thin film transistor and fabrication method of the same
US6197673B1 (en) * 1999-06-08 2001-03-06 United Semiconductor Corp. Method of fabricating passivation of gate electrode
US6316322B1 (en) * 1999-09-24 2001-11-13 Advanced Micro Devices, Inc. Method for fabricating semiconductor device

Also Published As

Publication number Publication date
JPH07153953A (ja) 1995-06-16
DE4416735A1 (de) 1994-11-17
KR940027060A (ko) 1994-12-10
DE4416735C2 (de) 2003-07-24
KR960014720B1 (ko) 1996-10-19

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