US2701216A - Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements - Google Patents

Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements Download PDF

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US2701216A
US2701216A US154064A US15406450A US2701216A US 2701216 A US2701216 A US 2701216A US 154064 A US154064 A US 154064A US 15406450 A US15406450 A US 15406450A US 2701216 A US2701216 A US 2701216A
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layer
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Seiler Karl
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International Standard Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01B—NON-METALLIC ELEMENTS; COMPOUNDS THEREOF; METALLOIDS OR COMPOUNDS THEREOF NOT COVERED BY SUBCLASS C01C
    • C01B35/00—Boron; Compounds thereof
    • C01B35/02—Boron; Borides
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C30B25/08—Reaction chambers; Selection of materials therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/006—Apparatus
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/067—Graded energy gap
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/925—Fluid growth doping control, e.g. delta doping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/935—Gas flow control
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/936—Graded energy gap

Definitions

  • the relative impurity concentration throughout the semiconductor should be a minimum in the zone of increased resistance immediately adjacent the metallic electrode, in order to avoid short-circuits. Any increase in the number of impurities in this zone means great probability of short-circuits due to so-called by-passes.
  • the disassociation level of the impurity atoms should be low (the impurity atoms should not diffuse readily), while the mobility of the electric carriers should be high. That only a few surface-type rectifications effects have been realized so far, derives from the fact that these two demands have not, or have hardly, been possible of fulfilment so far, for the known methods of making specified layer patterns are based exclusively on such processes where the space distribution of the impurities, is only obtained by modifications introduced by a secondary process by removing impurities at a suitable temperature, by chemical reaction (f. i. dissolving, lacquer-layers applied later on, etc.).
  • the substances intended to produce the desired effects are placed at their respective locations in a first operation where no attention can be paid as to obtaining any specified space distribution of impurities, while that specified distribution, essential for proper performance, is brought about only subsequently in a second process governed by laws different from those of the rst one.
  • a second process governed by laws different from those of the rst one.
  • A, B, C, and D refer schematically to devices where the substances needed for assembling the rectifying layer are obtained in their purest form by available processes according to what has been described above. As indicated schematically, these substances are then fed through pipes La, Lb, Lc, and Ld to the device E where the layer pattern is formed. In Fig. l, these pipes La and Lb directly feed the device E with no prior intermixing of the substances being possible. Of course, one, two, or even all of the pipes could be joined in a common duct whenever intermixing of the substances is desired or permissible at such a relatively early stage of the production process.
  • control mechanisms Ra, Rb, Rc, and Rd are shown at some arbitrary point along the ducts which allow any desired decrease or increase in the feeding rate of any of the ingredients while the semiconducting system is being built up. It is by no means essential that these controlling devices be inserted somewhere between the units A and E, B and E, etc., these controlling facilities may as well be incorporated straight in the units A, B, C, D or any additional units that might be present. Care will have to be taken, however, to prevent undesired reactions on the other devices B, C, D whenever at the junction of the pipes or individual pipe ducts the gas or Vapor rate of device A is increased.
  • the elements boron, silicon, germanium, or tellurium may be used because of the high mobility of their electric carriers.
  • the impurity concentration at the back or counterelectrode is chosen large enough to prevent virtually any barrier layer from forming there.
  • silicon may be reduced with hydrogen from silicon, tetrachloride or with zinc, in order to obtain pure silicon.
  • the reaction product deposits on a conducting foundation, (for example, carbon, or other high-melting material not alloying with the basic material) or on some insulating foundation (aluminum oxide, or similar substances).
  • a conducting foundation for example, carbon, or other high-melting material not alloying with the basic material
  • some insulating foundation aluminum oxide, or similar substances
  • boron is used in very low concentrations only, one preferably uses a mixture of boron chloride and silicon tetrachloride in the second feeder current.
  • Silicon may be provided with a small percentage of tin or germanium by adding SnCl4 or GeCl4 to the ow of SiCl4.
  • the impurity material may consist for example of thermal decomposition out of a suitable compound or in adding it as an element to the outgoing ow.
  • the essential feature is that the impurity concentration is open to any programmed control during the buildingup of the semi-conducting layer.
  • the reducing agent will he so chosen that small amounts of it when dissolved, in the semiconductor will not result in any marked degree of conductivity, or that if such is the case -they will cause if possible the kind of conductivity that is wanted anyhow when adding the impurity.
  • Hydrogen is a reducing agent of relatively very neutral character.
  • O refers to an electrically-operated tubular oven with two separate windings in series-connection.
  • zinc vapor is generated which ows in the opposite direction to the mixture of silicon tetrachloride and boron chloride, or silicon tetrachloride and germanium tetrachloride, the fractional composition of which may be varied any time.
  • the reaction zone are again the bases on which the semiconducting material deposits.
  • Fig. 4 shows only the part indicated by E in Fig. l.
  • the inner tubing Ri closed at one end--when required it may also be open at either end-there is fed from one side simultaneously some halogen compound or halogen compounds of the basic material as well as of the impurity material at suitable rates which undergo control during the reaction process as desired, and they are brought to reaction with some material reacting with either halogen (i. e. with that of the basic material as well as with that of the impurity material) so they deposit on bases placed in the reaction zone at a point where reducing material is not, or almost entirely not, deposited.
  • halogen i. e. with that of the basic material as well as with that of the impurity material
  • pipe Rl may for instance be entered from the left by silicon tetrachloride and boron chloride while at the right aluminum is vaporized, so that from the right aluminum vapor or low-order aluminum halogens ows in a current opposing that of the aforenamed compounds.
  • aluminum chloride is formed which has to flow left through the open end of the tube in a countercurrent to the entering substances.
  • the carriers or bases are then placed in such a section of the reaction zone where no aluminum deposits as in this process it is boron that has to serve as the impurity admixture. If required, even tin or germanium may be deposited as impurity substances.
  • Tube R1 is surrounded by some outer shell Ra to which the vacuum pump connects at the right.
  • the entire assembly is accommodated in an oven (not shown).
  • partition the tube up to the reaction zone by a horizontal wall to feed silicon halogen and boron halogen in the lower half While the upper half serves for the return of the formed aluminum chlorides.
  • partition the tube up to the reaction zone by a horizontal wall to feed silicon halogen and boron halogen in the lower half While the upper half serves for the return of the formed aluminum chlorides.
  • tube Rr in Fig. 4 which is conveniently made of quartz, is corroded by aluminum so it becomes useless before long. This even introduces changes in the reaction conditions which even may lead to a displacement of the reaction zone.
  • the aluminum is conveniently inserted in a short tubular socket of sintered corundum-aluminum oxide--so the quartz tubing is protected.
  • the process of the present invention permits making surface-type rectiers with entirely symmetrical electrical characteristics (so-called limiters), if the local impurity concentration is held low not at the outside (i. e. the interface to an adjacent electrode) but in the center-layer of the semi-conductor.
  • Fig. 5 shows the overall structural pattern of such a limiter where the impurity concentration is minimized in the center-layer over a layer thickness d.
  • the thickness of the marginal zone bordering at the low-concentration zone is some lO-7 centimeters, or a few atoms across.
  • Fig. 6 The effect of the thickness d of the low-concentration zone on the properties of the limiter, i. e. on the diffusion voltage level Vd (cutoff-voltage) is shown in Fig. 6.
  • the current J has been plotted versus the voltage, and this for two different values of a'. Herewith, 1(2) exceeds d0), so even Va@ exceeds Vdl).
  • Electron-conducting germanium crystals which at the surface are modified for hole-conduction (p-type) have been described.
  • This structure gives rise to a barrier layer at the interface of the n-type and p-type conducting germanium layers so the current of the emitter electrode is forced radially into the surface. It is only then that the barrier layer under the collector is so affected that the known power-amplifying control of same takes place.
  • a transistor from its basic elements so that on the foundation there is rst applied the layer of the basic material (such as germanium), along with a donor causing electron conduction, with the change in the type of conduction subsequently brought about in that the donor, at a specified stage of the layer-assembly, is replaced by an acceptor, which causes hole-conduction in the basic material when it is deposited along with the latter.
  • the layer of the basic material such as germanium
  • acceptor which causes hole-conduction in the basic material when it is deposited along with the latter.
  • One also may begin by making a p-type conducting foundation to coat it subsequently with a thin n-type conducting lm.
US154064A 1949-04-06 1950-04-05 Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements Expired - Lifetime US2701216A (en)

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CH (1) CH294487A (de)
DE (1) DE883784C (de)
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GB (1) GB682105A (de)

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US2762730A (en) * 1952-06-19 1956-09-11 Sylvania Electric Prod Method of making barriers in semiconductors
US2763581A (en) * 1952-11-25 1956-09-18 Raytheon Mfg Co Process of making p-n junction crystals
US2780569A (en) * 1952-08-20 1957-02-05 Gen Electric Method of making p-nu junction semiconductor units
US2827403A (en) * 1956-08-06 1958-03-18 Pacific Semiconductors Inc Method for diffusing active impurities into semiconductor materials
US2836520A (en) * 1953-08-17 1958-05-27 Westinghouse Electric Corp Method of making junction transistors
US2854364A (en) * 1954-03-19 1958-09-30 Philips Corp Sublimation process for manufacturing silicon carbide crystals
US2861017A (en) * 1953-09-30 1958-11-18 Honeywell Regulator Co Method of preparing semi-conductor devices
US2868678A (en) * 1955-03-23 1959-01-13 Bell Telephone Labor Inc Method of forming large area pn junctions
US2895858A (en) * 1955-06-21 1959-07-21 Hughes Aircraft Co Method of producing semiconductor crystal bodies
US2910394A (en) * 1953-10-02 1959-10-27 Int Standard Electric Corp Production of semi-conductor material for rectifiers
US2928761A (en) * 1954-07-01 1960-03-15 Siemens Ag Methods of producing junction-type semi-conductor devices
US3009834A (en) * 1959-10-29 1961-11-21 Jacques M Hanlet Process of forming an electroluminescent article and the resulting article
US3015590A (en) * 1954-03-05 1962-01-02 Bell Telephone Labor Inc Method of forming semiconductive bodies
US3047438A (en) * 1959-05-28 1962-07-31 Ibm Epitaxial semiconductor deposition and apparatus
US3098774A (en) * 1960-05-02 1963-07-23 Mark Albert Process for producing single crystal silicon surface layers
US3101280A (en) * 1961-04-05 1963-08-20 Ibm Method of preparing indium antimonide films
US3154439A (en) * 1959-04-09 1964-10-27 Sprague Electric Co Method for forming a protective skin for transistor
US3168422A (en) * 1960-05-09 1965-02-02 Merck & Co Inc Process of flushing unwanted residue from a vapor deposition system in which silicon is being deposited
US3173802A (en) * 1961-12-14 1965-03-16 Bell Telephone Labor Inc Process for controlling gas phase composition
US3190773A (en) * 1959-12-30 1965-06-22 Ibm Vapor deposition process to form a retrograde impurity distribution p-n junction formation wherein the vapor contains both donor and acceptor impurities
US3211583A (en) * 1961-09-19 1965-10-12 Melpar Inc Pyrolytic deposition of germanium
US3242018A (en) * 1960-07-01 1966-03-22 Siemens Ag Semiconductor device and method of producing it
US3355318A (en) * 1963-09-26 1967-11-28 Union Carbide Corp Gas plating metal deposits comprising boron

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NL218408A (de) * 1954-05-18 1900-01-01
DE1228342B (de) * 1954-07-14 1966-11-10 Siemens Ag Diffusionsverfahren zum Dotieren einer Oberflaechenschicht von festen Halbleiterkoerpern
DE1033784B (de) * 1954-12-07 1958-07-10 Siemens Ag Verfahren zur Nachbehandlung eines Halbleiterwerkstoffes fuer Richtleiter, Transistoren u. dgl.
US2847624A (en) * 1955-02-24 1958-08-12 Sylvania Electric Prod Semiconductor devices and methods
DE1040133B (de) * 1955-05-27 1958-10-02 Siemens Ag Verfahren zur Herstellung von Flaechengleichrichtern mit einem Halbleiter aus einer Zweistoff-Verbindung
DE1227433B (de) * 1955-07-28 1966-10-27 Siemens Ag Verfahren zum Einbau definierter Stoerstellen in Metall- oder Halbleiterschichten
DE1130078B (de) * 1956-08-10 1962-05-24 Siemens Ag Verfahren zur Dotierung von Halbleiterkristallen fuer Halbleiterbauelemente
GB878765A (en) * 1956-11-05 1961-10-04 Plessey Co Ltd Improvements in and relating to processes for the manufacture of semiconductor materials
NL244520A (de) * 1958-10-23
NL260906A (de) * 1960-02-12
IT649936A (de) * 1960-05-09
NL127213C (de) * 1960-06-10
NL131267C (de) * 1960-06-14 1900-01-01
NL274847A (de) * 1961-02-16
DE1138481C2 (de) * 1961-06-09 1963-05-22 Siemens Ag Verfahren zur Herstellung von Halbleiteranordnungen durch einkristalline Abscheidung von Halbleitermaterial aus der Gasphase
DE1639545B1 (de) * 1961-08-21 1969-09-04 Siemens Ag Verfahren zum Herstellen einer Halbleiteranordnung mit Zonen unterschiedlichen Leitungstyp
US3170825A (en) * 1961-10-02 1965-02-23 Merck & Co Inc Delaying the introduction of impurities when vapor depositing an epitaxial layer on a highly doped substrate
NL288035A (de) * 1962-01-24
US3152932A (en) * 1962-01-29 1964-10-13 Hughes Aircraft Co Reduction in situ of a dipolar molecular gas adhering to a substrate
US3178798A (en) * 1962-05-09 1965-04-20 Ibm Vapor deposition process wherein the vapor contains both donor and acceptor impurities
GB1053381A (de) * 1963-02-08
GB1093822A (en) * 1963-07-18 1967-12-06 Plessey Uk Ltd Improvements in or relating to the manufacture of semiconductor devices
US3206339A (en) * 1963-09-30 1965-09-14 Philco Corp Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites
DE1286512B (de) * 1963-10-08 1969-01-09 Siemens Ag Verfahren zur Herstellung von insbesondere stabfoermigen Halbleiterkristallen mit ueber den ganzen Kristall homogener oder annaehernd homogener Dotierung
DE1245335B (de) * 1964-06-26 1967-07-27 Siemens Ag Verfahren zur Herstellung einkristalliner, homogen bordotierter, insbesondere aus Silicium oder Germanium bestehender Aufwachsschichten auf einkristallinen Grundkoerpern
DE1276606B (de) * 1965-06-28 1968-09-05 Siemens Ag Verfahren zum Herstellen einkristalliner dotierter Schichten aus Halbleitermaterial durch epitaktisches Aufwachsen

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US1964322A (en) * 1930-11-07 1934-06-26 Corning Glass Works Electrically conducting coating on vitreous substances and method of producing it
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DE883784C (de) 1953-06-03
CH294487A (de) 1953-11-15
FR1107452A (fr) 1956-01-03
GB682105A (en) 1952-11-05

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