US3098774A - Process for producing single crystal silicon surface layers - Google Patents

Process for producing single crystal silicon surface layers Download PDF

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US3098774A
US3098774A US26384A US2638460A US3098774A US 3098774 A US3098774 A US 3098774A US 26384 A US26384 A US 26384A US 2638460 A US2638460 A US 2638460A US 3098774 A US3098774 A US 3098774A
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    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02Elements
    • C30B29/06Silicon
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth

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  • the invention relates to a method of growing silicon onto a selected surface and, more particularly, to a method of growing single crystal silicon layers onto single crystal silicon substrates of the same orientation. 7
  • a primary object of this invention is to provide a method for growing a single crystal layer of silicon on a single crystal silicon substrate so that the grown silicon layer is synonomous with and unites with the substrate surface over its entire periphery.
  • a further object of this invention is to provide a method of making thin-film monocrystalline semiconductor structures of relatively wide surfaces exhibiting N type or P type of conductivity which can be used without any further processing in the manufacturing of solid state rectifiers and amplifiers.
  • a solid single crystal silicon substrate of one type conductivity on whose surface a layer of single crystal silicon of the opposite type conductivity is desired is inserted in a suitable controlled atmosphere type reactor.
  • Hydrogen gas mixed with silicon tetrachloride vapor and doping agents are passed through the intake tube of the reactor and over the silicon substrate, the waste gases being allowed to exit through an exhaust tube.
  • a temperature gradient is maintained between the decomposing vapor mixture and the growing surface of the solid silicon substrate causing the surface of the latter to grow as a single crystal layer without a break in the atomic lattice.
  • the formation of the single crystal silicon layer which coats the silicon substrate occurs as represented in the following reversible reaction;
  • the main part of the system for carrying out the method of the present invention comprises a quartz reactor 10' incased in a furnace 12.
  • a single crystal silicon substrate 14 of N-type conductivity, on which the overgrowth of P-type is to be grown, is positioned at the mid-section of reactor 10.
  • a quartz tube 16 which will 3,'8,774 Patented July 23, 1963 admit into the reactor the gas mixture produced within another part of the system.
  • Reactor 10 is also provided with a quartz outlet tube 118 which is sealed thereto with a removable asbestos pad 20 to permit insertion of substrate 14 into the reactor.
  • the exhaust gases are passed from outlet tube 18 via a Pyrex tube 22 which is mounted through one hole of a two hole rubber stopper 24 in a heavy walled flask 26.
  • Tube 22 extends just above the bottom of flask 26 which in turn carries a water cooled condenser 28 mounted in the second hole of stopper 2-4.
  • a jet tube 30 for burning off exhaust gases is attached to the top of condenser '28.
  • Furnace 12 is constructed of firebrick and the open ends are packed with insulating material, not shown, to maintain parts of reactor '10 at a predetermined temperature.
  • a plurality of heating elements 32 such as silicon carbide are supplied with electrical current from a source not shown, and are mounted within furnace 12 in two horizontal rows and two vertical rows. In the embodiment illustrated, only one row of vertical heating elements 32 is shown.
  • the horizontal rows of heating elements 32 are positioned above and below reactor '10, while the vertical rows of heating elements are placed on opposite sides thereof resulting in a criss-cross network at the center section of the reactor. As shown, the lower row of horizontal heating elements 32 are positioned closer to the bottom peripheral surface of reactor 10 than are the upper horizontal row.
  • a quartz thermocouple well 34 is in corporated into the midsection of reactor 19 and houses the quartz tube 36 for monitoring the furnace temperature.
  • Tube 16 is connected to a stem 38 which supplies and controls the proper molecular ratio of gaseous reactance entering reactor 10.
  • the lower section of stem 38 comprises a quartz bulk 49 which may be maintained at the desired temperature by the use of liquid air in a Dewar flask 42..
  • the upper section of stem 38 houses storage funnels, 44 and 46, and a quartz tube 48 extending down into bulb '40 and carrying thermocouple wires 50, resting at the closed end of tube 48, for measuring low temperatures in the bulb.
  • Storage funnel 44 containing the active ingredient liquid silicon tetrachloride, has a tube 52 extending therefrom which terminates just above the bottom of bulb 40.
  • Storage funnel 46 contains the liquid doping agent, in this instance a trivalent impurity such as boron, phosphorus or arsenic. It is to be noted that the doping agent can also be in a gaseous form.
  • Two valves 54 and 55 are provided for isolating funnels 4 4 and 46, respectively, from the remaining part of the system when required.
  • Tube 58 admits pure hydrogen, previously purified and dried, from a source not shown, into the system via stem 38.
  • silicon substrate 14 is cut from a single crystal oriented bulk ingot, and is about /2 inch in diameter and has a lapped and polished thickness of between 10-11 mils. Other orientations such as 111, 110, 112 or 001 may be used. Assuming the situation where substrate .14 is an N-type material, its surface is first cleaned and etched, for example, for six seconds in an acid composed of 1 part acetic acid, 5 parts hydrofluoric acid and 5 parts nitric acid to a thickness of about 7 mls. After washing in deionized water, dipping in ethyl alcohol, and drying, substrate 14 is aligned in the midsection of reactor 10 and the system is sealed oif.
  • Hydrogen is first admitted through tube 58, for about 45 minutes and burned off at jet 34 to clear the system of the preceding atmosphere therein.
  • the electrical current is then applied to the heating elements 32 until the operative temperature of reactor 10 is reached.
  • This temperature is preferably about 1 148" C. and may range between 1125 C. to -1250 C. measured at the base of thermocouple well 34. Since the process is performed on solid silicon the operating temperature is restricted 3 by the melting point of silicon at 1420 C.
  • the system is operated at the established temperature, for about one hour until the temperature is stabilized; and further to expel traces of water vapor, oxide layer and volatile contaminants that are released from the surface of substrate 14 by the hydrogen passing through the system.
  • the temperature of bulb 40 is next reduced to 90 C.
  • the solid silicon tetrachloride in bulb 40 is slowly thawed to approximate a preferred generation of about 1 cubic centimeter per hour through the system at a hydrogen flow ranging between 250 to 500 cubic centimeters per minute. This corresponds to keeping the silicon tetrachloride at a temperature of about 36 C. This value can be regulated to higher or lower temperatures for changing the quality of growth, and may range between C. to -55 C. Simultaneously, valve 56 is opened, and P-type doping agents are introduced into the system. A single crystal layer will now begin to grow on substrate 14.
  • Substrate 14 is maintained, in reactor 10, at a preferred predetermined temperature of about 30 C. lower than the temperature of the gases passing over its surface.
  • the temperature gradient between substrate 14 and the gases may lie within the range of C. to 50 C.
  • the temperature of substrate 14-, during the operation, may be measured by an independent thermocouple well, not shown, incorporated into reactor 10.
  • the temperature difference between substrate 14 and the gases passing through reactor 10 is sustained by virtue of the design of furnace 12, the lower temperature of the substrate being apparently due to its conductivity being poorer than that of the gases.
  • the reaction is stopped by freezing the balance of the silicon tetrachloride in bulb 40 until solid.
  • the hydrogen flow is continued at the same rate, and furnace 12 is maintained at the same temperature for minutes after the silicon tetrachloride is frozen solid.
  • the electrical current to heaters 32 is shut off and the system is allowed to cool to room temperature under the same rate of hydrogen flow before substrate 14 is removed from reactor 10.
  • the invention has been described with particular reference to the production of PN junctions in N- type silicon through the use of a P-type impurity, it may be practiced also with a P-type silicon and a significant N-type impurity.
  • the process may also be used in the formation of semiconductor devices such as: a large area surface junction to serve as a solar cell; a masked single crystal layer in a matrix pattern to give innumerable junction points; and alternate layers of single crystal silicon films on parent or foreign substrates, each with its own discrete resistivity or conductivity type to produce a transistor type device.
  • the method of producing a layer of single crystal silicon of one conductivity type upon a body of silicon of the opposite conductivity type comprising the steps of passing hydrogen CV61 a liquid surface of silicon tetrachloride maintained at a temperature ranging between 20 C. to 55 C. to form a gaseous atmosphere,

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  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Description

A. MARK July 23, 1963 PROCESS FOR PRODUCING SINGLE CRYSTAL SILICON SURFACE LAYERS Filed May 2, 1960 INVENTOR,
ALBERT MARK MA/W ATTOR NEY.
United States Patent "ice 3,098,774 PROCESS FOR PRODUCING SINGLE CRYSTAL SILECON SURFACE LAYERS Albert Mark, Toms River, N.J., assignor to the United States of America as represented by the Secretary of the Army Filed May 2, 1960, Ser. No. 26,384 1 Claim. (Cl. 1481.5) (Granted under Title 35, US. Code (1952), see. 266) The invention described herein may be manufactured and used by or for the Government for governmental purposes, without the payment of any royalty thereon.
The invention relates to a method of growing silicon onto a selected surface and, more particularly, to a method of growing single crystal silicon layers onto single crystal silicon substrates of the same orientation. 7
Heretofore, known methods for depositing silicon coatings on inert base materials have been the hydrogen reduction of silicon tetrachloride at elevated temperatures. These methods suffered from the fact that the silicon was deposited on the substrate as a polycrystalline layer and therefore was unsuitable for use in electrical current rectifiers and amplifiers of the so-called solid state kind. Even if the silicon layer was deposited by these methods, on a single crystal silicon substrate the resultant product was still found to be amorphous or polycrystalline in structure.
It is, therefore, the general object of this invention to obviate the difliculties of the prior art and processes mentioned above.
A primary object of this invention is to provide a method for growing a single crystal layer of silicon on a single crystal silicon substrate so that the grown silicon layer is synonomous with and unites with the substrate surface over its entire periphery.
A further object of this invention is to provide a method of making thin-film monocrystalline semiconductor structures of relatively wide surfaces exhibiting N type or P type of conductivity which can be used without any further processing in the manufacturing of solid state rectifiers and amplifiers.
According to the practice of the invention, a solid single crystal silicon substrate of one type conductivity on whose surface a layer of single crystal silicon of the opposite type conductivity is desired, is inserted in a suitable controlled atmosphere type reactor. Hydrogen gas mixed with silicon tetrachloride vapor and doping agents are passed through the intake tube of the reactor and over the silicon substrate, the waste gases being allowed to exit through an exhaust tube. At the same time, a temperature gradient is maintained between the decomposing vapor mixture and the growing surface of the solid silicon substrate causing the surface of the latter to grow as a single crystal layer without a break in the atomic lattice. The formation of the single crystal silicon layer which coats the silicon substrate occurs as represented in the following reversible reaction;
For a more detailed description of the invention, together with other and further objects thereof, reference is had to the following description taken in connection with the accompanying drawing, which depicts a system for preparing a semiconductor body in accordance with a preferred embodiment of the present invention.
Referring to the drawing, the main part of the system for carrying out the method of the present invention comprises a quartz reactor 10' incased in a furnace 12. A single crystal silicon substrate 14 of N-type conductivity, on which the overgrowth of P-type is to be grown, is positioned at the mid-section of reactor 10. On the left of reactor 10 there is shown a quartz tube 16 which will 3,'8,774 Patented July 23, 1963 admit into the reactor the gas mixture produced within another part of the system. Reactor 10 is also provided with a quartz outlet tube 118 which is sealed thereto with a removable asbestos pad 20 to permit insertion of substrate 14 into the reactor. The exhaust gases are passed from outlet tube 18 via a Pyrex tube 22 which is mounted through one hole of a two hole rubber stopper 24 in a heavy walled flask 26. Tube 22 extends just above the bottom of flask 26 which in turn carries a water cooled condenser 28 mounted in the second hole of stopper 2-4. A jet tube 30 for burning off exhaust gases is attached to the top of condenser '28.
Furnace 12 is constructed of firebrick and the open ends are packed with insulating material, not shown, to maintain parts of reactor '10 at a predetermined temperature. A plurality of heating elements 32 such as silicon carbide are supplied with electrical current from a source not shown, and are mounted within furnace 12 in two horizontal rows and two vertical rows. In the embodiment illustrated, only one row of vertical heating elements 32 is shown. The horizontal rows of heating elements 32 are positioned above and below reactor '10, while the vertical rows of heating elements are placed on opposite sides thereof resulting in a criss-cross network at the center section of the reactor. As shown, the lower row of horizontal heating elements 32 are positioned closer to the bottom peripheral surface of reactor 10 than are the upper horizontal row. A quartz thermocouple well 34 is in corporated into the midsection of reactor 19 and houses the quartz tube 36 for monitoring the furnace temperature.
Tube 16 is connected to a stem 38 which supplies and controls the proper molecular ratio of gaseous reactance entering reactor 10. The lower section of stem 38 comprises a quartz bulk 49 which may be maintained at the desired temperature by the use of liquid air in a Dewar flask 42.. The upper section of stem 38 houses storage funnels, 44 and 46, and a quartz tube 48 extending down into bulb '40 and carrying thermocouple wires 50, resting at the closed end of tube 48, for measuring low temperatures in the bulb. Storage funnel 44, containing the active ingredient liquid silicon tetrachloride, has a tube 52 extending therefrom which terminates just above the bottom of bulb 40. Storage funnel 46 contains the liquid doping agent, in this instance a trivalent impurity such as boron, phosphorus or arsenic. It is to be noted that the doping agent can also be in a gaseous form. Two valves 54 and 55 are provided for isolating funnels 4 4 and 46, respectively, from the remaining part of the system when required. Tube 58 admits pure hydrogen, previously purified and dried, from a source not shown, into the system via stem 38.
Referring to the process proper, silicon substrate 14 is cut from a single crystal oriented bulk ingot, and is about /2 inch in diameter and has a lapped and polished thickness of between 10-11 mils. Other orientations such as 111, 110, 112 or 001 may be used. Assuming the situation where substrate .14 is an N-type material, its surface is first cleaned and etched, for example, for six seconds in an acid composed of 1 part acetic acid, 5 parts hydrofluoric acid and 5 parts nitric acid to a thickness of about 7 mls. After washing in deionized water, dipping in ethyl alcohol, and drying, substrate 14 is aligned in the midsection of reactor 10 and the system is sealed oif.
Hydrogen is first admitted through tube 58, for about 45 minutes and burned off at jet 34 to clear the system of the preceding atmosphere therein. The electrical current is then applied to the heating elements 32 until the operative temperature of reactor 10 is reached. This temperature is preferably about 1 148" C. and may range between 1125 C. to -1250 C. measured at the base of thermocouple well 34. Since the process is performed on solid silicon the operating temperature is restricted 3 by the melting point of silicon at 1420 C. The system is operated at the established temperature, for about one hour until the temperature is stabilized; and further to expel traces of water vapor, oxide layer and volatile contaminants that are released from the surface of substrate 14 by the hydrogen passing through the system. The temperature of bulb 40 is next reduced to 90 C. by immersing the bulb into the liquid air contained in Dewar flask 42. Valve '54 is then opened and the silicon tetra-' chloride is slowly dripped into the bottom of bulb 40 and frozen immediately into a solid mass. As the silicon tetrachloride is freezing the temperature will rise, and care is exercised not to allow the temperature to rise above 70 C., the freezing point of silicon tetrachloride, otherwise the vapors of silicon tetrachloride are carried through reactor prematurely.
The solid silicon tetrachloride in bulb 40 is slowly thawed to approximate a preferred generation of about 1 cubic centimeter per hour through the system at a hydrogen flow ranging between 250 to 500 cubic centimeters per minute. This corresponds to keeping the silicon tetrachloride at a temperature of about 36 C. This value can be regulated to higher or lower temperatures for changing the quality of growth, and may range between C. to -55 C. Simultaneously, valve 56 is opened, and P-type doping agents are introduced into the system. A single crystal layer will now begin to grow on substrate 14.
Substrate 14 is maintained, in reactor 10, at a preferred predetermined temperature of about 30 C. lower than the temperature of the gases passing over its surface. However, the temperature gradient between substrate 14 and the gases may lie within the range of C. to 50 C. The temperature of substrate 14-, during the operation, may be measured by an independent thermocouple well, not shown, incorporated into reactor 10.
The temperature difference between substrate 14 and the gases passing through reactor 10 is sustained by virtue of the design of furnace 12, the lower temperature of the substrate being apparently due to its conductivity being poorer than that of the gases.
Once the required thickness of silicon growth is obtained on substrate 14, the reaction is stopped by freezing the balance of the silicon tetrachloride in bulb 40 until solid. The hydrogen flow is continued at the same rate, and furnace 12 is maintained at the same temperature for minutes after the silicon tetrachloride is frozen solid. The electrical current to heaters 32 is shut off and the system is allowed to cool to room temperature under the same rate of hydrogen flow before substrate 14 is removed from reactor 10.
Although the invention has been described with particular reference to the production of PN junctions in N- type silicon through the use of a P-type impurity, it may be practiced also with a P-type silicon and a significant N-type impurity. In addition the process may also be used in the formation of semiconductor devices such as: a large area surface junction to serve as a solar cell; a masked single crystal layer in a matrix pattern to give innumerable junction points; and alternate layers of single crystal silicon films on parent or foreign substrates, each with its own discrete resistivity or conductivity type to produce a transistor type device.
While there has been described what is at present considered a preferred embodiment of the invention, it will be obvious to those skilled in the art that various changes and modifications may be made therein without departing from the invention, and it is therefore aimed in the appended claim to cover all such changes and modifications as fall within the spirit and scope of the invention.
What is claimed is:
The method of producing a layer of single crystal silicon of one conductivity type upon a body of silicon of the opposite conductivity type, comprising the steps of passing hydrogen CV61 a liquid surface of silicon tetrachloride maintained at a temperature ranging between 20 C. to 55 C. to form a gaseous atmosphere,
adding an impurity of said one conductivity type to said gaseous atmosphere, sustaining the rate of flow of said atmosphere over said body to a range of between 250 to 500 cubic centimeters per minute, and simultaneously maintaining a temperature gradient between said atmosphere and said body such that said body is in a range between 25 C. to 50 C. lower than the temperature of said atmosphere with the temperature of said atmos phere being chosen from the range of about 1125 C. to 1250 C.
References Cited in the file of this patent UNITED STATES PATENTS OTHER REFERENCES Research, vol. 12, '1959, page 93. Loonam: Journal of the Electrochemical Society,
March 1959, pages 238-244.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3156591A (en) * 1961-12-11 1964-11-10 Fairchild Camera Instr Co Epitaxial growth through a silicon dioxide mask in a vacuum vapor deposition process
US3192072A (en) * 1960-12-08 1965-06-29 Slemens & Halske Ag Method of pulling a dendritic crystal from a vapor atmosphere
US3206339A (en) * 1963-09-30 1965-09-14 Philco Corp Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites
US3265542A (en) * 1962-03-15 1966-08-09 Philco Corp Semiconductor device and method for the fabrication thereof
US3366516A (en) * 1960-12-06 1968-01-30 Merck & Co Inc Method of making a semiconductor crystal body
US3409483A (en) * 1964-05-01 1968-11-05 Texas Instruments Inc Selective deposition of semiconductor materials
US3458368A (en) * 1966-05-23 1969-07-29 Texas Instruments Inc Integrated circuits and fabrication thereof

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2692839A (en) * 1951-03-07 1954-10-26 Bell Telephone Labor Inc Method of fabricating germanium bodies
US2701216A (en) * 1949-04-06 1955-02-01 Int Standard Electric Corp Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements
US2759855A (en) * 1953-08-24 1956-08-21 Eagle Picher Co Coated electronic device and method of making same
US2763581A (en) * 1952-11-25 1956-09-18 Raytheon Mfg Co Process of making p-n junction crystals
DE1029941B (en) * 1955-07-13 1958-05-14 Siemens Ag Process for the production of monocrystalline semiconductor layers
US2854318A (en) * 1954-05-18 1958-09-30 Siemens Ag Method of and apparatus for producing semiconductor materials
US2880117A (en) * 1956-01-20 1959-03-31 Electronique & Automatisme Sa Method of manufacturing semiconducting materials
US2893850A (en) * 1956-08-03 1959-07-07 Bichowsky Foord Von Apparatus for the production of elemental silicon
US2895858A (en) * 1955-06-21 1959-07-21 Hughes Aircraft Co Method of producing semiconductor crystal bodies
US2910394A (en) * 1953-10-02 1959-10-27 Int Standard Electric Corp Production of semi-conductor material for rectifiers

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2701216A (en) * 1949-04-06 1955-02-01 Int Standard Electric Corp Method of making surface-type and point-type rectifiers and crystalamplifier layers from elements
US2692839A (en) * 1951-03-07 1954-10-26 Bell Telephone Labor Inc Method of fabricating germanium bodies
US2763581A (en) * 1952-11-25 1956-09-18 Raytheon Mfg Co Process of making p-n junction crystals
US2759855A (en) * 1953-08-24 1956-08-21 Eagle Picher Co Coated electronic device and method of making same
US2910394A (en) * 1953-10-02 1959-10-27 Int Standard Electric Corp Production of semi-conductor material for rectifiers
US2854318A (en) * 1954-05-18 1958-09-30 Siemens Ag Method of and apparatus for producing semiconductor materials
US2895858A (en) * 1955-06-21 1959-07-21 Hughes Aircraft Co Method of producing semiconductor crystal bodies
DE1029941B (en) * 1955-07-13 1958-05-14 Siemens Ag Process for the production of monocrystalline semiconductor layers
US2880117A (en) * 1956-01-20 1959-03-31 Electronique & Automatisme Sa Method of manufacturing semiconducting materials
US2893850A (en) * 1956-08-03 1959-07-07 Bichowsky Foord Von Apparatus for the production of elemental silicon

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3366516A (en) * 1960-12-06 1968-01-30 Merck & Co Inc Method of making a semiconductor crystal body
US3192072A (en) * 1960-12-08 1965-06-29 Slemens & Halske Ag Method of pulling a dendritic crystal from a vapor atmosphere
US3156591A (en) * 1961-12-11 1964-11-10 Fairchild Camera Instr Co Epitaxial growth through a silicon dioxide mask in a vacuum vapor deposition process
US3265542A (en) * 1962-03-15 1966-08-09 Philco Corp Semiconductor device and method for the fabrication thereof
US3206339A (en) * 1963-09-30 1965-09-14 Philco Corp Method of growing geometricallydefined epitaxial layer without formation of undesirable crystallites
US3409483A (en) * 1964-05-01 1968-11-05 Texas Instruments Inc Selective deposition of semiconductor materials
US3458368A (en) * 1966-05-23 1969-07-29 Texas Instruments Inc Integrated circuits and fabrication thereof

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