US20150345042A1 - Method of manufacturing microstructures of metal lines - Google Patents

Method of manufacturing microstructures of metal lines Download PDF

Info

Publication number
US20150345042A1
US20150345042A1 US14/329,009 US201414329009A US2015345042A1 US 20150345042 A1 US20150345042 A1 US 20150345042A1 US 201414329009 A US201414329009 A US 201414329009A US 2015345042 A1 US2015345042 A1 US 2015345042A1
Authority
US
United States
Prior art keywords
trench
layer
width
metal
metal line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US14/329,009
Other languages
English (en)
Inventor
Yu-Chou Yeh
Chih-Ming Hu
Chiu-Cheng Tsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Jtouch Corp
Original Assignee
Jtouch Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jtouch Corp filed Critical Jtouch Corp
Assigned to JTOUCH CORPORATION reassignment JTOUCH CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: YEH, YU-CHOU, HU, CHIH-MING, TSUI, CHIU-CHENG
Publication of US20150345042A1 publication Critical patent/US20150345042A1/en
Abandoned legal-status Critical Current

Links

Images

Classifications

    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02Electroplating of selected surface areas
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D7/00Electroplating characterised by the article coated
    • C25D7/12Semiconductors
    • C25D7/123Semiconductors first coated with a seed layer or a conductive layer
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/34Pretreatment of metallic surfaces to be electroplated
    • CCHEMISTRY; METALLURGY
    • C25ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25DPROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/48After-treatment of electroplated surfaces
    • GPHYSICS
    • G03PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03FPHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/047Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means using sets of wires, e.g. crossed wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01BCABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B13/00Apparatus or processes specially adapted for manufacturing conductors or cables
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/02Containers; Seals
    • H01L23/04Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls
    • H01L23/043Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/282Applying non-metallic protective coatings for inhibiting the corrosion of the circuit, e.g. for preserving the solderability
    • CCHEMISTRY; METALLURGY
    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23FNON-MECHANICAL REMOVAL OF METALLIC MATERIAL FROM SURFACE; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL; MULTI-STEP PROCESSES FOR SURFACE TREATMENT OF METALLIC MATERIAL INVOLVING AT LEAST ONE PROCESS PROVIDED FOR IN CLASS C23 AND AT LEAST ONE PROCESS COVERED BY SUBCLASS C21D OR C22F OR CLASS C25
    • C23F1/00Etching metallic material by chemical means
    • C23F1/02Local etching
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04103Manufacturing, i.e. details related to manufacturing processes specially suited for touch sensitive devices
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2203/00Indexing scheme relating to G06F3/00 - G06F3/048
    • G06F2203/041Indexing scheme relating to G06F3/041 - G06F3/045
    • G06F2203/04112Electrode mesh in capacitive digitiser: electrode for touch sensing is formed of a mesh of very fine, normally metallic, interconnected lines that are almost invisible to see. This provides a quite large but transparent electrode surface, without need for ITO or similar transparent conductive material
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0108Transparent
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10053Switch
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/12Using specific substances
    • H05K2203/121Metallo-organic compounds
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/14Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation
    • H05K3/16Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using spraying techniques to apply the conductive material, e.g. vapour evaporation by cathodic sputtering
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/244Finish plating of conductors, especially of copper conductors, e.g. for pads or lands

Definitions

  • the present invention relates to a method of manufacturing microstructures, and more particularly to a method of manufacturing microstructures of metal lines.
  • the transparent electrode of the conventional touch panel has the transparent property and the electrically-conductive property.
  • the transparent electrode is made of indium tin oxide (ITO).
  • ITO indium tin oxide
  • the fabricating method and the structure of the transparent electrode have many disadvantages. For example, the electrical resistance is higher, the response speed is slower, more fabricating steps are required, and the fabricating cost is higher. Consequently, the ITO transparent electrodes are gradually replaced by metal lines (or metal meshes).
  • the metal mesh In comparison with the ITO transparent electrode, the metal mesh has lower electrical resistance, better electrical conductivity, faster response speed and lower fabricating cost.
  • a metal line pattern is directly printed on a substrate.
  • the stencil is usually subjected to deformation and thus the printing accuracy of the stencil is deteriorated.
  • the way of frequently replacing the stencil may increase the overall cost.
  • the precision should be elaborately controlled. Under this circumstance, the fabricating cost is largely increased, the metal line is readily broken, and the yield is reduced.
  • the metal line is made of silver, aluminum or copper, the metal line is possibly oxidized. The process of preventing oxidation also increases the fabricating complexity and the fabricating cost.
  • the present invention provides a method of manufacturing microstructures of metal lines.
  • the metal line is thinner, the fabricating cost is reduced, and the transmittance and the invisibility of the metal line are both enhanced.
  • the present invention also provides a method of manufacturing microstructures of metal lines in order to precisely control the line width of the metal line to be smaller than 5 ⁇ m. Consequently, the yield of the product is increased, and the oxidation of the metal line is minimized.
  • the present invention further provides a method of manufacturing microstructures of metal lines, in which the metal line of the visible touch zone and the wiring part of the non-touch zone of the touch panel can be simultaneously formed on the substrate in the same fabricating step. Consequently, the fabricating procedures of the touch panel are simplified, and the fabricating cost of the touch panel is reduced.
  • a method of manufacturing a metal line microstructure Firstly, a substrate is provided. Then, a seed layer is formed on a surface of the substrate. Then, a photoresist layer is formed on a surface of the seed layer, and a photolithography and etching process is performed to form a trench in the photoresist layer, wherein the trench has a specified width. Then, an electroplating process is performed to fill a conductive layer into the trench. Afterwards, the photoresist layer and a portion of the seed layer uncovered by the conductive layer are removed, so that the metal line microstructure is produced.
  • a method of manufacturing a metal line microstructure Firstly, a substrate is provided. Then, a seed layer is formed on a surface of the substrate. Then, a photoresist layer is formed on a surface of the seed layer, and a photolithography and etching process is performed to form a trench in the photoresist layer, wherein the trench has a specified width. Then, an electroplating process is performed to fill a conductive layer into the trench. Then, an anti-oxidation layer is filled into the trench and forming the anti-oxidation layer on the conductive layer. Afterwards, the photoresist layer and a portion of the seed layer uncovered by the conductive layer are removed, so that the metal line microstructure is produced.
  • a method of manufacturing a metal line microstructure Firstly, a substrate is provided. Then, a seed layer is formed on a surface of the substrate. Then, a photoresist layer is formed on a surface of the seed layer, and a photolithography and etching process is performed to form a first trench and a second trench in the photoresist layer, wherein the first trench has a first width, the second trench has a second width, and the second width is larger than the first width. Then, a conductive layer is filled into the first trench and the second trench. Afterwards, the photoresist layer and a portion of the seed layer uncovered by the conductive layer are removed, so that a first metal line microstructure and a second metal line microstructure are produced.
  • FIGS. 1A ⁇ 1E are schematic cross-sectional views illustrating a method of manufacturing microstructures of metal lines according to a first embodiment of the present invention
  • FIG. 2 is a flowchart illustrating the method of manufacturing microstructures of metal lines according to the first embodiment of the present invention
  • FIGS. 3A ⁇ 3F are schematic cross-sectional views illustrating a method of manufacturing microstructures of metal lines according to a second embodiment of the present invention.
  • FIG. 4 is a flowchart illustrating the method of manufacturing microstructures of metal lines according to the second embodiment of the present invention.
  • FIGS. 5A ⁇ 5E are schematic cross-sectional views illustrating a method of manufacturing microstructures of metal lines according to a third embodiment of the present invention.
  • FIG. 6 is a flowchart illustrating the method of manufacturing microstructures of metal lines according to the third embodiment of the present invention.
  • FIG. 7 schematically illustrates the metal lines formed by the manufacturing method according to the third embodiment of the present invention.
  • FIGS. 1A ⁇ 1E are schematic cross-sectional views illustrating a method of manufacturing microstructures of metal lines according to a first embodiment of the present invention.
  • FIG. 2 is a flowchart illustrating the method of manufacturing microstructures of metal lines according to the first embodiment of the present invention.
  • the substrate 11 is a transparent substrate, a flexible substrate or a flexible transparent substrate.
  • the thickness of the substrate 11 is in the range between 20 ⁇ m and 800 ⁇ m.
  • the substrate 11 is made of polyethylene terephthalate (PET), polyetherimide (PEI), polyphenylensulfone (PPSU), polyimide (PI), polyethylene naphthalate (PEN), cyclic olefin copolymer (COC), liquid crystal polymer (LCP), glass or a combination thereof.
  • PET polyethylene terephthalate
  • PEI polyetherimide
  • PPSU polyphenylensulfone
  • PI polyimide
  • PEN polyethylene naphthalate
  • COC cyclic olefin copolymer
  • LCP liquid crystal polymer
  • a seed layer 12 is formed on a surface of the substrate 11 .
  • the seed layer 12 is produced by performing a depositing process to form a metal film on the surface of the substrate 11 .
  • the depositing process is a sputtering process or an evaporation process. More preferably, the depositing process is a sputtering process.
  • the seed layer 12 has a good electrical property and has good adsorption to the substrate 11 .
  • the seed layer 12 may be used as an interface for connecting the non-metallic substrate 11 and a conductive layer in a subsequent electroplating process. That is, the seed layer 12 may be used as a start layer of the subsequent electroplating process.
  • the arrangement of the seed layer 12 may increase the strength and electrical property of the microstructure. Moreover, the thickness of the seed layer 12 is in the range between 5 nm and 100 nm. It is noted that the thickness of the seed layer 12 may be varied according to the practical requirements.
  • the seed layer 12 is made of metal or metal alloy.
  • An example of the seed layer 12 includes but is not limited to a Cr/Au metal film, a Ti/Au metal film, a Ti/Cu metal film, a Cu/Cu metal film or a Ti—W/Au metal film.
  • a photoresist layer 13 is formed on a surface of the seed layer 12 .
  • a photolithography and etching process is performed to form a trench 14 in the photoresist layer 13 , so that a portion of the seed layer 12 is exposed. That is, by the photolithography and etching process, a predetermined photomask pattern is transferred to the photoresist layer 13 , and the trench 14 is formed in the photoresist layer 13 .
  • the photoresist layer 13 is a wet film photoresist layer or a dry film photoresist layer, which is coated or attached on the surface of the seed layer 12 .
  • the photoresist material of the photoresist layer 13 may be a positive-type photoresist material or a negative-type photoresist material.
  • the applications and principles of the positive-type photoresist material or the negative-type photoresist material are well-known to those skilled in the art, and are not redundantly described herein.
  • the width and/or depth of the trench 14 may be adjusted.
  • the width of the trench 14 is in the range between 1 ⁇ m and 20 ⁇ m, preferably in the range between 1 ⁇ m and 5 ⁇ m, and more preferably smaller than 3 ⁇ m.
  • the depth of the trench 14 is in the range between 0.1 ⁇ m and 20 ⁇ m, and preferably in the range between 0.1 ⁇ m and 2 ⁇ m.
  • an electroplating process is performed to fill a conductive layer 15 into the trench 14 .
  • the conductive layer 15 is in contact with the portion of the seed layer 12 that is exposed to the bottom of the trench 14 . Since the conductive layer 15 is filled into the trench 14 by the electroplating process, the formation of the conductive layer 15 is fast and the thickness of the conductive layer 15 is easily controlled. Moreover, since it is not necessary to further treat the conductive layer 15 , the fabricating procedures are simplified.
  • the material of the conductive layer 15 is selected from copper, gold, silver, aluminum, tungsten, iron, nickel, chromium, titanium, molybdenum, indium, tin, or a combination thereof.
  • the thickness of the conductive layer 15 is in the range between 0.1 ⁇ m and 20 ⁇ m, preferably in the range between 0.1 ⁇ m and 2 ⁇ m, and more preferably in the range between 0.1 ⁇ m and 0.5 ⁇ m.
  • the photoresist layer 13 and the portion of the seed layer 12 uncovered by the conductive layer 15 are removed. Consequently, a metal line microstructure 16 is produced.
  • the photoresist layer 13 is the wet film photoresist layer
  • the photoresist layer 13 may be removed by an etching process.
  • the photoresist layer 13 is the dry film photoresist layer
  • the photoresist layer 13 may be removed by a stripping process.
  • the portion of the seed layer 12 uncovered by the conductive layer 15 is removed by an etching process, but is not limited thereto.
  • the line width of the metal line microstructure 16 is substantially equal to the width of the trench 14 . That is, the line width of the metal line microstructure 16 is in the range between 1 ⁇ m and 20 ⁇ m, preferably in the range between 1 ⁇ m and 5 ⁇ m, and more preferably smaller than 3 ⁇ m. In case that the line width of the metal line microstructure 16 is controlled to be in the range between 1 ⁇ m and 5 ⁇ m (more preferably smaller than 3 ⁇ m) according to the width of the trench 14 , when the metal line microstructure 16 is applied to the metal line (or metal mesh) of a visible touch zone of a touch panel, the transmittance and the invisibility of the metal line are both enhanced.
  • the metal line microstructure 16 may be applied to the metal line of the non-touch zone of the touch panel.
  • the metal line microstructure 16 may be used as the wiring part on the peripheral region of touch panel.
  • the height of the metal line microstructure 16 is substantially equal to the depth of the trench 14 (e.g. in the range between 0.1 ⁇ m and 20 ⁇ m). The height of the metal line microstructure 16 may be determined according to the requirements of the impedance value, thereby increasing the stability of the metal line.
  • FIGS. 3A ⁇ 3F are schematic cross-sectional views illustrating a method of manufacturing microstructures of metal lines according to a second embodiment of the present invention.
  • FIG. 4 is a flowchart illustrating the method of manufacturing microstructures of metal lines according to the second embodiment of the present invention.
  • a substrate 11 is provided.
  • the substrate 11 is a transparent substrate, a flexible substrate or a flexible transparent substrate.
  • the thickness of the substrate 11 is in the range between 20 ⁇ m and 800 ⁇ m.
  • the substrate 11 is made of polyethylene terephthalate (PET), polyetherimide (PEI), polyphenylensulfone (PPSU), polyimide (PI), polyethylene naphthalate (PEN), cyclic olefin copolymer (COC), liquid crystal polymer (LCP), glass or a combination thereof.
  • the substrate 11 is the flexible transparent substrate made of polyethylene terephthalate (PET). Consequently, the substrate 11 has higher impact resistance, lower brittleness and higher transmittance.
  • a seed layer 12 is formed on a surface of the substrate 11 .
  • the seed layer 12 is produced by performing a depositing process to form a metal film on the surface of the substrate 11 .
  • the depositing process is a sputtering process or an evaporation process. More preferably, the depositing process is a sputtering process.
  • the seed layer 12 has a good electrical property and has good adsorption to the substrate 11 .
  • the seed layer 12 may be used as an interface for connecting the non-metallic substrate 11 and a conductive layer in a subsequent electroplating process. That is, the seed layer 12 may be used as a start layer of the subsequent electroplating process.
  • the arrangement of the seed layer 12 may increase the strength and electrical property of the microstructure. Moreover, the thickness of the seed layer 12 is in the range between 5 nm and 100 nm. It is noted that the thickness of the seed layer 12 may be varied according to the practical requirements.
  • the seed layer 12 is made of metal or metal alloy.
  • An example of the seed layer 12 includes but is not limited to a Cr/Au metal film, a Ti/Au metal film, a Ti/Cu metal film, a Cu/Cu metal film or a Ti—W/Au metal film.
  • a photoresist layer 13 is formed on a surface of the seed layer 12 .
  • a photolithography and etching process is performed to form a trench 14 in the photoresist layer 13 , so that a portion of the seed layer 12 is exposed. That is, by the photolithography and etching process, a predetermined photomask pattern is transferred to the photoresist layer 13 , and the trench 14 is formed in the photoresist layer 13 .
  • the photoresist layer 13 is a wet film photoresist layer or a dry film photoresist layer, which is coated or attached on the surface of the seed layer 12 .
  • the photoresist material of the photoresist layer 13 may be a positive-type photoresist material or a negative-type photoresist material.
  • the applications and principles of the positive-type photoresist material or the negative-type photoresist material are well-known to those skilled in the art, and are not redundantly described herein.
  • the width and/or depth of the trench 14 may be adjusted.
  • the width of the trench 14 is in the range between 1 ⁇ m and 20 ⁇ m, preferably in the range between 1 ⁇ m and 5 ⁇ m, and more preferably smaller than 3 ⁇ m.
  • the depth of the trench 14 is in the range between 0.1 ⁇ m and 20 ⁇ m, and preferably in the range between 0.1 ⁇ m and 2 ⁇ m.
  • an electroplating process is performed to fill a conductive layer 15 into the trench 14 .
  • the conductive layer 15 is in contact with the portion of the seed layer 12 that is exposed to the bottom of the trench 14 . Since the conductive layer 15 is filled into the trench 14 by the electroplating process, the formation of the conductive layer 15 is fast and the thickness of the conductive layer 15 is easily controlled. Moreover, since it is not necessary to further treat the conductive layer 15 , the fabricating procedures are simplified.
  • the material of the conductive layer 15 is selected from copper, gold, silver, aluminum, tungsten, iron, nickel, chromium, titanium, molybdenum, indium, tin, or a combination thereof.
  • the thickness of the conductive layer 15 is in the range between 0.1 ⁇ m and 20 ⁇ m, preferably in the range between 0.1 ⁇ m and 2 ⁇ m, and more preferably in the range between 0.1 ⁇ m and 0.5 ⁇ m.
  • an anti-oxidation layer 17 is filled into the trench 14 and formed on the conductive layer 15 .
  • the anti-oxidation layer 17 is an anti-oxidation metal layer.
  • the anti-oxidation layer 17 may contain phenolic resin, photosensitive compounds, organic colored polymer dyes, inorganic colored dyes and solvent, wherein the inorganic colored dyes contains metal components.
  • the anti-oxidation layer 17 may be black, but is not limited thereto. The arrangement of the anti-oxidation layer 17 may protect the conductive layer 15 , prevent oxidation of the conductive layer 15 and avoid the color change of the metal line. Consequently, the invisibility of the metal line is enhanced.
  • the photoresist layer 13 and the portion of the seed layer 12 uncovered by the conductive layer 15 are removed. Consequently, a metal line microstructure 18 is produced.
  • the photoresist layer 13 is the wet film photoresist layer
  • the photoresist layer 13 may be removed by an etching process.
  • the photoresist layer 13 is the dry film photoresist layer
  • the photoresist layer 13 may be removed by a stripping process.
  • the portion of the seed layer 12 uncovered by the conductive layer 15 is removed by an etching process, but is not limited thereto.
  • the line width of the metal line microstructure 18 is substantially equal to the width of the trench 14 . That is, the line width of the metal line microstructure 18 is in the range between 1 ⁇ m and 20 ⁇ m, preferably in the range between 1 ⁇ m and 5 ⁇ m, and more preferably smaller than 3 ⁇ m. In case that the line width of the metal line microstructure 18 is controlled to be in the range between 1 ⁇ m and 5 ⁇ m (more preferably smaller than 3 ⁇ m) according to the width of the trench 14 , when the metal line microstructure 18 is applied to the metal line (or metal mesh) of a visible touch zone of a touch panel, the transmittance and the invisibility of the metal line are both enhanced.
  • the metal line microstructure 18 may be applied to the metal line of the non-touch zone of the touch panel. In other words, the metal line microstructure 18 may be used as the wiring part on the peripheral region of touch panel.
  • the height of the metal line microstructure 18 is substantially equal to the depth of the trench 14 (e.g. in the range between 0.1 ⁇ m and 20 ⁇ m). The height of the metal line microstructure 18 may be determined according to the requirements of the impedance value, thereby increasing the stability of the metal line.
  • FIGS. 5A ⁇ 5E are schematic cross-sectional views illustrating a method of manufacturing microstructures of metal lines according to a third embodiment of the present invention.
  • FIG. 6 is a flowchart illustrating the method of manufacturing microstructures of metal lines according to the third embodiment of the present invention.
  • a substrate 31 is provided.
  • the substrate 31 is a transparent substrate, a flexible substrate or a flexible transparent substrate.
  • the thickness of the substrate 31 is in the range between 20 ⁇ m and 800 ⁇ m.
  • the substrate 31 is made of polyethylene terephthalate (PET), polyetherimide (PEI), polyphenylensulfone (PPSU), polyimide (PI), polyethylene naphthalate (PEN), cyclic olefin copolymer (COC), liquid crystal polymer (LCP), glass or a combination thereof.
  • the substrate 31 is the flexible transparent substrate made of polyethylene terephthalate (PET). Consequently, the substrate 31 has higher impact resistance, lower brittleness and higher transmittance.
  • a seed layer 32 is formed on a surface of the substrate 31 .
  • the seed layer 32 is produced by performing a depositing process to form a metal film on the surface of the substrate 31 .
  • the depositing process is a sputtering process or an evaporation process. More preferably, the depositing process is a sputtering process.
  • the seed layer 32 has a good electrical property and has good adsorption to the substrate 31 .
  • the seed layer 32 may be used as an interface for connecting the non-metallic substrate 31 and a conductive layer in a subsequent electroplating process.
  • the seed layer 32 may be used as a start layer of the subsequent electroplating process.
  • the arrangement of the seed layer 32 may increase the strength and electrical property of the microstructure.
  • the thickness of the seed layer 32 is in the range between 5 nm and 100 nm. It is noted that the thickness of the seed layer 32 may be varied according to the practical requirements.
  • the seed layer 32 is made of metal or metal alloy.
  • An example of the seed layer 32 includes but is not limited to a Cr/Au metal film, a Ti/Au metal film, a Ti/Cu metal film, a Cu/Cu metal film or a Ti—W/Au metal film.
  • a photoresist layer 33 is formed on a surface of the seed layer 32 .
  • a photolithography and etching process is performed to form a first trench 34 and a second trench 35 in the photoresist layer 33 , so that a portion of the seed layer 32 is exposed. That is, by the photolithography and etching process, a predetermined photomask pattern is transferred to the photoresist layer 33 , and the first trench 34 and the second trench 35 are formed in the photoresist layer 33 .
  • the photoresist layer 33 is a wet film photoresist layer or a dry film photoresist layer, which is coated or attached on the surface of the seed layer 32 .
  • the photoresist material of the photoresist layer 33 may be a positive-type photoresist material or a negative-type photoresist material.
  • the applications and principles of the positive-type photoresist material or the negative-type photoresist material are well-known to those skilled in the art, and are not redundantly described herein.
  • the widths and/or depths of the first trench 34 and the second trench 35 may be adjusted.
  • the first trench 34 has a first width W 1 and a specified depth.
  • the second trench 35 has a second width W 2 and the specified depth.
  • the second width W 2 is larger than the first width W 1 .
  • each of the first trench 34 and the second trench 35 is in the range between 1 ⁇ m and 20 ⁇ m.
  • the first width W 1 is in the range between 1 ⁇ m and 5 ⁇ m. More preferably, the first width W 1 is smaller than 3 ⁇ m.
  • the second width W 2 is in the range between 5 ⁇ m and 20 ⁇ m.
  • the specified depth is in the range between 0.1 ⁇ m and 20 ⁇ m, and preferably in the range between 0.1 ⁇ m and 2 ⁇ m.
  • an electroplating process is performed to fill conductive layers 35 and 36 into the first trench 34 and the second trench 35 , respectively.
  • the conductive layer 36 is in contact with the portion of the seed layer 32 that is exposed to the bottom of the first trench 34 .
  • the conductive layer 37 is in contact with the portion of the seed layer 32 that is exposed to the bottom of the second trench 35 . Since the conductive layers 36 and 37 are filled into first trench 34 and the second trench 35 by the electroplating process, the formation of the conductive layers 36 and 37 will be fast and the thickness of the conductive layers 36 and 37 can be easily controlled. Moreover, since it is not necessary to further treat the conductive layers 36 and 37 , the fabricating procedures are simplified.
  • each of the material of the conductive layer 36 and the material of the conductive layer 37 may be identical or different.
  • each of the material of the conductive layer 36 and the material of the conductive layer 37 is selected from copper, gold, silver, aluminum, tungsten, iron, nickel, chromium, titanium, molybdenum, indium, tin, or a combination thereof.
  • the thickness of the each of the conductive layers 36 and 37 is in the range between 0.1 ⁇ m and 20 ⁇ m, preferably in the range between 0.1 ⁇ m and 2 ⁇ m, and more preferably in the range between 0.1 ⁇ m and 0.5 ⁇ m.
  • the photoresist layer 33 and the portion of the seed layer 32 uncovered by the conductive layers 36 and 37 are removed. Consequently, a first metal line microstructure 38 and a second metal line microstructure 39 are produced.
  • the photoresist layer 33 is the wet film photoresist layer
  • the photoresist layer 33 may be removed by an etching process.
  • the photoresist layer 33 is the dry film photoresist layer
  • the photoresist layer 33 may be removed by a stripping process.
  • the line width of the first metal line microstructure 38 is substantially equal to the first width W 1 of the first trench 34
  • the line width of the second metal line microstructure 39 is substantially equal to the second width W 2 of the second trench 35 . That is, the line width of each of the first metal line microstructure 38 and the second metal line microstructure 39 is in the range between 1 ⁇ m and 20 ⁇ m, preferably in the range between 1 ⁇ m and 5 ⁇ m, and more preferably smaller than 3 ⁇ m.
  • the line width of the first metal line microstructure 38 is controlled to be in the range between 1 ⁇ m and 5 ⁇ m (more preferably smaller than 3 ⁇ m) according to the width of the trench 14 , when the first metal line microstructure 38 is applied to the metal line (or metal mesh) of a visible touch zone of a touch panel, the transmittance and the invisibility of the metal line are both enhanced.
  • the line width of the second metal line microstructure 39 is controlled to be in the range between 1 ⁇ m and 20 ⁇ m (more preferably in the range between 5 ⁇ m and 20 ⁇ m)
  • the second metal line microstructure 39 may be applied to the metal line of the non-touch zone of the touch panel.
  • the second metal line microstructure 39 may be used as the wiring part on the peripheral region of touch panel.
  • the height of the first metal line microstructure 38 is substantially equal to the depth of the first trench 34 (e.g. in the range between 0.1 ⁇ m and 20 ⁇ m), and the height of the second metal line microstructure 39 is substantially equal to the depth of the second trench 35 (e.g. in the range between 0.1 ⁇ m and 20 ⁇ m).
  • the height of the first metal line microstructure 38 and the height of the second metal line microstructure 39 may be determined according to the requirements of the impedance value, thereby increasing the stability of the metal line.
  • FIG. 7 schematically illustrates the metal lines formed by the manufacturing method according to the third embodiment of the present invention.
  • the first metal line microstructure 38 and the second metal line microstructure 39 are located at the visible touch zone and the non-touch zone of the touch panel 1 , respectively.
  • the line width of the first metal line microstructure 38 is controlled to be in the range between 1 ⁇ m and 5 ⁇ m (more preferably smaller than 3 ⁇ m). Consequently, the line width is tiny, and the transmittance and the invisibility of the metal line are both enhanced.
  • the line width of the second metal line microstructure 39 is controlled to be in the range between 5 ⁇ m and 20 ⁇ m. Consequently, the second metal line microstructure 39 may be used as the wiring part on the peripheral region of touch panel 1 .
  • the first metal line microstructure 38 and the second metal line microstructure 39 may be formed on the substrate in the same fabricating step.
  • the first metal line microstructure 38 and the second metal line microstructure 39 may be used as the metal line of the visible touch zone and the wiring part of the non-touch zone of the touch panel 1 , respectively. Consequently, the fabricating procedures of the touch panel 1 are simplified, and the fabricating cost of the touch panel 1 is reduced.
  • the present invention provides a method of manufacturing microstructures of metal lines.
  • the metal line is thinner, the fabricating cost is reduced, and the transmittance and the invisibility of the metal line are both enhanced.
  • the line width of the metal line can be precisely controlled to be smaller than 5 ⁇ m, the yield of the product is increased, and the oxidation of the metal line is minimized.
  • the metal line of the visible touch zone and the wiring part of the non-touch zone of the touch panel can be simultaneously formed on the substrate in the same fabricating step, the fabricating procedures of the touch panel are simplified, and the fabricating cost of the touch panel is reduced.

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrochemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • General Chemical & Material Sciences (AREA)
  • Mechanical Engineering (AREA)
  • Laminated Bodies (AREA)
US14/329,009 2014-05-28 2014-07-11 Method of manufacturing microstructures of metal lines Abandoned US20150345042A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
TW103118566 2014-05-28
TW103118566A TW201545215A (zh) 2014-05-28 2014-05-28 金屬線路微結構之製法

Publications (1)

Publication Number Publication Date
US20150345042A1 true US20150345042A1 (en) 2015-12-03

Family

ID=54701081

Family Applications (1)

Application Number Title Priority Date Filing Date
US14/329,009 Abandoned US20150345042A1 (en) 2014-05-28 2014-07-11 Method of manufacturing microstructures of metal lines

Country Status (4)

Country Link
US (1) US20150345042A1 (ko)
JP (1) JP2015225650A (ko)
KR (1) KR20150136973A (ko)
TW (1) TW201545215A (ko)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106406628A (zh) * 2016-11-17 2017-02-15 武汉华星光电技术有限公司 触摸屏及触摸屏的制备方法
CN114300356A (zh) * 2021-12-07 2022-04-08 华东光电集成器件研究所 一种用于雪崩二极管的微结构金属引脚制备方法
US11424227B2 (en) * 2019-07-15 2022-08-23 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel, display module, and display device

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018047608A1 (ja) * 2016-09-08 2018-03-15 富士フイルム株式会社 導電性フィルムの製造方法、導電性フィルム、タッチパネルセンサー、アンテナ、指紋認証部、および、タッチパネル
KR20190089206A (ko) 2017-02-27 2019-07-30 후지필름 가부시키가이샤 도전성 필름의 제조 방법, 및 도전성 필름
WO2019065782A1 (ja) * 2017-09-29 2019-04-04 富士フイルム株式会社 導電性フィルム、タッチパネルセンサー、タッチパネル、導電性フィルムの製造方法
WO2020073157A1 (zh) * 2018-10-08 2020-04-16 日本光电子化学株式会社 第二电极线路层的制作方法
WO2020137178A1 (ja) * 2018-12-27 2020-07-02 パナソニックIpマネジメント株式会社 フィルム体及びタッチセンサとタッチセンサの検査方法、製造方法
CN110021461B (zh) * 2019-03-06 2020-05-12 苏州蓝沛光电科技有限公司 透明导电膜结构的制作方法
CN112584623A (zh) * 2019-09-27 2021-03-30 恒煦电子材料股份有限公司 电镀金属导线的制作方法
WO2021171718A1 (ja) 2020-02-28 2021-09-02 富士フイルム株式会社 導電性パターンの製造方法、タッチセンサー、電磁波シールド、アンテナ、配線基板、導電性加熱素子、及び構造体
CN111355026B (zh) * 2020-03-03 2023-02-03 安徽精卓光显技术有限责任公司 透明天线及其制作方法、电子设备

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4927505A (en) * 1988-07-05 1990-05-22 Motorola Inc. Metallization scheme providing adhesion and barrier properties
US7541275B2 (en) * 2004-04-21 2009-06-02 Texas Instruments Incorporated Method for manufacturing an interconnect
US20110101532A1 (en) * 2009-11-03 2011-05-05 Infineon Technologies Ag Device fabricated using an electroplating process
US20120009777A1 (en) * 2010-07-07 2012-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. UBM Etching Methods
US20120129333A1 (en) * 2010-11-24 2012-05-24 Samsung Electronics Co., Ltd. Method for manufacturing semiconductor package and semiconductor package manufactured using the same
US20140174791A1 (en) * 2012-12-26 2014-06-26 Unimicron Technology Corp. Circuit board and manufacturing method thereof
US9190325B2 (en) * 2010-09-30 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. TSV formation
US9230885B2 (en) * 2010-09-30 2016-01-05 Infineon Technologies Ag Semiconductor structure and method for making same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3038953B2 (ja) * 1991-02-28 2000-05-08 ソニー株式会社 配線形成方法
JP2001217248A (ja) * 2000-02-04 2001-08-10 Nec Corp 半導体装置の配線形成方法
JP2003209415A (ja) * 2002-01-11 2003-07-25 Murata Mfg Co Ltd 金属配線の形成方法
KR100570856B1 (ko) * 2003-04-02 2006-04-12 삼성전기주식회사 병렬적 다층 인쇄회로기판 제조 방법
JP5047504B2 (ja) * 2005-02-05 2012-10-10 三星電子株式会社 ビアキャッピング保護膜を使用する半導体素子のデュアルダマシン配線の製造方法
JP4738959B2 (ja) * 2005-09-28 2011-08-03 東芝モバイルディスプレイ株式会社 配線構造体の形成方法
JP5145671B2 (ja) * 2006-08-24 2013-02-20 凸版印刷株式会社 電磁波シールド部材の製造方法及び電磁波シールド部材並びに画像表示装置
JP2010040693A (ja) * 2008-08-04 2010-02-18 Nippon Telegr & Teleph Corp <Ntt> パターン形成方法
KR20140057047A (ko) * 2012-11-02 2014-05-12 삼성전기주식회사 터치 스크린 패널 및 이를 포함하는 휴대용 전자 장치

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4927505A (en) * 1988-07-05 1990-05-22 Motorola Inc. Metallization scheme providing adhesion and barrier properties
US7541275B2 (en) * 2004-04-21 2009-06-02 Texas Instruments Incorporated Method for manufacturing an interconnect
US20110101532A1 (en) * 2009-11-03 2011-05-05 Infineon Technologies Ag Device fabricated using an electroplating process
US20120009777A1 (en) * 2010-07-07 2012-01-12 Taiwan Semiconductor Manufacturing Company, Ltd. UBM Etching Methods
US9190325B2 (en) * 2010-09-30 2015-11-17 Taiwan Semiconductor Manufacturing Company, Ltd. TSV formation
US9230885B2 (en) * 2010-09-30 2016-01-05 Infineon Technologies Ag Semiconductor structure and method for making same
US20120129333A1 (en) * 2010-11-24 2012-05-24 Samsung Electronics Co., Ltd. Method for manufacturing semiconductor package and semiconductor package manufactured using the same
US20140174791A1 (en) * 2012-12-26 2014-06-26 Unimicron Technology Corp. Circuit board and manufacturing method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106406628A (zh) * 2016-11-17 2017-02-15 武汉华星光电技术有限公司 触摸屏及触摸屏的制备方法
US11424227B2 (en) * 2019-07-15 2022-08-23 Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd. Display panel, display module, and display device
CN114300356A (zh) * 2021-12-07 2022-04-08 华东光电集成器件研究所 一种用于雪崩二极管的微结构金属引脚制备方法

Also Published As

Publication number Publication date
KR20150136973A (ko) 2015-12-08
JP2015225650A (ja) 2015-12-14
TW201545215A (zh) 2015-12-01

Similar Documents

Publication Publication Date Title
US20150345042A1 (en) Method of manufacturing microstructures of metal lines
US9360969B2 (en) Method of fabricating capacitive touch-screen panel
US9217890B2 (en) Touch screen panel and method for manufacturing the same
JP4862969B1 (ja) 透明導電性素子、入力装置、電子機器および透明導電性素子作製用原盤
CN104571667B (zh) 触控面板及其制造方法
US20140152588A1 (en) Flexible touch screen panel and fabricating method thereof
US20150212617A1 (en) Touch sensor
US11526241B2 (en) Flexible substrate, touch display substrate, manufacturing methods thereof, and touch display device
EP3457438A1 (en) Display substrate, preparation method therefor, and display device
KR20150103612A (ko) 디지타이저
US20150346874A1 (en) Touch sensor
CN102171633A (zh) 触摸面板的制造方法及使用该方法制造的触摸面板
US20140104227A1 (en) Touch panel and method for manufacturing the same
TW201512958A (zh) 觸感電極及觸控螢幕面板
KR20130128928A (ko) 터치 패널 및 전극 형성 방법
KR101241632B1 (ko) 터치 패널의 제조 방법
JP2014178718A (ja) タッチパネルおよびタッチパネル付き表示装置
CN106471453B (zh) 厚膜图案结构及其形成方法
JP6405298B2 (ja) 静電容量式センサ、タッチパネルおよび電子機器
US20150090578A1 (en) Touch panel and method of manufacturing the same
KR101573377B1 (ko) 메쉬 형태의 그라운드 전극을 갖는 터치패널 및 그 제조방법
JP2015210706A (ja) 透明電極静電容量センサ
KR102175779B1 (ko) 전극 부재 및 이를 포함하는 터치 윈도우
KR102238822B1 (ko) 터치 윈도우
KR102251874B1 (ko) 터치 윈도우

Legal Events

Date Code Title Description
AS Assignment

Owner name: JTOUCH CORPORATION, TAIWAN

Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:YEH, YU-CHOU;HU, CHIH-MING;TSUI, CHIU-CHENG;SIGNING DATES FROM 20140625 TO 20140630;REEL/FRAME:033295/0465

STCB Information on status: application discontinuation

Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION