WO2020073157A1 - 第二电极线路层的制作方法 - Google Patents

第二电极线路层的制作方法 Download PDF

Info

Publication number
WO2020073157A1
WO2020073157A1 PCT/CN2018/109292 CN2018109292W WO2020073157A1 WO 2020073157 A1 WO2020073157 A1 WO 2020073157A1 CN 2018109292 W CN2018109292 W CN 2018109292W WO 2020073157 A1 WO2020073157 A1 WO 2020073157A1
Authority
WO
WIPO (PCT)
Prior art keywords
circuit layer
electrode circuit
photoresist
electrode
layer
Prior art date
Application number
PCT/CN2018/109292
Other languages
English (en)
French (fr)
Inventor
许铭案
林佳慧
许睿哲
井川昭彦
Original Assignee
日本光电子化学株式会社
许铭案
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本光电子化学株式会社, 许铭案 filed Critical 日本光电子化学株式会社
Priority to PCT/CN2018/109292 priority Critical patent/WO2020073157A1/zh
Publication of WO2020073157A1 publication Critical patent/WO2020073157A1/zh

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/01Input arrangements or combined input and output arrangements for interaction between user and computer
    • G06F3/03Arrangements for converting the position or the displacement of a member into a coded form
    • G06F3/041Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
    • G06F3/044Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means

Definitions

  • the invention relates to a conductive circuit layer, in particular to a method for manufacturing a second electrode circuit layer.
  • Nano silver has excellent conductivity and light transmission, and also performs excellent in optical, EMI and heat transfer. Therefore, nano silver can be widely used in touch panels, flexible displays, LED / OLED, solar cells and EMI industries.
  • the nano silver used on the touch screen is mainly used as a transparent conductive film patterned on the capacitive touch screen.
  • the preparation process of the patterned transparent conductive film includes laser etching, screen printing, yellow light etching, etc., wherein the yellow light etching needs to use a specific etching solution.
  • etching solutions specifically for nano silver conductive films or nano silver conductive glasses are etching solutions specifically for nano silver conductive films or nano silver conductive glasses.
  • Chinese Patent Publication No. CN103215592B discloses "etching paste and its application and method for etching nano silver conductive material using etching paste”
  • Patent Publication No. CN104805441B discloses "etching paste and its application and etching nano silver conductive using etching paste Materials Method ", in addition, Patent Publication No.
  • CN105441949A discloses" nano-silver etching solution, method for preparing patterned nano silver conductive film and its touch sensor ", and Patent Publication No. CN107385444A discloses” a nano silver conductive film Etching method ".
  • the above existing technology for nano silver solves the problem of nano silver etching, and further realizes a patterned nano silver transparent conductive film.
  • it does not solve the problem of line connection between the touch screen and the control circuit.
  • the current touch screen has been designed with a very narrow border, and the part of the border must be assembled with the nano-silver transparent conductive film of the touch screen and then connected to the control circuit with copper wire (usually a flexible board connector) .
  • copper wire usually a flexible board connector
  • the nano-silver etching solution may affect the copper wire, which may cause adverse etching side effects.
  • the immersion etching solution may also intensify the copper etching due to the battery effect, which may lead to an undesirable result of the intensified copper wire etching.
  • the second electrode circuit layer representing nano-silver can be fabricated on the first electrode circuit layer, and such adverse side effects of etching can be prevented. In this way, the excellent circuit structure of the overlapping circuit structure in which the second electrode circuit layer is formed on the first electrode circuit layer can be improved, thereby improving the reliability of the product.
  • the present invention provides a method for making the second electrode circuit layer on the first electrode circuit layer.
  • the method has a special technology that requires no etching solution, simple process, high product structure rate and low process cost efficacy.
  • a method for manufacturing a second electrode circuit layer includes: forming a first electrode circuit layer on a substrate; forming a photoresist layer on the substrate having the first electrode circuit layer; and using a photomask Laminating on the substrate; exposing and developing the photoresist layer, removing the unexposed photoresist layer to form a lift-off photoresist circuit layer, thereby forming a pattern space; applying the second electrode circuit layer material Forming a second electrode circuit layer in a layered manner on the lift-off photoresist circuit layer and the first electrode circuit layer and the substrate after removing the unexposed photoresist layer; removing the lift-off photoresist The circuit layer and the second electrode circuit layer formed on the lift-off photoresist circuit layer to retain the second electrode circuit layer formed on the first electrode circuit layer and the substrate.
  • FIG. 1A is a specific embodiment of a product manufactured by applying the manufacturing method of the second electrode circuit layer of the present invention.
  • FIG. 2 is a manufacturing flowchart of the second electrode circuit layer shown in FIG. 1C.
  • 3A-3F are schematic cross-sectional views of the manufacturing process for manufacturing the second electrode circuit layer shown in FIG. 1C.
  • the present invention uses the technical means of the photoresist lift-off process to provide a method for making the second electrode circuit layer on the first electrode circuit layer.
  • the method has no etching solution, the process is simple, The special technical effect of high product structure rate and low process cost.
  • FIG. 1A discloses a specific embodiment of the substrate manufactured by the method for manufacturing the second electrode circuit layer of the present invention, which shows a substrate 10 representing the second electrode circuit region 11
  • the connection structure of the transparent conductive film and the control circuit of the first electrode circuit layer uses the touch panel as an example for description.
  • the second electrode circuit area 11 in the center of the touch panel is covered with the transparent conductive film of the second electrode circuit layer, and the frame portion is electrically connected to the transparent conductive film by the first electrode circuit layer composed of multiple edge traces.
  • the form of electrical connection is shown in FIG. 1B.
  • FIG. 1B is an enlarged view of the portion 2 shown in FIG. 1A to clearly show a connection method of the transparent conductive film on the substrate and the control circuit.
  • the first electrode circuit 31, 32, 33 all have a portion overlapping with the second electrode circuit layer to form a good electrical connection.
  • the second electrodes 211, 212, and 213 the second electrode 211 directly overlaps the first electrode line 33 in the overlap region 22.
  • FIG. 1C is an enlarged schematic view of the portion 2 shown along the A-A cross section in FIG. 1B to clearly show the overlapping structure of the second electrode circuit layer and the first electrode circuit layer on the substrate. Due to the existence of the overlapping region 22, the first electrode circuit layer and the second electrode circuit layer form a good contact, and the second electrode circuit overlapping the first electrode circuit is continuous, and the circuit conductivity is relatively high Good, no noise.
  • FIGS. 3A-3F illustrate a flowchart of the method for manufacturing the second electrode circuit layer of the present invention, including the following steps:
  • Step 101 forming a photoresist layer on a substrate having a first electrode circuit layer.
  • the material of the first electrode circuit layer is one selected from: copper, aluminum, nickel, molybdenum, tungsten, gold, titanium, or any combination of the above alloys.
  • 3A and 3B illustrate step 101, forming a photoresist layer 40 on the substrate 10 having the first electrode lines 31, 32, and 33. Both sides of the first electrode circuit layer have a slope structure, and the thickness is less than 500 nm, preferably the thickness is less than 100 nm.
  • Step 102 Expose and develop the photoresist layer, remove the unexposed photoresist layer to form a lift-off photoresist circuit layer.
  • 3C and 3D illustrate step 102, exposing and developing the photoresist layer 40 to remove the unexposed photoresist layer to form a lift-off photoresist circuit layer.
  • the exposure method is to use the exposure lens 50 to project the UV light 60 on the photomask 70 with a specific pattern space, as shown in FIG. 3C; then, the developer is used to remove the unexposed photoresist layer to form a lift
  • the photoresist layer 41 is separated, thereby forming a pattern space, as shown in FIG. 3D.
  • the lift-off photoresist layer 41 will be slightly inverted trapezoidal.
  • Step 103 forming a second electrode circuit layer on the lifted photoresist circuit layer and the first electrode circuit layer and the substrate after the unexposed photoresist layer is removed.
  • the material of the second electrode circuit layer 20 is one selected from silver, nano silver, copper, gold, and transparent conductive materials.
  • FIG. 3E illustrates step 103 of forming a second electrode circuit layer 20 on the first electrode circuit layer and the substrate 10 after the lifted-off photoresist circuit layer and the unexposed photoresist layer are removed. Since the first electrode wiring 33 has a slope structure, the second electrode wiring layer 20 is continuously covered where it covers the first electrode wiring 33, as shown in FIG. 3E.
  • Step 104 Remove the lift-off photoresist circuit layer and the second electrode circuit layer formed on the lift-off photoresist circuit layer to retain the second electrode formed on the first electrode circuit layer and the substrate Line layer.
  • FIG. 3F illustrates step 104 when using a developer (developer formulation for the exposed photoresist layer, for example, xylene, n-butyl acetate, containing monomethyl ether propylene glycol or its derivative and cyclohexanone or After its derivatives, etc.), the lift-off photoresist circuit layer and the second electrode circuit layer formed on the lift-off photoresist circuit layer can be removed to form a second electrode 211, 212, 213, the second electrode The circuit layer is partially formed on the first electrode circuit layer to constitute the overlap region 22.
  • developer developer formulation for the exposed photoresist layer, for example, xylene, n-butyl acetate, containing monomethyl ether propylene glycol or its derivative and cyclohexanone or After its derivatives
  • an overlapping region 22 is included, which is composed of the second electrode 211 of the second electrode circuit layer and the first electrode circuit 33 to form a double-layer structure, and then the second electrode 211 and the first The electrode circuit 33 forms a good connection.

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Human Computer Interaction (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

本发明公开了一种第二电极线路层的制作方法,包含:形成一光阻层于具有一第一电极线路层的一基板上;对该光阻层进行曝光、显影,移除未被曝光的该光阻层而形成一掀离光阻线路层;形成一第二电极线路层于该掀离光阻线路层以及被移除未被曝光的光阻层后的该第一电极线路层和该基板上;移除该掀离光阻线路层及形成于该掀离光阻线路层上的该第二电极线路层,以保留形成于该第一电极线路层以及该基板上的该第二电极线路层;本第二电极线路层的制作方法具有无须蚀刻液、制程简单、产品结构优良率高、工艺成本低的技术功效。

Description

第二电极线路层的制作方法 技术领域
本发明涉及一种导电线路层,尤其是涉及一种第二电极线路层的制作方法。
背景技术
纳米银具有优越的导电性及透光性,在光学、EMI和热传递方面也同样表现优异。因此,纳米银可广泛应用于触控面板、可挠性显示器、LED/OLED、太阳能电池和EMI产业。
其中,运用在触摸屏上的纳米银,主要是作为电容式触摸屏图案化的透明导电膜。图案化的透明导电膜的制备流程,包括了激光蚀刻、丝网印刷、黄光蚀刻等,其中黄光蚀刻需要采用特定的蚀刻液。目前,已有特别针对纳米银导电膜或纳米银导电玻璃的蚀刻液。例如,中国专利公布号第CN103215592B揭示了“蚀刻膏及其应用与利用蚀刻膏蚀刻纳米银导电材料的方法”,专利公布号第CN104805441B揭示了“蚀刻膏及其应用以及利用蚀刻膏蚀刻纳米银导电材料的方法”,另外专利公布号第CN105441949A揭示了“纳米银蚀刻液、制备图案化的纳米银导电膜的方法及其触控传感器”,专利公布号第CN107385444A揭示了“一种纳米银导电膜的蚀刻方法”。
以上针对纳米银的现有科技,解决了纳米银的蚀刻问题,进而实现了图案化的纳米银透明导电膜。然而,其并未解决在触摸屏与控制电路的线路连接的问题。简而言之,目前的触摸屏已然做到了极窄边框的设计,而边框的部分,必须将触摸屏的纳米银透明导电膜汇集后,以铜线连接到控制电路(一般是采用软板连接器)。以目前的技术而言,只能将纳米银透明导电膜与边框铜导线分开两次以不同的蚀刻制程制作。此制作制程的成本较高,时间花费较多,优良率也会受到影响。此外,纳米银蚀刻液可能会对铜导线造成影响,进而产生不良的蚀刻副作用。并且,在纳米银与铜电极接触时,浸泡蚀刻液还可能因为电池效应而让铜的蚀刻加剧,进而导致不想要的铜线蚀刻加剧的结果。
若能开发一种不需要蚀刻液的制程,即能将代表纳米银的第二电极线路层制作于第一电极线路层之上,并可防止此种不良的蚀刻副作用。如此,可让此种将第二电极线路层制作于第一电极线路层的交叠的线路结构优良率提高,进而提高产品的可靠度。
发明内容
为了达成上述目的,本发明提供了一种可将第二电极线路层制作于第一电极线路层的方法,该方法具有无须蚀刻液、制程简单、产品结构优良率高、工艺成本低的特殊技术功效。
本发明提供的一种第二电极线路层的制作方法,包含:于一基板上形成一第一电极线路 层;于具有该第一电极线路层的基板上形成一光阻层;以一光罩贴合于该基板上;对该光阻层进行曝光、显影,移除未被曝光的该光阻层而形成一掀离光阻线路层,从而形成一图案空间;将第二电极线路层材料以层积方式形成一第二电极线路层于该掀离光阻线路层以及被移除未被曝光的光阻层后的该第一电极线路层和该基板上;移除该掀离光阻线路层及形成于该掀离光阻线路层上的该第二电极线路层,以保留形成于该第一电极线路层以及该基板上的该第二电极线路层。
为让本发明的上述和其他目的、特征、和优点能更明显易懂,下文特举数个较佳实施例,并配合所附图式,作详细说明如下。
附图说明
图1A为应用本发明的第二电极线路层的制作方法所制造的产品的一具体实施例。
图1B-1C为本发明的第二电极线路层的制作方法所制造的产品的具体实施例的部分正面及部分剖面放大示意图。
图2为图1C所示的制作第二电极线路层的制作流程图。
图3A-3F为图1C所示的制作第二电极线路层的制作流程的剖面示意图。
附图中的符号说明:
10基板;11第二电极线路区;2部分;20第二电极线路层;A-A剖面;211第二电极;212第二电极;213第二电极;22交叠区;31第一电极线路;32第一电极线路;33第一电极线路;40光阻层;41掀离光阻层;50曝光镜头;60UV光;70光罩。
具体实施方式
根据本发明的实施例,本发明运用光阻掀离制程的技术手段,提供了一种可将第二电极线路层制作于第一电极线路层的方法,该方法具有无须蚀刻液、制程简单、产品结构优良率高、工艺成本低的特殊技术功效。
首先,请参考图1A所示,其揭露了运用本发明的第二电极线路层的制作方法所制作完成的基板的一具体实施例,其显示了一基板10上代表第二电极线路区11的透明导电膜与第一电极线路层的控制电路的连接构造。本实施例是以触控面板为实施例说明。触控面板中央的第二电极线路区11布满了第二电极线路层的透明导电膜,而边框的部分则由多条边缘走线构成的第一电极线路层与透明导电膜电连接。电连接的形态如图1B所示。
图1B为图1A中所示部分2的放大图,以清楚的显现基板上透明导电膜与控制电路的一种连接方式。第一电极线路层中的第一电极线路31、32、33皆有与第二电极线路层交叠的部分,以形成良好的电连接。其中,第二电极211、212、213当中,第二电极211直接与第一电极线路33交叠于交叠区22。
图1C为图1B中沿A-A剖面所示的部分2的放大示意图,以清楚的显示基板上第二电极线路层与第一电极线路层交叠的构造。由于交叠区22的存在,使得第一电极线路层与第二电极线路层形成良好的接触,并使交叠于第一电极线路上方的第二电极线路为连续性,而使线路导电性较佳,不致产生噪声。
接着,请参考图2并同步参考图3A-3F所示,其说明了本发明的第二电极线路层的制作方法流程图,包含以下的步骤:
步骤101:形成一光阻层于具有一第一电极线路层的一基板上。此第一电极线路层的材料是选自:铜、铝、镍、钼、钨、金、钛或以上任意组合的合金的其中一种。图3A及图3B说明了步骤101,于具有第一电极线路31、32、33的基板10上,形成一光阻层40。第一电极线路层两侧皆具有斜坡构造,且厚度小于500nm,较佳的其厚度小于100nm。
步骤102:对该光阻层进行曝光、显影,移除未被曝光的该光阻层而形成一掀离光阻线路层。图3C及图3D说明步骤102,对光阻层40进行曝光、显影,移除未被曝光的该光阻层而形成一掀离光阻线路层。该曝光方式是利用曝光镜头50将UV光60投射在具有特定图案空间的光罩70上,如图3C所示;接着,再以显影剂移除未被曝光的该光阻层而形成一掀离光阻层41,从而形成一图案空间,如图3D所示。掀离光阻层41会略呈倒梯形。
步骤103:形成一第二电极线路层于该掀离光阻线路层以及被移除未被曝光的光阻层后的该第一电极线路层和该基板上。第二电极线路层20的材料是选自:银、纳米银、铜、金、透明导电材料的其中一种。图3E说明步骤103,形成第二电极线路层20于该掀离光阻线路层以及被移除未被曝光的光阻层后的该第一电极线路层和该基板10上。第一电极线路33因为具有斜坡构造,所以第二电极线路层20在与第一电极线路33覆盖处得以连续覆盖,如图3E所示。
步骤104:移除该掀离光阻线路层及形成于该掀离光阻线路层上的该第二电极线路层,以保留形成于该第一电极线路层以及该基板上的该第二电极线路层。图3F说明步骤104,当使用显影剂(针对已经曝光的掀离光阻层的显影剂配方,例如,二甲苯、醋酸正丁酯、包含单甲基醚丙二醇或其衍生物与环己酮或其衍生物等)后,即可移除掀离光阻线路层及形成于该掀离光阻线路层上的第二电极线路层,以形成一第二电极211、212、213,第二电极线路层部分形成于第一电极线路层上而构成了交叠区22。于是,如图3F所示,包含了交叠区22,其由第二电极线路层的第二电极211与第一电极线路33所共同构成了双层结构,进而使第二电极211与第一电极线路33形成良好的导接。
虽然本发明的技术内容已经以较佳实施例揭露如上,然而其并非用以限定本发明,任何熟悉此技术人员,在不脱离本发明的精神所作些许的更动与润饰,皆应涵盖于本发明的范畴内,因此本发明的保护范围当视所附的申请专利范围所界定的为准。

Claims (7)

  1. 一种第二电极线路层的制作方法,其特征在于,包括以下步骤:
    形成一光阻层于具有一第一电极线路层的一基板上;
    对该光阻层进行曝光、显影,移除未被曝光的该光阻层而形成一掀离光阻线路层;
    形成一第二电极线路层于该掀离光阻线路层以及被移除未被曝光的光阻层后的该第一电极线路层和该基板上;及
    移除该掀离光阻线路层及形成于该掀离光阻线路层上的该第二电极线路层,以保留形成于该第一电极线路层以及该基板上的该第二电极线路层。
  2. 根据权利要求1所述的第二电极线路层的制作方法,其特征在于:该第一电极线路层的材料是选自:铜、铝、镍、钼、钨、金、钛或以上任意组合的合金的其中一种。
  3. 根据权利要求1所述的第二电极线路层的制作方法,其特征在于:该第二电极线路层的材料是选自:银、纳米银、铜、金、透明导电材料的其中一种。
  4. 根据权利要求1所述的第二电极线路层的制作方法,其特征在于:该基板为透明基板。
  5. 根据权利要求4所述的第二电极线路层的制作方法,其特征在于:该透明基板为透明玻璃基板或透明塑料基板。
  6. 根据权利要求1所述的第二电极线路层的制作方法,其特征在于:该第一电极线路层为制作于该基板四周边缘的导线层。
  7. 根据权利要求6所述的第二电极线路层的制作方法,其特征在于:该第二电极线路层为制作于该基板中央的触控电极线路层。
PCT/CN2018/109292 2018-10-08 2018-10-08 第二电极线路层的制作方法 WO2020073157A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
PCT/CN2018/109292 WO2020073157A1 (zh) 2018-10-08 2018-10-08 第二电极线路层的制作方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2018/109292 WO2020073157A1 (zh) 2018-10-08 2018-10-08 第二电极线路层的制作方法

Publications (1)

Publication Number Publication Date
WO2020073157A1 true WO2020073157A1 (zh) 2020-04-16

Family

ID=70164337

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2018/109292 WO2020073157A1 (zh) 2018-10-08 2018-10-08 第二电极线路层的制作方法

Country Status (1)

Country Link
WO (1) WO2020073157A1 (zh)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102279666A (zh) * 2011-08-12 2011-12-14 牧东光电(苏州)有限公司 金属感应布线的触控面板及其制造方法
US20130087441A1 (en) * 2011-10-07 2013-04-11 Samsung Electro-Mechanics Co., Ltd. Touch panel and method of manufacturing the same
CN103384451A (zh) * 2012-05-04 2013-11-06 群康科技(深圳)有限公司 触控面板边缘走线的制作方法、触控面板及触控显示装置
TW201545215A (zh) * 2014-05-28 2015-12-01 Touch Crporation J 金屬線路微結構之製法
CN106909258A (zh) * 2015-12-23 2017-06-30 汉思高电子科技(义乌)有限公司 一种触摸屏功能片引线的结构及其制作方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102279666A (zh) * 2011-08-12 2011-12-14 牧东光电(苏州)有限公司 金属感应布线的触控面板及其制造方法
US20130087441A1 (en) * 2011-10-07 2013-04-11 Samsung Electro-Mechanics Co., Ltd. Touch panel and method of manufacturing the same
CN103384451A (zh) * 2012-05-04 2013-11-06 群康科技(深圳)有限公司 触控面板边缘走线的制作方法、触控面板及触控显示装置
TW201545215A (zh) * 2014-05-28 2015-12-01 Touch Crporation J 金屬線路微結構之製法
CN106909258A (zh) * 2015-12-23 2017-06-30 汉思高电子科技(义乌)有限公司 一种触摸屏功能片引线的结构及其制作方法

Similar Documents

Publication Publication Date Title
JP4601710B1 (ja) 狭額縁タッチ入力シートとその製造方法
TWI692801B (zh) 雙面電極及其圖案化方法
EP3032383B1 (en) Light-transmitting conductive member and patterning method thereof
KR102052165B1 (ko) 터치스크린 패널의 제조방법
WO2018157814A1 (zh) 触控屏的制作方法、触控屏和显示装置
WO2016090896A1 (en) Touch display substrate, fabrication method and touch display device
WO2014190657A1 (zh) 像素单元及其制备方法、阵列基板、显示装置
JP6521534B2 (ja) 薄膜トランジスタとその作製方法、アレイ基板及び表示装置
JP2007199708A5 (zh)
US9483148B2 (en) Method for manufacturing touch substrate
US9645688B2 (en) OGS touch screen substrate and method of manufacturing the same, and related apparatus
US20210405478A1 (en) Array substrate and manufacturing method thereof, and display panel
WO2016192476A1 (zh) 一种阵列基板及其制备方法、显示装置
TWI571912B (zh) 觸控面板邊緣走線的製作方法、具有該邊緣走線的觸控面板及觸控顯示裝置
JP6070675B2 (ja) 透明導電基材の製造方法およびタッチパネルセンサ
CN105446037B (zh) 显示基板及其制作方法、显示器件
JP2011129272A (ja) 両面透明導電膜シートとその製造方法
WO2017012292A1 (zh) 阵列基板及其制备方法、显示面板、显示装置
TW531794B (en) Thin film transistor, method for manufacturing the same and display device including the same
CN105988621A (zh) 一种触摸屏及其制备方法
WO2020073157A1 (zh) 第二电极线路层的制作方法
JPWO2006109585A1 (ja) 導電層を備えた基板、表示装置および導電層を備えた基板の製造方法
WO2018205700A1 (zh) 触摸基板及其制作方法、显示面板及显示装置
KR101066932B1 (ko) 터치패널용 패드의 제조방법 및 이에 의해 제조되는 터치패널용 패드
KR101551859B1 (ko) 금속 레이어를 에칭 레지스트로 이용하는 에칭 방법

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 18936499

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 18936499

Country of ref document: EP

Kind code of ref document: A1