US20050173715A1 - Nitride semiconductor devices and method of their manufacture - Google Patents
Nitride semiconductor devices and method of their manufacture Download PDFInfo
- Publication number
- US20050173715A1 US20050173715A1 US10/514,261 US51426104A US2005173715A1 US 20050173715 A1 US20050173715 A1 US 20050173715A1 US 51426104 A US51426104 A US 51426104A US 2005173715 A1 US2005173715 A1 US 2005173715A1
- Authority
- US
- United States
- Prior art keywords
- film
- substrate
- nitrogen
- semiconductor substrate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Abandoned
Links
Images
Classifications
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
- C30B25/02—Epitaxial-layer growth
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
-
- C—CHEMISTRY; METALLURGY
- C30—CRYSTAL GROWTH
- C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
- C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
- C30B29/10—Inorganic compounds or compositions
- C30B29/40—AIIIBV compounds wherein A is B, Al, Ga, In or Tl and B is N, P, As, Sb or Bi
- C30B29/403—AIII-nitrides
- C30B29/406—Gallium nitride
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02389—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/0242—Crystalline insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02458—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
- H01L21/02661—In-situ cleaning
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/906—Cleaning of wafer as interim step
Definitions
- the present invention relates to nitride semiconductor devices such as light-emitting devices, and to methods of their manufacture; more specifically, the present invention relates to high-quality nitride semiconductor devices excelling in flatness and manufacturable at high yields, and to methods of manufacturing such devices.
- the substrate is annealed with the object of ridding the substrate of contaminants (organic matter, moisture) adhering to it, and defects (scratches, strain, etc.).
- this heating process is performed prior to the epitaxial film growth, the process is called “pretreating,” “preheating,” “cleaning,” “purification,” or simply “annealing.”
- the substrate heating temperature in removing the contaminants and defects has been made at or above the temperature to which the substrate is heated in the deposition process for growing an epitaxial film onto the post-treated substrate (patent documents including Japanese Unexamined Pat. App. Pub. Nos. 2000-174341 and 2000-323752).
- the motivation behind this is that it has taken over from a procedural operation, in methods of manufacturing silicon-based semiconductor devices, in which the substrate temperature for cleaning is made to be at or above the film-deposition temperature of the substrate—with cleaning being stressed, because the higher the substrate heating temperature in pretreating is made, the better cleaning will progress.
- the substrate surface can be cleaned by making the temperature to which the substrate is heated in the pretreating process be at or above the temperature to which the substrate is heated in the film-deposition process.
- An atmosphere from which source-material gas containing the Group 3B (Japanese periodic system) element has been omitted from among the ambient gases that are introduced in the film-deposition operation is generally employed as the annealing atmosphere.
- the reason for this is because nitrogen tends to come loose from the surface part of the substrates, leading to surplus Group 3B element there, which is liable to produce roughness in the surface of a nitride semiconductor substrate. Accordingly, to keep roughness originating in the accumulation of surplus Group 3B element on the substrate surface from occurring, arrangements are made for an atmosphere as just noted that does not contain Group 3B element, and the escape of nitrogen from the substrate is controlled.
- An object of the present invention is to make available nitride-based semiconductor devices, and a method of their manufacture, wherein epitaxial films excelling in flatness and crystallinity can be grown onto nitride semiconductor substrates.
- a method according to the present invention of manufacturing nitride-based semiconductor devices is a method of manufacturing nitride semiconductor devices that are formed onto a semiconductor substrate that is a compound containing a Group 3B element for forming compounds with nitrogen, and nitrogen.
- This manufacturing method includes steps of heating the semiconductor substrate to a film-deposition temperature, supplying to the substrate a film-deposition gas containing a source-material gas for the Group 3B element, together with a nitrogen source-material gas, and epitaxially growing onto the semiconductor substrate a thin film of a compound containing the Group 3B element and nitrogen.
- the method is furnished with a step, in advance of the epitaxial growth step, of heating the semiconductor substrate to a pretreating temperature less than the film-deposition temperature, to clean the surface of the semiconductor substrate.
- the substrate surface is cleaned by heating the substrate to a temperature lower than the substrate-heating temperature in the film deposition process.
- the fact that the substrate heating temperature is comparatively high from the outset in the course of growing a nitride-semiconductor epitaxial film makes it possible to set the pre-heating temperature in the cleaning step to what will guarantee sufficient cleaning action. Satisfactory planarity along the substrate surface can therefore be ensured, and the flatness of the epitaxial film formed on the substrate surface proves to be superior as a result.
- the substrate heating temperature will differ depending on the location of the temperature sensors or temperature gauges furnished in the thin-film formation equipment, or on how the instruments are mounted, it is sufficient that, according to the same temperature indicator within the film-deposition device, the heating temperature during cleaning is lower than the substrate temperature during film deposition—the absolute numerical value of the temperature will not be an issue.
- a pretreatment gas in which the proportion of Group-3B-element source gas has been reduced below what it is in the film-deposition gas for the epitaxial growth step can be supplied.
- lowering what the substrate temperature measures during the cleaning step minimizes the likelihood that precedential breaking away of nitrogen—originating in the fact that the vapor pressure of nitrogen is high—as well as accumulation of excess Group 3B element will occur, making it possible to avert degradation of the front-side planarity.
- One example of the aforementioned pretreatment gas may be one made not to contain Group-3B-element source gas. Gas from which source-material gas containing the Group 3B element has been omitted from among the ambient gases that are introduced in the film-deposition step can be utilized as such a pretreatment gas. As a result, the necessity of having to seek out by trial and error the requirements for gas-supply during the cleaning process is eliminated, wherein the parameters for an efficient cleaning operation can be set.
- Group 3B elements include Al (aluminum), Ga (gallium) and In (indium), wherein the fabrication at high yields of semiconductor devices in which semiconductors that are nitrides of these elements are the base—semiconductor devices of laminated construction, excelling in flatness over what has been conventional—becomes possible.
- Nitride-based semiconductor devices by the present invention are furnished with a semiconductor substrate that is formed from a compound containing a Group 3B element for forming compounds with nitrogen, and nitrogen, and, formed onto the semiconductor substrate, with an epitaxial semiconductor film containing the Group 3B element and nitrogen.
- the smoothness of the semiconductor substrate surface is 15 nm or less in root-mean-square roughness.
- the planarity of the epitaxial film formed on the surface of the nitride semiconductor substrate can be made superlative. Having it that the RMS roughness exceeds 15 nm gives rise to hexagonal hillocks when the epitaxial film has been formed to a thickness of approximately 2 ⁇ m, in which case not only that epitaxial film, but also epitaxial films formed onto it turn out to be layers in which the crystallinity is spoiled, which degrades the device quality.
- the epitaxial deposition would not grow into a continuous film when having been formed to a thickness on the order of 0.5 ⁇ m, on account of the unevenness in the substrate surface.
- the root-mean-square roughness of the semiconductor substrate may, moreover, be rendered 5 nm or less.
- the 10-point peak-and-valley mean roughness Rz of the epitaxial film may be 15 nm or less.
- This configurational aspect not only makes excellent the crystallinity and flatness of the epitaxial film itself, but also contributes to guaranteeing the crystallinity and flatness of epitaxial films that are formed onto this epitaxial film.
- the Rz roughness is determined based on peaks and valleys on an epitaxial film that is as noted above, in the state in which no thin films have been further grown onto the epitaxial film. Utilizing any sort of method as long as the method can detect roughness of the epitaxial film after it has been built up with semiconductor devices, measurement of the roughness may be by any sort of method as long as it can gauge the epitaxial smoothness.
- the 10-point mean roughness Rz of the epitaxial film may, moreover, be rendered 7.5 nm or less. More outstanding flatness and crystallinity of the film are ensured as a result to enable high-quality semiconductor devices to be fabricated with good yields.
- the front-side surface of the epitaxial film is kept from having peaks and valleys of 50 nm to 150 nm height appearing at a pitch of 100 ⁇ m to 150 ⁇ m.
- the hexagonal hillocks on the epitaxial film are observed to be peaks and valleys of 50 nm to 150 nm height at a pitch of 100 ⁇ m to 150 ⁇ m. Having the RMS roughness of the semiconductor substrate be, as stated above, no more than 15 nm makes it so that the hexagonal hillocks do not arise.
- the consequent benefit is that, excelling in flatness, the epitaxial film makes it possible to improve the crystallinity of films formed onto the epitaxial film.
- FIG. 1 is a sectional view representing a blue LED that is a nitride semiconductor device in an embodiment of the present invention.
- FIG. 2 is a diagram illustrating a method, in an embodiment of the present invention, of manufacturing nitride semiconductor devices.
- FIG. 3 is views showing surface morphology in 10 ⁇ m ⁇ 10 ⁇ m of the surface of GaN substrates, being micrographs depicting the surface morphology of, in FIG. 3A , a raw substrate that had not been pretreated; in FIG. 3B , a GaN substrate that underwent pretreating at 1025° C.; and in FIG. 3C , a GaN substrate that underwent pretreating at 1150° C.
- FIG. 4 is views showing observations by differential interference contrast microscopy of the surface of a semiconductor device in respective fabrication stages in the present invention, the views being photographs of, in FIG. 4A , the substrate after being pretreated at 1025° C.; in FIG. 4B , a GaN film having been grown to a layer thickness of 0.5 ⁇ m onto the substrate in FIG. 4A ; and in FIG. 4C , the GaN film having been grown to a layer thickness of 2 ⁇ m onto the FIG. 4A substrate.
- FIG. 5 is views showing observations by differential interference contrast microscopy of the surface of a semiconductor device in respective fabrication stages in a comparative example, the views being photographs of, in FIG. 5A , the substrate after being pretreated at 1150° C.; in FIG. 5B , a GaN film having been grown to a layer thickness of 0.5 ⁇ m onto the substrate in FIG. 5A ; and in FIG. 5C , the GaN film having been grown to a layer thickness of 2 ⁇ m onto the substrate in FIG. 5A .
- FIG. 6 is a diagram showing the results of measuring, using a stylus surface profilometer, the surface roughness of a GaN film corresponding to that in FIG. 4C , deposited at a thickness of 2 ⁇ m.
- FIG. 7 is a diagram showing the results of measuring, using a stylus surface profilometer, the surface roughness of a GaN film corresponding to that in FIG. 5C , deposited at a thickness of 2 ⁇ m.
- FIG. 1 is a diagram representing a light-emitting device that is a semiconductor device in an embodiment of the present invention.
- a Ti—Al layer 9 that forms an n-type electrode is provided on the back side of a GaN substrate 1 in FIG. 1 .
- An n-type buffer layer 2 consisting of a GaN film doped with Si is epitaxially grown onto the front side of the GaN substrate 1 .
- An n-type cladding layer 3 consisting of an epitaxial film—an Al 0.07 GaN film—obtaining Si is formed onto the n-type buffer layer 2 .
- An active layer 4 that is the light-emitting portion is situated between the n-type cladding layer 3 and a p-type cladding layer 5 .
- the active layer 4 is formed as an In 0.2 GaN—GaN multi-quantum well structure.
- the p-type cladding layer 5 atop the active layer 4 is formed as an Al 0.07 GaN film containing Mg as a dopant. In order to secure favorable crystallinity in these layers each is formed as an epitaxial film.
- a p-type contact layer 6 consisting of a GaN film containing Mg, and further, atop that, a p-type electrode 7 consisting of a Ni—Au metal film are provided. Over that a pad electrode 8 is formed.
- the front side of the GaN substrate 1 in the cleaning step undergoes a cleaning process whereby the substrate is heated to a temperature lower than the temperature of the substrate when in the film-deposition step.
- Roughness in the front side of the GaN substrate 1 is thereby held down to being 15 nm or less in root mean square (RMS) roughness, and can moreover be brought to 5 nm or less.
- RMS root mean square
- the semiconductor-substrate front side minimizing roughness of the semiconductor-substrate front side and forming epitaxial films onto that front side enables the crystal properties of the epitaxial films to be made superb. As a result, the quality of light-emitting characteristics can be enhanced—such as in emission-efficiency improvement and in narrowed emission-beam width.
- a further advantage is that enhancing the flatness of the n-type buffer layer 2 on the GaN substrate to simplify the structure of the light-emitting device enables yields to be improved. Peaks and valleys at a 100 ⁇ m to 150 ⁇ m pitch should not be present on the front-side surface of the n-type buffer layer; in other words, the layer should be made not to produce hexagonal hillocks. This may be realized, as discussed above, getting the RMS roughness of the semiconductor substrate to be 15 nm or less. Likewise, the 10-point mean roughness Rz of the epitaxial film surface can be rendered 15 nm or less. The roughness Rz can even be made 7.5 or less. Naturally, these curbs on the roughness, through improvement in crystal properties and improvement in flatness, contribute to improving the quality of the semiconductor devices and to improving manufacturing yields.
- FIG. 2 is a diagram that explanatorily illustrates a method of manufacturing semiconductor devices as described above.
- T 1 the substrate heating temperature in the cleaning step
- T 2 the substrate heating temperature in the following film-deposition step.
- the flow rate of the nitrogen source gas is given as N 1
- G 1 may be zero.
- Hydrogen gas and other source gases may be included as well.
- the substrate heating temperature is given as T 2 , the flow rate of the nitrogen source gas as N 2 , and the flow rate of the Ga source gas as G 2 .
- the substrate heating temperatures T 2 >T 1 and the condition that the flow rates of the Ga source gas be G 2 >G 1 ⁇ 0 is imposed.
- the flow rate of the Ga source gas in the cleaning step is made lower than what it is in the film-deposition step, but the addition or subtraction of other source gases is not performed.
- the following three events conflict with each other. Namely, the three events are: (g1) the breaking away of Ga and N; (g2) the supplying of Ga from the Ga source gas; and (g3) the supplying of N from the N source gas.
- the three events are: (g1) the breaking away of Ga and N; (g2) the supplying of Ga from the Ga source gas; and (g3) the supplying of N from the N source gas.
- pretreating gas supply requirements be the aforementioned film-deposition source-gas supply requirements minus the Ga source gas (Group III source gas).
- Ga source gas Group III source gas
- Making the preheating temperature lower than the film-deposition temperature rids the GaN substrate surface of imbalances from accumulation and breaking away of the atoms constituting the epitaxial film, even with a pretreating gas in which Ga source gas has been omitted from the film-deposition gases being employed.
- a substrate front side of favorable flatness and crystallinity, suited to growing epitaxial films, can be achieved as a result. Since it involves only one parameter, optimizing the substrate temperature is easy compared with optimizing the preheating-gas supply conditions.
- the temperatures at which nitride semiconductor films are deposited are fundamentally high, even with the preheating temperature made lower than the film-deposition temperature, there is no harm to the cleaning effectiveness.
- the gas flow rate in supplying the source gases that, with the source gas for Ga or other Group III element being omitted, remain may be made the same as the gas flow rate during film deposition.
- the pretreating temperature is lower than the film-deposition temperature, there will be no occurrence of the imbalances noted above. Therefore, simply by omitting the Ga source gas from the film-deposition-gas supply requirements as described above, optimization of the pretreating-gas supply requirements by designating an immense number of parameters need not be carried out.
- a GaN substrate was utilized, and a cleaning process (pretreatment) was implemented on the GaN substrate, onto which a homoepitaxial film was thereafter deposited.
- the pretreating conditions as film-deposition conditions are as noted below.
- Substrate temperature Present invention example: 1025° C.;
- Substrate temperature 1150° C.
- the GaN substrate Utilized as the GaN substrate was a bulk crystal prepared by growing a thick GaN film onto a GaAs substrate with SiO 2 made the mask and thereafter removing the GaAs substrate.
- the Ga source gas TMG was omitted, and ammonia as the nitrogen source gas, and nitrogen and hydrogen as the carrier gases alone were flowed according to the same flow parameters as those in the film-deposition conditions noted above.
- the root-mean-square (RMS) roughness of the substrate after having undergone the pretreatment was assessed using atomic force microscopy (AFM).
- AFM atomic force microscopy
- FIG. 3 is micrographs made using AFM, showing 10 ⁇ m ⁇ 10 ⁇ m of roughness, for RMS calculations, along the front side of the GaN substrate.
- the views show results for, in FIG. 3A , a GaN substrate with no pretreatment (raw substrate/comparative example); in FIG. 3B , a GaN substrate that underwent pretreating at a 1025° C. substrate temperature (present-invention example); and in FIG. 3C , a GaN substrate that, similarly as is conventional, underwent pretreating at a substrate temperature that was the same as the film-deposition temperature (comparative example).
- RMS calculations for the foregoing samples within 2 ⁇ m ⁇ 2 ⁇ m and 10 ⁇ m ⁇ 10 ⁇ m bounds are set forth in the Table.
- the sample pretreated at a substrate temperature that was the same 1150° C. that is the film-deposition temperature had an RMS roughness of over 20 nm; thus its surface roughness compared to that of the raw substrate on which pretreatment had not been carried out had grown drastically, deteriorating the substrate quality.
- the size of a single gradation along the taxis in FIG. 3C is ten times that of the zaxes in FIGS. 3A and 3B , and although the magnitude of the disparity just noted is thus somewhat hard to discern, the disparity is unmistakable.
- the 2 ⁇ m ⁇ 2 ⁇ m RMS roughness is 0.6 nm, which is markedly superior to the 1.3 nm of the raw substrate.
- the 10 ⁇ m ⁇ 10 ⁇ m RMS roughness, 1.5 nm, is superior to the 2.0 nm of the raw substrate, and proved to measure one order of magnitude smaller than the 23.6 nm RMS roughness of the comparative example.
- the substrate is cleaned without its flatness being harmed.
- an epitaxial film onto a GaN substrate that has been pretreated at a substrate temperature of 1025° C. an atomically stepped surface in which the RMS roughness is 0.5 nm or less can be achieved.
- FIG. 4 is views showing results of using differential interference contrast microscopy to observe, following stages, the surface of a sample in an example of the present invention.
- FIG. 4A is a photograph in which a GaN substrate after being pretreated correspondingly to the substrate in FIG. 3B is observed by differential interference microscopy;
- FIG. 4B is a photograph of a GaN film at the point at which it has been epitaxially grown, according to the foregoing film-deposition conditions, 0.5 ⁇ m thick onto the GaN substrate;
- FIG. 4C is a photograph of the GaN film after it has been epitaxially grown 2 ⁇ m thick.
- FIG. 4A is a photograph in which a GaN substrate after being pretreated correspondingly to the substrate in FIG. 3B is observed by differential interference microscopy
- FIG. 4B is a photograph of a GaN film at the point at which it has been epitaxially grown, according to the foregoing film-deposition conditions, 0.5 ⁇ m thick onto the GaN substrate
- FIG. 5 is views showing results of likewise using differential interference contrast microscopy to observe, following stages, the surface of a sample in a comparative example corresponding to that of FIG. 3C .
- FIG. 5A is a photograph in which a GaN substrate after being pretreated correspondingly to the substrate in FIG. 3C is observed by differential interference microscopy;
- FIG. 5B is a photograph of a GaN film at the point at which it has been epitaxially grown, according to the foregoing film-deposition conditions, 0.5 ⁇ m thick onto the GaN substrate;
- FIG. 5C is a photograph of the GaN film after it has been epitaxially grown 2 ⁇ m thick.
- FIGS. 6 and 7 are diagrams showing the results of measuring, using a stylus surface profilometer, the surface roughness of GaN films deposited at 2 ⁇ m thickness, corresponding to those in FIGS. 4C and 5C .
- the surface roughness profile of the comparative example peaks and valleys whose height/depth is 50 nm to 150 nm, at a pitch of 100 ⁇ m to 150 ⁇ m are ascertainable. This is analogous to the roughness from the hexagonal hillocks verified in the FIG. 5C differential-interference-microscopy photograph.
- FIG. 6 of the present-invention example on account of the film-deposition process having been carried out after pretreatment at 1025° C. was performed, no heavy roughness can be ascertained.
- the amplitude of the roughness of the semiconductor substrate, etc. in the semiconductor devices of the present invention is based on the roughness prior to a thin film being formed on the substrate, etc.—with the description, including that of the mode for carrying out the invention, presuming that even once other thin films have been formed on the substrate, etc. the roughness will not undergo a significant change. Nevertheless, the actual amplitude of the roughness in the front side after it has been fabricated into semiconductor devices will depend significantly on the measuring method—particularly in implementations in which the surface roughness is exposed by etching, on the etching technique. And it will also depend on the precision of the device with which the roughness is measured. It is believed that, in determining the roughness amplitude of the surface of the respective areas in the semiconductor devices of the present invention, the best measuring method and the best measuring device have been specified.
- nitride-based semiconductor devices and a method of their manufacture makes it possible to achieve nitride-based semiconductor devices containing epitaxial films excelling in flatness and crystallinity.
Landscapes
- Engineering & Computer Science (AREA)
- Chemical & Material Sciences (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Crystallography & Structural Chemistry (AREA)
- Organic Chemistry (AREA)
- Metallurgy (AREA)
- Inorganic Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Led Devices (AREA)
- Chemical Vapour Deposition (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/958,315 US7781314B2 (en) | 2003-03-05 | 2007-12-17 | Nitride semiconductor device manufacturing method |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003057983A JP4052150B2 (ja) | 2003-03-05 | 2003-03-05 | 窒化物系半導体装置の製造方法 |
JP2003-057983 | 2003-03-05 | ||
PCT/JP2004/001944 WO2004079803A1 (ja) | 2003-03-05 | 2004-02-19 | 窒化物系半導体装置およびその製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/958,315 Division US7781314B2 (en) | 2003-03-05 | 2007-12-17 | Nitride semiconductor device manufacturing method |
Publications (1)
Publication Number | Publication Date |
---|---|
US20050173715A1 true US20050173715A1 (en) | 2005-08-11 |
Family
ID=32958781
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US10/514,261 Abandoned US20050173715A1 (en) | 2003-03-05 | 2004-02-19 | Nitride semiconductor devices and method of their manufacture |
US11/958,315 Expired - Fee Related US7781314B2 (en) | 2003-03-05 | 2007-12-17 | Nitride semiconductor device manufacturing method |
Family Applications After (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
US11/958,315 Expired - Fee Related US7781314B2 (en) | 2003-03-05 | 2007-12-17 | Nitride semiconductor device manufacturing method |
Country Status (8)
Country | Link |
---|---|
US (2) | US20050173715A1 (de) |
EP (1) | EP1601009A4 (de) |
JP (1) | JP4052150B2 (de) |
KR (1) | KR101036223B1 (de) |
CN (1) | CN100580881C (de) |
CA (1) | CA2495908A1 (de) |
TW (1) | TW200423509A (de) |
WO (1) | WO2004079803A1 (de) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080135861A1 (en) * | 2006-12-08 | 2008-06-12 | Luminus Devices, Inc. | Spatial localization of light-generating portions in LEDs |
US20090104757A1 (en) * | 2007-10-22 | 2009-04-23 | Toyoda Gosei Co., Ltd. | Method for producing group III nitride-based compound semiconductor |
US20090242924A1 (en) * | 2008-03-31 | 2009-10-01 | Chao-Kun Lin | Light emitting diodes with smooth surface for reflective electrode |
EP2221855A1 (de) * | 2007-11-21 | 2010-08-25 | Mitsubishi Chemical Corporation | Nitridhalbleiter und nitridhalbleiter-kristallwachstumsverfahren |
US10600676B2 (en) * | 2012-10-12 | 2020-03-24 | Sumitomo Electric Industries, Ltd. | Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI455181B (zh) | 2005-06-01 | 2014-10-01 | Univ California | 半極性(Ga,Al,In,B)N薄膜、異質結構及裝置之生長及製造技術 |
KR101182581B1 (ko) * | 2005-09-21 | 2012-11-27 | 삼성코닝정밀소재 주식회사 | 질화갈륨계 반도체 기판 및 이의 제조방법 |
KR100739150B1 (ko) * | 2005-12-24 | 2007-07-13 | 엘지전자 주식회사 | 질화물 반도체 소자 제조 방법 |
JP5223112B2 (ja) * | 2007-10-22 | 2013-06-26 | 豊田合成株式会社 | Iii族窒化物系化合物半導体の製造方法 |
US7482674B1 (en) * | 2007-12-17 | 2009-01-27 | The United States Of America As Represented By The Secretary Of The Navy | Crystalline III-V nitride films on refractory metal substrates |
US9896780B2 (en) * | 2013-07-26 | 2018-02-20 | Stanley Electric Co., Ltd. | Method for pretreatment of base substrate and method for manufacturing layered body using pretreated base substrate |
KR101653184B1 (ko) * | 2014-11-07 | 2016-09-02 | 재단법인대구경북과학기술원 | 태양전지 광흡수층 제조방법 및 이에 따라 제조되는 태양전지 광흡수층 |
KR102667614B1 (ko) * | 2017-09-22 | 2024-05-22 | 가부시끼가이샤 도꾸야마 | Ⅲ족 질화물 단결정 기판 |
KR102397497B1 (ko) * | 2021-03-28 | 2022-05-12 | 이종득 | 기능성분을 함유하여 미세먼지 흡착, 항균, 탈취기능을 갖도록 제공되는 안면보호용 마스크 |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20020185054A1 (en) * | 2001-06-08 | 2002-12-12 | Advanced Technology Materials Inc. | High surface quality gan wafer and method of fabricating same |
US20030024472A1 (en) * | 2001-08-01 | 2003-02-06 | Crystal Photonics, Incorporated | Wafer produced thereby, and associated methods and devices using the wafer |
US6554896B1 (en) * | 1999-11-17 | 2003-04-29 | Ngk Insulators, Ltd. | Epitaxial growth substrate and a method for producing the same |
US6936488B2 (en) * | 2000-10-23 | 2005-08-30 | General Electric Company | Homoepitaxial gallium-nitride-based light emitting device and method for producing |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4579609A (en) * | 1984-06-08 | 1986-04-01 | Massachusetts Institute Of Technology | Growth of epitaxial films by chemical vapor deposition utilizing a surface cleaning step immediately before deposition |
EP0214690B1 (de) * | 1985-09-06 | 1992-03-25 | Philips Electronics Uk Limited | Herstellungsverfahren einer Halbleitervorrichtung |
JPH05217921A (ja) * | 1991-09-13 | 1993-08-27 | Motorola Inc | 材料膜のエピタキシアル成長を行うための温度制御された処理 |
US6218280B1 (en) | 1998-06-18 | 2001-04-17 | University Of Florida | Method and apparatus for producing group-III nitrides |
JP2000124138A (ja) | 1998-10-14 | 2000-04-28 | Dowa Mining Co Ltd | 表面処理方法および半導体装置 |
US6447604B1 (en) | 2000-03-13 | 2002-09-10 | Advanced Technology Materials, Inc. | Method for achieving improved epitaxy quality (surface texture and defect density) on free-standing (aluminum, indium, gallium) nitride ((al,in,ga)n) substrates for opto-electronic and electronic devices |
US6596079B1 (en) * | 2000-03-13 | 2003-07-22 | Advanced Technology Materials, Inc. | III-V nitride substrate boule and method of making and using the same |
JP3546023B2 (ja) * | 2001-03-23 | 2004-07-21 | 三菱電線工業株式会社 | 結晶成長用基板の製造方法、およびGaN系結晶の製造方法 |
JP4852795B2 (ja) | 2001-05-30 | 2012-01-11 | 住友電気工業株式会社 | 化合物半導体の製造方法 |
JP2003007676A (ja) * | 2001-06-18 | 2003-01-10 | Sony Corp | 半導体装置の製造方法 |
JP3975700B2 (ja) | 2001-07-18 | 2007-09-12 | 住友電気工業株式会社 | 化合物半導体の製造方法 |
JP4948720B2 (ja) * | 2001-08-29 | 2012-06-06 | シャープ株式会社 | 窒素化合物半導体積層物、発光素子、光ピックアップシステム、および窒素化合物半導体積層物の製造方法。 |
JP4229005B2 (ja) * | 2003-06-26 | 2009-02-25 | 住友電気工業株式会社 | GaN基板及びその製造方法、並びに窒化物半導体素子 |
-
2003
- 2003-03-05 JP JP2003057983A patent/JP4052150B2/ja not_active Expired - Fee Related
-
2004
- 2004-02-19 CA CA002495908A patent/CA2495908A1/en not_active Abandoned
- 2004-02-19 KR KR1020057016241A patent/KR101036223B1/ko not_active IP Right Cessation
- 2004-02-19 EP EP04712740A patent/EP1601009A4/de not_active Withdrawn
- 2004-02-19 WO PCT/JP2004/001944 patent/WO2004079803A1/ja active Application Filing
- 2004-02-19 CN CN200480000273.0A patent/CN100580881C/zh not_active Expired - Fee Related
- 2004-02-19 US US10/514,261 patent/US20050173715A1/en not_active Abandoned
- 2004-02-27 TW TW093105163A patent/TW200423509A/zh not_active IP Right Cessation
-
2007
- 2007-12-17 US US11/958,315 patent/US7781314B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6554896B1 (en) * | 1999-11-17 | 2003-04-29 | Ngk Insulators, Ltd. | Epitaxial growth substrate and a method for producing the same |
US6936488B2 (en) * | 2000-10-23 | 2005-08-30 | General Electric Company | Homoepitaxial gallium-nitride-based light emitting device and method for producing |
US20020185054A1 (en) * | 2001-06-08 | 2002-12-12 | Advanced Technology Materials Inc. | High surface quality gan wafer and method of fabricating same |
US20030024472A1 (en) * | 2001-08-01 | 2003-02-06 | Crystal Photonics, Incorporated | Wafer produced thereby, and associated methods and devices using the wafer |
Cited By (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20080135861A1 (en) * | 2006-12-08 | 2008-06-12 | Luminus Devices, Inc. | Spatial localization of light-generating portions in LEDs |
US20090104757A1 (en) * | 2007-10-22 | 2009-04-23 | Toyoda Gosei Co., Ltd. | Method for producing group III nitride-based compound semiconductor |
US7824929B2 (en) | 2007-10-22 | 2010-11-02 | Toyoda Gosei Co., Ltd. | Method for producing group III nitride-based compound semiconductor |
US9048100B2 (en) | 2007-11-21 | 2015-06-02 | Mitsubishi Chemical Corporation | Nitride semiconductor and nitride semiconductor crystal growth method |
EP2221855A4 (de) * | 2007-11-21 | 2013-08-07 | Mitsubishi Chem Corp | Nitridhalbleiter und nitridhalbleiter-kristallwachstumsverfahren |
EP2221855A1 (de) * | 2007-11-21 | 2010-08-25 | Mitsubishi Chemical Corporation | Nitridhalbleiter und nitridhalbleiter-kristallwachstumsverfahren |
US20100252835A1 (en) * | 2007-11-21 | 2010-10-07 | Mitsubishi Chemical Corporation | Nitride semiconductor and nitride semiconductor crystal growth method |
CN102150272A (zh) * | 2008-03-31 | 2011-08-10 | 普瑞光电股份有限公司 | 具供设置反射性电极的平滑表面的发光二极管 |
US20110008923A1 (en) * | 2008-03-31 | 2011-01-13 | Bridgelux, Inc. | Light emitting diodes with smooth surface for reflective electrode |
US8163578B2 (en) | 2008-03-31 | 2012-04-24 | Bridgelux, Inc. | Light emitting diodes with smooth surface for reflective electrode |
US8168984B2 (en) | 2008-03-31 | 2012-05-01 | Bridgelux, Inc. | Light emitting diodes with smooth surface for reflective electrode |
US7781780B2 (en) * | 2008-03-31 | 2010-08-24 | Bridgelux, Inc. | Light emitting diodes with smooth surface for reflective electrode |
TWI413278B (zh) * | 2008-03-31 | 2013-10-21 | Toshiba Techno Ct Inc | 發光二極體及其製造方法 |
US8691606B2 (en) * | 2008-03-31 | 2014-04-08 | Toshiba Techno Center Inc. | Method for manufacturing a light emitting diode with smooth surface for reflective electrode |
US20090242924A1 (en) * | 2008-03-31 | 2009-10-01 | Chao-Kun Lin | Light emitting diodes with smooth surface for reflective electrode |
US9437776B2 (en) | 2008-03-31 | 2016-09-06 | Toshiba Corporation | Method for manufacturing light emitting diodes with smooth surface for reflective electrode |
US10600676B2 (en) * | 2012-10-12 | 2020-03-24 | Sumitomo Electric Industries, Ltd. | Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device |
US11094537B2 (en) | 2012-10-12 | 2021-08-17 | Sumitomo Electric Industries, Ltd. | Group III nitride composite substrate and method for manufacturing the same, and method for manufacturing group III nitride semiconductor device |
Also Published As
Publication number | Publication date |
---|---|
EP1601009A1 (de) | 2005-11-30 |
JP2004273484A (ja) | 2004-09-30 |
US7781314B2 (en) | 2010-08-24 |
WO2004079803A1 (ja) | 2004-09-16 |
EP1601009A8 (de) | 2006-02-01 |
CA2495908A1 (en) | 2004-09-16 |
US20080132044A1 (en) | 2008-06-05 |
CN100580881C (zh) | 2010-01-13 |
KR20050108372A (ko) | 2005-11-16 |
TWI324424B (de) | 2010-05-01 |
CN1698184A (zh) | 2005-11-16 |
JP4052150B2 (ja) | 2008-02-27 |
EP1601009A4 (de) | 2010-07-14 |
KR101036223B1 (ko) | 2011-05-20 |
TW200423509A (en) | 2004-11-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US7781314B2 (en) | Nitride semiconductor device manufacturing method | |
US7790489B2 (en) | III-V group nitride system semiconductor self-standing substrate, method of making the same and III-V group nitride system semiconductor wafer | |
US7935615B2 (en) | III-V nitride semiconductor substrate and its production method | |
US9054017B2 (en) | Thick nitride semiconductor structures with interlayer structures and methods of fabricating thick nitride semiconductor structures | |
EP2064730B1 (de) | Nitridhalbleiterstrukturen mit zwischenschichtstrukturen und verfahren zur herstellung von nitridhalbleiterstrukturen mit zwischenschichtstrukturen | |
KR102090347B1 (ko) | Iii-n 단결정의 제조방법 | |
US20090243043A1 (en) | Growth method using nanostructure compliant layers and hvpe for producing high quality compound semiconductor materials | |
US20070215901A1 (en) | Group III-V nitride-based semiconductor substrate and method of fabricating the same | |
JP2008277841A (ja) | Iii−v族窒化物系半導体基板の製造方法 | |
JP5073624B2 (ja) | 酸化亜鉛系半導体の成長方法及び半導体発光素子の製造方法 | |
JP4359770B2 (ja) | Iii−v族窒化物系半導体基板及びその製造ロット | |
CN102326228B (zh) | 第ⅲ族氮化物半导体生长基板、第ⅲ族氮化物半导体外延基板、第ⅲ族氮化物半导体元件、第ⅲ族氮化物半导体自立基板及它们的制造方法 | |
US8466471B2 (en) | Nitride semiconductor free-standing substrate and method for making same | |
JP4261600B2 (ja) | 窒化物系半導体装置 | |
WO2017164036A1 (ja) | Iii族窒化物積層体の製造方法 | |
US6844574B1 (en) | III-V compound semiconductor | |
JP5073623B2 (ja) | 酸化亜鉛系半導体の成長方法及び半導体発光素子の製造方法 | |
US20130214282A1 (en) | Iii-n on silicon using nano structured interface layer | |
JP4420128B2 (ja) | Iii−v族窒化物系半導体デバイス及びその製造方法 | |
JP3967282B2 (ja) | SiC、GaN半導体及びその製造方法 | |
JP2008252124A (ja) | 窒化物系半導体装置 | |
Chen et al. | Growth of crack‐free GaN on maskless Si (111) by MOVPE | |
KR20060074754A (ko) | 질화갈륨 단결정 후막의 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
AS | Assignment |
Owner name: SUMITOMO ELECTRIC INDUSTRIES, LTD., JAPAN Free format text: ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:KYONO, TAKASHI;UENO, MASAKI;REEL/FRAME:016529/0024 Effective date: 20040916 |
|
STCB | Information on status: application discontinuation |
Free format text: ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION |