US20030168740A1 - Semiconductor device and a method of manufacturing the same - Google Patents

Semiconductor device and a method of manufacturing the same Download PDF

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Publication number
US20030168740A1
US20030168740A1 US10/369,766 US36976603A US2003168740A1 US 20030168740 A1 US20030168740 A1 US 20030168740A1 US 36976603 A US36976603 A US 36976603A US 2003168740 A1 US2003168740 A1 US 2003168740A1
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United States
Prior art keywords
ball portion
semiconductor device
film
metal
metal film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
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US10/369,766
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English (en)
Inventor
Yasuyuki Nakajima
Toshiaki Morita
Tomoo Matsuzawa
Seiichi Tomoi
Naoki Kawanabe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Hitachi Solutions Technology Ltd
Original Assignee
Hitachi Ltd
Hitachi ULSI Systems Co Ltd
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Application filed by Hitachi Ltd, Hitachi ULSI Systems Co Ltd filed Critical Hitachi Ltd
Priority to US10/408,119 priority Critical patent/US7015127B2/en
Publication of US20030168740A1 publication Critical patent/US20030168740A1/en
Assigned to HITACHI ULSI SYSTEMS CO., LTD., HITACHI, LTD. reassignment HITACHI ULSI SYSTEMS CO., LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: MORITA, TOSHIAKI, KAWANABE, NAOKI, MATSUZAWA, TOMOO, NAKAJIMA, YASUYUKI, TOMOI, SEIICHI
Assigned to RENESAS TECHNOLOGY CORPORATION reassignment RENESAS TECHNOLOGY CORPORATION ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: HITACHI, LTD.
Abandoned legal-status Critical Current

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Definitions

  • the present invention relates to a semiconductor device and a manufacturing method thereof, particularly to a technique effective when applied to a semiconductor device having a wire for connecting a semiconductor chip (pellet) with an external connecting terminal and a manufacturing method thereof.
  • Japanese Patent Application Laid-Open No. Hei 1(1989)-215030 is a technique of preventing cracks ( 14 ) appearing at the lower part of the bonding pad of a semiconductor device, which has been obtained by connecting a semiconductor pellet with a lead frame via a connecting wire and then sealing with a resin, by adjusting a ratio (t/S) of the thickness (t) of the ball portion at the tip of the wire to a bonding width (S) at 0.2 or less.
  • the present inventors have been engaged in the research and development of semiconductor devices and they have adopted the above-described packaging method of a semiconductor device using a gold wire and a resin.
  • a package is completed by melting and contact-bonding (first bonding) one end of a gold wire onto a bonding pad portion which is an uppermost exposed portion of an Al film (interconnect) of an IC chip to connect the IC chip with the gold wire; thermo-compression bonding (second bonding) another end of the gold wire onto an external connecting terminal on a wiring substrate; and sealing the IC chip, gold wire and the like with a resin.
  • the Al film (interconnect) and the tip (ball portion) of the gold wire are connected by the formation of an alloy, on the bonding pad portion, between aluminum and gold.
  • the present inventors have carried out an extensive investigation on such a failure and as a result, have found that a destruction phenomenon (cracks) in the aluminum-gold alloy layer is a cause of the failure. They have proceeded with a further investigation, because cracks at the lower part of the bonding pad portion occupy the major part of the destruction phenomenon in the aluminum-gold alloy layer as shown in the above-described Japanese Patent Laid-Open No. Hei 1(1989)-215030. As will be described later in detail, the mode of the aluminum-gold alloy layer is different from that of the conventional one.
  • An object of the present invention is to improve the adhesion between the bonding pad portion (interconnect) with the ball portion, particularly, to maintain sufficient adhesion between the interconnect and the ball portion even if the film thickness of the interconnect is small.
  • Another object of the present invention is to improve the reliability of the semiconductor device by improving the adhesion between the interconnect and ball portion, and also to improve a yield of the semiconductor device.
  • a further object of the present invention is to provide a technique desirable when applied to a semiconductor device having bonding pads disposed with small pitches, and a manufacturing method thereof.
  • a semiconductor device of the present invention has a first metal film formed above a semiconductor chip, a ball portion formed over the first metal film and made of a second metal, and an alloy layer of the first metal and the second metal formed between the first metal film and the ball portion to reach the bottom of the first metal film.
  • the ball portion may be covered with a resin.
  • the relationship between the height h of the ball portion and the maximum peripheral diameter D of the ball may satisfy the following expression: 9 ⁇ D/h ⁇ 2.
  • a semiconductor device of the present invention has a first metal film formed above a semiconductor chip, a ball portion formed over the first metal film and made of a second metal, and an alloy layer of the first metal and the second metal formed between the first metal film and the ball portion.
  • a diameter d of a contact region of the first metal film with the ball portion and a diameter g of the alloy layer formed region satisfies the following expression: g ⁇ 0.8d.
  • the diameter d of a contact region of the first metal film with the ball portion and the maximum peripheral diameter D of the ball may satisfy the following expression: d ⁇ 0.8D.
  • a manufacturing method of a semiconductor device comprises forming, over a first metal film above a semiconductor chip, an insulating film having an opening at a pad portion, and adhering a ball portion made of a second metal onto the pad portion by ultrasonic thermo-compression bonding method using a ultrasonic wave having a frequency of 110 kHz or greater.
  • a manufacturing method of a semiconductor device comprises forming, over a first metal film above a semiconductor chip, an insulating film having an opening at a pad portion, and adhering a ball portion, which is formed over the first metal film and is made of a second metal, onto the pad portion by forming an alloy layer of the first metal and the second metal in at least 70% of a contact region of the first metal film with the ball portion.
  • the ball portion is covered with a resin or the semiconductor chip covered with the resin is exposed to high temperature conditions, the characteristics of the semiconductor chip may be tested.
  • the ball portion made of the second metal may be shaped so that the diameter d of the contact region and the maximum peripheral diameter D of the ball portion would satisfy the following expression: d ⁇ 0.8D.
  • FIG. 1 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing step of a semiconductor device according to an embodiment of the present invention
  • FIG. 2 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 3 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 4 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing method of the semiconductor device according to the embodiment of the present invention
  • FIG. 5 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing method of the semiconductor device according to the embodiment of the present invention
  • FIG. 6 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing method of the semiconductor device according to the embodiment of the present invention
  • FIG. 7 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 8 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 9 is a fragmentary plane view of a substrate illustrating a manufacturing method of the semiconductor device according to the embodiment of the present invention.
  • FIG. 10 illustrates a capillary to be used in a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 11 is a fragmentary cross-sectional view of a substrate (bonding pad portion) illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 12 is a fragmentary cross-sectional view of a substrate (bonding pad portion) illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 13 is a graph showing the movement of the capillary to be used in a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 14 is a fragmentary cross-sectional view of a substrate (bonding pad portion) illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 15 is a fragmentary cross-sectional view of a bonding pad portion of the semiconductor device for explaining an advantage of the embodiment of the present invention
  • FIG. 16 is a fragmentary cross-sectional view of a bonding pad portion of the semiconductor device for explaining another advantage of the embodiment of the present invention.
  • FIG. 17 is a fragmentary cross-sectional view of a bonding pad portion of the semiconductor device for explaining a further advantage of the embodiment of the present invention.
  • FIG. 18 is a fragmentary cross-sectional view of a bonding pad portion of the manufacturing process of a semiconductor device according to the embodiment of the present invention.
  • FIG. 19 is a fragmentary cross-sectional view of a bonding pad portion of the semiconductor device for explaining a further advantage of the embodiment of the present invention.
  • FIG. 20 is a fragmentary cross-sectional view of a bonding pad portion of the semiconductor device for explaining a further advantage of the embodiment of the present invention.
  • FIG. 21 is a graph showing the relationship between the diameter ( ⁇ m) of the contact-bonded ball portion and shear strength (N) at varied ultrasonic frequencies;
  • FIG. 22 is a graph showing the relationship between ultrasonic amplitude ( ⁇ m) and shear strength (N) at varied ultrasonic frequencies;
  • FIG. 23 is a graph showing the relationship between the diameter ( ⁇ m) of the contact-bonded ball portion and the percent (%) of the alloy formed area at varied ultrasonic frequencies;
  • FIG. 24 is a graph showing the relationship between the pitch of the bonding pad portion and a ratio (g/d) of the diameter g of the Al—Au alloy layer formed region to the diameter d of the connected region of the gold ball portion B;
  • FIG. 25 is a fragmentary cross-sectional view of a substrate (bonding pad portion) illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention
  • FIG. 26 is a graph illustrating the movement of a capillary to be used in a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 27 is a fragmentary cross-sectional view of a substrate illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 28 is a perspective view of a substrate illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 29 is a partially enlarged view of FIG. 28 illustrating a manufacturing step of the semiconductor device according to the embodiment of the present invention.
  • FIG. 30 is a perspective view of a substrate illustrating a manufacturing process of the semiconductor device according to the embodiment of the present invention.
  • semiconductor device semiconductor integrated circuit device
  • semiconductor integrated circuit device semiconductor integrated circuit device
  • a semiconductor substrate 1 having formed thereon a silicon oxide film 11 and a second-level interconnect M 2 is prepared.
  • a semiconductor element such as MISFET (Metal Insulator Semiconductor Field Effect Transistor), first-level interconnect, a plug for connecting the element with the first-level interconnect, a plug for connecting the first-level interconnect with a second-level interconnect which will be described later, and the like are formed, but they are not illustrated.
  • an element isolation made of, for example, a silicon oxide film is formed as needed, but its illustration is also omitted.
  • a silicon oxide film 12 is deposited over the second-level interconnect M 2 by CVD (Chemical Vapor Deposition) as an interlevel insulating film. Then, a contact hole C 3 is formed by removing the silicon oxide film 12 over the second-level interconnect M 2 by dry etching. Over the silicon oxide film 11 including the inside of the contact hole C 3 , a tungsten (W) film, for example, is deposited as a conductive film by CVD. The W film outside the contact hole C 3 is removed, for example, by CMP (Chemical Mechanical Polishing) to form a plug P 3 .
  • CVD Chemical Vapor Deposition
  • a TiN (titanium nitride) film M 3 a of about 50 nm thick, an Al (aluminum) film M 3 b of about 700 nm thick and a TiN film M 3 c of about 50 nm thick are deposited as conductive films successively, for example, by sputtering.
  • Al film as used herein means a film having Al as a main component and it embraces an alloy film of Al with another metal.
  • the TiN films M 3 a and M 3 c are formed in order to ensure the reliability of an interconnect by 1) heightening adhesion between the Al film M 3 b and an insulating film such as the silicon oxide film 12 , or by 2) improving electromigration resistance of the second-level interconnect M 2 made of an Al alloy.
  • a single layer film of Ti (titanium) film, TiW (titanium tungsten) film, Ta (tantalum) film, W film or WN (tungsten nitride) film, or a laminate film thereof may be used.
  • FIG. 4 is a cross-sectional view (cross-sectional view in an extending direction of the third-level interconnect M 3 ) taken along a line A-A of FIG. 3 (this will equally apply to FIGS. 6 and 8).
  • a silicon nitride film and a silicon oxide film are deposited successively as protecting films over the third level interconnect M 3 , for example, by CVD to form a passivation film 41 made of their laminate.
  • This passivation film 41 may be formed of a single layer.
  • a polyimide resin film 43 having an opening portion at a desired position is formed over the passivation film 41 .
  • This polyimide resin film 43 is formed by spin coating a photosensitive polyimide resin film to give a thickness of about 5 ⁇ m, heat treating (pre-baking) the film, exposing and developing the resulting polyimide resin film to form an opening, and then, heat treating (post-baking) the film to cure it.
  • FIG. 9 is a fragmentary plane view of a substrate (chip region) having the bonding pad portions BP formed thereover.
  • the steps so far described are often carried out in a so-called wafer state.
  • the wafer semiconductor substrate having a plurality of substantially rectangular semiconductor chip regions is cut (diced) into each semiconductor chip.
  • adhesion (first bonding) of a gold wire WR onto the bonding pad portion BP over the semiconductor chip is performed. This step will be described with reference to FIGS. 10 to 11 .
  • a capillary CA having, along a shaft center thereof, a pore for causing a gold wire WR to pass therethrough is prepared and the gold wire WR is caused to pass through the inside of the capillary.
  • a discharge energy from an electrode is then applied, using an electric torch (not illustrated), to the gold wire WR coming out from the tip of the capillary CA, whereby the gold wire WR is molten and a ball MB is formed.
  • the molten ball MB is adhered onto the bonding pad portion BP.
  • This adhesion step is carried out while applying pressure onto the molten ball MB from the capillary CA and applying ultrasonic waves to the capillary CA.
  • the bonding pad portion BP is heated by a heater which is not illustrated.
  • Such a treating method is called “ultrasonic thermo-compression bonding method”.
  • the tip of the gold wire WR remains while being adhered onto the bonding pad portion BP.
  • the tip of the gold wire WR thus adhered is called “ball portion B” or “gold ball portion B”.
  • This gold ball portion B and bonding pad portion BP Al film M 3 b ) are bonded by the formation of an Al—Au alloy layer on the interface therebetween.
  • FIG. 13 shows the relationship between the height (Z) of the capillary CA and time (T).
  • the height of the capillary CA starts a decline at time T0, but this declining rate becomes smaller at time T1.
  • T2 the molten ball MB is mounted onto the bonding pad portion BP and this state is maintained for a predetermined term (T2 to T3). This term is called “bonding term”.
  • the height of the capillary CA shows an increase and the gold wire WR is pulled up.
  • ultrasonic thermo-compression bonding (second bonding) of the gold wire WR thus pulled up is performed onto, for example, a printed wiring (not illustrated) over the wiring substrate 60 .
  • FIGS. 16 and 17 are enlarged views of the circled region E of FIG. 15.
  • the present inventors investigated the shape of the gold ball portion B capable of maintaining a sufficient a bonding strength without causing a large change in the shape of the gold ball portion B and adjusting its changing amount within the specifications; and a production process thereof.
  • the diameter d of the connected region of the gold ball portion B and the maximum peripheral diameter D of the gold ball portion B are adjusted to have the following relationship: d ⁇ 0.8D.
  • the term “connected region Ad” means a contact region of the gold ball portion B with the Al film M 3 b (interconnect), while the term “diameter d of the connected region” means the diameter of the contact region of the gold ball portion B with the Al film M 3 b (interconnect).
  • the above-described relationship of d ⁇ 0.8D corresponds to Ad ⁇ 0.64D when expressed by the relationship between the connected region Ad of the gold ball portion B and a region defined by the maximum periphery of the gold ball portion B.
  • the relationship preferably satisfies the following expression: Ad ⁇ 0.7AD when fluctuations in the surface conditions of the pad portion upon production or fluctuations in the bonding conditions are taken into consideration.
  • the height (h) of the gold ball portion B preferably falls within a range of 9 ⁇ D/h ⁇ 2.
  • D is 65 ⁇ m or less
  • the height is preferably 5 ⁇ m or greater but not greater than 15 ⁇ m.
  • the diameter (width) WW of the gold wire is preferably 25 ⁇ m or less.
  • the diameter d of the connected region of the gold ball portion B and the diameter g of the Al—Au alloy layer 50 formed region are set to satisfy the following relationship: g ⁇ 0.8d.
  • the thickness of the Al film M 3 b is, for example, 700 nm or less and an alloy (AlAu 4 ) layer formed therewith has a small Al composition ratio, a bonding strength can be ensured.
  • the Al film M 3 b is thin, the Al—Au alloy layer 50 extends even to the bottom of the Al film M 3 b. Accordingly, the TiN film M 3 a exists below the Al—Au alloy layer 50 (refer to FIG. 27).
  • the diameter d of the connected region, the maximum peripheral diameter D of the gold ball portion B and the diameter g of the Al—Au alloy layer 50 formed region are each not necessarily a diameter of a perfect circle but only be a line at the center of each of these regions.
  • the gold ball portion is bonded onto a thin Al film so as to give a desired contact-bonded ball diameter by setting a bonding temperature and bonding term similar to those investigated in the case where the Al film thickness was large and the pitch of the bonding pad portion was relatively large, but changing a capillary and gold wire diameter to meet a desired pad pitch (initial ball volume) and adjusting a bonding load and a ultrasonic applying output, the shape is formed as illustrated in FIG. 19.
  • pitch of the bonding pad portion BP is 130 ⁇ m. It is however presumed that in this case, a short-circuit failure was avoided because an absolute diameter of the connected region or the Al—Au alloy layer formed region was maintained large.
  • pitch of the bonding pad portions BP means a distance between the centers of any two adjacent bonding pads BP.
  • the constitution according to the present embodiment as illustrated in FIG. 18, on the other hand, makes it possible to maintain a sufficient bonding strength between the gold ball portion B and the Al film M 3 b (interconnect) by the Al—Au alloy layer and at the same time, to maintain a sufficiently short margin.
  • the constitution of the present embodiment is particularly effective when applied to the bonding pad portions BP of a narrow pitch or bonding pad portion BP on a thin Al film (interconnect).
  • ultrasonic waves of 110 kHz or greater are applied during a bonding term (from T2 to T3 of FIG. 13 ) during which the molten ball MB is mounted on the bonding pad portion BP.
  • FIG. 21 illustrates the relationship between the diameter ( ⁇ m) of the contact-bonded ball portion and shear strength (N) at each ultrasonic frequency.
  • the bonding temperature was set at 200° C., while the initial ball diameter was set at 35 ⁇ 5 ⁇ m.
  • shear strength (N) means a stress at which peeling of the ball portion B occurs when the stress applied horizontally to the ball portion B is increased.
  • shear strength becomes greater when ultrasonic waves of frequency 120 kHz or 180 kHz are applied than when those of frequency 60 kHz are applied. Between 120 kHz and 180 kHz, the shear strength is a little greater at the latter ultrasonic frequency. At frequency of 60 kHz, shear strength is 0.35 N when the contact-bonded ball diameter is about 50 nm, while at frequency of 180 kHz, shear strength of the same level (0.35 N) can be attained even when the contact-bonded ball diameter is as small as about 42 ⁇ m.
  • FIG. 22 illustrates the relationship between ultrasonic amplitude ( ⁇ m) and shear strength (N) at each ultrasonic frequency. As illustrated in FIG. 22, the greater the frequency, the amplitude becomes smaller, suggesting a point amplitude. A reduction in amplitude ( ⁇ m) brings about an effect for reducing a bonding damage.
  • the percent (%) of the alloy formed area is greater when ultrasonic waves of frequency 120 kHz (graph (b)) or 180 kHz (graph (c)) are applied than when those of frequency 60 kHz are applied (graph (a)). Between 120 kHz and 180 kHz, the percent (%) of the alloy formed area is greater at the latter ultrasonic frequency.
  • the percent (%) of the alloy formed area reaches at least 70% even if the diameter of the contact-bonded ball ranges from about 65 ⁇ m to 50 ⁇ m, while at ultrasonic frequency of 120 kHz, the percent (%) of the alloy formed area reaches about 70% even if the diameter of the contact-bonded ball ranges from about 65 ⁇ m to 55 ⁇ m.
  • the gold ball portion B or Al—Au alloy layer having a constitution as illustrated in FIG. 18 were formed by increasing the ultrasonic frequency. Factors shown in FIG. 25 are considered to be able to regulate the shape of the gold ball portion B or Al—Au alloy layer.
  • the factors relating to ultrasonic waves include, as well as frequency (f), amplitude (a) and time (s) of applying ultrasonic waves. Additional examples include load (F) applied by capillary and heating temperature (° C.) of the bonding pad portion BP.
  • Specific possible methods include increase of ultrasonic frequency, gradual or stepwise raise in load (F) by capillary (A) during bonding term (from T2 to T3), shortening or extension of the application time of ultrasonic waves, starting of application of ultrasonic waves before the bonding time, and use of these methods in combination (refer to FIG. 26).
  • FIG. 24 illustrates the relationship between the pitch (pad pitch) of the bonding pad portion and percent (g/d) of the diameter g of the Al—Au alloy layer formed region to the diameter d of the connected region of the gold ball portion B.
  • the upper region of the graph (a) indicates a region Q in which reliability of the gold ball portion B can be secured, while the lower region of the graph (a) indicates a region NQ in which a short-circuit failure occurs.
  • the thickness of the Al film is set at 700 nm.
  • FIG. 27 is a fragmentary cross-sectional view of a substrate after adhesion (first bonding) of the gold wire WR onto the bonding pad portion BP.
  • FIG. 28 illustrates the state (perspective view) of the IC chip ( 1 ) and the wiring substrate 60 after second bonding
  • FIG. 29 is a fragmentary enlarged view of the circled portion of FIG. 28.
  • the resin sealant 64 is, for example, formed by a transfer mold method, in which a molten resin is poured into a metal mold which holds therewith the wiring substrate 60 tightly, followed by curing and sealing.
  • a resin for example, an epoxy series thermosetting resin containing silica as a filler is usable.
  • a bump electrode 52 is formed on the back side of the wiring substrate 60 .
  • This bump electrode is not illustrated, but is connected to a back-side electrode formed on the back side of the wiring substrate 60 .
  • the back-side electrode is electrically connected with the gold wire WR via an inside wiring of the wiring substrate 60 .
  • the bump electrode 62 is not illustrated, but is employed for the purpose of electrical connection with a packaged substrate on which a plurality of electronic parts are mounted for the use, for example, for a handy phone.
  • the package form as illustrated in FIG. 30 is called “BGA” (ball grid array).
  • the relationship between the diameter d of the connected region of the gold ball portion B and the diameter g of the Al—Au alloy layer 50 formed region is set at g ⁇ 0.8 so that a sufficient bonding strength between the gold ball portion B and the Al film M 3 b (interconnect) by the Al—Au alloy layer 50 can be secured, leading to prevention of a short-circuit due to stress.
  • the present invention was applied to the bonding of the Al film and the gold ball portion B. It can also be applied widely to a semiconductor device in which a metal interconnect and a metal ball portion (which may be a bump electrode) are bonded by forming an alloy layer between the metals thereof.
  • This embodiment can be applied not only to BGA but also to a semiconductor device such as QFP (quad flat package) using a lead frame.
  • QFP quad flat package
  • the yield of the semiconductor device can be improved.
  • the integration degree of a chip can be improved by forming more minute patterns, which can increase the number of chips available per wafer and reduce the production cost.

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
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US8003515B2 (en) * 2009-09-18 2011-08-23 Infineon Technologies Ag Device and manufacturing method
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US20040142551A1 (en) 2004-07-22
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JP2003258022A (ja) 2003-09-12
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TW200305266A (en) 2003-10-16
KR100968008B1 (ko) 2010-07-07
CN1444272A (zh) 2003-09-24

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