US20030002002A1 - Liquid crystal display device - Google Patents

Liquid crystal display device Download PDF

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Publication number
US20030002002A1
US20030002002A1 US10/167,422 US16742202A US2003002002A1 US 20030002002 A1 US20030002002 A1 US 20030002002A1 US 16742202 A US16742202 A US 16742202A US 2003002002 A1 US2003002002 A1 US 2003002002A1
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United States
Prior art keywords
signal line
switching element
liquid crystal
reference voltage
electrode
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Abandoned
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US10/167,422
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English (en)
Inventor
Genshiro Kawachi
Hideo Sato
Toshio Miyazawa
Yoshiro Mikami
Katsumi Kondo
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Hitachi Ltd
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Hitachi Ltd
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Assigned to HITACHI, LTD. reassignment HITACHI, LTD. ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS). Assignors: KONDO, KATSUMI, MIKAMI, YOSHIRO, KAWACHI, GENSHIRO, MIYAZAWA, TOSHIO, SATO, HIDEO
Publication of US20030002002A1 publication Critical patent/US20030002002A1/en
Priority to US11/013,196 priority Critical patent/US7567327B2/en
Abandoned legal-status Critical Current

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]

Definitions

  • the present invention relates to a liquid crystal display device, and more particularly to a so-called active matrix type liquid crystal display device.
  • a liquid crystal display device has been popularly used as a display equipment of image information and character information for an information equipment represented by a personal computer, a portable information terminal, a portable telephone, or a visual equipment such as digital camera or a VTR equipment with a built-in camera or the like.
  • a liquid crystal display adopting an in-plane switching (IPS) mode has been admitted as a display method which can satisfy the demand for high image quality and various improvements have been made to obtain the further enhancement of the image quality.
  • IPS in-plane switching
  • the IPS mode liquid crystal display is a display which is constituted such that on each liquid-crystal-side pixel region of one substrate out of a pair of substrates which are arranged to face each other in an opposed manner by way of liquid crystal therebetween, a pixel electrode and a counter electrode which generates an electric field between the pixel electrode and the counter electrode are mounted, and the light transmittance of liquid crystal is controlled by a component of the electric field which is parallel to the substrates.
  • Japanese Patent Laid-Open No. 316383/1999 discloses a method in which the numerical aperture of the pixel is enhanced by driving liquid crystal based on a fringe electric field which is generated between a planar transparent electrode and a comb-like electrode made of a transparent electrode which is formed as a layer different from the former transparent electrode and above the former transparent layer (hereinafter referred to as “second conventional technique”).
  • Japanese Patent Laid-Open No. 148596/1994 discloses a method in which the driving voltage is reduced by providing two transistors which connect liquid crystal driving electrodes to pixels and these transistors are subjected to differential driving (hereinafter referred to as “third conventional technique”).
  • y pieces of gate signal lines and x+1 pieces of drain signal lines are provided to the pixels arranged in a matrix array of y rows and x columns. Accordingly, the drain signal lines are commonly used by a group of pixels which belong to two neighboring columns.
  • the drawback of the first conventional technique lies, as mentioned previously, in that the increase of the numerical aperture is difficult because of the use of metal electrodes which form different layers by way of the insulation film as the liquid crystal driving electrodes and hence, the low power consumption cannot be achieved.
  • the present invention has been made to solve these drawbacks of the conventional techniques and it is an object of the present invention to provide a liquid crystal display device having a wide viewing angle which is suitably applicable to a notebook type personal computer or a portable terminal.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the first switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal, and
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers and are substantially alternately arranged in the inside of the pixel region.
  • the protective film is formed of a sequential laminated body constituted of a protective film made of inorganic material and a protective film made of organic material.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the first switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers which are arranged approximately parallel to the drain signal line and are substantially alternately arranged in the inside of the pixel region, and
  • the reference voltage signal line is arranged approximately parallel to the drain signal line.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the first switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers which are arranged approximately parallel to the drain signal line and are substantially alternately arranged in the inside of the pixel region, and
  • the reference voltage signal line is arranged approximately parallel to the drain signal line and is arranged to be superposed on one electrode out of the pixel electrode and the counter electrode.
  • a switching element which is operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers and are substantially alternately arranged in the inside of the pixel region.
  • the pixel electrode and the counter electrode are respectively formed as same layers on a protective film which covers the switching element, and pixel electrode and the counter electrode are respectively electrically connected with the switching element and the reference voltage signal line via a through hole formed in the protective film.
  • the protective film is formed of a sequential laminated body constituted of a protective film made of inorganic material and a protective film made of organic material.
  • the switching element is a thin film transistor having a semiconductor layer formed of polycrystalline silicon.
  • a switching element which is operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers which are arranged approximately parallel to the drain signal line and are substantially alternately arranged in the inside of the pixel region, and
  • the reference voltage signal line is arranged approximately parallel to the drain signal line.
  • a switching element which is operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers which are arranged approximately parallel to the drain signal line and are substantially alternately arranged in the inside of the pixel region, and
  • the reference voltage signal line is arranged approximately parallel to the drain signal line and is arranged to be superposed on one electrode out of the pixel electrode and the counter electrode.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the first switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers on an upper surface of a protective film which is formed to cover the first switching element and the second switching element and are substantially alternately arranged in the inside of the pixel region, and
  • a reflection film which is held at a potential equal to a potential of the counter electrode is formed on a lower surface of the protective film over a whole region in the inside of the pixel region.
  • the protective film is formed of a sequential laminated body constituted of a protective film made of inorganic material and a protective film made of organic material.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the first switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the pixel electrode and the counter electrode are respectively formed of strip-like light-transmitting conductive layers on an upper surface of a protective film which is formed to cover the first switching element and the second switching element and are substantially alternately arranged in the inside of the pixel region, and
  • a reflection film which is held at a potential equal to a potential of the counter electrode is formed on a lower surface of the protective film over a portion in the inside of the pixel region.
  • the protective film is formed of a sequential laminated body constituted of a protective film made of inorganic material and a protective film made of organic material.
  • a reference voltage signal line which is arranged to divide the pixel region in halves and first and second gate signal lines which are respectively arranged at one-side pixel region and the-other-side pixel region with respect to the reference voltage signal line in parallel with the reference voltage signal line are formed,
  • a first thin film transistor which is operated in response to a scanning signal from the first gate signal line, a first pixel electrode to which a video signal is supplied through the first thin film transistor, and a first counter electrode to which a reference voltage signal is supplied from the reference voltage signal line are provided to the one-side pixel region,
  • a second thin film transistor which is operated in response to a scanning signal from the second gate signal line, a second pixel electrode to which a video signal is supplied through the second thin film transistor, and a second counter electrode to which a reference voltage signal is supplied from the reference voltage signal line are provided to the the-other-side pixel region, and
  • the first and the second pixel electrodes and the first and the second counter electrodes are respectively formed of strip-like light-transmitting conductive layers on an upper surface of a protective film which is formed to cover the first and the second thin film transistors and are substantially alternately arranged in the inside of the pixel region, and
  • a reflection film is formed on a lower surface of the protective film over either one of the one-side pixel region and the the-other-side pixel region with respect to the reference voltage signal line.
  • a reference voltage signal line which is arranged to divide the pixel region in halves and first and second gate signal lines which are respectively arranged at one-side pixel region and the-other-side pixel region with respect to the reference voltage signal line in parallel with the reference voltage signal line are formed,
  • a first thin film transistor and a second thin film transistor which are operated in response to a scanning signal from the first gate signal line, a first pixel electrode to which a video signal is supplied through the first thin film transistor, and a first counter electrode to which a reference voltage signal is supplied from the reference voltage signal line through the second thin film transistor are provided to the one-side pixel region,
  • a third thin film transistor and a fourth thin film transistor which are operated in response to a scanning signal from the second gate signal line, a second pixel electrode to which a video signal is supplied through the third thin film transistor, and a second counter electrode to which a reference voltage signal is supplied from the reference voltage signal line through the fourth thin film transistor are provided to the the-other-side pixel region, and
  • the first and the second pixel electrodes and the first and the second counter electrodes are respectively formed of strip-like light-transmitting conductive layers on an upper surface of a protective film which is formed to cover the first, the second, the third and the fourth thin film transistors and are substantially alternately arranged in the inside of the pixel region, and
  • a reflection film is formed on a lower surface of the protective film over either one of the one-side pixel region and the the-other-side pixel region with respect to the reference voltage signal line.
  • the protective film is formed of a sequential laminated body constituted of a protective film made of inorganic material and a protective film made of organic material.
  • the scanning signal from the first gate signal line and the scanning signal from the second gate signal line are supplied at different timings.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a gate signal line, a pixel electrode to which a video signal is supplied from a drain signal line through the first switching element, and a counter electrode to which a reference voltage signal is supplied from a reference voltage signal line through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the reference voltage signal line is arranged approximately parallel to the drain signal line and is not connected with the pixel electrode of a neighboring pixel by way of the first switching element.
  • a first switching element and a second switching element which are operated in response to a scanning signal from a scanning wiring electrode, a first pixel electrode to which a voltage is supplied from a first signal wiring electrode through the first switching element, and a second pixel electrode to which a voltage is supplied from a second signal wiring electrode through the second switching element are formed on each liquid-crystal-side pixel region of one substrate out of respective substrates arranged by way of liquid crystal,
  • the second signal wiring electrode is arranged approximately parallel to the first signal wiring electrode and is not connected with the first pixel electrode of a neighboring pixel by way of the first switching element.
  • FIG. 1 is a plan view showing one embodiment of a unit pixel of a liquid crystal display device of the present invention.
  • FIG. 2 is a cross-sectional view taken along a line A-A′, B-B′ and C-C′ of FIG. 1.
  • FIG. 3 is an equivalent circuit diagram of a pixel array part.
  • FIG. 4 is a plan view showing another embodiment of the unit pixel of a liquid crystal display device of the present invention.
  • FIG. 5 is a cross-sectional view taken along a line A-A′, B-B′ and C-C′ of FIG. 4.
  • FIG. 6 is an equivalent circuit diagram of a pixel array part.
  • FIG. 7 is a plan view showing another embodiment of the unit pixel of a liquid crystal display device of the present invention.
  • FIG. 8 is a cross-sectional view taken along a line A-A′, B-B′ and C-C′ of FIG. 7.
  • FIG. 9 is an equivalent circuit diagram of a pixel array part.
  • FIG. 10 is a plan view showing another embodiment of the unit pixel of a liquid crystal display device of the present invention.
  • FIG. 11 is a cross-sectional view taken along a line A-A′, B-B′ and C-C′ of FIG. 10.
  • FIG. 12 is an equivalent circuit diagram of a pixel array part.
  • FIG. 13 is a plan view showing another embodiment of the unit pixel of a liquid crystal display device of the present invention.
  • FIG. 14 is a cross-sectional view taken along a line A-A′, B-B′ and C-C′ of FIG. 13.
  • FIG. 15 is a plan view showing another embodiment of the unit pixel of a liquid crystal display device of the present invention.
  • FIG. 16 is a cross-sectional view taken along a line A-A′, B-B′ and C-C′ of FIG. 15.
  • FIG. 17 is a plan view showing another embodiment of the unit pixel of a liquid crystal display device of the present invention.
  • FIG. 18 is a cross-sectional view taken along a line A-A′ of FIG. 17.
  • FIG. 19 is an equivalent circuit diagram of a pixel array part.
  • FIG. 20 is a cross-sectional view showing one embodiment of the constitution of the liquid crystal display device of the present invention including liquid crystal and a counter substrate and is also a schematic cross-sectional view of liquid crystal cells of the transmission type liquid crystal display device according to embodiments 1 to 4.
  • FIG. 21 is a graph showing the relationship between an applied voltage and the transmittance in the constitution shown in FIG. 20.
  • FIG. 22 is a cross-sectional view showing another embodiment of the constitution of the liquid crystal display device of the present invention including liquid crystal and a counter substrate and is also a schematic cross-sectional view of liquid crystal cells of the partial reflection/transmission type liquid crystal display device according to embodiments 6 to 7.
  • FIG. 23 is a graph showing the relationship among an applied voltage, the transmittance and the reflectance in the constitution shown in FIG. 22.
  • FIG. 24 is an equivalent circuit diagram showing one embodiment of the whole constitution of the liquid crystal display device of the present invention.
  • FIG. 25 is an equivalent circuit diagram showing another embodiment of the whole constitution of the liquid crystal display device of the present invention.
  • FIG. 26 is a perspective view of the liquid crystal display device shown in FIG. 24 or FIG. 25.
  • FIG. 27 is an equivalent circuit diagram showing another embodiment of the whole constitution of the liquid crystal display device of the present invention.
  • FIG. 28 is a perspective view of the liquid crystal display device shown in FIG. 27.
  • FIG. 29 is a cross-sectional view showing one embodiment of a manufacturing method of the liquid crystal display device according to the present invention, wherein the first step of the method is shown.
  • FIG. 30 is a cross-sectional view showing one embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the second step of the method is shown.
  • FIG. 31 is a cross-sectional view showing one embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the third step of the method is shown.
  • FIG. 32 is a cross-sectional view showing one embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the fourth step of the method is shown.
  • FIG. 33 is a cross-sectional view showing one embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the fifth step of the method is shown.
  • FIG. 34 is a cross-sectional view showing one embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the sixth step of the method is shown.
  • FIG. 35 is a cross-sectional view showing one embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the seventh step of the method is shown.
  • FIG. 36 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the first step of the method is shown.
  • FIG. 37 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the second step of the method is shown.
  • FIG. 38 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the third step of the method is shown.
  • FIG. 39 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the fourth step of the method is shown.
  • FIG. 40 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the fifth step of the method is shown.
  • FIG. 41 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the sixth step of the method is shown.
  • FIG. 42 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the seventh step of the method is shown.
  • FIG. 43 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the eighth step of the method is shown.
  • FIG. 44 is a cross-sectional view showing another embodiment of the manufacturing method of the liquid crystal display device according to the present invention, wherein the ninth step of the method is shown.
  • FIG. 45 is a circuit diagram showing an embodiment of a vertical scanning circuit of the liquid crystal display device according to the present invention.
  • FIG. 46 is a view showing an example of a signal waveform of a circuit shown in FIG. 45.
  • FIG. 1 is a plan view showing one embodiment of a unit pixel of a liquid crystal display device according to the present invention.
  • a liquid crystal display part of the liquid crystal display device is constituted of a large number of pixels which are arranged in a matrix array and the unit pixel constitutes one of these pixels. Accordingly, the unit pixels which are arranged above and below as well as at left and at right of the unit pixel shown in FIG. 1 also have the same constitution.
  • FIG. 2 shows cross-sections taken along a line A-A′, B-B′ and C-C′ in FIG. 1.
  • FIG. 3 shows an equivalent circuit of a pixel array portion.
  • the overall constitution of the pixel array portion is formed on a buffer insulation film consisting of a Si 3 N 4 film 200 having a film thickness of 50 nm and a SiO 2 film 2 having a film thickness of 120 nm which is, in turn, formed on an alkalifree glass substrate 1 having a strain point of 670 degree centigrade.
  • the buffer insulation film plays a role of preventing the diffusion of impurities such as Na and the like from the glass substrate 1 .
  • poly-Si films 30 having a film thickness of 50 nm which correspond to two thin film transistors Q 1 , Q 2 are formed.
  • scanning wiring electrodes 10 made of Mo are formed by way of a gate insulation film 20 made of SiO 2 .
  • a second signal wiring electrode (reference voltage signal line) 11 is formed using the same Mo as the scanning wiring electrodes (gate signal lines) 10 .
  • An interlayer insulation film 21 made of SiO 2 is formed such that the interlayer insulation film 21 covers the above-mentioned all components.
  • a first signal wiring electrode (drain signal line) 12 formed of a three-layered metal film made of Mo/Al/Mo and a source electrode 13 are connected to source and drain layers formed on portions of one poly-Si layer via contact through holes formed in the interlayer insulation film 21 .
  • connection electrode 16 formed of a three-layered metal film made of Mo/Al/Mo is connected to one source and drain layers formed on portions of the other poly-Si layer and a second signal wiring electrode 11 via contact through holes formed in the interlayer insulation film 21 .
  • a second source electrode 13 ′ formed of a three-layered metal film made of Mo/Al/Mo is connected to the other source and drain layers via contact through holes formed in the interlayer insulation film 21 .
  • the Mo film which constitutes a layer below the Al film is provided for reducing the contact resistance between the poly-Si film 30 and Al, while the Mo film which constitutes a layer above the Al film is provided for reducing the contact resistance between the source electrodes 13 , 13 ′ and the pixel electrodes 14 , 15 .
  • a first pixel electrode 14 made of indium-tin-oxide (ITO) is connected to the source electrode 13 of one thin film transistor Q 1 via a contact through hole formed in the protective insulation film 22 and the organic insulation film 23 .
  • a second pixel electrode (counter electrode) 15 made of ITO is connected to the second source electrode 13 ′ of the other thin film transistor Q 2 via contact through holes formed in the protective insulation film 22 and the organic insulation film 23 .
  • the first pixel electrode 14 and the second pixel electrode 15 are constituted of comb-shaped electrodes which are meshed with each other.
  • a portion of the region which functions substantially as the pixel region is formed of a portion excluding a periphery of the region (corresponding to an opening portion of a black matrix formed on a liquid-crystal-side surface of the other substrate which faces one substrate in an opposed manner by way of liquid crystal). Accordingly, in the pixel region, the first pixel electrode 14 and the second pixel electrode 15 are alternately arranged in their parallel directions.
  • the first signal wiring electrode 12 is formed such that the electrode 12 crosses the scanning wiring electrode 10 , while the second signal wiring electrode 11 is arranged parallel to the scanning wiring electrode 10 .
  • a voltage supplied to the first signal wiring electrode 12 is applied to the first pixel electrode 14 through the first thin film transistor Q 1 and a voltage supplied to the second signal wiring electrode 11 is applied to the second pixel electrode 15 through the second thin film transistor Q 2 .
  • the liquid crystal is driven by an electric field generated between two pixel electrodes 14 , 15 .
  • the liquid crystal display device having such a constitution, by applying the differential voltages to the first and second signal wiring electrodes 12 , 11 , the voltages applied to respective pixel electrodes can be reduced to one half of the voltages required in the usual case.
  • two pixel electrodes 14 , 15 are constituted of transparent electrodes made of ITO and are formed into comb-shaped electrodes having a width of 4 ⁇ m which are meshed with each other, the driving voltage can be reduced.
  • the liquid crystal on the electrodes is driven by a fringe electric field within an area extended from an end portion of the electrode to an inner position disposed away from the end portion by 1.5 to 2 ⁇ m and hence, the liquid crystal functions in the same manner as the opening portion. Accordingly, the effective numerical aperture can be enhanced so that the light utilization efficiency is enhanced.
  • FIG. 4 is a plan view showing another embodiment of the unit pixel of the liquid crystal display device according to the present invention and corresponds to FIG. 1. Respective right, middle and left views of FIG. 5 respectively show cross-sections taken along a line A-A′, B-B′ and C-C′ in FIG. 4. Further, FIG. 6 is an equivalent circuit of the pixel array portion.
  • FIG. 1 Various types of film materials and their laminated structures used in this embodiment are similar to those of the embodiment 1. Further, this embodiment is similar to the embodiment 1 also with respect to the constitution that the voltage supplied to the first signal wiring electrode (drain signal line) 12 is applied to the first pixel electrode 14 through the first thin film transistor Q 1 and the voltage supplied to the second signal wiring electrode (reference voltage signal line) 11 is applied to the second pixel electrode 15 through the second thin film transistor Q 2 and the constitution that pixel electrodes 14 , 15 are constituted of transparent electrodes made of ITO and are formed into comb-shaped electrodes having a width of 4 ⁇ m which are meshed with each other.
  • this embodiment differs from the embodiment 1 in that the second signal wiring electrodes 11 are arranged approximately parallel to the first signal wiring electrodes 12 .
  • a member which corresponds to the connection electrode 16 in the embodiment 1 is used as the second signal wiring electrode 11 and is extended in the direction parallel to the first signal wiring electrode 12 .
  • the second signal wiring electrode 11 is arranged as a layer below one electrode out of the comb-shaped second pixel electrodes 15 .
  • the capacitance of the second signal wiring electrode 11 becomes a sum of charge holding capacitance of all pixels connected to the second signal wiring electrode 11 and the capacitance of the liquid crystal layer and hence, the capacitance of the second signal wiring electrode 11 becomes an extremely large value.
  • the resistance value of the second signal wiring electrode 11 is not sufficiently small, there arises a possibility that shadow wing in the lateral direction is generated due to the delay of signal thus giving rise to poor image quality.
  • the second signal wiring electrode 11 is arranged such that the second signal wiring electrode 11 is extended in the direction parallel to the first signal wiring electrode 12 .
  • the capacitance per a single piece of second signal wiring electrode 11 becomes a sum of a crossing capacitance between a common electrode (second signal wiring electrode 11 ) and a scanning electrode (scanning wiring electrode 10 ), a charge holding capacitance for selected one pixel and a capacitance of the liquid crystal layer and hence, the capacitance per a single piece of second signal wiring electrode 11 becomes a small value compared to the former value. Accordingly, the above-mentioned drawback on the image quality derived from the delay of signals is not generated.
  • FIG. 7 is a plan view showing another embodiment of the unit pixel of the liquid crystal display device according to the present invention and corresponds to FIG. 1.
  • Respective right, middle and left views of FIG. 8 respectively show cross-sections taken along a line A-A′, B-B′ and C-C′ in FIG. 7.
  • FIG. 9 shows an equivalent circuit of a pixel array portion.
  • the second signal wiring electrode 11 and the second pixel electrode 15 are directly connected to each other and a thin film transistor Q 2 is not inserted between them.
  • a thin film transistor Q 2 is not inserted between them.
  • a driving method it is possible to use either one of a frame inversion driving which inverts the polarity of voltage every 1 frame period and a line inversion driving which inverts the polarity of voltage every 1 scanning period.
  • this embodiment is similar to the embodiment 1 with respect to the constitution that two pixel electrodes 14 , 15 are constituted of transparent electrodes made of ITO and are formed into comb-shaped electrodes having a width of 4 ⁇ m which are meshed with each other. Accordingly, this embodiment can realize the enhancement of numerical aperture and the reduction of driving voltage power source in the same manner as the embodiment 1.
  • the thin film transistor By using the poly-Si thin film transistor having the large driving ability as the thin film transistor for driving pixel as in the case of this embodiment, the thin film transistor can be miniaturized and hence, the numerical aperture of the pixel can be enhanced.
  • FIG. 10 is a plan view showing another embodiment of the unit pixel of the liquid crystal display device according to the present invention and corresponds to FIG. 1. Respective right, middle and left views of FIG. 11 respectively show cross-sections taken along a line A-A′, B-B′ and C-C′ in FIG. 10. Further, FIG. 12 shows an equivalent circuit of a pixel array portion.
  • the second signal wiring electrode (reference voltage signal line) 11 and the second pixel electrode (counter electrode) 15 are directly connected to each other and a thin film transistor Q 2 is not inserted between them.
  • the second signal wiring electrode 11 is arranged approximately parallel to the first signal wiring electrode 12 . Due to such an arrangement, out of through holes which connect the second signal wiring electrode 11 and the connection electrode 16 , one through hole can be eliminated and hence, the numerical aperture can be enhanced.
  • the second signal wiring electrode 11 as the layer below one electrode out of the comb-shaped second pixel electrodes 15 , the lowering of the numerical aperture due to the presence of the opaque second signal wiring electrode 11 can be minimized. Still further, since the thin film transistor Q 2 is not present between the second signal wiring electrode 11 and the second pixel electrode 15 , the numerical aperture can be further enhanced.
  • This embodiment can obtain the largest numerical aperture among all of the embodiments described heretofore.
  • this embodiment can obtain the driving voltage reduction effect as that of the embodiment 3.
  • a driving method it is possible to use either one of a frame inversion driving which inverts the polarity of voltage every 1 frame period and a column inversion driving which inverts the polarity of voltage every 1 frame period but applies a voltage of an inverse polarity to the neighboring first signal wiring electrode 12 .
  • FIG. 13 is a plan view showing another embodiment of the unit pixel of the liquid crystal display device according to the present invention and corresponds to FIG. 1. Respective right, middle and left views of FIG. 14 respectively show cross-sections taken along a line A-A′, B-B′ and C-C′ in FIG. 13.
  • FIG. 1 Various types of film materials and their laminated structures used in this embodiment are similar to those of the embodiment 1. Further, this embodiment is similar to the embodiment 1 also with respect to the constitution that the voltage supplied to the first signal wiring electrode (drain signal line) 12 is applied to the first pixel electrode 14 through the first thin film transistor Q 1 and a voltage supplied to the second signal wiring electrode (reference voltage signal line) 11 is applied to the second pixel electrode (counter electrode) 15 through the second thin film transistor Q 2 and the constitution that pixel electrodes 14 , 15 are constituted of transparent electrodes made of ITO and are formed into comb-shaped electrodes having a width of 4 ⁇ m which are meshed with each other.
  • This embodiment is characterized in that the reflection electrode 13 ′ which reflects light is arranged as a layer below the comb-shaped electrodes 14 , 15 constituting the display region which are meshed with each other.
  • the reflection electrode 13 ′ is formed by extending the second source electrode 13 ′ in the embodiment 1 over the whole area of the pixel region. Accordingly, the reflection electrode 13 ′ can have a potential equal to that of the second pixel electrode 15 . Further, with respect to the constitution on the surface of the reflection portion, only the upper layer made of Mo is eliminated from the second source electrode 13 ′ constituted of a three-layered film made of Mo/Al/Mo. Due to such a constitution, the light reflectance on the surface of the reflection electrode 13 ′ can be largely increased from 40% to 90%.
  • the image display is obtained by reflecting the external light on the reflection electrode 13 ′.
  • the liquid crystal is driven by the lateral electric field formed between two pixel electrodes 14 , 15 and the fringe electric field formed between the first pixel electrode 14 and the reflection electrode 13 ′.
  • This embodiment differs from such conventional technique in that two comb-shaped electrodes which are meshed with each other are used and the liquid crystal is driven by both of the electric field generated between two opposing comb-shaped electrodes and the fringe electric field generated between one of the comb-shaped electrodes and the reflection electrode.
  • FIG. 15 is a plan view showing another embodiment of the unit pixel of the liquid crystal display device according to the present invention and corresponds to FIG. 1.
  • Respective right, middle and left views of FIG. 16 respectively show cross-sections taken along a line A-A′, B-B′ and C-C′ in FIG. 15.
  • this embodiment is similar to the embodiment 1 also with respect to the constitution that the voltage supplied to the first signal wiring electrode (drain signal line) 12 is applied to the first pixel electrode 14 through the first thin film transistor Q 1 and a voltage supplied to the second signal wiring electrode (reference voltage signal line) 11 is applied to a second pixel electrode (counter electrode) 15 through the second thin film transistor Q 2 and the constitution that two pixel electrodes 14 , 15 are constituted of transparent electrodes made of ITO and are formed into comb-shaped electrodes having a width of 4 ⁇ m which are meshed with each other.
  • the reflection electrode 13 ′ which partially reflects light is arranged as a layer below the comb-shaped electrodes 14 , 15 which constitute the display region and are meshed with each other thus constituting the partial reflection/transmission type display device.
  • the reflection electrode 13 ′ has the same layer structure as that of the embodiment 5 and only differs from the embodiment with respect to the constitution that the reflection electrode 13 ′ is formed extending over approximately half of the pixel region. That is, the reflection display region and the transmission display region are constituted by the region where the reflection electrode 13 ′ is formed and the other remaining region.
  • the image display is performed by reflecting the external light by the reflection electrode 13 ′ in the reflection display mode and by utilizing light from the backlight in the transmission display mode.
  • the transmission and reflection display principles are those which have been described heretofore.
  • the partial reflection/transmission type display device is suitable for a miniaturized equipment such as a portable telephone, a portable terminal or the like which is popularly used outdoors.
  • the driving voltage can be reduced so that the equipment of low power consumption can be realized.
  • the equipment can obtain the wide viewing angle which is the feature of the lateral electric field driving method, it is possible to obtain the favorable image display.
  • FIG. 17 is a plan view showing another embodiment of the unit pixel of the liquid crystal display device according to the present invention and corresponds to FIG. 1.
  • FIG. 18 shows a cross section of a part taken along a line A-A′ of FIG. 17.
  • FIG. 19 shows an equivalent circuit of a pixel array portion.
  • the first voltage supplied to the first signal wiring electrode (drain signal line) 12 is applied to the first pixel electrode 14 through the first thin film transistor Q 1 and the second voltage supplied to the second signal wiring electrode (reference voltage signal line) 11 is applied to the second pixel electrode (counter voltage) 15 through the second thin film transistor Q 2 .
  • a third voltage supplied to the first signal wiring electrode 12 is applied to a third pixel electrode 140 through a third thin film transistor Q 3 and a fourth voltage supplied to the second signal wiring electrode 11 is applied to a fourth pixel electrode 150 through a fourth thin film transistor Q 4 .
  • All of the first to the fourth pixel electrodes 14 , 15 , 140 , 150 are constituted as comb-shaped electrodes which have a width of 4 ⁇ m and are meshed with each other.
  • the reflection electrodes 130 ′ are formed as layers below the third and the fourth pixel electrodes 140 , 150 and are operated in the reflection display mode.
  • the display region constituted of the first and the second pixel electrodes 14 , 15 is operated in the transmission display mode and is operated as a partial reflection/transmission display device as a whole.
  • This embodiment is characterized in that a pair of thin film transistors Q 1 to Q 4 are formed on each one of the reflection display region and the transmission display region and these thin film transistors Q 1 to Q 4 are driven with the voltages which are different from each other.
  • the gate electrodes of the first and the second thin film transistors Q 1 , Q 2 are connected to the first scanning wiring electrode 10
  • the gate electrodes of the third and the fourth thin film transistors Q 3 , Q 4 are connected to the second scanning wiring electrode 100 .
  • the selection gate pulse voltages are applied at respectively different timing and the image signals are applied to the first signal wiring electrode 12 and the second signal wiring electrode 11 in synchronism with such an operation whereby it is possible to apply different voltages to respective reflection and transmission pixel electrodes.
  • this embodiment is constituted such that the thin film transistors Q 2 , Q 4 are interposed between the second signal wiring electrode (reference voltage signal line) 11 and the second or the fourth pixel electrode (counter voltage) 15 , 150 , it is needless to say that these thin film transistors Q 2 , Q 4 are eliminated.
  • FIG. 20 is a schematic cross-sectional view of liquid crystal cells of the transmission type liquid crystal display device according to the embodiments 1 to 4 of the present invention.
  • the scanning wiring electrodes (not shown in the drawing) and the signal wiring electrodes (not shown in the drawing) are formed in a matrix array and the first pixel electrodes 14 and the second pixel electrodes 15 made of ITO are driven through the thin film transistors (not shown in the drawing) formed in the vicinity of crossing points of the wiring electrodes.
  • Polarizers 505 are respectively formed on outer surfaces of a pair of glass substrates 1 , 508 and their polarization transmitting axes are arranged to cross each other at a right angle.
  • the liquid crystal layer 506 is filled between a lower orientation film ORI 1 and an upper orientation film ORI 2 which determine the direction of liquid crystal molecules and is sealed by a sealing member 520 (not shown in the drawing) which is served for fixing the glass substrate 1 and the counter glass substrate 508 .
  • the lower orientation film ORI 1 is formed over an organic insulation film 23 at the glass substrate 1 side.
  • the liquid crystal display device is assembled in such a manner that the layers at the glass substrate 1 side and the layers at the counter glass substrate 508 side are separately formed and, thereafter, the upper and the lower glass substrates 1 , 508 are superposed on each other, and the liquid crystal 506 is filled between the upper and lower glass substrate 1 , 508 .
  • FIG. 21 shows voltage/brightness (B-V) characteristics of the liquid crystal display element shown in FIG. 20.
  • “a” in the drawing indicates the B-V characteristics of the display device of the present invention and “b” in the drawing indicates the B-V characteristics of a conventional so-called lateral electric field type liquid crystal display element which uses metal electrodes with a distance of 14 ⁇ m between electrodes.
  • the voltage at which the transmittance becomes the peak value can be reduced from the conventional approximately 7V to 3.5V. Further, it is also understood that the peak value of the transmittance is also largely enhanced.
  • FIG. 22 is a schematic cross-sectional view of liquid crystal cells of the partial reflection/transmission type liquid crystal display device according to the embodiment 6 or 7 of the present invention.
  • the reflection electrodes 13 ′ are provided as layers below portions of the comb-shaped electrodes for realizing the partial reflection/transmission display.
  • FIG. 23 shows the voltage/brightness characteristics of the liquid crystal display element shown in FIG. 22.
  • “c” indicates the voltage dependency of the transmittance of the transmission display region and “d” indicates the voltage dependency of the reflectance of the reflection display region.
  • the voltage which generates the maximum reflectance or the maximum transmittance differs between the reflection display and the transmission display.
  • FIG. 24 shows an equivalent circuit of the whole display device which integrates peripheral driving circuits on the same substrate together with thin film transistor active matrix.
  • the display device includes the pixels having the constitution shown in FIG. 1 and FIG. 2, a thin film transistor active matrix 50 consisting of the scanning wiring electrodes 10 indicated by Y 1 -Yend, the first signal wiring electrodes 12 indicated by X 1 R, X 1 G, X 1 B-XendB and the second signal wiring electrodes 11 indicated by C 1 -Cend, a vertical scanning circuit 51 for driving the thin film transistor active matrix 50 , the first signal-side driving circuit 53 , the second signal-side driving circuit 52 which supplies signals to the second signal wiring electrodes 11 , and a level shifter LS.
  • the number of scanning lines is 600
  • the number of signal lines is 2400
  • the diagonal size of the display part is approximately 5 inches.
  • the pixels having the constitution shown in FIG. 4 and FIG. 5 may be used.
  • the thin film transistor active matrix 50 is constituted of the scanning wiring electrodes 10 indicated by Y 1 -Yend, the first signal wiring electrode 12 indicated by X 1 R, X 1 G, X 1 B-XendB and the second signal wiring electrode 11 indicated by C 1 R-C 1 end.
  • the vertical scanning circuit 51 for driving the matrix 50 , the first signal-side driving circuit 53 , the second signal-side driving circuit 52 which supplies signals to the second signal wiring electrodes 11 , and the level shifter LS are arranged in the periphery of the matrix 50 .
  • This configuration differs from the configuration of FIG. 24 in that the second signal-side driving circuit 52 is arranged at the lower side of the display part.
  • the vertical scanning circuit 51 is constituted of a shift register circuit driven by a vertical clock signal and the level shifter to which the row selection voltage is supplied and outputs the row selection pulse to the scanning wiring electrodes 10 .
  • the horizontal scanning circuit (first signal-side driving circuit) 53 includes a shift register circuit SRH which is driven by a horizontal clock signal, a latch circuit L 1 which latches image data DATA (not shown in the drawing) which is digitized into 6 bits, a digital-analogue converter circuit DAC which decodes the latched digital data to analogue data, a line memory LM (not shown in the drawing) which temporarily stores an output from the digital-analogue converter circuit DAC for 1 row, and an analogue switch SW which is served for supplying the image data stored in the line-memory LM to the first signal wiring electrodes 12 .
  • the reference voltage signals which are weighted corresponding to respective bits are supplied to the digital-analogue converter circuit DAC.
  • These driving circuits are constituted of the complementary type (CMOS) poly-Si thin film transistors or N type poly-Si thin film transistors.
  • FIG. 26 is an overall constitutional view of the liquid crystal display element shown in FIG. 24 or FIG. 25.
  • the glass substrate 1 on which the thin film transistor active matrix, the peripheral driving circuits and the like are formed and the counter glass substrate 508 which forms color filters on the inner surface thereof are laminated to each other by means of the sealing member 520 and the liquid crystal composition is filled in a space defined by the glass substrate 1 , the counter glass substrate 508 and the sealing member 520 .
  • the polarization films (polarizers) 505 are arranged on the respective outer surfaces of the glass substrate 1 and the counter glass substrate 508 in such a manner that their polarization transmission axes cross each other at a right angle.
  • Connection terminals 521 are formed at one side on the TFT substrate (glass substrate) 1 and display data, control signals, power source voltages and the like are supplied to the TFT substrate (glass substrate) 1 through FPCs 522 which are connected to the connection terminals 521 .
  • the driving circuits such as the digital analogue converters and the like are integrated on the substrate using the poly-Si thin film transistors, the number of external connection terminals and the number of external parts can be largely reduced. Further, with the use of the pixels of the present invention, the liquid crystal driving voltage can be decreased so that the output voltage of the signal-side driving circuit can be reduced whereby the power consumption of such a circuit can be also reduced.
  • FIG. 27 shows an equivalent circuit of the whole display device which integrates a portion of the peripheral driving circuits on the same substrate together with the thin film transistor active matrix.
  • the display device includes the thin film transistor active matrix 50 consisting of the pixels having the constitution shown in FIG. 1 and FIG.
  • the number of scanning lines is 480
  • the number of signal lines is 1980
  • the diagonal size of the display part 1 is approximately 7 inches.
  • all of the driving circuits formed of poly-Si thin film transistors are constituted by using only the N-type thin film transistors.
  • FIG. 45 shows a vertical scanning circuit which is constituted by using only the N-type thin film transistors and FIG. 46 shows an example of waveforms of operational signals.
  • the circuit is a dynamic circuit which is constituted of the N-type thin film transistors and bootstrap capacitance Cb and is driven based on a reference potential Vss, a start signal Vin, a clock pulse voltage V 1 and a clock pulse voltage V 2 which is complementary with the clock pulse voltage V 1 .
  • the circuit is not provided with a power source voltage supply wiring which is usually necessary for the CMOS circuit and hence, the circuit is operated using the charge supplied from the complementary clock voltages of V 1 , V 2 .
  • FIG. 28 is an overall perspective constitutional view of the liquid crystal display element shown in FIG. 27.
  • the glass substrate 1 on which the thin film transistor active matrix, the peripheral driving circuits and the like are formed and the counter glass substrate 508 which forms color filters on the inner surface thereof are laminated to each other by means of the sealing member 520 and the liquid crystal composition is filled in a space defined by the glass substrate 1 , the counter glass substrate 508 and the sealing member 520 .
  • the polarization films (polarizers) 505 are arranged on the respective outer surfaces of the glass substrate 1 and the counter glass substrate 508 in such a manner that their polarization transmission axes cross each other at a right angle.
  • Horizontal-side-driver LSIs DRV 1 -DRV 3 are directly mounted on one side of the TFT substrate (glass substrate) 1 and display data, control signals, power source voltages and the like are supplied to the driver LSIs through connection terminals 521 and FPCs 522 which are connected to the connection terminals 521 .
  • the conversion of digital display data into the analogue data is performed in the inside of the horizontal-side driver LSIs DRV 1 -DRV 3 .
  • the peripheral driving circuits which are constituted of poly-Si thin film transistors are only constituted of the vertical-side scanning circuit (vertical scanning circuit 51 ) and the switching circuit SW which divides and supplies analogue data outputted from the driver LSIs (horizontal-side driver LSIs DRV 1 -DRV 3 ) to a plurality of signal wiring (first signal wiring electrodes 12 ).
  • the output of one driver LSI is divided into a plurality of signal wirings due to the horizontal-circuit-side switching circuit SW, the number of output pins of the driver LSI can be reduced. Due to such a constitution, the power consumption of the driver LSI can be reduced.
  • a Si 3 N 4 film 200 having a film thickness of 50 nm is formed on the substrate 1 by a plasma CVD method using a mixed gas of SiH 4 , NH 3 and N 2 . Subsequently, by a plasma CVD method using a mixed gas of tetraethoxysilane and O 2 , a SiO 2 film 2 having a film thickness of 120 nm is formed. The formation temperature of both of Si 3 N 4 and SiO 2 is 400 degree centigrade.
  • an intrinsic hydrogenerated amorphous silicon film 300 having a film thickness of 50 nm is formed on the SiO 2 film 2 .
  • the film formation temperature is 400 degree centigrade and a hydrogen quantity immediately after the formation of film is approximately 5 at %.
  • the substrate is subjected to annealing for approximately 30 minutes at 450 degree centigrade so as to discharge hydrogen in the inside of the hydrogenerated amorphous silicon film 300 .
  • the hydrogen quantity after annealing is approximately 1 at %.
  • excimer laser light LASER having a wavelength of 308 nm is irradiated to the amorphous silicon film with the fluence of 400 mJ/cm 2 so as to obtain the approximately intrinsic poly-crystalline silicon film 30 by fusing and recrystallizing the amorphous silicon film.
  • the laser beam is formed in a thin line having a width of 0.3 mm and a length of 200 mm and is irradiated to the substrate while moving the substrate in the direction substantially perpendicular to the longitudinal direction of the beam at a pitch of 10 ⁇ m.
  • the irradiation is performed in the nitrogen atmosphere (FIG. 29).
  • a given resist pattern is formed on the poly-silicon film 30 by a usual photolithography method and the poly-silicon film 30 is machined into a given shape by a reactive ion etching using a mixed gas of CF 4 and O 2 .
  • a SiO 2 film having a film thickness of 100 nm is formed by a plasma CVD method using a mixed gas made of tetraethoxysilane and oxygen so as to obtain a gate insulation film 20 .
  • the mixing ratio between the tetraethoxysilane and O 2 at this stage of operation is set to 1:50 and the formation temperature is 400 degree centigrade.
  • a Mo film having a film thickness of 200 nm is formed using a sputtering method and, thereafter, a given resist pattern PR is formed on the Mo film using a usual photolithography method. Then, the Mo film is machined in a given shape by a wet etching process using a mixed acid so that the scanning wiring electrodes 10 and the second signal wiring electrodes 11 are obtained.
  • P ions are implanted by an ion implantation method with an acceleration voltage of 60 KeV and a dose quantity of 1E15 (cm ⁇ 2 ) thus forming the source and drain regions 31 of the N type thin film transistors (FIG. 30).
  • P ions are implanted again by an ion implantation method with an acceleration voltage of 65 KeV and a dose quantity of 2E13 (cm ⁇ 2 ) thus forming the LDD regions 32 of the N type thin film transistors (FIG. 31).
  • the length of the LDD region 32 is determined based on a side etching quantity of Mo when Mo is subjected to wet etching. In an example according to this embodiment, the length is approximately 0.8 ⁇ m. This length can be controlled by changing the over-etching time of Mo.
  • the irregularities of the length of LDD in the inside of the substrate is approximately 0.1 ⁇ m and hence, the irregularities can be suppressed favorably.
  • the implanted impurities are activated by a rapid thermal annealing (RTA) method which irradiates light of an excimer lamp or a metal halide lamp to the substrate.
  • RTA rapid thermal annealing
  • the annealing using the light of the excimer lamp or the metal halide lamp which contains a large quantity of ultraviolet rays UV, only the poly-Si layers can be selectively heated so that damages caused by heating the glass substrate 1 can be obviated.
  • the activation of the impurities can be performed by the heat treatment at a temperature of equal to or more than 450 degree centigrade provided that the heat treatment does not generate problems such as the shrinkage or deformation by bending of the substrate (FIG. 32).
  • a SiO 2 film having a film thickness of 500 nm is formed by a plasma CVD method using a mixed gas of tetraethoxysilane and oxygen thus obtaining an interlayer insulation film 21 .
  • the mixture ratio of tetraethoxysilane and oxygen is 1:5 and the formation temperature is 350 degree centigrade.
  • a contact through hole is formed in the interlayer insulation film 21 by a wet etching process using a mixed acid.
  • a Ti film having a film thickness of 50 nm, an Al-Nd alloy film having a film thickness of 500 nm and a Ti film having a film thickness of 50 nm are formed sequentially in a laminated manner by a sputtering method and, thereafter, a given resist pattern is formed.
  • these films are etched altogether by a reactive ion etching process using a mixed gas of BCl 3 and Cl 2 thus obtaining the first signal wiring electrodes 12 , the source electrodes 13 , 13 ′ and the connection electrodes 16 (FIG. 33).
  • a Si 3 N 4 film (protective insulation film) 22 having a film thickness of 400 nm is formed by a plasma CVD method using a mixed gas of SiH 4 , NH 3 and N 2 . Further, acrylic photosensitive resin having a film thickness of approximately 3.5 ⁇ m is coated on the Si 3 N 4 film 22 by a spin coating method and, thereafter, the exposure and the development are performed using a given mask to form a through hole in the acrylic resin. Subsequently, by performing the baking for 20 minutes at 230 degree centigrade so as to bake the acrylic resin thus obtaining an organic protective film (organic insulation film) 23 having a film thickness of 2.3 ⁇ m.
  • the Si 3 N 4 film which constitutes a lower layer is machined by a reactive ion etching process using CF 4 thus forming a through hole in the Si 3 N 4 film (FIG. 34).
  • the films in two layers can be patterned with one photolithography step so that the steps can be simplified.
  • an ITO film having a film thickness of 70 nm is formed by a sputtering method and, thereafter, the ITO film is machined in a given shape by a wet etching process using a mixed acid thus forming the first and second pixel electrodes 14 , 15 whereby the active matrix substrate is completed (FIG. 35).
  • a Si 3 NO 4 film 200 having a film thickness of 50 nm is formed by a plasma CVD method using a mixed gas of SiH 4 , NH 3 and N 2 .
  • a SiO 2 film 2 having a film thickness of 120 nm is formed.
  • the formation temperature of both of Si 3 N 4 and SiO 2 is 400 degree centigrade.
  • an intrinsic hydrogenerated amorphous silicon film 300 having a film thickness of 50 nm is formed on the SiO 2 film 2 .
  • the film formation temperature is 400 degree centigrade and a hydrogen quantity immediately after the formation of film is approximately 5 at %.
  • the substrate is subjected to annealing for approximately 30 minutes at 450 degree centigrade so as to discharge hydrogen in the inside of the hydrogenerated amorphous silicon film 300 .
  • a SiO 2 film 201 having a film thickness of 100 nm is formed by a plasma CVD method using a mixed gas made of tetraethoxysilane and O 2 .
  • boron (B+) is implanted by an ion implantation method with an acceleration voltage of 40 KeV and a dose quantity of 5E12 (cm ⁇ 2 ). Boron is used for adjusting a threshold voltage of the thin film transistors (FIG. 36).
  • the SiO 2 film 201 is removed using a buffer hydrofluoric acid and, thereafter, excimer laser beams LASER having a wavelength of 308 nm are irradiated to the amorphous silicon film with the fluence of 400 mJ/cm 2 so as to fuse and re-crystallize the amorphous silicon film thus obtaining a P type polycrystalline silicon film 30 (FIG. 37).
  • a Mo film having a film thickness of 200 nm is formed using a sputtering method and, thereafter, a given resist pattern is formed on the Mo film using a usual photolithography method. Then, the Mo film is machined in a given shape by a reactive ion etching process using CF 4 so that the gate electrodes 10 N of the N type thin film transistors are obtained.
  • phosphorous (P) ions are implanted by an ion implantation method with an acceleration voltage of 60 KeV and a dose quantity of 1E15 (cm ⁇ 2 ) thus forming the source and drain regions 31 (not shown in the drawing) of the N type thin film transistors.
  • the P type thin film transistor (left side in FIG. 38) has the whole element protected by the pattern of the Mo film and the photo resist film PR so that the phosphorous ions are not implanted (FIG. 38).
  • the substrate is processed with a mixed acid and the machined Mo electrodes are subjected to side etching so as to slim the pattern.
  • P ions are implanted by an ion implantation method with an acceleration voltage of 65 KeV and a dose quantity of 2E13 (cm ⁇ 2 ) thus forming the LDD region 32 (not shown in the drawing) of the N type thin film transistor (FIG. 39).
  • the length of the LDD region 32 is controlled based on the side etching time using a mixed acid.
  • a given resist pattern PR is formed on the Mo film and the gate electrodes 10 P of the P type thin film transistors and wiring patterns other than the thin film transistors are obtained by a reactive ion etching using CF 4 .
  • the whole N type thin film transistor is protected by the photo resist pattern PR so that the transistor is protected from an etching gas (FIG. 40).
  • the implanted impurities are activated by a rapid thermal annealing (RTA) method which irradiates light UV of an excimer lamp or a metal halide lamp to the substrate (FIG. 41).
  • RTA rapid thermal annealing
  • a SiO 2 film having a film thickness of 500 nm is formed by a plasma CVD method using a mixed gas of tetraethoxysilane and oxygen thus obtaining an interlayer insulation film 21 .
  • a contact through hole is formed in the interlayer insulation film 21 by a wet etching process using a mixed acid.
  • a Ti film having a film thickness of 50 nm, an Al—Nd alloy film having a film thickness of 500 nm and a Ti film having a film thickness of 50 nm are formed sequentially in a laminated manner by a sputtering and, thereafter, a given resist pattern is formed.
  • these films are etched altogether by a reactive ion etching process using a mixed gas of BCl 3 and Cl 2 thus obtaining the first signal wiring electrodes 12 , the source electrodes 13 , 13 ′ (not shown in the drawing) and the connection electrodes 16 (not shown in the drawing) (FIG. 42).
  • a Si 3 N 4 film (protective insulation film) 22 having a film thickness of 400 nm is formed by a plasma CVD method using a mixed gas of SiH 4 , NH 3 and N 2 . Further, acrylic photosensitive resin having a film thickness of approximately 3.5 ⁇ m is coated on the Si 3 N 4 film 22 by a spin coating method and, thereafter, the exposure and the development are performed using a given mask to form a through hole in the acrylic resin. Subsequently, by performing the baking for 20 minutes at 230 degree centigrade so as to bake the acrylic resin, an organic protective film 23 having a film thickness of 2.3 ⁇ m is obtained.
  • the Si 3 N 4 film which constitutes a lower layer is machined by a reactive ion etching process using CF 4 thus forming a through hole in the Si 3 N 4 film (FIG. 43).
  • an ITO film having a film thickness of 70 nm is formed by a sputtering method and, thereafter, the ITO film is machined in a given shape by a wet etching process using a mixed acid thus forming the first and second pixel electrodes 14 , 15 whereby the active matrix substrate is completed (FIG. 44).
  • the liquid crystal display device which exhibits the low power consumption, the wide viewing angle and the sufficient brightness can be realized at a low cost.

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