US10686120B2 - Method for producing ceramic multi-layer components - Google Patents

Method for producing ceramic multi-layer components Download PDF

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Publication number
US10686120B2
US10686120B2 US14/913,367 US201414913367A US10686120B2 US 10686120 B2 US10686120 B2 US 10686120B2 US 201414913367 A US201414913367 A US 201414913367A US 10686120 B2 US10686120 B2 US 10686120B2
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partial blocks
block
longitudinal direction
ceramic multilayer
partial
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US20160204339A1 (en
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Marion Ottlinger
Robert Krumphals
Alexander Glazunov
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TDK Electronics AG
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Epcos AG
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/05Manufacture of multilayered piezoelectric or electrostrictive devices, or parts thereof, e.g. by stacking piezoelectric bodies and electrodes
    • H10N30/053Manufacture of multilayered piezoelectric or electrostrictive devices, or parts thereof, e.g. by stacking piezoelectric bodies and electrodes by integrally sintering piezoelectric or electrostrictive bodies and electrodes
    • H01L41/273
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/30Stacked capacitors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G13/00Apparatus specially adapted for manufacturing capacitors; Processes specially adapted for manufacturing capacitors not provided for in groups H01G4/00 - H01G11/00
    • H01G13/006Apparatus or processes for applying terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • H01G4/012Form of non-self-supporting electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/12Ceramic dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES OR LIGHT-SENSITIVE DEVICES, OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/228Terminals
    • H01G4/232Terminals electrically connecting two or more layers of a stacked or rolled capacitor
    • H01L41/047
    • H01L41/083
    • H01L41/0838
    • H01L41/335
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/08Shaping or machining of piezoelectric or electrostrictive bodies
    • H10N30/085Shaping or machining of piezoelectric or electrostrictive bodies by machining
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/50Piezoelectric or electrostrictive devices having a stacked or multilayer structure
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/50Piezoelectric or electrostrictive devices having a stacked or multilayer structure
    • H10N30/508Piezoelectric or electrostrictive devices having a stacked or multilayer structure adapted for alleviating internal stress, e.g. cracking control layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/80Constructional details
    • H10N30/87Electrodes or interconnections, e.g. leads or terminals
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/42Piezoelectric device making
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/43Electric condenser making
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49126Assembling bases
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/49155Manufacturing circuit on or in base
    • Y10T29/49163Manufacturing circuit on or in base with sintering of base

Definitions

  • the present invention relates to a method for producing ceramic multilayer components and a ceramic multilayer component.
  • Embodiments of the invention specify an improved ceramic multilayer component and a method for the production thereof.
  • a method for producing ceramic multilayer components comprises providing green layers for the ceramic multilayer components.
  • the green layers are preferably layers made of a raw material, which is not sintered, for example, for the ceramic multilayer components.
  • the method furthermore comprises providing the green layers with inner electrodes.
  • the inner electrodes can comprise copper (Cu).
  • the inner electrodes are made of copper.
  • the green layers are preferably each coated with at least one inner electrode or inner electrode layer.
  • the method furthermore comprises the stacking of the green layers provided with the inner electrodes to form a stack.
  • the stacking is preferably performed such that the inner electrodes are each arranged between two adjacent green layers.
  • the method comprises, after the stacking of the green layers, the compression of the stack to form a block.
  • the method furthermore comprises the isolation of the block into partial blocks, wherein each partial block has a longitudinal direction.
  • a partial block of the block can be a bar.
  • the longitudinal direction of the block can relate in the present application to a main extension direction of the block.
  • Front faces of the block can extend in particular in parallel to the longitudinal direction.
  • the longitudinal direction furthermore preferably extends perpendicularly to a depth or width of the block.
  • the mentioned front faces preferably refer to lateral surfaces of the block, on which the inner electrodes can be contacted with outer electrodes or an outer contact.
  • the block is cut to isolate the block.
  • the block is cut only once, in particular for the isolation, transversely to the longitudinal direction and/or along the longitudinal direction of the block, preferably to form two or more partial blocks of equal length.
  • the number of the partial blocks can be between 2 and 10.
  • the block or the already cut parts of the block is/are cut multiple or a plurality of times along a depth in parallel to the longitudinal direction.
  • the block is cut multiple times transversely to the longitudinal direction for the isolation.
  • the number of the partial blocks can be between 2 and 10 in this case.
  • the block is cut in parallel to the longitudinal direction more often than transversely to the longitudinal direction of the block for the isolation.
  • the production or processing effort in particular the thermal treatment and the mechanical machining, can advantageously be reduced, because a smaller number of parts or partial blocks have to be processed or machined, in particular on surfaces on which the partial blocks are provided with outer electrodes (see below).
  • lateral surfaces which extend in parallel to the longitudinal direction of the block, can advantageously be processed or machined in parallel in subsequent method steps.
  • a surface normal of these lateral surfaces can be oriented perpendicularly to the longitudinal direction in this case.
  • the method furthermore comprises, preferably after the isolation of the block into the partial blocks, the thermal treatment of the partial blocks.
  • the thermal treatment comprises decarbonization of the partial blocks.
  • the decarbonization can furthermore comprise, for example, to expel carbon from the partial blocks, subjecting the partial blocks to a special, for example, low-oxygen atmosphere.
  • the partial blocks are sintered during the thermal treatment.
  • the sintering is advantageously performed after the decarbonization.
  • the method furthermore comprises, after the thermal treatment, the mechanical machining of surfaces of the partial blocks.
  • the mechanical machining can be a removal of material from the surfaces of the partial blocks, preferably grinding.
  • the method furthermore comprises, preferably after the mechanical machining, the provision of the partial blocks with outer electrodes.
  • the partial blocks are preferably provided with the outer electrodes on lateral surfaces, which are parallel to the longitudinal direction.
  • the inner electrodes are advantageously contacted, i.e., connected in an electrically conductive manner to the outer electrodes.
  • the method furthermore comprises the isolation of the partial blocks in each case transversely to the longitudinal direction into individual ceramic multilayer components.
  • a partial block is preferably cut multiple times transversely to the longitudinal direction, to form individual ceramic multilayer components.
  • the partial blocks are each isolated transversely to the longitudinal direction after the mechanical machining.
  • Multilayered ceramic for example, piezoelectric, multilayer components, for example, actuators
  • Layer stacks for example, consisting of ceramic films and inner electrodes, are isolated in this case, after being compressed into actuators, by separating methods. They are then decarbonized, sintered, ground, and metalized or contacted thereafter as individual components.
  • Such processing requires a large amount of effort, on the one hand, because each actuator is machined individually, and it is linked to technical problems, on the other hand. These include possible warping, for example, distortion, of the actuators during sintering, which can have particularly strong effects in actuators having a small cross section. The consequence can be that the ceramic multilayer components or actuators are unusable or increased grinding effort is necessary, with corresponding material loss.
  • a further problem can relate to a grinding allowance, a grinding tolerance, or an offset of insulating regions of the respective actuator during the grinding of the lateral surfaces.
  • the cross-sectional area fulfills requirements for the surface quality, and no further machining (for example, grinding) is thus required of, for example, 2 sides of each actuator;
  • the symmetry of insulating regions can be increased by setting cutting positions in the completely processed bar;
  • the surfaces of the partial blocks are mechanically machined on opposing outer or lateral surfaces, on which the partial blocks are provided with outer electrodes, preferably in a later method step.
  • the outer or lateral surfaces are preferably circumferential surfaces of the block or partial block and not the surfaces of the top and bottom sides.
  • the surfaces of the top and bottom sides can also be mechanically processed, for example, to a lesser extent than the mentioned circumferential surfaces of the block.
  • the mechanical machining of the surfaces of the partial blocks comprises four outer surfaces of each partial block.
  • the method comprises, after providing the partial blocks with outer electrodes, providing the partial blocks with an outer contact, for example, by a solder or by a soldering process.
  • the outer contact can be an electrical conductor or can comprise such an electrical conductor, which can be connected in an electrically conductive manner to the outer electrode via the solder.
  • the partial blocks are isolated, after the provision of the partial blocks with the outer electrodes and after the provision of the partial blocks with the outer contact, into individual ceramic multilayer components in each case transversely to the longitudinal direction.
  • the ceramic multilayer component is a piezoelectric multilayer component or a piezoelectric actuator.
  • the ceramic multilayer component is a multilayer capacitor.
  • a ceramic for example, piezoelectric multilayer component is specified, which is producible or produced by means of the method described here.
  • the proposed method comprises providing green layers for the ceramic multilayer components, providing the green layers with inner electrodes, stacking the green layers provided with the inner electrodes to form a stack and subsequently compressing the stack to form a block, isolating the block into partial blocks each having a longitudinal direction, thermally treating the partial blocks and subsequently mechanically machining surfaces of the partial blocks, providing the partial blocks with outer electrodes, and isolating the partial blocks in each case transversely to the longitudinal direction into individual ceramic multilayer components.
  • FIG. 1 schematically shows a block of green layers provided with inner electrodes.
  • FIG. 2 schematically shows a partial block which was isolated from the block.
  • FIG. 3 indicates the isolation of a partial block.
  • FIG. 4 indicates a production method for a ceramic multilayer component, on the basis of which the advantages of the method according to FIGS. 1 to 3 are explained.
  • the figures indicate a production method for ceramic multilayer components.
  • FIG. 1 shows a block 1 .
  • the block 1 has preferably been formed or produced by compressing a stack made of green layers 5 , which are layered on one another and are provided with inner electrodes (not explicitly shown).
  • the stack direction corresponds to the direction Z in FIG. 1 .
  • the green layers 5 have preferably been previously provided and have preferably each been provided with at least one of the inner electrodes.
  • the green layers 5 can be films for a ceramic or ceramic layer to be produced.
  • the inner electrodes can be printed onto the ceramic films, for example, by screenprinting.
  • the block 1 has a longitudinal direction X. After the stacking of the green layers 5 provided with inner electrodes, at least one inner electrode layer is preferably located between two adjacent green layers 5 .
  • the inner electrodes or inner electrode layers can furthermore be arranged laterally offset alternately in the stack direction, so that, for example, only every second inner electrode layer is accessible and can be contacted on one side of the stack.
  • the block 1 is isolated into partial blocks 3 after the compression. Such a partial block 3 is shown in FIG. 2 .
  • the contours of the partial blocks 3 are indicated in FIG. 1 by cuts or cutting directions 2 .
  • the isolation is preferably cutting of the block 1 into partial blocks 3 .
  • the cuts are preferably performed during the isolation in parallel and perpendicularly to the longitudinal direction X.
  • “perpendicularly to the longitudinal direction X” preferably means transversely to the longitudinal direction.
  • the block 1 is preferably cut only once perpendicularly or transversely to the longitudinal direction X. Alternatively, the block 1 can be cut multiple times transversely to the longitudinal direction X.
  • the number of the partial blocks 3 which were cut transversely to the longitudinal direction X can be between 2 and 10.
  • the block 1 is preferably cut multiple times (for example, four times in FIG. 1 ).
  • the number of the partial blocks which were cut in parallel to the longitudinal direction X can be between 2 and 50, for example (cf. Y direction in FIG. 1 ).
  • the block is preferably cut more often in parallel to the longitudinal direction X than transversely to the longitudinal direction X of the block 1 for the isolation, since in this way the production effort can be reduced (see above).
  • the cut surfaces of the partial blocks preferably already fulfill the requirements for the desired surface quality in this case, for example, with reference to the roughness.
  • FIG. 2 shows a partial block 3 or bar as an example of a plurality of partial blocks 3 isolated from the block 1 .
  • the proposed method furthermore comprises, after the isolation of the block 1 into the partial blocks 3 , the thermal treatment of the partial blocks 3 .
  • the thermal treatment can comprise decarbonization of the partial blocks 3 to expel carbon from the partial blocks 3 , for example, in a low-oxygen atmosphere.
  • the low-oxygen atmosphere can be an atmosphere having reduced oxygen partial pressure.
  • oxidation of the inner electrodes, which are made of copper (Cu), for example, can be prevented or restricted by a reduced oxygen partial pressure.
  • the thermal treatment preferably comprises sintering of the green layers to form ceramic layers.
  • the method furthermore comprises, preferably after the thermal treatment, the mechanical machining of top surfaces or lateral surfaces of the partial blocks 3 .
  • the mechanical machining is preferably performed on the lateral surfaces 6 , 7 , 8 , and 9 of the partial block or blocks 3 .
  • each individual partial block 3 is preferably provided with outer electrodes (not explicitly shown).
  • the outer electrodes are preferably attached or deposited on main lateral surfaces of the partial blocks 3 . These main lateral surfaces are identified in FIG. 2 with the reference signs 6 and 7 .
  • the insulating regions can be formed by the lateral offset of adjacent inner electrodes in the stack direction, so that, for example, during the provision of the partial blocks with outer electrodes, only every second inner electrode is contacted and/or connected in an electrically conductive manner to the respective outer electrode in each case on the lateral surfaces 6 and 7 .
  • FIG. 3 illustrates the isolation of the partial blocks transversely to the longitudinal direction X into individual ceramic multilayer components 100 .
  • each partial block 3 is isolated or cut transversely to the longitudinal direction X after the provision with the outer electrodes.
  • a subsequent (after the isolation) thermal and/or mechanical treatment of at least the lateral surfaces 6 and 7 of the ceramic multilayer component 100 (on the right in FIG. 3 ) is advantageously no longer necessary due to the proposed method.
  • the proposed method can be applied during the production of multilayered piezoelectric actuators having copper (Cu) inner electrodes.
  • components or actuators having other electrode types for example, made of Ag or AgPd, can also be processed or produced in the same manner.
  • This technology can also be applied in other products, for example, in multilayered ceramic capacitors, wherein the multilayered components or multilayer components are processed over many processing steps as a part of the block or as an entire block and not in isolated form.
  • FIG. 4 a production method of a ceramic multilayer component is indicated, on the basis of which the advantages of the method according to FIGS. 1 to 3 are explained.
  • a block 1 according to FIG. 1 is especially shown.
  • the contours of the partial blocks 3 , into which the block 1 is isolated are indicated, as described above, by cuts or cutting directions 2 .
  • the right image shows a partial block 3 or bar as an example of a plurality of partial blocks 3 isolated from the block 1 .
  • the cuts 2 are produced or extend in parallel and transversely to the longitudinal direction X here for the isolation.
  • the block 1 can be cut precisely or approximately as often as in parallel to the longitudinal direction X in this method—in contrast to the above-described method.
  • the method described in FIGS. 1 to 3 offers the advantages over the method from FIG. 4 of significantly simplified production of the ceramic multilayer component (as described above).
  • the invention is not restricted by the description on the basis of the exemplary embodiments. Rather, the invention comprises every novel feature and every combination of features, which includes in particular every combination of features in the patent claims, even if this feature or this combination is not itself explicitly specified in the patent claims or exemplary embodiments.
US14/913,367 2013-08-27 2014-07-14 Method for producing ceramic multi-layer components Active 2035-01-18 US10686120B2 (en)

Applications Claiming Priority (7)

Application Number Priority Date Filing Date Title
DE102013109267 2013-08-27
DE102013109267 2013-08-27
DE102013109267.5 2013-08-27
DE102013111121.1A DE102013111121B4 (de) 2013-08-27 2013-10-08 Verfahren zur Herstellung von keramischen Vielschichtbauelementen
DE102013111121 2013-10-08
DE102013111121.1 2013-10-08
PCT/EP2014/065038 WO2015028192A1 (de) 2013-08-27 2014-07-14 Verfahren zur herstellung von keramischen vielschichtbauelementen

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US10686120B2 true US10686120B2 (en) 2020-06-16

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JP (1) JP6224839B2 (de)
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WO (1) WO2015028192A1 (de)

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DE102021119120A1 (de) * 2020-08-12 2022-02-17 Defond Components Limited Kühlsystem zur kühlung einer elektronischen komponente eines elektrischen geräts

Citations (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208880A (ja) 1985-03-14 1986-09-17 Nec Corp 電歪効果素子の製造方法
US5237239A (en) * 1990-10-05 1993-08-17 Nec Corporation Piezoelectric actuator
US20020149297A1 (en) * 2001-04-12 2002-10-17 Takashi Yamamoto Piezoelectric element
US20030070271A1 (en) 2001-10-17 2003-04-17 Murata Manufacturing Co., Ltd. Method of producing multilayer piezoelectric resonator
US20030107867A1 (en) * 2001-12-06 2003-06-12 Akio Iwase Stacked ceramic body and production method thereof
US7087970B2 (en) 2003-08-29 2006-08-08 Fuji Photo Film Co., Ltd. Laminated structure, method of manufacturing the same and ultrasonic transducer array
JP2007134561A (ja) * 2005-11-11 2007-05-31 Fujitsu Ltd 多層圧電素子の形成方法
US20070200109A1 (en) * 2006-02-16 2007-08-30 Giacomo Sciortino Method for the manufacture of a piezoelectric component
WO2008092740A2 (de) 2007-01-31 2008-08-07 Siemens Aktiengesellschaft Piezokeramischer vielschichtaktor und verfahren zu seiner herstellung
US20090033179A1 (en) * 2005-03-01 2009-02-05 Ibiden Co., Ltd. Multilayer piezoelectric element
DE102007040249A1 (de) 2007-08-27 2009-03-05 Robert Bosch Gmbh Verfahren zur Herstellung eines Piezoaktors mit elektrisch isolierender Schutzschicht sowie Piezoaktormodul und Piezoaktor mit elektrisch isolierender Schutzschicht
JP2009065014A (ja) 2007-09-07 2009-03-26 Nec Tokin Corp 積層型圧電アクチュエータ素子
DE102009028259A1 (de) 2009-08-05 2011-02-10 Robert Bosch Gmbh Verfahren zur Herstellung von piezoelektrischen Werkstücken
US20120019978A1 (en) 2010-07-21 2012-01-26 Murata Manufacturing Co., Ltd. Ceramic electronic component
US20120228997A1 (en) * 2009-11-25 2012-09-13 Murata Manufacturing Co., Ltd. Electromechanical Transducer and Actuator
US20120229952A1 (en) 2011-03-09 2012-09-13 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic capacitor and method of manufacturing the same
DE102012101351A1 (de) 2012-02-20 2013-08-22 Epcos Ag Vielschichtbauelement und Verfahren zum Herstellen eines Vielschichtbauelements
DE102012105059A1 (de) 2012-06-12 2013-12-12 Epcos Ag Verfahren zur Herstellung eines Vielschichtbauelements und Vielschichtbauelement

Patent Citations (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61208880A (ja) 1985-03-14 1986-09-17 Nec Corp 電歪効果素子の製造方法
US5237239A (en) * 1990-10-05 1993-08-17 Nec Corporation Piezoelectric actuator
US20020149297A1 (en) * 2001-04-12 2002-10-17 Takashi Yamamoto Piezoelectric element
US20030070271A1 (en) 2001-10-17 2003-04-17 Murata Manufacturing Co., Ltd. Method of producing multilayer piezoelectric resonator
US20030107867A1 (en) * 2001-12-06 2003-06-12 Akio Iwase Stacked ceramic body and production method thereof
DE602004004841T2 (de) 2003-08-29 2007-11-08 Fujifilm Corp. Laminierte Struktur, Verfahren zur Herstellung derselben und Vielfach-Ultraschallwandlerfeld
US7087970B2 (en) 2003-08-29 2006-08-08 Fuji Photo Film Co., Ltd. Laminated structure, method of manufacturing the same and ultrasonic transducer array
US20090033179A1 (en) * 2005-03-01 2009-02-05 Ibiden Co., Ltd. Multilayer piezoelectric element
JP2007134561A (ja) * 2005-11-11 2007-05-31 Fujitsu Ltd 多層圧電素子の形成方法
US20070200109A1 (en) * 2006-02-16 2007-08-30 Giacomo Sciortino Method for the manufacture of a piezoelectric component
WO2008092740A2 (de) 2007-01-31 2008-08-07 Siemens Aktiengesellschaft Piezokeramischer vielschichtaktor und verfahren zu seiner herstellung
DE102007004813A1 (de) 2007-01-31 2008-08-14 Siemens Ag Piezokeramischer Vielschichtaktor und Verfahren zu seiner Herstellung
US7905000B2 (en) 2007-01-31 2011-03-15 Siemens Aktiengesellschaft Piezoceramic multilayer actuator and method for the production thereof
DE102007040249A1 (de) 2007-08-27 2009-03-05 Robert Bosch Gmbh Verfahren zur Herstellung eines Piezoaktors mit elektrisch isolierender Schutzschicht sowie Piezoaktormodul und Piezoaktor mit elektrisch isolierender Schutzschicht
JP2009065014A (ja) 2007-09-07 2009-03-26 Nec Tokin Corp 積層型圧電アクチュエータ素子
DE102009028259A1 (de) 2009-08-05 2011-02-10 Robert Bosch Gmbh Verfahren zur Herstellung von piezoelektrischen Werkstücken
US20120228997A1 (en) * 2009-11-25 2012-09-13 Murata Manufacturing Co., Ltd. Electromechanical Transducer and Actuator
US20120019978A1 (en) 2010-07-21 2012-01-26 Murata Manufacturing Co., Ltd. Ceramic electronic component
JP2012044148A (ja) 2010-07-21 2012-03-01 Murata Mfg Co Ltd セラミック電子部品
US20120229952A1 (en) 2011-03-09 2012-09-13 Samsung Electro-Mechanics Co., Ltd. Multilayer ceramic capacitor and method of manufacturing the same
JP2012191165A (ja) 2011-03-09 2012-10-04 Samsung Electro-Mechanics Co Ltd 積層セラミックキャパシタ及びその製造方法
DE102012101351A1 (de) 2012-02-20 2013-08-22 Epcos Ag Vielschichtbauelement und Verfahren zum Herstellen eines Vielschichtbauelements
US20150042212A1 (en) 2012-02-20 2015-02-12 Epcos Ag Multilayer Component and Method for Producing a Multilayer Component
DE102012105059A1 (de) 2012-06-12 2013-12-12 Epcos Ag Verfahren zur Herstellung eines Vielschichtbauelements und Vielschichtbauelement
US20150123516A1 (en) 2012-06-12 2015-05-07 Epcos Ag Method for producing a multi-layer component and multi-layer component

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Machine Translation (English) of Japanese Patent Publication, JP 61-208880, dated Jan. 2018. *

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WO2015028192A1 (de) 2015-03-05
JP6224839B2 (ja) 2017-11-01
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DE102013111121B4 (de) 2020-03-26
US20160204339A1 (en) 2016-07-14

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