US10672772B2 - Semiconductor device and method for fabricating the same - Google Patents

Semiconductor device and method for fabricating the same Download PDF

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US10672772B2
US10672772B2 US15/835,629 US201715835629A US10672772B2 US 10672772 B2 US10672772 B2 US 10672772B2 US 201715835629 A US201715835629 A US 201715835629A US 10672772 B2 US10672772 B2 US 10672772B2
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bottom electrode
layer
plasma
pressure
plasma process
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US20180269211A1 (en
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Beom-Yong Kim
Hun Lee
Deok-Sin Kil
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SK Hynix Inc
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SK Hynix Inc
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    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/75—Electrodes comprising two or more layers, e.g. comprising a barrier layer and a metal layer
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
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    • H01L21/02172—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides
    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
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    • H01L21/02175—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal
    • H01L21/02189—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing at least one metal element, e.g. metal oxides, metal nitrides, metal oxynitrides or metal carbides characterised by the metal the material containing zirconium, e.g. ZrO2
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    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/022—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being a laminate, i.e. composed of sublayers, e.g. stacks of alternating high-k metal oxides
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    • H01L21/02244—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of a metallic layer
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    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
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    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
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Definitions

  • Exemplary embodiments of the present invention relate to a semiconductor device and a method for fabricating the same and, more particularly, to a semiconductor device including a capacitor and a method for fabricating the semiconductor device.
  • a memory device such as a Dynamic Random Access Memory (DRAM) may include capacitors.
  • Each capacitor may include a bottom electrode, a dielectric layer, and a top electrode. High surface energy of the bottom electrode may cause oxygen loss from the dielectric layer. The oxygen loss from the dielectric layer may reduce the capacitance of the capacitor and increase leakage current in the capacitor.
  • DRAM Dynamic Random Access Memory
  • Embodiments of the present invention are directed to an improved semiconductor device including an improved capacitor, and a method for fabricating the semiconductor device having the improved capacitor.
  • the improved capacitor exhibits low leakage current, improved capacitance, and excellent reliability.
  • a method for fabricating a semiconductor device includes: forming a its bottom electrode having a high aspect ratio; forming an interface layer by sequentially performing a first plasma process and a second plasma process onto a surface of the bottom electrode; forming a dielectric layer over the interface layer; and forming a top electrode over the dielectric layer.
  • the forming of the interface layer may include performing the first plasma process in an ion plasma-dominant atmosphere at a low pressure, and performing the second plasma process in a radical plasma-dominant atmosphere at a high pressure.
  • the second plasma process may be performed at a higher pressure than at a pressure which the first plasma process performed.
  • the second plasma process may be performed at a pressure that is higher by approximately 1 Torr, and the first plasma process may be performed at a pressure that is lower than approximately 100 mTorr.
  • the forming of the interface layer may include performing the first plasma process in a nitrogen ion plasma-dominant atmosphere at a low pressure, and performing the second plasma process in an oxygen radical plasma-dominant atmosphere at a high pressure.
  • the first plasma process may include a low-pressure plasma nitridation
  • the second plasma process may include a high-pressure plasma oxidation
  • the bottom electrode may include a cylindrical shape having an aspect ratio of at least approximately 1:10 or higher.
  • the bottom electrode may include a pillar shape having an aspect ratio of at least approximately 1:10 or higher.
  • the bottom electrode may include a lower bottom electrode and an upper bottom electrode, and the first plasma process locally may nitrided a surface of the upper bottom electrode, and the second plasma process may oxidize the lower bottom electrode and the nitrided surface of the upper bottom electrode.
  • the bottom electrode may include a metal nitride.
  • the bottom electrode may include a titanium nitride or a tantalum nitride.
  • the interface layer may include a metal oxide.
  • the interface layer may include a titanium oxide or a tantalum oxide.
  • the dielectric layer may include ZAZ ZrO 2 /Al 2 O 3 /ZrO 2 ) or HAH HfO 2 /Al 2 O 3 /HfO 2 ).
  • a method for fabricating a semiconductor device includes: forming a mold layer over a lower structure; forming an opening by etching the mold layer; forming a bottom electrode including a metal nitride inside the opening; exposing the bottom electrode by removing the mold layer; forming an interface layer over the bottom electrode by sequentially exposing the bottom electrode to a low-pressure plasma nitridation process and a high-pressure plasma oxidation process; forming a dielectric layer over the interface layer; and forming a top electrode over the dielectric layer.
  • the low-pressure plasma nitridation process may be performed in a nitrogen ion plasma-dominant atmosphere at a low pressure
  • the high-pressure plasma oxidation process may be performed in an oxygen radical plasma-dominant atmosphere at a high pressure.
  • the high-pressure plasma oxidation process may be performed at a pressure that is higher by approximately 1 Torr, and the low-pressure plasma nitridation process may be performed at a pressure that is lower than approximately 100 mTorr.
  • the bottom electrode may include a cylindrical shape or a pillar shape having an aspect ratio of at least approximately 1:10 or higher.
  • the bottom electrode may include a titanium nitride or a tantalum nitride.
  • the interface layer may include a titanium oxide or a tantalum oxide.
  • FIG. 1A is a schematic cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention.
  • FIGS. 1B and 1C are schematic cross-sectional views illustrating a semiconductor device in accordance with a modified example of an embodiment of the present invention.
  • FIGS. 1D and 1E illustrate a semiconductor device in accordance with another modified example of an embodiment of the present invention.
  • FIGS. 2A to 2E are schematic cross-sectional views describing a method for forming an interface layer shown in FIG. 1A in accordance with an embodiment of the present invention.
  • FIGS. 3A and 3B are diagrams illustrating X-ray Photoelectron Spectroscopy (XPS) analysis results of the chemical states of a surface nitridated TiN surface and a surface oxidized TiN surface.
  • XPS X-ray Photoelectron Spectroscopy
  • FIG. 3C is a diagram illustrating a Transmission Electron Microscopic (TEM) photograph of a capacitor shown in FIG. 2E taken along a line A-A′.
  • TEM Transmission Electron Microscopic
  • FIGS. 4A to 4C are diagrams illustrating comparative examples where a plasma oxidation is performed independently.
  • FIG. 5 a diagram illustrating a method for forming a tantalum oxide on the surface of a tantalum nitride bottom electrode.
  • FIG. 6 is a cross-sectional view illustrating a semiconductor device in accordance with an embodiment of the present invention.
  • FIGS. 7A to 7D are cross-sectional views illustrating an example of a method for forming an interface layer shown in FIG. 6 .
  • FIGS. 8A to 8C are diagrams illustrating a semiconductor device in accordance with an embodiment of the present invention.
  • FIGS. 9A to 9H are cross-sectional views illustrating a first example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • FIGS. 10A to 10F are cross-sectional views illustrating a second example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • FIGS. 11A to 11G are cross-sectional views illustrating a third example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • FIGS. 12A to 12G illustrate a fourth example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • first layer is referred to as being “on” a second layer or “on” a substrate, it not only refers to a case where the first layer is formed directly on the second layer or the substrate but also a case where a third layer exists between the first layer and the second layer or the substrate.
  • DRAM Dynamic Random Access Memory
  • FIG. 1A is a simplified cross-sectional view illustrating a semiconductor device 100 in accordance with an embodiment of the present invention.
  • the semiconductor device 100 may include a lower structure 110 and a capacitor 120 formed on the lower structure 110 .
  • the capacitor 120 may include a bottom electrode 111 , an interface layer 112 , a dielectric layer 113 , and a top electrode 114 .
  • the interface layer 112 , the dielectric layer 113 , and the top electrode 114 may be sequentially stacked over the bottom electrode 111 .
  • the bottom electrode 111 may have a high aspect ratio.
  • the aspect ratio may refer to a ratio of width to height.
  • the high aspect ratio may refer to an aspect ratio that is greater than approximately 1:1.
  • the bottom electrode 111 may have a high aspect ratio of approximately 1:10 or higher.
  • the bottom electrode 111 may be of a cylindrical shape.
  • the bottom electrode 111 may be of a pillar shape other than the cylindrical shape.
  • the bottom electrode 111 may be referred to as a storage node.
  • the bottom electrode 111 may be made of a metal material that includes at least one metal element.
  • suitable metal materials for the bottom electrode 111 include a titanium nitride (TiN), a tantalum nitride (TaN), or a combination thereof.
  • the bottom electrode 111 may include a metal nitride that includes at least one metal element and nitrogen.
  • the metal element may be preferably a transition metal.
  • the bottom electrode 111 may be a metal nitride having a stoichiometric composition ratio.
  • the composition ratio of the metal element and nitrogen may be approximately 1:1.
  • the bottom electrode 111 may be made of a titanium nitride (TiN) or a tantalum nitride (TaN).
  • the bottom electrode 111 may be formed through an Atomic Layer Deposition process (ALD-TiN).
  • the bottom electrode 111 may include a lower portion 111 L and an upper portion 111 U.
  • the lower portion 111 L and the upper portion 111 U are presented for the sake of convenience in description, and the height of the lower portion 111 L and the height of the upper portion 111 U may be the same or different from each other.
  • the lower portion 111 L may be referred to as a lower bottom electrode 111 L
  • the upper portion 111 U may be referred to as an upper bottom electrode 111 U.
  • the bottom electrode has a U shape.
  • the interface layer 112 may be formed conformally over the bottom electrode 111 .
  • the interface layer 112 may be made of a metal material which includes the same metal element that is included in the bottom electrode 111 .
  • the interface layer 112 may be an oxide of the metal element of the bottom electrode.
  • the interface layer 112 may be formed by oxidizing the surface of the bottom electrode 111 .
  • the interface layer 112 may be a metal oxide that includes at least one metal element and oxygen.
  • the interface layer 112 and the bottom electrode 111 may include the same metal element.
  • the bottom electrode 111 is a titanium nitride
  • the interface layer 112 may be a titanium oxide.
  • the interface layer 112 may be a tantalum oxide.
  • the interface layer 112 may be formed by performing a plasma process on the surface of the bottom electrode 111 at least two times. Through the plasma process, the interface layer 112 may be formed to have a uniform thickness over the bottom electrode 111 . Although the bottom electrode 111 have a high aspect ratio, the its interface layer 112 may be formed with a uniform thickness.
  • the interface layer 112 may include a first interface layer 112 U and a second interface layer 112 L based on the position of the bottom electrode 111 .
  • the first interface layer 112 U may be formed over the upper bottom electrode 111 U.
  • the second interface layer 112 L may be formed over the lower bottom electrode 111 L.
  • the first interface layer 112 U and the second interface layer 112 L that are formed by performing the plasma process a plurality of times may preferably have the same thickness.
  • the first interface layer 112 U may have a first thickness D 1
  • the second interface layer 112 L may have a second thickness D 2 .
  • the first thickness D 1 and the second thickness D 2 may be the same.
  • the plasma process that is performed a plurality of times may include a plasma nitridation process and a plasma oxidation process that are performed sequentially.
  • the first interface layer 112 U may be formed through the plasma nitridation process and the plasma oxidation process
  • the second interface layer 112 L may be formed through the plasma oxidation process.
  • a method for forming the interface layer 112 may be described later. Part of the interface layer 112 that is between consecutive bottom electrode layers 111 may be in direct contact with the lower structure 110 .
  • the dielectric layer 113 may be formed over the interface layer 112 to conform to the shape of the interface layer 112 .
  • the dielectric layer 113 may be made of a high-k material.
  • the dielectric layer 113 may have a higher dielectric constant than that of a silicon oxide.
  • Suitable, high-k materials may include a hafnium oxide (HfO 2 ), a zirconium oxide (ZrO 2 ), an aluminum oxide (Al 2 O 3 ), a titanium oxide (TiO 2 ), a tantalum oxide (Ta 2 O 5 ), a niobium oxide (Nb 2 O 5 ), or a strontium titanium oxide (SrTiO 3 ).
  • the dielectric layer 113 may be formed in a single layer or may be formed as a composite layer that includes two or more layers of the aforementioned high-k materials.
  • a top electrode 114 may be formed over the dielectric layer 113 .
  • the top electrode 114 may be made of a metal-based material.
  • the top electrode 114 may be made of titanium (Ti) titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ) platinum (Pt), or a combination thereof.
  • the top electrode 114 may be made of a titanium nitride.
  • the top electrode 114 may be formed through an Atomic Layer Deposition process (ALD-TiN).
  • ALD-TiN Atomic Layer Deposition process
  • the top electrode 114 may be made of titanium nitride formed through the ALD-TiN process.
  • the top electrode 114 may include a material including the same material as that of the bottom electrode 111 .
  • the top electrode 114 may have a single-layer or a multi-layer structure. In a multi-layer structure, the top electrode 114 may be formed by sequentially stacking a first metal-containing layer, a silicon germanium layer, and a second metal-containing layer.
  • Suitable first metal-containing and second metal-containing layers may include titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TAM), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt), or a combination thereof.
  • the first metal-containing layer may be a tantalum nitride (TaN), and the second metal-containing layer may be tungsten nitride layer/tungsten layer (WN/W) where a tungsten nitride (WN) and tungsten (W) are stacked.
  • the silicon germanium layer may be doped with a dopant such as, for example, boron.
  • the dielectric layer 114 may have a flat top surface.
  • the dielectric layer 113 may be formed of a zirconium oxide-based material having excellent leakage current characteristics while sufficiently decreasing an equivalent-oxide thickness (EOT).
  • EOT equivalent-oxide thickness
  • the dielectric layer 113 may be made of ZAZ (ZrO 2 /Al 2 O 3 /ZrO 2 ).
  • the dielectric layer 113 may be made of HAH (HfO 2 /Al 2 O 3 /HfO 2 ).
  • FIGS. 1B and 1C illustrate the capacitor 120 of a semiconductor device in accordance with a modified example of an embodiment of the present invention.
  • a dielectric layer stack formed of TZAZ may be formed over the bottom electrode 111 .
  • the interface layer 112 includes a titanium oxide (TiO 2 ) and the dielectric layer 113 includes HAH (HfO 2 /Al 2 O 3 /HfO 2 ), a dielectric layer stack formed of THAH (TiO 2 /HfO 2 /Al 2 O 3 /HfO 2 ) may be formed over the bottom electrode 111 .
  • the capacitance of the capacitor 120 may be increased by the stack of the interface layer 112 and the dielectric layer 113 .
  • the capacitance may be increased even more by using the interface layer 112 and thereby suppressing oxygen loss from the dielectric layer 113 .
  • FIGS. 1D and 1E are simplified cross-sectional views illustrating the capacitor 120 of a semiconductor device in accordance with another modified example of an embodiment of the present invention.
  • a bottom electrode 111 ′ and a top electrode 114 ′ may include a tantalum nitride (TaN).
  • the bottom electrode 111 ′ may include a tantalum nitride (TaN), and the top electrode 114 may include a titanium nitride (TiN).
  • the interface layer 112 ′ may include a tantalum oxide (Ta 2 O 5 ).
  • a dielectric layer stack formed of TZAZ (Ta 2 O 5 /ZrO 2 /Al 2 O 3 /ZrO 2 ) may be formed over the bottom electrode 111 .
  • the interface layer 112 ′ includes a tantalum oxide (Ta 2 O 5 ) and the dielectric layer 113 includes HAH (HfO 2 /Al 2 O 3 /HfO 2 ), a dielectric layer stack formed of THAH (Ta 2 O 5 /HfO 2 /Al 2 O 3 /HfO may be formed over the bottom electrode 111 ′.
  • HAH HfO 2 /Al 2 O 3 /HfO 2
  • FIGS. 2A to 2E are simplified cross-sectional views illustrating a method for forming the interface layer 112 shown in FIG. 1A in accordance with an embodiment of the present invention.
  • the bottom electrode 111 may be formed over the lower structure 110 .
  • the bottom electrode 111 may include a titanium nitride.
  • the bottom electrode 111 may be exposed to a first plasma process 131 .
  • the first plasma process 131 may be performed at a low pressure.
  • a great deal of nitrogen ion plasma 131 N may be formed.
  • an additive gas may be added.
  • the additive gas may include argon (Ar) or helium (He).
  • the first plasma process 131 may include a low-pressure plasma nitridation (LPPN).
  • LPPN low-pressure plasma nitridation
  • the first plasma process 131 may be performed in the atmosphere of a nitrogen-containing gas at a low pressure.
  • the first plasma process 131 may be performed using a nitrogen gas (N 2 ) or an ammonia (NH 3 ) gas at a pressure of approximately 100 mTorr or lower.
  • the highly reactive nitrogen ion plasma 131 N may be bombarded 131 B into the upper portion of the bottom electrode 111 .
  • the first plasma process 131 may be performed at a low pressure in the atmosphere where the nitrogen ion plasma 131 N is dominant.
  • a nitrogen-rich layer 132 may be formed.
  • the nitrogen-rich layer 132 may include a nitrogen-rich titanium nitride (N-rich Ti x N y ).
  • the upper portion of the bottom electrode 111 may not be completely transformed into the nitrogen-rich layer 132 .
  • the bottom electrode 111 may include the lower bottom electrode 111 L and the upper bottom electrode 111 U.
  • the upper bottom electrode 111 U may include the nitrogen-rich layer 132 and a non-plasma processed portion 132 N.
  • the non-plasma processed portion 132 N may be defined as located inside of the upper bottom electrode 111 U, and the nitrogen-rich layer 132 may be defined as a surface of the upper bottom electrode 111 U.
  • the nitrogen-rich layer 132 may have a form of covering the non-plasma processed portion 132 N.
  • the lower bottom electrode 111 L is not affected by the plasma process. In short, the lower bottom electrode 111 L does not include the nitrogen-rich layer 132 .
  • the nitrogen-rich layer 132 is locally formed in the upper bottom electrode 111 U through the first plasma process 131 .
  • the bottom electrode 111 may have an ununiform nitrogen profile.
  • the lower bottom electrode 111 L may remain as a titanium nitride
  • the upper bottom electrode 111 U may include a titanium nitride and a nitrogen-rich titanium nitride that are mixed together. Therefore, the lower bottom electrode 111 L may be of a titanium nitride having a stoichiometric composition ratio
  • the upper bottom electrode 111 U may be of a nitrogen-rich titanium nitride.
  • the upper bottom electrode 111 U and the lower bottom electrode 111 L may be formed of a titanium nitride having different nitrogen content.
  • the lower bottom electrode 111 L may be formed of a titanium nitride having a stoichiometric composition ratio, and the upper bottom electrode 111 U may be formed of a nitrogen-rich titanium nitride.
  • the bottom electrode 111 where the nitrogen-rich layer 132 is formed may be exposed to a second plasma process 133 .
  • the second plasma process 133 may be performed at a higher pressure than that the first plasma process 131 .
  • the second plasma process 133 may be performed at a pressure that is higher by approximately 1 torr.
  • the second plasma process 133 may be performed in the atmosphere of oxygen.
  • the second plasma process 133 may include a high-pressure plasma oxidation (HPPO).
  • Oxygen ion plasma readily loses energy at a high pressure. Therefore, the amount of the oxygen ion plasma 133 I may be decreased, and oxygen radical plasma 133 R may remain to be dominant. Differently from the oxygen ion plasma 133 I, the oxygen radical plasma 133 R is neutral species, which is advantageous for uniform oxidation. As described, the second plasma process 133 may be performed at a high pressure in the atmosphere where the oxygen radical plasma 133 R is dominant.
  • the highly reactive oxygen ion plasma 133 I may still remain in a minute amount. Since oxygen plasma particles 133 R/ 133 I are implanted into the upper bottom electrode 111 U, the oxygen plasma particles may contact the upper bottom electrode 111 U more than the lower bottom electrode 111 L.
  • the nitrogen-rich layer 132 exists in the upper bottom electrode 111 U, reduction may occur prior to oxidation in the upper bottom electrode 111 U.
  • nitrogen 133 N of the nitrogen-rich layer 132 is substituted with oxygen, oxidation of TiN is delayed. While the oxidation of TiN is delayed a downwardly oxygen radical plasma 133 R′ may reach the lower bottom electrode 111 L.
  • the first interface layer 112 U may be formed over the upper bottom electrode 111 U, and the second interface layer 112 L may be formed over the lower bottom electrode 111 L.
  • the first interface layer 112 U is formed in the upper bottom electrode 111 U through a nitrogen reduction reaction/an oxygen substitution reaction 133 A as shown in FIG. 2C .
  • the first interface layer 112 U may be formed by a substitution reaction 133 A of the oxygen plasma particles 133 I/ 133 R to the nitrogen atoms 133 N of the nitrogen-rich layer 132 .
  • the second interface layer 112 L is formed in the lower bottom electrode 111 L through an oxidation reaction 133 B.
  • the first interface layer 112 U may have a first thickness D 1
  • the second interface layer 112 L may have a second thickness D 2 .
  • the first thickness D 1 and the second thickness D 2 may be the same.
  • the first interface layer 112 U and the second interface layer 112 L may be formed based on the following principle.
  • the bottom electrode 111 is formed of a titanium nitride (TiN)
  • the nitrogen of the nitrogen-rich layer 132 which is a nitrogen-rich titanium nitride (N-rich Ti x N y ) is substituted with oxygen. Therefore, when the nitrogen-rich layer 132 is reduced, a titanium oxide (TiO 2 ) may be formed as the first interface layer 112 U.
  • the titanium nitride is oxidized through the oxidation reaction 133 B, and a titanium oxide (TiO 2 ) may be formed as the second interface layer 112 L.
  • the interface layer 112 By sequentially performing a series of processes, which includes the low-pressure first plasma process 131 and the high-pressure second plasma process 133 , the interface layer 112 having a uniform thickness can be formed on the surface of the bottom electrode 111 .
  • the interface layer 112 may include the first interface layer 112 U and the second interface layer 112 L.
  • the first interface layer 112 U and the second interface layer 112 L may include an oxide.
  • the first interface layer 112 U and the second interface layer 112 L may be of an oxide that includes the metal element of the bottom electrode 111 .
  • the first interface layer 112 U and the second interface layer 112 L may include a titanium oxide (TiO 2 ).
  • FIGS. 3A and 3B illustrate X-ray Photoelectron Spectroscopy (XPS) analysis results of the chemical states of a surface nitridated TiN surface and a surface oxidized TiN surface.
  • XPS X-ray Photoelectron Spectroscopy
  • Non-limiting examples of the stoichiometric components may include TiO x N y , TiO x , Ti 2 O 3 , TiN x , and the like.
  • stoichiometric components may include TiO x N y , TiO x , Ti 2 O 3 , TiN x , and the like.
  • sub-phase components may be decreased while titanium oxide (TiO 2 ) component is increased.
  • TiO 2 titanium oxide
  • TiO 2 titanium oxide with excellent film quality may be formed. This is because Gibb's free energy (
  • the dielectric layer 113 and the top electrode 114 may be formed over the bottom electrode 111 where the interface layer 112 having the uniform thickness is formed.
  • FIG. 3C is a Transmission Electron Microscopic (TEM) photograph of a capacitor in FIG. 2E taken along a line A-A′.
  • FIG. 3C shows a thin interface layer 112 is formed in a uniform thickness on the surface of the bottom electrode 111 .
  • the interface layer 112 When the interface layer 112 is thick, the total capacitance of the capacitor may be rather decreased. Therefore, the interface layer 112 may be formed thin in a thickness of approximately 2 nm or less. For controlling the thickness of the interface layer 112 to be thin, a plasma oxidation may be advantageous over a thermal oxidation. Also, to form the interface layer 112 in a uniform thickness in the upper and lower portions of the bottom electrode 111 , a low-pressure plasma nitridation and a high-pressure plasma oxidation may be performed sequentially.
  • FIGS. 4A to 4C illustrate comparative examples where a plasma oxidation is performed independently.
  • the bottom electrode 111 and the dielectric layer 113 may be formed.
  • the bottom electrode 111 may include a titanium nitride (TiN x ), and the dielectric layer 113 may include a zirconium oxide (ZrO 2 ).
  • the bottom electrode 111 may have a columnar structure. Therefore, the bottom electrode 111 may include a plurality of grain boundaries GB.
  • a titanium nitride (TiN) that is applied as the bottom electrode 111 may have a high crystallinity, and may be grown into a columnar structure.
  • a titanium nitride of a columnar structure may include a plurality of instable grain boundaries GB, i.e., TiN x .
  • Non-stoichiometric compound on the interface between the bottom electrode 111 and the dielectric layer 113 .
  • a non-stoichiometric compound there may be TiO x N y , TiO x , TiN x and the like. Since the non-stoichiometric compound has a strong power of drawing in oxygen, it may cause oxygen loss of the dielectric layer 113 .
  • the oxygen loss of the dielectric layer 113 may cause parasitic capacitance 113 B.
  • the oxygen loss of the dielectric layer 113 may cause parasitic capacitance 113 B of a zirconium oxide (ZrO x ) and a titanium oxide (TiO x ).
  • the oxygen loss of the dielectric layer 113 may decrease the capacitance of the dielectric layer 113 and increase leakage current in the capacitor.
  • the surface of the bottom electrode 111 is oxidized.
  • a thick oxide may be formed that may decrease the capacitance of the capacitor. Therefore, it is important to control the thickness of the oxide to be thin.
  • the surface defects of the bottom electrode 111 may be removed so as to suppress the oxygen loss of the dielectric layer 113 .
  • oxygen may pre-occupy the grain boundaries GB of a titanium nitride (TiN) to form a stable titanium oxynitride (TiON) (TiN x ⁇ TiON), and when the nitrogen is substituted on the surface of the titanium nitride (TiN), a titanium oxide (TiO 2 ) may be formed (TiO x ⁇ TiO 2 ).
  • TiN titanium nitride
  • TiON titanium oxynitride
  • TiO 2 titanium oxide
  • an interface layer 112 T can be formed on the surface of the bottom electrode 111 . After all, the formation of ZrO x and TiO x may be suppressed through the plasma oxidation so as to increase the total capacitance of the capacitor and decrease leakage current in the capacitor.
  • the complexity of the process for forming a capacitor is increased drastically.
  • the aspect ratio of the bottom electrode 11 may be increased, and as an inlet through which a source gas is inputted becomes narrow, it is difficult to maintain the upper bottom electrode 111 U and the lower bottom electrode 111 L in a uniform status.
  • a thick oxide D 1 ′ may be formed over the upper bottom electrode 111 U and a thin oxide D 2 ′ may be formed over the lower bottom electrode 111 L because the lower bottom electrode 111 L is not oxidized very well.
  • the bottom electrode 111 may collapse due to the thick oxide D 1 ′ that is formed over the upper bottom electrode 111 U, which is problematic.
  • the interface layer 112 may be formed uniformly on the surface of the bottom electrode 111 having a high aspect ratio by combining the low-pressure plasma nitridation and the high-pressure plasma oxidation, as illustrated in FIGS. 2A to 2E .
  • capacitance of a capacitor may be improved and the leakage current in a capacitor may be decreased as well as forming a capacitor having excellent reliability.
  • a plasma nitridation may be performed alone. In this case, it is difficult to suppress the loss of oxygen from the dielectric layer 113 .
  • the bottom electrode 111 ′ illustrated in FIGS. 1D and 1E may include a tantalum nitride (TaN).
  • TaN tantalum nitride
  • the use of a tantalum nitride (TaN) may be advantageous for decreasing leakage current because a tantalum nitride (TaN) has a high work function, compared with a titanium nitride (TiN). Also, with a high film density, it is possible to form a stable structure.
  • the interface layer 112 ′ may include a tantalum oxide (Ta 2 O 5 ).
  • FIG. 5 illustrates a method for forming a tantalum oxide on the surface of a tantalum nitride bottom electrode.
  • the tantalum nitride bottom electrode 111 ′ may be exposed to the low-pressure first plasma process 131 of FIG. 2A .
  • a nitrogen-rich layer 132 ′ is locally formed over the upper bottom electrode 111 U′ of the tantalum nitride bottom electrode 111 ′.
  • the nitrogen-rich layer 132 ′ may be of a nitrogen-rich tantalum nitride (N-rich Ta x N).
  • the tantalum nitride bottom electrode 111 ′ where the nitrogen-rich layer 132 ′ is formed may be exposed to a high-pressure second plasma process 133 ′.
  • the high-pressure second plasma process 133 ′ may be the same as the high-pressure second plasma process 133 of FIG. 2C .
  • a first interface layer 112 U′ may be formed over the upper bottom electrode 111 U′ of the tantalum nitride bottom electrode 111 ′
  • a second interface layer 112 L′ may be formed over the lower bottom electrode 111 L′ of the tantalum nitride bottom electrode 111 ′.
  • the first interface layer 112 U′ may be formed over the upper bottom electrode 111 U′ of the tantalum nitride bottom electrode 111 ′ through a nitrogen reduction reaction/an oxygen substitution reaction 133 A.
  • the second interface layer 112 L′ may be formed over the lower bottom electrode 111 L′ of the tantalum nitride bottom electrode 111 ′ through an oxidation reaction 133 B.
  • the first interface layer 112 U′ and the second interface layer 112 L′ may preferably have the same thickness.
  • the first interface layer 112 U′ and the second interface layer 112 L′ may be of a tantalum oxide (Ta 2 O 5 ).
  • FIG. 2C and the description of FIG. 2C may be referred to.
  • FIG. 6 is illustrates a semiconductor device 100 M in accordance with an embodiment of the present invention.
  • the semiconductor device 100 M may include a lower structure 110 and a capacitor 120 P.
  • the capacitor 120 P may include a bottom electrode 111 P an interface layer 112 P, a dielectric layer 113 , and a top electrode 114 .
  • the interface layer 112 P, the dielectric layer 113 , and the top electrode 114 may be sequentially stacked over the bottom electrode 111 P.
  • the bottom electrode 111 P may have a high aspect ratio.
  • the aspect ratio may refer to a ratio of width to height thereof.
  • the high aspect ratio of the bottom electrode 111 may refer to an aspect ratio that is greater than approximately 1:1.
  • the bottom electrode 111 P may have a high aspect ratio of approximately 1:10 or higher.
  • the bottom electrode 111 P may be of a pillar shape.
  • the bottom electrode 111 P may be referred to as a storage node.
  • the bottom electrode 111 P may be made of a metal material that includes at least one metal element.
  • the bottom electrode 111 P may be made of a titanium nitride (TiN), a tantalum nitride (TaN), or a combination thereof.
  • the bottom electrode 111 P may be made of a metal nitride that includes at least one metal element and nitrogen.
  • the bottom electrode 111 P may be a metal nitride having a stoichiometric composition ratio.
  • the composition ratio of the metal element and nitrogen may be approximately 1:1.
  • the bottom electrode 111 P may include a titanium nitride or a tantalum nitride.
  • the bottom electrode 111 P may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD-TiN).
  • the bottom electrode 111 P may include a lower bottom electrode 111 L and an upper bottom electrode 111 U.
  • the interface layer 112 P may be formed over the bottom electrode 111 P.
  • the interface layer 112 P may include the metal element that is included in the bottom electrode 111 P.
  • the interface layer 112 P may be an oxide of the metal element.
  • the interface layer 112 P may be an oxide obtained by oxidizing the bottom electrode 111 P.
  • the interface layer 112 P may be a metal oxide that includes at least one metal element and oxygen.
  • the interface layer 112 P and the bottom electrode 111 P may include the same metal element.
  • the bottom electrode 111 P is a titanium nitride
  • the interface layer 112 P may be a titanium oxide.
  • the interface layer 112 P may be a tantalum oxide.
  • the interface layer 112 P may be formed by performing a plasma process at least two times, as illustrated in FIGS. 2A and 2C . Through the plasma process, the interface layer 112 P may have a uniform thickness. The interface layer 112 P may be formed over the bottom electrode 111 P having a high aspect ratio in a uniform thickness. The interface layer 112 P may include a first interface layer 112 U and a second interface layer 112 L based on the position of the bottom electrode 111 P. The first interface layer 112 U may be formed over the upper bottom electrode 111 U. The second interface layer 112 L may be formed over the lower bottom electrode 111 L. The first interface layer 112 U and the second interface layer 112 L that are formed by performing the plasma process a plurality of times may preferably have the same thickness.
  • the first interface layer 112 U may have a first thickness D 11
  • the second interface layer 112 L may have a second thickness D 12 .
  • the first thickness D 11 and the second thickness 112 may be the same.
  • the plasma process that is performed a plurality of times may include a plasma nitridation process and a plasma oxidation process that are performed sequentially.
  • the dielectric layer 113 may be formed over the interface layer 112 P.
  • the dielectric layer 113 may be made of a high-k material whose dielectric rate is higher than a silicon oxide.
  • the high-k material may include a hafnium oxide (HfO 2 ), a zirconium oxide (ZrO 2 ), an aluminum oxide (Al 2 O 3 ), a titanium oxide (TiO 2 ), a tantalum oxide (Ta 2 O 5 ), a niobium oxide (Nb 2 O 5 ), or a strontium titanium oxide (SrTiO 3 ).
  • the dielectric layer 113 may be formed of a composite layer that includes two or more layers of the aforementioned high-k materials.
  • a top electrode 114 may be formed over the dielectric layer 113 .
  • the top electrode 114 may be made of a metal-based material.
  • the top electrode 114 may include titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt), or a combination thereof.
  • the top electrode 114 may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD-TiN).
  • the top electrode 114 may include a material including the same material as that of the bottom electrode 111 P.
  • the top electrode 114 may have a multi-layer structure.
  • the top electrode 114 may be formed by sequentially stacking a first metal-containing layer, a silicon germanium layer, and a second metal-containing layer.
  • the first metal-containing layer and the second metal-containing layer may include titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt), or a combination thereof.
  • the first metal-containing layer may be a tantalum nitride (TaN), and the second metal-containing layer may be WN/W where a tungsten nitride (WN) and tungsten (W) are stacked.
  • the silicon germanium layer may be doped with a suitable dopant, such as, for example, boron.
  • the dielectric layer 113 may be formed of a zirconium oxide-based material having excellent leakage current characteristics while sufficiently decreasing an equivalent-oxide thickness (EOT).
  • EOT equivalent-oxide thickness
  • the dielectric layer 113 may include ZAZ (ZrO 2 /Al 2 O 3 /ZrO 2 ).
  • the dielectric layer 113 may include HAH (HfO 2 /Al 2 O 3 /HfO 2 ).
  • the dielectric layer 113 may include the multi-layer dielectric layer illustrated in FIGS. 1B to 1E .
  • FIGS. 7A to 7D illustrate an example of a method for forming an interface layer 113 shown in FIG. 6 .
  • the bottom electrode 111 P may be formed over the lower structure 110 .
  • the bottom electrode 111 P may include a titanium nitride.
  • the bottom electrode 111 P may have a columnar crystal structure.
  • the bottom electrode 111 P may have a pillar shape.
  • the bottom electrode 111 P may be exposed to a first plasma process 131 P.
  • the first plasma process 131 P may be performed in the same way that the first plasma process 131 of FIG. 2A is performed.
  • the first plasma process 131 P may be performed at a low pressure.
  • the first plasma process 131 P may include a low-pressure plasma nitridation (LPPN).
  • LPPN low-pressure plasma nitridation
  • the first plasma process 131 P may be performed in the atmosphere of a nitrogen-containing gas at a low pressure.
  • the first plasma process 131 P may be performed using a nitrogen gas (N 2 ) or an ammonia (NH 3 ) gas at a pressure of approximately 100 mTorr or lower.
  • a nitrogen-rich layer 132 P may be formed.
  • the nitrogen-rich layer 132 P may include a nitrogen-rich titanium nitride (N-rich Ti x N y ).
  • the upper portion of the bottom electrode 111 P may not be completely transformed into the nitrogen-rich layer 132 P.
  • the bottom electrode 111 P may include the lower bottom electrode 111 L and the upper bottom electrode 111 U.
  • the upper bottom electrode 111 U may include the nitrogen-rich layer 132 P and a non-plasma processed portion 132 N.
  • the non-plasma processed portion 132 N may be defined as an inside of the upper bottom electrode 111 U, and the nitrogen-rich layer 132 P may be defined as a surface of the upper bottom electrode 111 U.
  • the lower bottom electrode 111 L is not affected by the plasma process. In short, the lower bottom electrode 111 L may not include the nitrogen-rich layer 132 P.
  • the nitrogen-rich layer 132 P is locally formed in the upper bottom electrode 111 U through the first plasma process 131 P. Due to the nitrogen-rich layer 132 P, the bottom electrode 111 P may have an ununiform nitrogen profile.
  • the lower bottom electrode 111 L may remain as a titanium nitride, and the upper bottom electrode 111 U may include a titanium nitride and a nitrogen-rich titanium nitride that are mixed together. Therefore, the upper bottom electrode 111 U and the lower bottom electrode 111 L may include a titanium nitride of different nitrogen contents.
  • the bottom electrode 111 P where the nitrogen-rich layer 132 P is formed may be exposed to a second plasma process 133 P.
  • the second plasma process 133 P may be performed the same as the second plasma process 133 of FIG. 2C .
  • the second plasma process 133 P may be performed at a higher pressure than at a pressure which the first plasma process 131 P is performed.
  • the second plasma process 133 P may be performed at a pressure that is higher by approximately 1 torr.
  • the second plasma process 133 P may be performed in the atmosphere of oxygen.
  • the second plasma process 133 P may include a plasma oxidation.
  • the first interface layer 112 U oxidize the surface of the bottom electrode 111 is formed in the upper bottom electrode 111 U through a nitrogen reduction reaction/an oxygen substitution reaction 133 A as shown in FIG. 5 .
  • the second interface layer 112 L is formed in the lower bottom electrode 111 L through an oxidation reaction.
  • the interface layer 112 P By sequentially performing a series of processes, which includes the low-pressure first plasma process 131 P and the high-pressure second plasma process 133 P, the interface layer 112 P having a uniform thickness can be formed on the surface of the bottom electrode 111 P.
  • the interface layer 112 P may include the first interface layer 112 U and the second interface layer 112 L.
  • the first interface layer 112 U and the second interface layer 112 L may include an oxide.
  • the first interface layer 112 U and the second interface layer 112 L may be of an oxide that, includes the metal element of the bottom electrode 111 P.
  • the bottom electrode 111 P when the bottom electrode 111 P is of a titanium nitride, the first interface layer 112 U and the second interface layer 112 L may include a titanium oxide (TiO 2 ).
  • the bottom electrode 111 P includes a tantalum nitride (TaN)
  • the first interface layer 112 U and the second interface layer 112 L may include a tantalum oxide (T
  • the dielectric layer 113 and the top electrode 114 may be formed over the interface layer 112 P.
  • FIGS. 8A to 8C illustrate a semiconductor device 200 in accordance with an embodiment of the present invention.
  • a semiconductor device having memory cells such as a DRAM
  • FIG. 8A is a plan view of the semiconductor device 200 in accordance with an embodiment of the present invention.
  • FIG. 8B is a cross-sectional view of the semiconductor device 200 of FIG. 8A taken along a line A-A′.
  • FIG. 8C is a cross-sectional view of the semiconductor device 200 of FIG. 8A taken along a line B-B′.
  • the semiconductor device 200 may include a plurality of memory cells.
  • Each memory cell may include a cell transistor T including a buried word line 205 , a bit line 212 , and a capacitor 300 .
  • the semiconductor device 200 may be described below in detail.
  • the substrate 201 may be of a material that is appropriate for a semiconductor processing.
  • the substrate 201 may include a semiconductor substrate.
  • the substrate 201 may be formed of a silicon-containing material.
  • the substrate 201 may include silicon, monocrystalline silicon, polycrystalline silicon, amorphous silicon, a silicon germanium, a monocrystalline silicon germanium, a polycrystalline silicon germanium, a carbon-doped silicon, a combination thereof, or a multi-layer including two or more of them.
  • the substrate 201 may include another semiconductor material, such as germanium.
  • the substrate 201 may include III/V-group semiconductor substrates, e.g., a compound semiconductor substrate, such as a III/V-group semiconductor substrate.
  • the substrate 201 may include a Silicon-On-Insulator (SOI) substrate.
  • SOI Silicon-On-Insulator
  • the isolation layer 202 I may be formed through a Shallow Trench Isolation (STI) process.
  • a gate trench 203 may be formed in the substrate 201 .
  • a gate insulation layer 204 may be formed on the surface of the gate trench 203 .
  • a buried word line 205 filling a portion of the gate trench 203 may be formed over the gate insulation layer 204 .
  • a sealing layer 206 may be formed over the buried word line 205 .
  • the sealing layer 206 may have a height that is the same as a top surface of the substrate 201 .
  • the buried word line 205 may be of a level that is lower than the surface of the substrate 201 .
  • the buried word line 205 may be formed of a low-resistance metal material.
  • the buried word line 205 may include a titanium nitride and tungsten that are stacked sequentially.
  • the buried word line 205 may be formed of a titanium nitride only (TiN only).
  • a first source/drain region 207 and a second source/drain region 208 may be formed in the substrate 201 .
  • the first source/drain region 207 and the second source/drain region 208 may be spaced apart from each other by the gate trench 203 .
  • the buried word line 205 , the first source/drain region 207 , and the second source/drain region 208 may form the cell transistor T.
  • the cell transistor T may be able to improve a short channel effect by the buried word line 205 .
  • a bit line contact plug 209 may be formed over the substrate 201 .
  • the bit line contact plug 209 may be coupled to the first source/drain region 207 .
  • the bit line contact plug 209 may be positioned in the inside of a bit line contact hole 210 .
  • the bit line contact hole 210 may be formed in a hard mask layer 211 .
  • the hard mask layer 211 may be formed over the substrate 201 .
  • the bit line contact hole 210 may expose the first source/drain region 207 .
  • the lower surface of the bit line contact plug 209 may be lower than the upper surface of the substrate 201 .
  • the bit line contact plug 209 may be formed of polysilicon or a metal material.
  • a portion of the bit line contact plug 209 may have a shorter line width than a diameter of the bit line contact hole 210 .
  • a gap G may be formed on both sides of the bit line contact plug 209 .
  • the gap G may be independently formed on both sides of the bit line contact plug 209 .
  • one bit line contact plug 209 and a pair of gaps G may be disposed in the inside of the bit line contact hole 210 .
  • the pair of the gaps G may be separated by the bit line contact plug 209 .
  • a gap G may be disposed between the bit line contact plug 209 and a silicon plug 216 .
  • a bit line structure BL may be formed over the bit line contact plug 209 .
  • the bit line structure BL may include the bit line 212 and a bit line capping layer 213 over the bit line 212 .
  • the bit line structure BL may have an elongated linear shape extending in a direction intersecting with the buried word line 205 .
  • a portion of the bit line 212 may be coupled to the bit line contact plug 209 . From the perspective of an A-A′ direction, the bit line 212 and the bit line contact plug 209 may be the same as a line width. Therefore, the bit line 212 may be extended in one direction while covering the bit line contact plug 209 .
  • the bit line 212 may include a metal material.
  • the bit line capping layer 213 may include an insulating material.
  • a spacer element 214 may be formed on the sidewall of the bit line structure BL.
  • the spacer element 214 may include a plurality of spacers. The bottom portion of the spacer element 214 may fill the gaps G on both sides of the bit line contact plug 209 .
  • the spacer element 214 may include a silicon oxide, a silicon nitride, or a combination thereof.
  • the spacer element 214 may include a Nitride-Oxide-Nitride (NON) structure.
  • the spacer element 214 may include an air gap.
  • the spacer element 214 may include a Nitride-Air gap-Nitride (NAN) structure.
  • a storage node contact structure may be formed between neighboring bit line structures BL.
  • the storage node contact structure may be formed in a storage node contact hole 215 .
  • the storage node contact hole 215 may have a high aspect ratio.
  • the storage node contact structure (SNC) may be coupled to the second source/drain region 208 .
  • the storage node contact structure (SNC) may include a silicon plug 216 and a metal plug 218 .
  • the upper portion of the metal plug 218 may be extended to partially overlap with the upper surface of the bit line structure BL.
  • the metal plug 218 may be adjacent to the bit line 212 .
  • the silicon plug 216 may be adjacent to the bit line contact plug 209 . From the perspective of a direction (C-C′ direction of FIG.
  • a plug isolation layer 219 may be formed between neighboring storage node contact structures (SNC).
  • the plug isolation layer 219 may be formed between neighboring bit line structures BL and provide the storage node contact hole 215 with the hard mask layer 211 .
  • the storage node contact structure may further include an interface doping layer 217 and a metal silicide layer 220 between the silicon plug 216 and the metal plug 218 .
  • the silicon plug 216 may include a polysilicon layer or an epitaxial silicon layer.
  • the epitaxial silicon layer may be formed through a selective epitaxial growth (SEG).
  • the epitaxial silicon layer may include SEG SiP.
  • the metal plug 218 may include tungsten.
  • the metal silicide layer 220 may include a cobalt silicide.
  • the interface doping layer 217 may include a polysilicon layer doped with boron or an epitaxial silicon layer doped with boron.
  • a capping layer 221 may be formed between the metal plug 218 of the storage node contact structure (SNC) and the upper portion of the bit line structure BL.
  • the capacitor 300 may be formed over the storage node contact structure (SNC).
  • the capacitor 300 may include a capacitor 120 of a cylindrical shape shown in FIGS. 1A to 1E .
  • the capacitor 300 may include a capacitor 120 P of a pillar shape shown in FIG. 6 .
  • FIGS. 9A to 9H are cross-sectional views illustrating a first example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • known methods may be referred to.
  • a lower structure 200 L may be formed.
  • the lower structure 200 L may include a substrate 11 and a storage node contact structure 12 that is formed over the substrate 11 .
  • the storage node contact structure 12 may penetrate through an inter-layer dielectric layer 13 to be coupled to the substrate 11 .
  • the storage node contact structure 12 may correspond to the storage node contact structure (SNC) of FIGS. 8A to 8C .
  • the lower structure 200 L may further include a cell transistor, a bit line contact plug, and a bit line.
  • FIGS. 8A to 8C may be referred to.
  • an etch stop layer 14 may be formed over the lower structure 200 L
  • a mold layer 15 may be formed over the etch stop layer 14 .
  • the mold layer 15 may include a dielectric material.
  • the mold layer 15 may be made, for example, of a silicon oxide.
  • the mold layer 15 may be a single layer or a multi-layer including at least two or more layers.
  • the mold layer 15 may include a first mold layer and a second mold layer that are stacked one on another. The first and second mold layers may be formed of different silicon oxides.
  • the etch stop layer 14 may be formed of a material having an etch selectivity with respect to the mold layer 15 .
  • the etch stop layer 14 may include a silicon nitride.
  • an opening 16 may be formed, for example, by etching the mold layer 15 .
  • An etch process for forming the opening 16 may stop at the etch stop layer 14 .
  • the opening 16 may be referred to as a hole where a bottom electrode (or a storage node) is to be formed.
  • the opening 16 may have a high aspect ratio.
  • the opening 16 may have an aspect ratio of at least approximately 1:1.
  • the opening 16 may have a high aspect ratio of approximately 1:10 or higher.
  • An aspect ratio may refer to a ratio of its width W to height H thereof.
  • the upper surface of the storage node contact structure 12 below the opening 16 may be exposed by etching the etch stop layer 14 .
  • a bottom electrode layer 17 A may be formed in the inside of the opening 16 .
  • the bottom electrode layer 17 A may be conformally formed over the profile of the opening 16 .
  • the bottom electrode layer 17 A may be formed by using a film forming technology having excellent step coverage.
  • the bottom electrode layer 17 A may be formed through a Chemical Vapor Deposition (CVD) process or an Atomic Layer Deposition (ALD) process.
  • the bottom electrode layer 17 A may include a metal, a metal nitride, or a combination thereof.
  • the bottom electrode layer 17 A may include at least one selected from a group including titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt), and a combination thereof.
  • the bottom electrode layer 17 A may include a titanium nitride (TiN).
  • the bottom electrode layer 17 A may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD-TiN).
  • the bottom electrode layer 17 A may be a titanium nitride having a stoichiometric composition ratio.
  • the stoichiometric composition ratio may be a composition ratio of nitrogen to titanium, which may be approximately 1:1.
  • a bottom electrode 17 may be formed.
  • the bottom electrode 17 may be disposed inside of the opening 16 .
  • the bottom electrode 17 may be formed by performing a selective etch process onto the bottom electrode layer 17 A.
  • the selective etch process may be a Chemical Mechanical Polishing (CMP) process or an etch-back process.
  • CMP Chemical Mechanical Polishing
  • a protective layer (not shown) filling the opening 16 is formed over the bottom electrode layer 17 A, and then the Chemical Mechanical Polishing (CMP) process may be performed until the surface of the mold layer 15 is exposed.
  • the bottom electrode 17 may have a cylindrical shape.
  • the bottom electrode 17 may be electrically connected to the storage node contact structure 12 .
  • the mold layer 15 may be removed.
  • the mold layer 15 may be removed through a wet dip-out process.
  • the etch stop layer 14 may protect the lower structure 200 L from being damaged.
  • both internal walls and external walls of the bottom electrode 17 may be exposed.
  • the surrounding area of the bottom of the bottom electrode 17 may be supported by the etch stop layer 14 .
  • the bottom electrode 17 may have a high aspect ratio.
  • the bottom electrode 17 may have the same aspect ratio as the opening 16 .
  • the bottom electrode 17 may have a high aspect ratio of approximately 1:10 or higher.
  • a nitrogen-rich layer 19 may be formed through a first plasma process 18 .
  • the first plasma process 18 may correspond to the first plasma process 131 of FIG. 2A .
  • the first plasma process 18 may be performed at a low pressure. Since the first plasma process 18 is performed at a low pressure, a great deal of ion plasma may be formed.
  • an additive gas may be added in order to increase the efficiency of the ion plasma.
  • the additive gas may include argon (Ar) or helium (He).
  • the first plasma process 18 may include a low-pressure plasma nitridation (LPPN).
  • LPPN low-pressure plasma nitridation
  • the first plasma process 18 may be performed in the atmosphere of a nitrogen-containing gas at a low pressure.
  • the first plasma process 18 may be performed using a nitrogen gas (N 2 ) or an ammonia NH 3 ) gas at a pressure of approximately 100 mTorr or lower.
  • the nitrogen-rich layer 19 may be formed.
  • the nitrogen-rich layer 19 may include a nitrogen-rich titanium nitride (N-rich Ti x N y ).
  • the upper portion of the bottom electrode 17 may not be completely transformed into the nitrogen-rich layer 19 .
  • the bottom electrode 17 may include a lower bottom electrode 17 L and an upper bottom electrode 17 U.
  • the nitrogen-rich layer 19 may be formed on the surface of the upper bottom electrode 17 U.
  • the lower bottom electrode 17 L is not affected by the plasma process. In short, the lower bottom electrode 17 L may not include the nitrogen-rich layer 19 .
  • the nitrogen-rich layer 19 is locally formed in the upper bottom electrode 17 U through the first plasma process 18 . Due to the nitrogen-rich layer 19 , the bottom electrode 17 may have an ununiform nitrogen profile.
  • the lower bottom electrode 17 L may remain as a titanium nitride, and the upper bottom electrode 17 U may include a titanium nitride and a nitrogen-rich titanium nitride that are mixed together. Therefore, the upper bottom electrode 17 U and the lower bottom electrode 17 L may be formed of a titanium nitride of different nitrogen contents.
  • the lower bottom electrode 17 L may be formed of a titanium nitride having a stoichiometric composition ratio, and the upper bottom electrode 17 U may be formed of a nitrogen-rich titanium nitride.
  • the upper bottom electrode 17 U and the lower bottom electrode 17 L may have the same height or different heights.
  • a second plasma process 20 may be performed following the first plasma process 18 .
  • the second plasma process 20 may correspond to the second plasma process 133 of FIG. 2C .
  • the second plasma process 20 may be performed at a higher pressure than at a pressure which the first plasma process 18 is performed.
  • the second plasma process 20 may be performed at a pressure that is higher by approximately 1 torr.
  • the second plasma process 20 may be performed at an atmosphere of oxygen.
  • the second plasma process 20 may include a high pressure plasma oxidation (HPPO).
  • a first interface layer 21 U is formed in the upper bottom electrode 17 U through a nitrogen reduction reaction/an oxygen substitution reaction.
  • a second interface layer 21 L is formed in the lower bottom electrode 17 L through an oxidation reaction.
  • the first interface layer 21 U and the second interface layer 21 L may preferably have the same thickness.
  • An interface layer 21 having a uniform thickness can be formed on the surface of the bottom electrode 17 by sequentially performing a series of the processes, which include the low-pressure first plasma process 18 and the high-pressure second plasma process 20 .
  • the interface layer 21 may include an oxide obtained by oxidizing the surface of the bottom electrode 17 .
  • the interface layer 21 may be a metal oxide.
  • the interface layer 21 may be a titanium oxide (TiO 2 ).
  • a dielectric layer 22 may be formed.
  • the dielectric layer 22 may be formed over the interface layer 21 .
  • the dielectric layer 22 may be made of a high-k material whose dielectric rate is higher than a silicon oxide.
  • the high-k material may include a hafnium oxide (HfO 2 ), a zirconium oxide (ZrO 2 ), an aluminum oxide (Al 2 O 3 ), a titanium oxide (TiO 2 ), a tantalum oxide (Ta 2 O 5 ), a niobium oxide (Nb 2 O 5 ), or a strontium titanium oxide (SrTiO 3 ).
  • the dielectric layer 22 may be formed of a composite layer that includes two or more layers of the aforementioned high-k materials.
  • the dielectric layer 22 may be formed of a zirconium oxide-based material having excellent leakage current characteristics while sufficiently decreasing an equivalent-oxide thickness (EOT).
  • the dielectric layer 22 may include ZAZ (ZrO 2 /Al 2 O 3 /ZrO 2 ).
  • the dielectric layer 22 may include HAH (HfO 2 /Al 2 O 3 /HfO 2 ).
  • a dielectric layer stack formed of TZAZ (TiO 2 /ZrO 2 /Al 2 O 3 /ZrO 2 ) may be formed over the bottom electrode 17 .
  • TZAZ TiO 2 /ZrO 2 /Al 2 O 3 /ZrO 2
  • FIGS. 1B to 1E Diverse dielectric layer stacks may be described by referring to FIGS. 1B to 1E .
  • the dielectric layer 22 may be formed through a Chemical Vapor Deposition (CVD) process or an Atomic Layer Deposition (ALD) process having excellent step coverage.
  • CVD Chemical Vapor Deposition
  • ALD Atomic Layer Deposition
  • a top electrode 23 its may be formed over the dielectric layer 22 .
  • the top electrode 23 may include a material which is the same as that of the bottom electrode 17 .
  • the top electrode 23 may be made of a metal-based material.
  • the top electrode 23 may include titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir) an iridium oxide (IrO 2 ), platinum (Pt), or a combination thereof.
  • the top electrode 23 may be formed through a low-pressure Chemical Vapor Deposition (LPCVD) process, a Plasma Enhanced Chemical Vapor Deposition (PECVD) process, or an Atomic Layer Deposition (ALD) process.
  • LPCVD low-pressure Chemical Vapor Deposition
  • PECVD Plasma Enhanced Chemical Vapor Deposition
  • ALD Atomic Layer Deposition
  • the top electrode 23 may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD-TiN).
  • the top electrode 23 may have a multi-layer structure.
  • the top electrode 23 may be formed by sequentially stacking a first metal-containing layer, a silicon germanium layer, and a second metal-containing layer.
  • the first metal-containing layer and the second metal-containing layer may include titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN) tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt) or a combination thereof.
  • the first metal-containing layer may be a titanium nitride (TiN), and the second metal-containing layer may be WN/W where a tungsten nitride (WN) and tungsten (W) are stacked.
  • the silicon germanium layer may be doped with a suitable dopant, such as, for example, boron.
  • the top electrode 23 may be formed by depositing an upper top electrode (not shown) and performing a top electrode patterning process.
  • FIGS. 10A to 10F are simplified cross-sectional views illustrating a second example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • known methods may be referred to.
  • the opening 16 may be formed over the lower structure 200 L.
  • a bottom electrode layer 31 A may be formed in the inside of the opening 16 .
  • the bottom electrode layer 31 A may be formed over the mold layer 15 and fill the inside of the opening 16 .
  • the bottom electrode layer 31 A may be made of a metal, a metal nitride, or a combination thereof.
  • the bottom electrode layer 31 A may include at least one selected from a group including titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt), and a combination thereof.
  • the bottom electrode layer 31 A may include a titanium nitride (TiN).
  • the bottom electrode layer 31 A may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD) (ALD-TiN).
  • ALD Atomic Layer Deposition process
  • the bottom electrode layer 31 A may be a titanium nitride having a stoichiometric composition ratio.
  • the stoichiometric composition ratio may be a composition ratio of nitrogen to titanium, which may be approximately 1:1.
  • a bottom electrode 31 may be formed.
  • the bottom electrode 31 may be disposed inside of the opening 16 .
  • the bottom electrode 31 may be formed by performing a selective etch process onto the bottom electrode layer 31 A.
  • the selective etch process may be a Chemical Mechanical Polishing (CMP) process or an etch-back process.
  • CMP Chemical Mechanical Polishing
  • a Chemical Mechanical Polishing (CMP) process may be performed onto the bottom electrode layer 31 A until the surface of the mold layer 15 is exposed.
  • the bottom electrode 31 may have a pillar shape filling the opening 16 .
  • the bottom electrode 31 may be electrically connected to the storage node contact structure 12 .
  • the mold layer 15 may be removed.
  • the mold layer 15 may be removed through a wet dip-out process.
  • the etch stop layer 14 may protect the lower structure 200 L from being damaged.
  • the bottom electrode 31 may have a high aspect ratio.
  • the bottom electrode 31 may have the same aspect ratio as the opening 16 .
  • the bottom electrode 31 may have a high aspect ratio of approximately 1:10 or higher.
  • a first plasma process 32 may be performed.
  • the first plasma process 32 may correspond to the first plasma process 131 and 131 P of FIGS. 2A and 5 , respectively.
  • the first plasma process 32 may be performed at a low pressure.
  • the first plasma process 32 may include a low-pressure plasma nitridation (LPPN).
  • LPPN low-pressure plasma nitridation
  • the first plasma process 32 may be performed in the atmosphere of a nitrogen-containing gas at a low pressure.
  • the first plasma process 32 may be performed using a nitrogen gas (N 2 ) or an ammonia (NH 3 ) gas at a pressure of approximately 100 mTorr or lower.
  • a nitrogen-rich layer 33 may be formed.
  • the nitrogen-rich layer 33 may include a nitrogen-rich titanium nitride (N-rich Ti x N y ).
  • the bottom electrode 31 may include a lower bottom electrode 31 L and an upper bottom electrode 31 U.
  • the upper bottom electrode 31 U may not be completely transformed into the nitrogen-rich layer 33 .
  • the nitrogen-rich layer 33 can be formed on the surface of the upper bottom electrode 31 U.
  • the lower bottom electrode 31 L is not affected by the plasma process. In short, the lower bottom electrode 31 L may not include the nitrogen-rich layer 33 .
  • the nitrogen-rich layer 33 is locally formed in the upper bottom electrode 31 U through the first plasma process 32 . Due to the nitrogen-rich layer 33 , the bottom electrode 31 may have an ununiform nitrogen profile.
  • the lower bottom electrode 311 may remain as a titanium nitride, and the upper bottom electrode 31 U may include a titanium nitride and a nitrogen-rich titanium nitride that are mixed together. Therefore, the upper bottom electrode 31 U and the lower bottom electrode 31 L may be formed of a titanium nitride of different nitrogen contents.
  • the lower bottom electrode 31 L may be formed of a titanium nitride having a stoichiometric composition ratio, and the upper bottom electrode 31 U may be formed of a nitrogen-rich titanium nitride.
  • an interface layer 35 may be formed through a second plasma process 34 .
  • the second plasma process 34 may correspond to the second plasma processes 133 and 133 P of FIGS. 2C and 5 , respectively.
  • the second plasma process 34 may be performed at a higher pressure than the first plasma process 32 .
  • the second plasma process 34 may be performed at a pressure of 1 torr or higher.
  • the second plasma process 34 may be performed in the atmosphere of oxygen.
  • the second plasma process 34 may include a high-pressure plasma oxidation (HIPPO).
  • a first interface layer 35 U is formed in the upper bottom electrode 31 U through a nitrogen reduction reaction/an oxygen substitution reaction.
  • a second interface layer 35 L is formed in the lower bottom electrode 31 L through an oxidation reaction.
  • the first interface layer 35 U and the second interface layer 35 L may preferably have the same thickness.
  • the first interface layer 35 U and the second interface layer 35 L may be layers in continuum.
  • the first interface layer 35 U and the second interface layer 35 L may be formed over the upper surface and external walls of the bottom electrode 31 .
  • An interface layer 35 having a uniform thickness can be formed on the surface of the bottom electrode 31 by sequentially performing a series of the processes, which include the low-pressure first plasma process 32 and the high-pressure second plasma process 34 .
  • the interface layer 35 may include an oxide obtained by oxidizing the surface of the bottom electrode 31 .
  • the interface layer 35 may be a metal oxide.
  • the interface layer 35 may be a titanium oxide (TiO 2 ).
  • a dielectric layer 36 may be formed.
  • the dielectric layer 36 may be formed over the interface layer 35 .
  • the dielectric layer 36 may be made of a high-k material whose dielectric rate is higher than a silicon oxide.
  • the dielectric layer 36 may include ZAZ (ZrO 2 /Al 2 O 3 /ZrO 2 ).
  • the dielectric layer 36 may include HAH (HfO 2 /Al 2 O 3 /HfO 2 ).
  • the interface layer 35 includes a titanium oxide (TiO 2 ) and the dielectric layer 36 includes ZAZ (ZrO 2 /Al 2 O 3 /ZrO 2 ), a dielectric layer stack formed of TZAZ (TiO 2 /ZrO 2 /Al 2 O 3 /ZrO 2 ) may be formed over the bottom electrode 31 .
  • a top electrode 37 may be formed over the dielectric layer 36 .
  • the top electrode 37 may include a material which is the same as that of the bottom electrode 31 .
  • the top electrode 37 may be made of a metal-based material.
  • the top electrode 37 may include a titanium nitride (ALD-TiN) that is formed through an Atomic Layer Deposition process.
  • the top electrode 37 may have a multi-layer structure.
  • the top electrode 37 may be formed by sequentially stacking a first metal-containing layer, a silicon germanium layer, and a second metal-containing layer.
  • the first metal-containing layer may be a tantalum nitride (TaN), and the second metal-containing layer may be WN/W where a tungsten nitride (WN) and tungsten (W) are stacked.
  • the silicon germanium its layer may be doped with a suitable dopant, such as, for example, boron.
  • FIGS. 11A to 11G illustrate a third example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • a method for forming a lower structure 200 L disposed in the lower portion of a capacitor 300 among the constituent elements of the semiconductor device 200 shown in FIGS. 8A to 8C known methods may be referred to.
  • the lower structure 200 L may be formed.
  • the lower structure 200 L may include a substrate 11 and a storage node contact structure 12 that is formed over the substrate 11 .
  • the storage node contact structure 12 may penetrate through an inter-layer dielectric layer 13 to be coupled to the substrate 11 .
  • the storage node contact structure 12 may correspond to the storage node contact structure (SNC) of FIGS. 8A to 8C .
  • the lower structure 200 L may further include a cell transistor, a bit line contact plug, and a bit line.
  • FIGS. 8A to 8C may be referred to.
  • an etch stop layer 14 may be formed over the lower structure 200 L.
  • a first mold layer 15 L, a first supporter layer S 1 ′, a second mold layer 15 U, and a second supporter layer S 2 ′ may be stacked over the etch stop layer 14 .
  • the first mold layer 15 L and the second mold layer 15 U may include a dielectric material.
  • the first mold layer 15 L and the second mold layer 15 U may include a silicon oxide.
  • the first mold layer 15 L and the second mold layer 15 U may be formed of different silicon oxides.
  • the first supporter layer S 1 ′ and the second supporter layer S 2 ′ may be formed of a material having etch selectivity with respect to the first mold layer 15 L and the second mold layer 15 U.
  • the first supporter layer S 1 ′ and the second supporter layer S 2 ′ may include a silicon nitride, a silicon carbo nitride (SiCN), or a combination thereof.
  • the etch stop layer 14 may be formed of a material having an etch selectivity with respect to the first mold layer 15 L and the second mold layer 15 U.
  • the etch stop layer 14 may include a silicon nitride.
  • an opening 16 may be formed.
  • the opening 16 may be formed by etching the second supporter layer S 2 ′, the second mold layer 15 U, the first supporter layer S 1 ′, and the first mold layer 15 L.
  • An etch process for forming the opening 16 may stop at the etch stop layer 14 .
  • the opening 16 may be referred to as a hole where a bottom electrode (or a storage node) is to be formed.
  • the opening 16 may have a high aspect ratio.
  • the opening 16 may have an aspect ratio of at least approximately 1:1. For example, the opening 16 may have a high aspect ratio of approximately 1:10 or higher.
  • the upper surface of the storage node contact structure 12 below the opening 16 may be exposed by etching the etch stop layer 14 .
  • a bottom electrode layer 17 A may be formed in the inside of the opening 16 .
  • the bottom electrode layer 17 A may be conformally formed over the profile of the opening 16 .
  • the bottom electrode layer 17 A may be formed by using a film forming technology having excellent step coverage.
  • the bottom electrode layer 17 A may be formed through a Chemical Vapor Deposition (CVD) process or an Atomic Layer Deposition (ALD) process.
  • the bottom electrode layer 17 A may include a metal, a metal nitride, or a combination thereof.
  • the bottom electrode layer 17 A may include at least one selected from a group including titanium (Ti), a titanium nitride (TiN) tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN) tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir) an iridium oxide (IrO 2 ), platinum (Pt), and a combination thereof.
  • the bottom electrode layer 17 A may include a titanium nitride (TiN).
  • the bottom electrode layer 17 A may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD-TiN).
  • the bottom electrode layer 17 A may be a titanium nitride having a stoichiometric composition ratio.
  • the stoichiometric composition ratio may be a composition ratio of nitrogen to titanium, which may be approximately 1:1.
  • a bottom electrode 17 may be formed.
  • the bottom electrode 17 may be disposed inside of the opening 16 .
  • the bottom electrode 17 may be formed by performing a selective etch process onto the bottom electrode layer 17 A.
  • the selective etch process may be a Chemical Mechanical Polishing (CMP) process or an etch-back process.
  • CMP Chemical Mechanical Polishing
  • a protective layer (not shown) filling the opening 16 is formed over the bottom electrode layer 17 A, and then the Chemical Mechanical Polishing (CMP) process may be performed until the surface of the second supporter layer S 2 ′ is exposed.
  • the bottom electrode 17 may have a cylindrical shape disposed along the bottom and sidewalls of the opening 16 .
  • the bottom electrode 17 may be electrically connected to the storage node contact structure 12 .
  • a second supporter S 2 and a first supporter S 1 may be formed.
  • the second supporter S 2 and the first supporter S 1 may be formed by selectively etching the second supporter layer S 2 ′ and the first supporter layer S 1 ′.
  • a supporter opening S 0 and the second supporter S 2 may be formed by etching the second supporter layer S 2 ′, and the second mold layer 15 U may be removed through the supporter opening S 0 .
  • the first mold layer 15 L may be removed.
  • the second mold layer 15 U and the first mold layer 15 L may be removed through a wet dip-out process.
  • the second supporter S 2 may be formed on one sidewall of the bottom electrode 17 to contact one sidewall of another neighboring bottom electrode 17 . Therefore, the second supporter S 2 may be able to support the upper portions of a plurality of bottom electrodes 17 .
  • the first supporter S 1 may be formed on one sidewall of the bottom electrode 17 to contact one sidewall of another neighboring bottom electrode 17 . Therefore, the first supporter S 1 may be able to support the lower portions of the bottom electrodes 17 .
  • the etch stop layer 14 may be exposed, as the first mold layer 15 L and the second mold layer 15 U are removed.
  • both internal walls and external walls of the bottom electrode 17 may be exposed.
  • the surrounding area of the bottom of the bottom electrode 17 may be supported by the etch stop layer 14 .
  • the bottom electrode 17 may have a high aspect ratio.
  • the bottom electrode 17 may have the same aspect ratio as the opening 16 .
  • the bottom electrode 17 may have a high aspect ratio of approximately 1:10 or higher.
  • the first supporter S 1 and the second supporter S 2 may increase the structural stability of the bottom electrode 17 .
  • a nitrogen-rich layer 42 may be formed through a first plasma process 41 .
  • the first plasma process 41 may correspond to the first plasma process 131 of FIG. 2A .
  • the first plasma process 41 may be performed at a low pressure. Since the first plasma process 41 is performed at a low pressure, a great deal of ion plasma may be formed.
  • an additive gas may be added in order to increase the efficiency of the ion plasma.
  • the additive gas may include argon (Ar) or helium (He).
  • the first plasma process 41 may include a low-pressure plasma nitridation (LPPN).
  • LPPN low-pressure plasma nitridation
  • the first plasma process 41 may be performed in the atmosphere of a nitrogen-containing gas at a low pressure.
  • the first plasma process 41 may be performed using a nitrogen gas (N 2 ) or an ammonia (NH 3 ) gas at a pressure of approximately 100 mTorr or lower.
  • the nitrogen-rich layer 42 may be formed.
  • the nitrogen-rich layer 42 may include a nitrogen-rich titanium nitride (N-rich Ti x N y ).
  • the bottom electrode 17 may include a lower bottom electrode 17 L and an upper bottom electrode 17 U.
  • the upper bottom electrode 17 U may not be completely transformed into the nitrogen-rich layer 42 .
  • the nitrogen-rich layer 42 can be formed on the surface of the upper bottom electrode 17 U.
  • the lower bottom electrode 17 L is not affected by the plasma process. In short, the lower bottom electrode 17 L may not include the nitrogen-rich layer 42 .
  • the nitrogen-rich layer 42 is locally formed in the upper bottom electrode 17 U through the first plasma process 41 . Due to the nitrogen-rich layer 42 , the bottom electrode 17 may have an ununiform nitrogen profile.
  • the lower bottom electrode 17 L may remain as a titanium nitride, and the upper bottom electrode 17 U may include a titanium nitride and a nitrogen-rich titanium nitride that are mixed together. Therefore, the upper bottom electrode 17 U and the lower bottom electrode 17 L may be formed of a titanium nitride of different nitrogen contents.
  • the upper bottom electrode 17 U may be formed of a nitrogen-rich titanium nitride, and the lower bottom electrode 17 L may be formed of a titanium nitride having a stoichiometric composition ratio.
  • the nitrogen-rich layer 42 may be formed in a portion of the upper bottom electrode 17 U that does not contact the second supporter S 2 .
  • the nitrogen-rich layer 42 may be formed in a portion contacting the second supporter S 2 and a portion not contacting the second supporter S 2 .
  • the second supporter S 2 may be exposed to the first plasma process 41 to be nitridized.
  • an interface layer 44 may be formed by performing a second plasma process 43 .
  • the second plasma process 43 may correspond to the second plasma process 133 of FIG. 2C .
  • the second plasma process 43 may be performed at a higher pressure than the pressure at which the first plasma process 41 is performed.
  • the second plasma process 43 may be performed at a pressure that is higher by approximately 1 torr.
  • the second plasma process 43 may be performed at an atmosphere of oxygen.
  • the second plasma process 43 may include a plasma oxidation.
  • a first interface layer 44 U is formed in the upper portion of the bottom electrode 17 through a nitrogen reduction reaction/an oxygen substitution reaction.
  • the first interface layer 44 U may be affected by the nitrogen-rich layer 42 .
  • a second interface layer 44 L is formed in the lower portion of the bottom electrode 17 through an oxidation reaction.
  • the first interface layer 44 U and the second interface layer 44 L may preferably have the same thickness.
  • An interface layer 44 having a uniform thickness can be formed on the surface of the bottom electrode 17 by sequentially performing a series of the processes, which include the low-pressure first plasma process 41 and the high-pressure second plasma process 43 .
  • the interface layer 44 may include an oxide obtained by oxidizing the surface of the bottom electrode 17 .
  • the interface layer 44 may be a metal oxide.
  • the interface layer 44 may be a titanium oxide (TiO 2 ).
  • the first interface layer 44 U may be formed in a portion of the upper bottom electrode 17 U that does not contact the second supporter S 2 . In other words, the first interface layer 44 U may not be formed on the interface between the bottom electrode 17 and the second supporter S 2 .
  • the second interface layer 44 L may be formed in a portion of the lower bottom electrode 17 L that does not contact the first supporter S 1 . In other words, the second interface layer 44 L may not be formed on the interface between the bottom electrode 17 and the first supporter S 1 .
  • the surfaces of the first supporter S 1 and the second supporter S 2 may be oxidized through the second plasma process 43 .
  • a dielectric layer 22 may be formed.
  • the dielectric layer 22 may be formed over the interface layer 44 .
  • the dielectric layer 22 may be able to cover the etch stop layer 14 , the first supporter S 1 , and the second supporter S 2 .
  • a top electrode 23 may be formed over the dielectric layer 22 .
  • FIGS. 12A to 12G illustrate a fourth example of a method for fabricating the semiconductor device in accordance with an embodiment of the present invention.
  • a method for forming a lower structure 200 L disposed in the lower portion of a capacitor 300 among the constituent elements of the semiconductor device 200 shown in FIGS. 8A to 8C known methods may be referred to.
  • an etch stop layer 14 may be formed over the lower structure 200 L.
  • a first mold layer 15 L, a first supporter layer S 1 ′, a second mold layer 15 U, and a second supporter layer S 2 ′ may be stacked over the etch stop layer 14 .
  • the first mold layer 15 L and the second mold layer 15 U may include a dielectric material.
  • the first mold layer 15 L and the second mold layer 15 U may include a silicon oxide.
  • the first mold layer 15 L and the second mold layer 15 U may be formed of different silicon oxides.
  • the first supporter layer S 1 ′ and the second supporter layer S 2 ′ may be formed of a material having etch selectivity with respect to the first mold layer 15 L and the second mold layer 15 U.
  • the first supporter layer S 1 ′ and the second supporter layer S 2 ′ may include a silicon nitride, a silicon carbonitride (SiCN), or a combination thereof.
  • the etch stop layer 14 may be formed of a material having an etch selectivity with respect to the first mold layer 15 L and the second mold layer 15 U.
  • the etch stop layer 14 may include a silicon nitride.
  • an opening 16 may be formed.
  • the opening 16 may be formed by etching the second supporter layer S 2 ′, the second mold layer 15 U, the first supporter layer S 1 ′, and the first mold layer 15 L.
  • An etch process for forming the opening 16 may stop at the etch stop layer 14 .
  • the opening 16 may be referred to as a hole where a bottom electrode (or a storage node) is to be formed.
  • the opening 16 may have a high aspect ratio.
  • the opening 16 may have an aspect ratio of at least approximately 1:1. For example, the opening 16 may have a high aspect ratio of approximately 1:10 or higher.
  • the upper surface of the storage node contact structure 12 below the opening 16 may be exposed by etching the etch stop layer 14 .
  • a bottom electrode layer 31 A may be formed in the inside of the opening 16 .
  • the bottom electrode layer 31 A may fill the inside of the opening 16 .
  • the bottom electrode layer 31 A may be formed over the second supporter layer S 2 ′ while filling the inside of the opening 16 .
  • the bottom electrode layer 31 A may include a metal, a metal nitride, or a combination thereof.
  • the bottom electrode layer 31 A may include at least one selected from a group including titanium (Ti), a titanium nitride (TiN), tantalum (Ta), a tantalum nitride (TaN), a titanium aluminum nitride (TiAlN), tungsten (W), a tungsten nitride (WN), ruthenium (Ru), a ruthenium oxide (RuO 2 ), iridium (Ir), an iridium oxide (IrO 2 ), platinum (Pt), and a combination thereof.
  • the bottom electrode layer 31 A may include a titanium nitride (TiN).
  • the bottom electrode layer 17 A may include a titanium nitride that is formed through an Atomic Layer Deposition process (ALD-TiN).
  • the bottom electrode layer 31 A may be a titanium nitride having a stoichiometric composition ratio.
  • the stoichiometric composition ratio may be a composition ratio of nitrogen to titanium, which may be approximately 1:1.
  • a bottom electrode 31 may be formed.
  • the bottom electrode 31 may be disposed inside of the opening 16 .
  • the bottom electrode 31 may be formed by performing a selective etch process onto the bottom electrode layer 31 A.
  • the selective etch process may be a Chemical Mechanical Polishing (CMP) process or an etch-back process.
  • CMP Chemical Mechanical Polishing
  • the Chemical Mechanical Polishing (CMP) process may be performed onto the bottom electrode layer 31 A until the surface of the mold layer 15 is exposed.
  • the bottom electrode 31 may have a pillar shape filling the inside of the opening 16 .
  • the bottom electrode 31 may be electrically connected to the storage node contact structure 12 .
  • a second supporter S 2 and a first supporter S 1 may be formed.
  • the second supporter S 2 and the first supporter S 1 may be formed by selectively etching the second supporter layer S 2 ′ and the first supporter layer S 1 ′.
  • a supporter opening S 0 and the second supporter S 2 may be formed by etching the second supporter layer S 2 ′, and a second mold layer 15 U may be removed through the supporter opening S 0 .
  • a first mold layer 15 L may be removed.
  • the second mold layer 15 U and the first mold layer 15 L may be removed through a wet dip-out process.
  • the second supporter S 2 may be formed on one sidewall of the bottom electrode 31 to contact one sidewall of another neighboring bottom electrode 31 . Therefore, the second supporter S 2 may be able to support the upper portions of a plurality of neighboring bottom electrodes 31 .
  • the first supporter S 1 may be formed on one sidewall of the bottom electrode 31 to contact one sidewall of another neighboring bottom electrode 31 . Therefore, the first supporter S 1 may be able to support the lower portions of the bottom electrodes 31 .
  • the etch stop layer 14 may be exposed, as the first mold layer 15 L and the second mold layer 15 U are removed.
  • the first mold layer 15 L and the second mold layer 15 U are removed, all the external walls of the bottom electrode 31 may be exposed.
  • the surrounding area of the bottom of the bottom electrode 31 may be supported by the etch stop layer 14 .
  • the bottom electrode 31 may have a high aspect ratio.
  • the bottom electrode 31 may have the same aspect ratio as the opening 16 .
  • the bottom electrode 31 may have a high aspect ratio of approximately 1:10 or higher.
  • the first supporter S 1 and the second supporter S 2 may increase the structural stability of the bottom electrode 31 .
  • the supporters may have a structure of two layers.
  • the supporters may have a multi-layer structure of more than three layers.
  • a nitrogen-rich layer 52 may be formed through a first plasma process 51 .
  • the first plasma process 51 may correspond to the first plasma process 131 and 131 P of FIGS. 2A and 5 respectively.
  • the first plasma process 51 may be performed at a low pressure.
  • the first plasma process 51 may include a low pressure plasma nitridation (LPPN).
  • LPPN low pressure plasma nitridation
  • the first plasma process 51 may be performed in the atmosphere of a nitrogen-containing gas at a low pressure.
  • the first plasma process 51 may be performed using a nitrogen gas (N 2 ) or an ammonia (NH 3 ) gas at a pressure of approximately 100 mTorr or lower.
  • the nitrogen-rich layer 52 may be formed.
  • the nitrogen-rich layer 52 may include a nitrogen-rich titanium nitride (N-rich Ti x N y ).
  • the bottom electrode 31 may include a lower bottom electrode 31 L and an upper bottom electrode 31 U.
  • the upper bottom electrode 31 U may not be completely transformed into the nitrogen-rich layer 52 .
  • the nitrogen-rich layer 52 can be formed on the surface of the upper bottom electrode 31 U.
  • the lower bottom electrode 31 L is not affected by the plasma process. In short, the lower bottom electrode 31 L may not include the nitrogen-rich layer 52 .
  • the nitrogen-rich layer 52 is locally formed in the upper bottom electrode 31 U through the first plasma process 51 . Due to the nitrogen-rich layer 52 , the bottom electrode 31 may have a changing (i.e., a non-uniform) nitrogen profile.
  • the lower bottom electrode 31 L may remain as a titanium nitride, and the upper bottom electrode 31 U may include a titanium nitride and a nitrogen-rich titanium nitride that are mixed together. Therefore, the upper bottom electrode 31 U and the lower bottom electrode 31 L may be formed of a titanium nitride of different nitrogen contents.
  • the upper bottom electrode 31 U may be formed of a nitrogen-rich titanium nitride, and the lower bottom electrode 31 L may be formed of a titanium nitride having a stoichiometric composition ratio.
  • an interface layer 54 may be formed by performing a second plasma process 53 .
  • the second plasma process 53 may correspond to the second plasma process 133 of FIG. 2C .
  • the second plasma process 53 may be performed at a higher pressure than the first plasma process 51 is performed.
  • the second plasma process 53 may be performed at a pressure that is higher by approximately 1 torr.
  • the second plasma process 53 may be performed at an atmosphere of oxygen.
  • the second plasma process 53 may include a plasma oxidation.
  • a first interface layer 54 U is formed in the upper bottom electrode 31 U through a nitrogen reduction reaction an oxygen substitution reaction.
  • a second interface layer 54 L is formed in the lower bottom electrode 31 L through an oxidation reaction.
  • the first interface layer 54 U and the second interface layer 54 L may preferably have the same thickness.
  • An interface layer 54 having a uniform thickness can be formed on the surface of the bottom electrode 31 by sequentially performing a series of the processes, which include the low-pressure first plasma process 51 and the high-pressure second plasma process 53 .
  • the interface layer 54 may include an oxide obtained by oxidizing the surface of the bottom electrode 31 .
  • the interface layer 54 may be a metal oxide.
  • the interface layer 54 may include a titanium oxide (TiO 2 ).
  • the first interface layer 54 U may be formed in a portion of the upper bottom electrode 31 U that does not contact the second supporter S 2 . In other words, the first interface layer 54 U may not be formed on the interface between the bottom electrode 31 and the second supporter S 2 .
  • the second interface layer 54 L may be formed in a portion of the lower bottom electrode 31 L that does not contact the first supporter S 1 . In other words, the second interface layer 54 L may not be formed on the interface between the bottom electrode 31 and the first supporter S 1 .
  • the surfaces of the first supporter S 1 and the second supporter S 2 may be oxidized through the second plasma process 53 .
  • a dielectric layer 36 may be formed over the interface layer 54 .
  • the dielectric layer 36 may be able to cover the etch stop layer 14 , the first supporter S 1 , and the second supporter S 2 .
  • a top electrode 37 may be formed over the dielectric layer 36 .
  • oxygen loss from a dielectric layer may be suppressed so as to increase capacitance by forming an interface layer of an oxide which is thin and has a uniform thickness on top of a bottom electrode of a high aspect ratio.
  • defects may be decreased due to the presence of a stable interface layer, thus increasing the reliability of a capacitor.

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