TWI855124B - 具有堆疊之元件的半導體裝置及其製造方法 - Google Patents

具有堆疊之元件的半導體裝置及其製造方法 Download PDF

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Publication number
TWI855124B
TWI855124B TW109126302A TW109126302A TWI855124B TW I855124 B TWI855124 B TW I855124B TW 109126302 A TW109126302 A TW 109126302A TW 109126302 A TW109126302 A TW 109126302A TW I855124 B TWI855124 B TW I855124B
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TW
Taiwan
Prior art keywords
gate
transistor
conductive trace
semiconductor device
stacked
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TW109126302A
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English (en)
Chinese (zh)
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TW202121652A (zh
Inventor
拉爾斯 利布曼
傑佛瑞 史密斯
安東 德維利耶
丹尼爾 查訥姆甘姆
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日商東京威力科創股份有限公司
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • H10B12/30DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D88/00Three-dimensional [3D] integrated devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0186Manufacturing their interconnections or electrodes, e.g. source or drain electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/80Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs
    • H10D84/82Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
    • H10D84/83Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
    • H10D84/85Complementary IGFETs, e.g. CMOS
    • H10D84/859Complementary IGFETs, e.g. CMOS comprising both N-type and P-type wells, e.g. twin-tub
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B63/00Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
    • H10B63/80Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
    • H10B63/84Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays arranged in a direction perpendicular to the substrate, e.g. 3D cell arrays

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW109126302A 2019-08-07 2020-08-04 具有堆疊之元件的半導體裝置及其製造方法 TWI855124B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201962883865P 2019-08-07 2019-08-07
US62/883,865 2019-08-07
US16/848,366 2020-04-14
US16/848,366 US11450671B2 (en) 2019-08-07 2020-04-14 Semiconductor apparatus having stacked devices and method of manufacture thereof

Publications (2)

Publication Number Publication Date
TW202121652A TW202121652A (zh) 2021-06-01
TWI855124B true TWI855124B (zh) 2024-09-11

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TW109126302A TWI855124B (zh) 2019-08-07 2020-08-04 具有堆疊之元件的半導體裝置及其製造方法

Country Status (6)

Country Link
US (1) US11450671B2 (https=)
JP (1) JP7585593B2 (https=)
KR (1) KR102686114B1 (https=)
CN (1) CN114175248A (https=)
TW (1) TWI855124B (https=)
WO (1) WO2021025797A1 (https=)

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US12183738B2 (en) * 2021-01-29 2024-12-31 Samsung Electronics Co., Ltd. Cross-coupled gate design for stacked device with separated top-down gate
US11764154B2 (en) * 2021-07-30 2023-09-19 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail and signal line arrangement in integrated circuits having stacked transistors
US12588249B2 (en) * 2021-08-13 2026-03-24 Samsung Electronics Co., Ltd. Integrated circuit devices including a cross-coupled structure
US11881393B2 (en) * 2021-09-29 2024-01-23 Advanced Micro Devices, Inc. Cross field effect transistor library cell architecture design
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US11894436B2 (en) * 2021-12-06 2024-02-06 International Business Machines Corporation Gate-all-around monolithic stacked field effect transistors having multiple threshold voltages
US20230178544A1 (en) * 2021-12-06 2023-06-08 International Business Machines Corporation Complementary field effect transistors having multiple voltage thresholds
US12218135B2 (en) 2022-01-13 2025-02-04 Tokyo Electron Limited Wiring in diffusion breaks in an integrated circuit
US20230307457A1 (en) * 2022-03-24 2023-09-28 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of forming the same
US12563715B2 (en) 2022-09-07 2026-02-24 International Business Machines Corporation Stacked random-access-memory with complementary adjacent cells
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US12562211B2 (en) * 2023-03-20 2026-02-24 Taiwan Semiconductor Manufacturing Company, Ltd. Power control circuit for memory circuit based on complementary field effect transistor devices
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Also Published As

Publication number Publication date
US11450671B2 (en) 2022-09-20
JP7585593B2 (ja) 2024-11-19
CN114175248A (zh) 2022-03-11
TW202121652A (zh) 2021-06-01
KR20220042421A (ko) 2022-04-05
JP2022543116A (ja) 2022-10-07
KR102686114B1 (ko) 2024-07-17
US20210043630A1 (en) 2021-02-11
WO2021025797A1 (en) 2021-02-11

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