TWI804652B - 導電性凸塊及無電解鉑鍍浴 - Google Patents

導電性凸塊及無電解鉑鍍浴 Download PDF

Info

Publication number
TWI804652B
TWI804652B TW108124473A TW108124473A TWI804652B TW I804652 B TWI804652 B TW I804652B TW 108124473 A TW108124473 A TW 108124473A TW 108124473 A TW108124473 A TW 108124473A TW I804652 B TWI804652 B TW I804652B
Authority
TW
Taiwan
Prior art keywords
layer
plating bath
bump
conductive
electroless
Prior art date
Application number
TW108124473A
Other languages
English (en)
Other versions
TW202006911A (zh
Inventor
前川拓摩
小田幸典
柴田利明
伊井義人
神崎翔
Original Assignee
日商上村工業股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日商上村工業股份有限公司 filed Critical 日商上村工業股份有限公司
Publication of TW202006911A publication Critical patent/TW202006911A/zh
Application granted granted Critical
Publication of TWI804652B publication Critical patent/TWI804652B/zh

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/741—Apparatus for manufacturing means for bonding, e.g. connectors
    • H01L24/742—Apparatus for manufacturing bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/492—Bases or plates or solder therefor
    • H01L23/4924—Bases or plates or solder therefor characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1633—Process of electroless plating
    • C23C18/1646—Characteristics of the product obtained
    • C23C18/165—Multilayered product
    • C23C18/1651—Two or more layers only obtained by electroless plating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/42—Coating with noble metals
    • C23C18/44—Coating with noble metals using reducing agents
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/11—Manufacturing methods
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L24/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/18—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material
    • H05K3/181—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using precipitation techniques to apply the conductive material by electroless plating
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/32—Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/38—Coating with copper
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/31—Coating with metals
    • C23C18/42—Coating with noble metals
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/48—Coating with alloys
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/48—Coating with alloys
    • C23C18/50—Coating with alloys with alloys based on iron, cobalt or nickel
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05155—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/0516—Iron [Fe] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05171—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05099—Material
    • H01L2224/051—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/0518—Molybdenum [Mo] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05575—Plural external layers
    • H01L2224/0558—Plural external layers being stacked
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05601—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/05611—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05617—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/05624—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05647—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/05655—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/0566—Iron [Fe] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05666—Titanium [Ti] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05671—Chromium [Cr] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/0568—Molybdenum [Mo] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05599—Material
    • H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/05663—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/05684—Tungsten [W] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/11334—Manufacturing methods by local deposition of the material of the bump connector in solid form using preformed bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
    • H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
    • H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1146—Plating
    • H01L2224/11462—Electroplating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/11—Manufacturing methods
    • H01L2224/114—Manufacturing methods by blanket deposition of the material of the bump connector
    • H01L2224/1146—Plating
    • H01L2224/11464—Electroless plating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13084—Four-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/13111—Tin [Sn] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/13124—Aluminium [Al] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13139—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13144—Gold [Au] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13147—Copper [Cu] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13155—Nickel [Ni] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/13157—Cobalt [Co] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13164—Palladium [Pd] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13169—Platinum [Pt] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13099—Material
    • H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/13163—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/13184—Tungsten [W] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01046—Palladium [Pd]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Materials Engineering (AREA)
  • Mechanical Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Ceramic Engineering (AREA)
  • Chemically Coating (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)

Abstract

本發明係一種導電性凸塊及無電解鉑鍍浴，其課題為提供：防止使用於凸塊之基底導電層之金屬的擴散於Au層表面、或Ag層表面之凸塊者。 解決手段為本發明之導電性凸塊，係形成於基體上之導電性凸塊，其中，前述凸塊係從基體側依序至少具有基底導電層，Pd層，與前述Pd層直接接觸之Pt層、及Au層、或Ag層，前述凸塊之直徑係20μm以下。

Description

導電性凸塊及無電解鉑鍍浴
本發明係有關導電性凸塊及無電解鉑鍍浴。
在IC(集成電路：Integrated Circuit)集成晶片之LSI(大規模集成電路：Large Scale Integration)等之半導體集成電路中，作為IC晶片彼此，或者與IC晶片與電路基板等之電性接合方法，泛用打線接合，但伴隨著近年的電子機器的小型化或集成電路的高密度化，立體地連接IC晶片彼此之3次元集成電路則被注目。作為對應於3次元集成電路等之層積型的半導體集成電路的安裝技術，進行覆晶接合。覆晶接合係藉由形成於IC晶片之稱為凸塊之突起狀端子而為了與其他的基體之連接部電性連接，而與打線接合做比較，配線為短，可縮小安裝面積之故，適用於要求小型化，薄型化之攜帶機器等。
在半導體集成電路中，要求在與IC晶片的電性連接之低電阻率，低接觸阻抗(以下，稱為「電性特性」，和良好之接合性(以下，稱為「接合特性」)(以下，彙整此等之特性而稱為「連接信頼性」，進行各種研究。對於IC晶片的凸塊材料亦有進行種種的檢討，作為低成本，且對於連接信賴性優越之凸塊，例如，對於專利文獻1，專利文獻2係揭示有：直接形成Au層於Ni等之基底導電層之凸塊(以下，稱為「Ni-Au凸塊」)。
另外，作為基體，例如，取代於酚醛樹脂板等之紙苯酚樹脂而使用對於矽晶圓等耐熱性優越之材料，而在半導體製造過程所加上之熱歷程的溫度亦逐漸變高，而有成為300℃以上之情況。因此，作為Ni-Au凸塊之問題點，經由300℃以上之高溫的熱歷程(以下，有稱為「高溫熱歷程」而基底導電層之Ni則擴散於Au層表面，指出有連接信賴性降低之情況。作為其對策，例如，對於專利文獻3係提案有：設置Pt層於Ni與Au層之間的技術。 [先前技術文獻] [專利文獻]
[專利文獻1]日本特開2017-79297號公報 [專利文獻2]日本特開2016-032171號公報 [專利文獻3]日本特開2016-54179號公報
[發明欲解決之課題]
近年，作為將3次元集成電路作為高密度化之手段，檢討有以直徑20μm以下之細微的凸塊(以下，有稱為「微凸塊」之情況)而連接IC晶片之情況。但為微凸塊之情況，無法直接形成Pt層於基底導電層，而微凸塊的連接信賴性則成為課題。
另外，自以往指出有無電解鉑鍍浴為不安定，而鉑粒子容易析出，對於工業化係必須提高無電解鉑鍍浴之安定性。
本發明係有鑑於上述情事所做為之發明，其目的為提供：可防止使用於基底導電層之金屬(以下，有稱為「基底金屬」之情況)則擴散於Au層表面、或Ag層表面之微凸塊；及適合於對於該擴散防止有效之Pt層的形成之同時，對於鉑鍍浴之安定性優越之無電解鉑鍍浴者。 為了解決課題之手段
可達成上述課題之本發明的導電性凸塊係具有下述構成。 [1] 一種導電性凸塊係形成於基體上之導電性凸塊，其中，前述凸塊係從基體側依序至少具有基底導電層，Pd層，與前述Pd層直接接觸之Pt層、及Au層、或Ag層，前述凸塊之直徑係20μm以下。
另外，本發明的導電性凸塊係理想為具有以下的構成。 [2] 如[1]所記載之導電性凸塊，其中，前述基底導電層係選自Ni、Cu、Co、Al及W所成的群之至少1種的金屬，或其合金。
[3] 一種電子構件，其中，電性接合前述導電性凸塊之前記Au層或Ag層，和其他的基體者。
[4] 一種無電解鉑鍍浴係使用於如上述[1]~[3]所記載之Pt層的形成之無電解鉑鍍浴，其中，含有水溶性白金化合物，還元劑，緩衝劑，及氯化銨之構成。
[5] 如[4]所記載之無電解鉑鍍浴，其中，前述還原劑係選自蟻酸或其氯，及聯胺類所成的群之至少1種者。 發明效果
本發明的凸塊係可防止基底金屬擴散於Au層或Ag層的表面，而可得到優越之連接信賴性。另外，本發明之無電解鉑鍍浴係對於鍍浴的安定性優越。
本發明者們係對於在微凸塊之基底金屬的擴散防止手段，重複進行檢討。以無電解鍍敷處理而形成Pt層於微凸塊之基底導電層之情況，必須使鉑鍍液侵入至設置於保護膜之直徑數十μm以下之開口部內而形成Pt鍍敷皮膜於基底導電層之表面(以下，有稱為微小面積之情況)，但在以往的無電解鉑鍍浴中，對於如此之微小面積良好的被覆性，即在Pt鍍敷皮膜中之針孔或Pt鍍敷皮膜，未完全地被覆基底導電層而露出有基底導電層之一部分等，形成成為基底金屬之擴散原因之未有缺陷的Pt鍍敷皮膜情況則為困難。另外，亦檢討有以蒸鍍法而形成Pt層之情況，但在蒸鍍法中，充分地使鉑析出於微小面積之情況則為困難。因此，以此等方法所製作之微凸塊係連接信賴性為低。
即使Pt層之被覆性為不充分而由將Au層作為厚膜化者，認為亦可提升連接信賴性，但當將Au層作為厚膜化時，成本則變高，另外在層積型之半導體集成電路中係Au層亦要求儘可能作為薄化而無法採用。
因此，本發明者們係使用具有種種之導電性的金屬(以下，稱為「導電性金屬」)而對於基底金屬之擴散防止效果進行重複實驗。首先，作為Ni以外的導電性金屬而檢討將Co或Cu等使用於基底導電層。但，該基底導電層與Au層之2層構造的微凸塊係經由高溫熱歷程而基底金屬則擴散於Au層的表面。接著，於基底導電層與Au層之間，將與基底導電層不同之導電性金屬，例如P、B、W等作為合金元素，使Pd基合金層、Ni基合金層、Co基合金層介入存在，但當負載高溫熱歷程時，均無法得到擴散防止效果。
更加地進行重複檢討之結果，本發明者們係使用與以往完全不同之導電性金屬之構成，即，由使Pd層介入存在於Pt層與基底導電層之間，於Pd層上直接形成Pt層者，改善Pt鍍敷液之反應性，而在Pd層上之Pt析出性則提升，其結果，發現可形成具有良好之被覆性的Pt層。並且，自基體側依序形成有Pd層、Pt層、Au層之微凸塊係即使加上高溫熱歷程，亦可防止基底金屬擴散於Au層的表面。
另外，在本發明中，以往的鉑鍍浴係為不安定，在浴中析出有Pt粒子，而產生有不易經由無電解鍍敷處理而形成上述Pt層之問題之故，對於此點亦進行檢討。
對於在無電解鉑鍍浴之鍍浴安定性或在微小面積之良好的被覆性等之上述問題而言，本發明者們進行重複檢討的結果，如使用富有氯化銨之無電解鉑鍍浴時，發現對於鍍浴安定性優越之同時，對於形成Pd層之微小面積，亦可形成對於被覆性優越之Pt鍍敷皮膜者。然而，對於以往之無電解鉑鍍浴，亦作為水溶性白金化合物所使用之來自於四胺鉑金鹽等的胺而含有銨鹽，但產生有上述問題。另外，在添加氯化鈉等之氯化物而富有氯化物之鍍浴，亦無法消解上述問題。同樣地，僅添加銨而成富有銨之鍍浴的情況，鍍浴安定性係提升，但被覆性降低，而無法解決上述問題。但，出奇意外地無電解鉑鍍浴係添加氯化銨，較以往作為成富有氯化銨之同時，鍍浴之其他的組成亦作為最佳化時，明確了解發揮對於鍍浴安定性與被覆性的雙方之優越效果。依據如此之見解而至開發本發明之無電解鉑鍍浴。
以下，對於本發明之導電性凸塊的構成，依據圖1加以說明，但本發明之導電性凸塊係未限定於下述構成，而亦可在適合於前･後記之內容範圍，適當地加上變更而實施者。
有關本發明之導電性凸塊7係對於自基體10側依序，至少具有基底導電層3，Pd層4、Pt層5、及Au層6或Ag層6之情況，具有主要內容。
基體10係具有形成有本發明之導電性凸塊7之電極等之連接部2的基板1。作為基體10係例示有IC晶片，IC晶片之集成電路，電路基板等之各種電子構件。另外，基板1之材質亦無特別加以限定，而可使用樹脂，金屬，陶瓷，矽，玻璃，及此等之混合材料等各種公知的基板。此等之中，在本發明中，對於300℃以上之高溫耐熱性優越的矽為最佳，而可使用各種矽晶圓。
導電性凸塊 在本發明中，導電性凸塊7係指：為了電性連接基體10與其他的基體(圖2中，8)，至少在形成於基體10之一方的面之突起狀端子，由後述之各層加以構成之層積體。導電性凸塊7的形狀係可採用各種公知之任意的形狀。
另外，導電性凸塊7係可採用因應用途的尺寸。隨之，導電性凸塊7之厚度係如因應用途而做適宜調整即可，而未加以限定。理想為100μm以下、更理想為50μm以下亦可。下限係未特別加以限定，而理想為數μm以上、更理想為10μm以上。另外，成為本發明之對象的導電性凸塊7係直徑20μm以下之微凸塊，而更理想之直徑係15μm以下、又更理想為10μm以下。凸塊的直徑係指：意味最表面的最大直徑，但導電性凸塊7之形狀則如圓錐狀等地，經由凸塊的高度位置而直徑則不同之情況，係形成Pt層的面之最大直徑。然而，凸塊的直徑係以數位顯微鏡而測定的值，詳細係依照記載於實施例的條件。
接著，對於構成本發明之導電性凸塊7的各層加以說明。
基底導電層 基底導電層3係指：將耐熱性提升等作為目的而形成於基體10之連接部2上，成為導電性凸塊7之基底的導電層。基底導電層3係可以具有導電性之金屬而構成，而理想係選自Ag、Sn、Pd、Ni、Cu、Co、Al及W所成的群之至少1種之金屬，或其合金，更理想為選自Ni、Cu、Co、Al及W所成的群之至少1種之金屬，或其合金，又更理想為Ni、Co、或其合金。作為合金元素係可與各種公知的合金元素組合者，而理想為選自P、B、及W所成的群之至少1種。具體而言，係可舉出：P-Ni基合金、B-Ni基合金、W-Ni基合金、W-P-Ni基合金等之Ni基合金；P-Co基合金、B-Co基合金、W-P-Co基合金等之Co基合金。構成基底導電層3之基材金屬與合金元素的比率係未加以限定，但理想係合金元素的比率為不足50質量%，而更理想為15質量%以下，又更理想為10質量%以下。另外，基底導電層3係以1種之金屬(或其合金)而加以構成亦可，而亦可組合2種以上之金屬(或其合金)。
由控制基底導電層3之厚度者，可提升連接部2之耐熱性等。從提高如此之效果的觀點，基底導電層3之厚度係理想為0.01μm以上、更理想為0.1μm以上、又更理想為0.3μm以上。另一方面，當加厚基底導電層3時，可更一層提高上述效果者。基底導電層3之厚度係如因應微凸塊的厚度而做適宜調整即可，而理想為20μm以下、更理想為10μm以下、又更理想為5μm以下。
Pd層 在本發明中，於基底導電層3與Pt層5之間，設置Pd層4。當於基底導電層3與Pt層5之間，設置Pd層4，而於Pd層4直接形成Pt層5時，Pt析出性則提升，可形成具有良好之被覆性的Pt層5，而可得到優越之擴散抑制效果。 在圖1中，Pd層4之一方的面則呈與基底導電層3接觸，而另一方的面則呈與Pt層5接觸地加以設置。Pd層4係由Pd或Pd合金所構成的層(以下，有彙整稱為「Pd層」之情況)。Pd層係由Pd層及殘留部不可避免不純物而加以構成亦可。Pd合金層係Pd-P合金者為佳。另外，Pd-P合金皮模中之P含有率係理想為15質量%以下、更理想為10質量%以下。
Pd層4之厚度係呈可得到期望的效果地如做適宜調整即可，但理想係0.005μm以上、更理想係0.01μm以上、又更理想係0.1μm以上。另一方面，Pd層4係如因應微凸塊的厚度而做適宜調整即可，而理想為5μm以下、更理想為1μm以下、又更理想為0.5μm以下。
然而，雖無圖示，於基底導電層3與Pd層4之間，因應必要而設置1層以上由其他的導電性金屬所構成之中間導電層亦可。設置中間導電層情況之金屬組成係可適宜選擇因應用途，特性的導電性金屬。作為任意之導電性金屬係例如，可舉出以基底導電層3所例示之金屬，及其合金。另外，中間導電層之厚度係呈可得到期望的效果地，如做適宜設定即可，而亦可為與Pd層4同等之厚度。
Pt層 Pt層5係如上述，具有擴散防止效果。Pt層5與Au層6或Ag層6係作為直接接觸者為佳。當於Pt層5與Au層6(或Ag層6)之間介入存在有其他的金屬層時，該金屬則有擴散於Au層5之表面情況。另一方面，對於為了發揮Pt層5擴散防止效果，係對於Pt層5未有針孔等成為基底金屬的擴散原因之缺陷者則為必要，而作為可得到良好之被覆性的構成，Pt層5之基體10側的面係與Pd層4直接接觸。當考慮被覆性時，Pt層5係儘可能由高純度之Pt而加以構成者為佳，而在對於被覆性未帶來影響之程度而含有不可避免不純物亦可。
由控制Pt層5之厚度者，發揮更優越之擴散防止效果。從提高擴散防止效果的觀點，Pt層5之厚度係理想為0.005μm以上、更理想為0.01μm以上、又更理想為0.1μm以上。另一方面，當加厚Pt層時，可更一層提高擴散防止效果，但導電性凸塊7則變高而成為阻礙薄型化之情況之故，而理想為5μm以下、更理想為3μm以下、又更理想為1μm以下。
Au層或Ag層 由將Au層6或Ag層6作為導電性凸塊7之最表層者，發揮與其他的基體(圖2中，8)之良好的連接信賴性。導電性凸塊7之最表面係指：與其他的基體，或其他的基體的構成物接觸的面。然而，未與其他的基體接觸的導電性凸塊7之側面係形成有Au層6或Ag層6亦可，而亦可未加以形成。
Au層 Au層6係為了發揮優越之連接信賴性而形成於凸塊的表層。在本發明中，經由上述Pt層5而可得到擴散防止效果之故，可將Au層6薄化形成。Au層6之厚度係理想為5μm以下、更理想為3μm以下、又更理想為1μm以下亦可。Au層6之厚度的下限係未特別加以限定，但理想為0.005μm以上、更理想為0.01μm以上、又更理想為0.1μm以上。當考慮連接信賴性時，Au層6係儘可能以高純度Au而加以構成者為佳，但在對於連接信賴性未帶來影響的限度而含有不可避免不純物亦可。
Ag層 Ag層6係為了發揮優越之連接信賴性而形成於凸塊的表層。在本發明中，經由上述Pt層5而可得到擴散防止效果之故，可將Ag層6薄化形成。Ag層6之厚度係理想為5μm以下、更理想為3μm以下、又更理想為1μm以下亦可。Ag層6之厚度的下限係未特別加以限定，但理想為0.005μm以上、更理想為0.01μm以上、又更理想為0.1μm以上。當考慮連接信賴性時，Ag層6係儘可能以高純度Ag而加以構成者為佳，但在對於連接信賴性未帶來影響的限度而含有不可避免不純物亦可。
電子構件 具有本發明之導電性凸塊7的基體10係藉由導電性凸塊而與其他的基體電性連接，構成電子構件亦可。作為其他的基體係與基體10同一，或不同之構成亦可，例如，如為具有可與IC晶片，IC晶片的集成電路，電路基板等基體10連接之連接部的基體，未加以限定。另外，例如，將本發明之導電性凸塊7形成於IC晶片之情況，電性連接該IC晶片與電路基板亦可，或者電性連接該IC晶片與其他的IC晶片而形成3次元集成電路亦可，而另外，該IC晶片係使其複數層積亦可。
圖2係顯示將形成本發明之導電性凸塊7的基體10，以覆晶接合而連接於其他的基體8之狀態者。與導電性凸塊7電性連接之其他的基體8之連接部(未圖示)的構成係未特別加以限定，而例示有連接於信號線等之半導體圖案的墊片電極等任意的連接部。連接方法係可採用超音波連接法，熱壓著法等各種公知的連接方法。
製造方法 以下，對於本發明之導電性凸塊7之理想的製造方法加以說明。本發明之導電性凸塊7之製造方法係未限定於下述製造方法，可作適宜改變。
形成有導電性凸塊7之基體10係可使用以以往公知的方法所製造知各種基體，於基體10之連接部，形成導電性凸塊7。例如，導電性凸塊7係與基體10上之集成電路的信號線，或電源線等之各種配線加以連接之墊片電極等形成於連接部2亦可。形成導電性凸塊7之基體10的連接部2係例如，亦可經由銅，鋁，鐵，鎳，鉻，鉬等之金屬箔，或者此等之合金箔，例如，鋁青銅，磷青銅，黃青銅等之銅合金，或不鏽鋼，琥珀，鎳合金，錫合金等而加以構成亦可。更且，對於連接部2與導電性凸塊7之基底導電層3之間係為了使密著性提升，形成有具有Ti、Cr、W等之密著性提升效果之各種金屬膜亦可。然而，在形成導電性凸塊7之前，因應必要對於基體10施以洗淨處理，酸洗淨處理等之各種前處理之後，形成基底導電層3亦可。
基底導電層之形成 於連接部2形成基底導電層3，但基底導電層3係可以電解鍍敷法，無電解鍍敷法，置換鍍敷法，柱形凸塊法，轉印法等之各種公知的方法而形成。理想為無電解鍍敷法，而例如，於基體上形成光阻膜等，形成保護基體上之半導體元件之保護膜，接著由光阻劑或蝕刻等，於保護膜形成凸塊開口部。經由必要而進行洗淨處理或鋅置換處理等之前處理之後，由使用無電解鍍浴而進行無電解鍍敷處理者，於設置凸塊開口部之基體連接部，形成鍍敷皮膜，即，基底導電層3。以無電解鍍敷法而形成基底導電層3之情況係可採用各種公知的處理條件，而無電解鍍浴之組成，pH、處理溫度、處理時間等係未特別加以限定。於基底導電層3形成中間導電層之後，形成後述Pd層亦可。對於設置中間導電層於基底導電層3之情況，如以無電解鍍敷處理等各種公知之方法，形成期望的中間導電層即可。
Pd層之形成 形成基底導電層3之後，設置Pd層4。Pd層4之形成方法係未特別加以限定，與基底導電層3同樣，可經由各種公知的方法而形成。形成保護膜而形成基底導電層3之情況係持續進行無電解鍍敷處理，形成Pd層4者為佳。以無電解鍍敷法而形成Pd層4之情況係可採用各種公知的處理條件，而無電解鍍浴之組成，pH、處理溫度、處理時間等係未特別加以限定。然而，因應必要，在形成中間導電層於基底導電層3之後，設置Pd層4亦可。
Pt層之形成 在形成上述Pd層4之後，形成Pt層5。Pt層5係以無電解鍍敷法而形成者為佳。另外，以無電解鍍敷法而形成Pt層5之情況，當考慮鍍浴之安定性或被覆性時，使用本發明之下述無電解鉑鍍浴者為佳。
無電解鉑鍍浴 本發明之無電解鉑鍍浴係含有水溶性白金化合物，還原劑，緩衝劑，及氯化銨之構成。對於無電解鉑鍍浴係亦含有來自水溶性白金化合物的氯化銨，但在本發明中，其特徵為含有超過化學計量比之氯化銨的點。無電解鉑鍍浴中之氯化銨濃度係理想為10g/L以下、更理想為5g/L以下、又更理想為1g/L以下。當氯化銨濃度為低時，鍍浴安定性降低之同時，有著無法得到在微凸塊之良好的被覆性之故，而理想為1ppm以上、而更理想為10ppm以上、有更理想為100ppm以上。特別是，本發明之無電解鉑鍍浴係可形成如上述之開口部直徑為數十μm以下，例如對於20μm以下之保護膜內之Pd層4具有良好的被覆性之Pt層5之故，而為理想。
水溶性白金化合物 水溶性白金化合物可使用一般的白金鹽，例如可使用二硝二胺白金，氯鉑酸鹽，四氨白金鹽，及六氨白金鹽等。此等之白金化合物係均可以單獨使用，或組合2種類以上而使用。
水溶性白金化合物的添加量係作為在無電解鉑鍍浴中之白金的濃度，從生產性的觀點，理想為0.1g/L以上、而更理想為0.5g/L以上。另外，從鍍浴之安定性的觀點，理想為3.0g/L以下、而更理想為2.0g/L以下。
還原劑 還原劑係可使用可還原析出Pt離子之還原劑，但選自具有對於Pt鍍敷析出性提升優越效果的蟻酸，或其鹽(以下，有稱為蟻酸類之情況)，及聯胺類所成的群之至少1種者為佳。更理想的還原劑係蟻酸類，對於鍍浴安定性，Pt鍍敷析出性，基底金屬之腐蝕抑制等優越。含有聯胺類之鉑鍍浴係鍍浴安定性為低而對於長期保存性差，但具有對於微凸塊的Pt鍍敷析出性之故而為理想。
蟻酸類 作為蟻酸類係蟻酸或其鹽，而作為蟻酸的鹽係例如，可舉出：蟻酸鉀，蟻酸鈉等之蟻酸的鹼性金屬鹽；蟻酸鎂，蟻酸鈣等之蟻酸的鹼土類金屬鹽；含有蟻酸的銨鹽，第4級銨鹽，第1級~第3級胺之胺鹽；等之蟻酸類。在本發明中，可將蟻酸或其鹽，並用單獨或2種以上。
對於充分地使上述效果發揮，在無電解鉑鍍浴中之蟻酸類的合計濃度係理想為1g/L以上、而更理想為5g/L以上、又更理想為10g/L以上。另一方面，當過剩地含有時，鍍浴則容易成為不安定之故，蟻酸類的合計濃度係理想為100g/L以下、而更理想為80g/L以下、又更理想為50g/L以下。
聯胺類 作為聯胺類係可使用聯胺；聯胺･1水合物等之水合聯胺；碳酸聯胺，硫酸聯胺，中性硫酸聯胺，鹽酸聯胺等之聯胺鹽；吡唑類，三唑類，醯肼類等之聯胺的有機衍生物；等。作為前述吡唑類係除了吡唑之外，可使用3,5-二甲基吡唑，3-甲基-5-吡唑啉酮等之吡唑衍生物。作為前述三唑類係可使用4-氨基-1,2,4三唑，1,2,3-三唑等。作為醯肼類係可使用己二酸醯肼，馬來酸醯肼，碳醯肼等。理想為聯胺･1水合物之水合聯胺，硫酸聯胺。可將此等，單獨或2種以上併用。
在無電解鉑鍍浴中之聯胺類的合計濃度係理想為0.1g/L以上、更理想為0.3g/L以上、又更理想為1.0g/L以上，其中，理想為5g/L以下、更理想為3g/L以下。
緩衝劑 緩衝劑係具有調整鍍浴之pH的作用。當考慮鍍浴的安定性時，理想為pH3以上。另外，當考慮Pt鍍敷皮膜形成時之析出速度時，理想為pH11以下。特別是對於還原劑使用蟻酸之情況，考慮鍍浴安定性與環境負荷之同時，對於形成得到本發明之上述效果的Pt層，係pH10~pH9程度之弱鹼性附近的條件則更佳。具體而言，pH10以下、或不足pH10亦可，而超過pH9，或pH9以上亦可。緩衝劑係可因應調整之pH而作適宜選擇，例如，作為酸而可舉出：鹽酸，硫酸，硝酸，磷酸，羧酸等，而作為鹼，可舉出：氫氧化鈉，氫氧化鉀，氨水等。另外，作為上述pH緩衝劑係可舉出：檸檬酸，酒石酸，蘋果酸，鄰苯二甲酸等之羧酸；正磷酸，亞磷酸，次亞磷酸，焦磷酸等之磷酸，或此等之鉀鹽，鈉鹽，銨鹽等之磷酸鹽；硼酸，四硼酸；等。緩衝劑的濃度係無特別加以限定，而呈成為上述期望之pH地適宜添加而進行調整即可。
氯化銨(NH4 Cl) 由提高無電解鉑鍍浴中的氯化銨濃度者，鍍浴安定性，具體而言係在鍍敷時之例如50~90℃之溫度域，至少保持數日，理想為30~60日，亦可防止Pt例子之析出。另外，由提高無電解鉑鍍浴中的氯化銨濃度者，可形成對於被覆性優越之Pt鍍敷皮膜之故而發揮擴散防止效果。從更一層提高如此之效果的觀點，無電解鉑鍍浴中的氯化銨濃度係理想為0.001g/L以上、而更理想為0.01g/L以上、又更理想為0.1g/L以上。氯化銨濃度的上限係越高，越可提高上述效果，但當過高時，為了維持鍍浴之pH而必須追加緩衝劑，而伴隨於此，亦成為必須調整鍍浴之其他成分之故，而理想為不足20g/L、更理想為15g/L以下、又更理想為10g/L以下、又再更理想為5g/L以下、特別理想為1g/L以下。
本發明之無電解鉑鍍浴係由水溶性白金化合物，還原劑，緩衝劑，及氯化銨加以構成亦可，而亦可含有其他的添加劑。作為其他的添加劑係可舉出：各種公知的添加劑。對於本發明之無電解鉑鍍浴係在未阻礙發明的效果之範圍，含有不可避免不純物亦可。
使用本發明之無電解鉑鍍浴之無電解鍍敷處理條件係可適宜調整使用於以往之無電解鉑鍍浴之處理條件而實施，但鍍敷時之溫度係理想為50℃以上、更理想為60℃以上、有更理想為70℃以上、其中，理想為90℃以下、又更理想為80℃以下。處理時間係為了形成期望的膜厚而如作適宜調整即可，理想為1分以上、更理想為5分以上、其中，理想為60分以下、更理想為10分以下。
Au層之形成 形成Pt層5之後，形成Au層6。Au層6之形成方法係未特別加以限定，可經由各種公知的方法而形成。形成保護膜，經由無電解鍍敷法而形成Pt層5之後，持續進行無電解鍍敷處理而形成Au層6者為佳。以無電解鍍敷法而形成Au層6之情況係可採用各種公知的處理條件，而無電解鍍浴之組成，pH、處理溫度、處理時間等係未特別加以限定。
Ag層之形成 形成Pt層5之後，取代Au層6而形成Ag層6亦可。Ag層6之形成方法係未特別加以限定，可經由各種公知的方法而形成。形成保護膜，經由無電解鍍敷法而形成Pt層5之情況，係持續進行無電解鍍敷處理而形成Ag層6者為佳。以無電解鍍敷法而形成Ag層6之情況係可採用各種公知的處理條件，而無電解鍍浴之組成，pH、處理溫度、處理時間等係未特別加以限定。
形成Au層6，或Ag層6之後，除去保護膜。之後，因應必要而施以洗淨處理等各種公知之後處理亦可。經由上述製造方法，自基體10側依序，至少形成[基底導電層3]、[Pd層4]、[Pt層5]、及[Au層6、或Ag層6]，可製造本發明之導電性凸塊7。 [實施例]
以下，舉出實施例，更具體說明本發明，但本發明係不用說未經由下記實施例而加以限制，當然亦可在可適合於前･後記內容之範圍，加上變更而實施者，此等係均包含於本發明之技術範圍。
實施例1 將相當於本發明之導電性凸塊的試料，以300℃進行1小時加熱之後，對於擴散於Au層表面之金屬進行調查。
經由無電解鍍敷處理而形成相當於導電性凸塊之導電性金屬層的層積體。首先，在進行無電解鍍敷處理之前，以表1所示之條件，依序進行工程1~5，對於基體施以前處理。表1中，MCL-16、MCT-51係各為日本上村工業公司製EPITHAS註冊商標)MCL-16、日本上村工業公司製EPITHAS MCT-51。
Figure 02_image001
作為前處理而依序進行下述工程1~5。 工程1：使用MCL-16而進行基體(Al TEG晶圓)之洗淨處理(50℃、300秒)。 工程2：使用30質量%的硝酸液而進行酸洗處理(常溫、60秒)，形成氧化膜於基體Al表面。 工程3：使用MCT-51而進行1次鋅置換處理(常溫、30秒)。 工程4：使用30質量%的硝酸液而進行酸洗處理(常溫、60秒)，使Zn置換膜剝離，形成氧化膜於基體Al表面。 工程5：使用MCT-51而進行2次鋅置換處理(常溫、30秒)。
於基體施以前處理之後，使用表2所示之鍍浴No.A~C之任一，鍍敷皮膜的厚度則呈成為0.3μm地進行無電解鍍敷處理，於基體表面，形成成為基底導電層之鍍敷皮膜(第1層)。然而，作為處理液而使用之NPR-18、HBS-10、PMA-30係各為日本上村工業公司製NIMUDEN註冊商標)NPR-18、EPITHAS HBS-10、EPITHAS PMA-30。
基底導電層形成後，使用表2所示之鍍浴，鍍敷皮膜的厚度則呈成為0.3μm地進行無電解鍍敷處理，於基底導電層表面，形成成為第2層之鍍敷皮膜。另外，在一部分之實施例中，同樣作為，依序形成成為第3層，第4層之鍍敷皮膜，製作各實施例的試料。然而，作為處理液而使用之TFP-23、TFP-30、NWP、HWP-1、TMX-16、RSL-34係各為日本上村工業公司製EPITHAS TFP-23、EPITHAS TFP-30、TORIAROI註冊商標)NWP、EPITHAS WP-1、GOBRIGHT註冊商標)TMX-16、EPITHAS RSL-34。
然而，形成Pt層之No.9~13、16~19係於基體施以前處理之後，於光阻膜，形成直徑100μm之圓柱狀開口部之後，使用表2所示之鍍浴而形成各層以外係與上述同樣作為，製作各試料。另外，更且將開口部變更為直徑20μm以外係同樣作為，製作各試料。然而，No.9~13、16~19係形成Pt鍍敷層之後，進行外觀觀察之後，形成Au層或Ag層。
Au層或Ag層之最表面的擴散評估 對於試料，施以由想定在實際的IC晶片製造過程所負載之熱歷程的300℃進行1小時加熱之熱處理之後，經由下述條件之歐傑電子能譜術而進行形成於試料之鍍敷皮膜(Au層或Ag層)之最表面的元素分析，調查形成在最表面之Au、或Ag以外之金屬元素濃度。結果示於表2之「最表面之金屬元素濃度」欄。然而，在該濃度欄之「%」係「原子%」(表中記載為「at.%」)的意思。檢出Au或Ag以外之金屬元素的情況，顯示該金屬元素擴散於最表面者。 ＜歐傑電子能譜術＞ 裝置：電場發射歐傑微探針 (日本電子股份有限公司製JAMP-9500F) EHT(Electron High Tension)：30kV Probe Current：1nA Probe Dia.：最小
Pt鍍敷皮膜之外觀觀察 No.9~13、16~19係形成Pt鍍敷皮膜之後，以光學顯微鏡(KEYENCE公司製VHX-5000)而觀察Pt鍍敷皮膜表面，以下述基準進行評估而記載於表2之析出性欄。 析出：Pt鍍敷皮膜則完全地被覆Pd鍍敷層。 未析出：存在有至少一部分未形成有Pt鍍敷皮膜之處。
Figure 02_image003
未形成Pt層之情況，即，於基底導電層與Au層或Ag層之間，僅設置Pd(No.3~5、15)、Pd-P合金層(No.6)、Ni-W-P合金層(No.7)、Co-W-P合金層(No.8)等之中間導電層之實施例，或者未設置中間導電層之實施例(No.1、2、14)係均於Au層之最表面、或Ag層之最表面，擴散有基底金屬。
另外，設置Pt層之No.9~13、16~19係直徑100μm之凸塊的情況，Pt皮膜析出性係無關於Pd層之有無而為良好，而在最表面未檢出基底金屬。另一方面，直徑20μm之凸塊的情況，未設置Pd層、或Pd-P層(以下、稱為「Pd層」)之No.9、10、17係Pt析出性為差，於最表面，檢出有基底金屬。另外，設置Pd層之No.11~13、16、18~19係對於直徑20μm之微凸塊而言，Pt析出性亦為良好，而在最表面未檢出基底金屬。
從表2之結果，Pt層係具有基底金屬的擴散抑制效果，但在直徑20μm之微凸塊中，了解到未設置Pd層之情況係無法形成具有良好被覆性之Pt層，而無法充份地得到擴散抑制效果者。另一方面，在微凸塊中，當設置Pd層時，可形成對於被覆性優越之Pt層之故，可得到良好之擴散抑制效果。
實施例2 以下述條件而保持30日表4所示之組成的鉑鍍浴之後，評估鉑鍍浴之安定性。依據下述基準，對於評估為「良好」之鉑鍍浴，評估Pt鍍敷皮膜之析出性。另一方面，評估為「不良」「不可」之鉑鍍浴係鍍浴安定性為低，而不適合於工業規模之生產之故，除了一部分未形成Pt鍍敷皮膜。
於基體，依序施以無電解鍍敷處理而形成Pt鍍敷皮膜之後，進行Pt鍍敷皮膜之外觀觀察。
首先，在進行無電解鍍敷處理之前，以表3所示之條件，依序進行工程1~5，對於基體(Al TEG晶圓)施以前處理。
Figure 02_image005
於基體施以前處理之後，光阻膜的形成，及於該光阻膜，形成直徑100μm之圓柱狀的開口部。之後，以表3所示之條件，施以無電解Ni鍍敷處理之後，施以無電解Pd鍍敷處理，自基體側依序形成Ni鍍敷皮膜，Pd鍍敷皮膜。
形成Pd鍍敷皮膜之後，使用表4所示之各無電解Pt鍍液，以表3所示之條件而形成Pt鍍敷皮膜，製造各試料。
另外，將形成於光阻膜之開口部直徑變更為20μm以外係與上述同樣作為，製造各試料。
Pt鍍敷皮膜之外觀觀察係與實施例1同樣作為而進行之。
鉑鍍浴安定性
將表4之各無電解鉑鍍浴，在特定的溫度，即，還原劑為聯胺之情況係50℃，而還原劑為蟻酸之情況係80℃，進行保持30日，目視觀察是否於鉑鍍浴中產生有Pt粒子之析出，以下述基準進行評估而記載於表4。
良好：試驗期間中、未確認到Pt粒子之析出。
不良：於試驗開始後24小時~240小時以內，確認到Pt粒子之析出。
不可：在試驗開始後不足24小時，確認到Pt粒子之析出。
Figure 108124473-A0305-02-0032-3
表4中、No.2~4、15~17係使用含有白金濃度1.0g之水溶性白金化合物溶液(Pt(NH3)4Cl2溶液(II)、還原劑(蟻酸鈉10g/L)、緩衝劑(硼酸)、及所定量之氯化銨，調整為pH10之無電解鉑鍍浴的例。No.2~4、15~17係使氯化銨含有量變化，但均對於浴安定性優越之同時，對於在直徑20μmPad之Pt析出性，亦為優越，而形成有良好之Pt鍍敷皮膜。另外，詳細調查No.2~5、No.15~17之浴安定性之結果，了解到氯化銨濃度越高，浴安定性則越提升的傾向。
No.1係未添加氯化銨的例。No.1係浴安定性為低，在處理開始後數小時，於鍍浴中析出有Pt粒子。
另外，No.5係氯化銨濃度過高的例。No.5係對於浴安定性，及在直徑100μmPad之Pt析出性係為優越，但在直徑20μmPad之Pt析出性為差。從此結果，了解到將氯化銨作為過高時，在微凸塊之Pt析出性則降低者。
No.6~11係使用取代氯化銨而含有氯化物之氯化鈉(No.6、7)、氨水(No.8、9)、氯化鈉與氨水(No.10、11)之無電解鉑鍍浴的例。使用鋁化鈉之No.6、7，或使用氨水之No.8，9，均浴安定性為低。使用氯化鈉與氨水之雙方的No.10、11係浴安定性為良好，但在直徑20μmPad之Pt析出性為差，而無法並存浴安定性與Pt析出性者。然而，使用鍍浴安定性為不良評估之No.9的Pt鍍浴而調查Pt析出性時，在直徑20μmPad之Pt析出性為差，無法形成期望之Pt鍍敷皮膜。
另外，No.12~14係將還原劑，自蟻酸變更為聯胺的例。No.13係使用氯化銨的例，而浴安定性為差。從此結果，經由氯化銨添加之浴安定性提升效果係了解到蟻酸則較聯胺容易得到者。另一方面，No.12係未含有氯化銨，而浴安定性為低，在處理開始後數小時，於鍍浴中析出有Pt粒子。另外，No.14係取代氯化銨而使用氯化鈉與氨水的例，但浴安定性為差。然而，使用鍍浴安定性為不可評估之No.13與No.14的鉑鍍浴而調查Pt析出性時，在直徑20μmPad之Pt析出性係在No.13中可確認到，但在No.14中無法確認到。從此結果，了解到含有氯化銨的情況係即使鍍浴安定性為低，亦具有Pt析出性，但未含有氯化銨之情況係無法得到Pt析出性者。
1:基板
2:連接部
3:基底導電層
4:Pd層
5:Pt層
6:Au層或Ag層
7:導電性凸塊
8:其他的基體
10:基體
圖1係顯示本發明之凸塊的構成之概略剖面圖。 圖2係顯示接合形成本發明之凸塊的基體，和其他的基體之電子構件的構成之概略剖面圖。
1‧‧‧基板
2‧‧‧連接部
3‧‧‧基底導電層
4‧‧‧Pd層
5‧‧‧Pt層
6‧‧‧Au層或Ag層
7‧‧‧導電性凸塊
10‧‧‧基體

Claims (9)

  1. 一種導電性凸塊，係形成於基體上之導電性凸塊，其特徵為前述凸塊係從基體側依序至少具有基底導電層，Pd層，與前述Pd層直接接觸之Pt層、及Au層或Ag層，前述Pt層係完全被覆前述Pd層表面，前述凸塊之直徑係20μm以下。
  2. 如申請專利範圍第1項所記載之導電性凸塊，其中，前述基底導電層係選自Ni、Cu、Co、Al及W所成的群之至少1種的金屬，或其合金。
  3. 如申請專利範圍第1項所記載之導電性凸塊，其中，前述Pd層係Pd或Pd合金。
  4. 如申請專利範圍第1項所記載之導電性凸塊，其中，前述基底導電層係直接接觸接觸於前述基板而形成之連接部而形成。
  5. 一種電子構件，其特徵為電性接合如申請專利範圍第1項至第4項之任一項記載之前述導電性凸塊之前記Au層或Ag層，和其他的基體者。
  6. 一種無電解鉑鍍浴，係使用於如申請專利範圍第1項至第4項之任一項記載之Pt層的形成之無電解鉑鍍浴，其特徵為含有水溶性白金化合物，還原劑，緩衝劑，及氯化銨，前述白金化合物係1.0g/L以下。
  7. 一種無電解鉑鍍浴，係使用於如申請專利範圍第5項所記載之Pt層的形成之無電解鉑鍍浴，其中，其特徵為含有水溶性白金化合物，還原劑，緩衝劑，及氯化銨之構成。
  8. 如申請專利範圍第6項所記載之無電解鉑鍍浴，其中，前述還原劑係選自蟻酸或其鹽，及聯胺類所成群之至少1種。
  9. 如申請專利範圍第7項所記載之無電解鉑鍍浴，其中，前述還原劑係選自蟻酸或其鹽，及聯胺類所成的群之至少1種。
TW108124473A 2018-07-12 2019-07-11 導電性凸塊及無電解鉑鍍浴 TWI804652B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2018132514A JP7148300B2 (ja) 2018-07-12 2018-07-12 導電性バンプ、及び無電解Ｐｔめっき浴
JP2018-132514 2018-07-12

Publications (2)

Publication Number Publication Date
TW202006911A TW202006911A (zh) 2020-02-01
TWI804652B true TWI804652B (zh) 2023-06-11

Family

ID=69139680

Family Applications (1)

Application Number Title Priority Date Filing Date
TW108124473A TWI804652B (zh) 2018-07-12 2019-07-11 導電性凸塊及無電解鉑鍍浴

Country Status (5)

Country Link
US (1) US11049838B2 (zh)
JP (1) JP7148300B2 (zh)
KR (1) KR102641047B1 (zh)
CN (1) CN110718523A (zh)
TW (1) TWI804652B (zh)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6811041B2 (ja) * 2016-07-04 2021-01-13 上村工業株式会社 無電解白金めっき浴
JP6572376B1 (ja) * 2018-11-30 2019-09-11 上村工業株式会社 無電解めっき浴

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030111729A1 (en) * 2001-12-19 2003-06-19 Intel Corporation Method of making semiconductor device using an interconnect
TW201123327A (en) * 2009-11-19 2011-07-01 Stats Chippac Ltd Semiconductor device and method of forming an inductor on polymer matrix composite substrate
TW201227890A (en) * 2010-12-31 2012-07-01 Au Optronics Corp Metal conductive structure and manufacturing method

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6222272B1 (en) * 1996-08-06 2001-04-24 Nitto Denko Corporation Film carrier and semiconductor device using same
JP3643224B2 (ja) * 1997-11-25 2005-04-27 日本特殊陶業株式会社 センサ素子電極形成方法
US6724084B1 (en) * 1999-02-08 2004-04-20 Rohm Co., Ltd. Semiconductor chip and production thereof, and semiconductor device having semiconductor chip bonded to solid device
JP2001127102A (ja) 1999-10-25 2001-05-11 Sony Corp 半導体装置およびその製造方法
JP2003297868A (ja) 2002-04-05 2003-10-17 Hitachi Ltd 半導体装置およびその製造方法
US6917509B1 (en) * 2002-11-21 2005-07-12 Daniel F. Devoe Single layer capacitor with dissimilar metallizations
US7427557B2 (en) * 2004-03-10 2008-09-23 Unitive International Limited Methods of forming bumps using barrier layers as etch masks
TWI257714B (en) * 2004-10-20 2006-07-01 Arima Optoelectronics Corp Light-emitting device using multilayer composite metal plated layer as flip-chip electrode
JP2006291242A (ja) 2005-04-06 2006-10-26 Matsushita Electric Ind Co Ltd 金めっき液および金めっき方法および半導体装置の製造方法および半導体装置
KR101191523B1 (ko) 2005-06-14 2012-10-15 쿠퍼 에셋 엘티디. 엘.엘.씨. 칩 커넥터
US20090026486A1 (en) * 2007-07-26 2009-01-29 Sharp Kabushiki Kaisha Nitride based compound semiconductor light emitting device and method of manufacturing the same
WO2009122867A1 (ja) 2008-03-31 2009-10-08 日本電気株式会社 半導体装置、複合回路装置及びそれらの製造方法
US8394672B2 (en) * 2010-08-14 2013-03-12 Advanced Micro Devices, Inc. Method of manufacturing and assembling semiconductor chips with offset pads
JP5616739B2 (ja) * 2010-10-01 2014-10-29 新日鉄住金マテリアルズ株式会社 複層銅ボンディングワイヤの接合構造
JP2014209508A (ja) 2013-04-16 2014-11-06 住友電気工業株式会社 はんだ付半導体デバイス、実装はんだ付半導体デバイス、はんだ付半導体デバイスの製造方法および実装方法
TWI538762B (zh) * 2014-01-03 2016-06-21 樂金股份有限公司 銲球凸塊與封裝結構及其形成方法
WO2016002455A1 (ja) 2014-07-03 2016-01-07 Jx日鉱日石金属株式会社 放射線検出器用ｕｂｍ電極構造体、放射線検出器及びその製造方法
JP6310354B2 (ja) 2014-07-28 2018-04-11 太陽誘電株式会社 弾性波デバイス
JP2016054179A (ja) 2014-09-03 2016-04-14 Ｊｘ金属株式会社 半導体デバイス
JP2016089190A (ja) 2014-10-30 2016-05-23 日本高純度化学株式会社 無電解白金めっき液及びそれを用いて得られた白金皮膜
JP2017079297A (ja) 2015-10-22 2017-04-27 イビデン株式会社 配線基板及びその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030111729A1 (en) * 2001-12-19 2003-06-19 Intel Corporation Method of making semiconductor device using an interconnect
TW201123327A (en) * 2009-11-19 2011-07-01 Stats Chippac Ltd Semiconductor device and method of forming an inductor on polymer matrix composite substrate
TW201227890A (en) * 2010-12-31 2012-07-01 Au Optronics Corp Metal conductive structure and manufacturing method

Also Published As

Publication number Publication date
CN110718523A (zh) 2020-01-21
US11049838B2 (en) 2021-06-29
KR20200007672A (ko) 2020-01-22
JP7148300B2 (ja) 2022-10-05
KR102641047B1 (ko) 2024-02-26
US20200020660A1 (en) 2020-01-16
JP2020009997A (ja) 2020-01-16
TW202006911A (zh) 2020-02-01

Similar Documents

Publication Publication Date Title
KR101639084B1 (ko) 팔라듐 도금용 촉매 부여액
US20060012042A1 (en) Use of direct gold surface finish on a copper wire-bond substrate, methods of making same, and methods of testing same
JP2001152385A (ja) コーティングされた金属製品
TWI804652B (zh) 導電性凸塊及無電解鉑鍍浴
JP5983336B2 (ja) 被覆体及び電子部品
US9331040B2 (en) Manufacture of coated copper pillars
TWI698552B (zh) 無電解鍍敷浴
TWI408252B (zh) 非氰化物無電黃金電鍍液及無電黃金電鍍方法
TW201330716A (zh) 基板及準備其之方法
WO2017023849A1 (en) Composition and method for electroless plating of palladium phosphorus on copper, and a coated component therefrom
JP2017128791A (ja) 無電解Ｎｉめっき皮膜を有する構造物、その製造方法および半導体ウェハ
JP2005314749A (ja) 電子部品及びその表面処理方法
JP6020070B2 (ja) 被覆体及び電子部品
KR20060046123A (ko) 순동 피복 동박 및 그 제조방법, 및 티에이비 테이프 및 그제조방법
JP6025259B2 (ja) めっき物
TW201925531A (zh) 無電解鈀鍍敷液及無電解鈀鍍敷被膜
TWI351740B (en) Electronic part
TWI790062B (zh) 具備Ni電鍍皮膜之鍍敷結構體及含有該鍍敷結構體之引線框
JP2000012762A (ja) 耐食性に優れる電気電子機器用部品材料、及びその製造方法
TWI500788B (zh) 耐磨抗蝕無鍍層銅線及其製造方法
WO2021166640A1 (ja) めっき積層体
Luo et al. Development of electroless nickel-iron plating process for microelectronic applications
JP2005264261A (ja) 電子部品材料