TWI791762B - Bonding apparatus - Google Patents

Bonding apparatus Download PDF

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Publication number
TWI791762B
TWI791762B TW108104502A TW108104502A TWI791762B TW I791762 B TWI791762 B TW I791762B TW 108104502 A TW108104502 A TW 108104502A TW 108104502 A TW108104502 A TW 108104502A TW I791762 B TWI791762 B TW I791762B
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Taiwan
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wafer
mounting head
head assembly
circuit substrate
circuit
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TW108104502A
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Chinese (zh)
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TW202004960A (en
Inventor
姜泰宇
曹廷鎬
崔富寬
金相銀
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南韓商韓華精密機械股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67144—Apparatus for mounting on conductive members, e.g. leadframes or conductors on insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67092—Apparatus for mechanical treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67098—Apparatus for thermal treatment
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67242—Apparatus for monitoring, sorting or marking
    • H01L21/67276—Production flow monitoring, e.g. for increasing throughput
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67706—Mechanical details, e.g. roller, belt
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67712—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrate being handled substantially vertically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/677—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations
    • H01L21/67703—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations
    • H01L21/67721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for conveying, e.g. between different workstations between different workstations the substrates to be conveyed not being semiconductor wafers or large planar substrates, e.g. chips, lead frames

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Automation & Control Theory (AREA)
  • Die Bonding (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

The present invention discloses a boding apparatus. The bonding apparatus includes: a plurality of transfer portions that transfer a plurality of circuit substrates, and a plurality of head assemblies on which the chips are mounted on each of the plurality of circuit substrates supplied from each of the plurality of transfer portions, and are set to corresponding to each of the plurality of head assemblies and temporarily disposing the chip, a wafer placement portion for placing a wafer on which the chip is placed, and by using the wafer disposed from the wafer placement portion, the chip is picked up, and the chip is supplied to a chip pickup portion of one of the plurality of intermediate stages.

Description

結合裝置 combination device

本發明是有關一種裝置，更具體而言，是有關一種結合裝置。 The present invention relates to a device, and more particularly to a coupling device.

眾所周知，結合裝置是從晶圓將晶片分離而安裝到電路基板(或導線架)上的裝置。此種結合裝置一般係用以安裝晶片於一電路基板。此處，晶片可包括半導體晶片、小型電子組件等。為達成此種操作，習見的結合裝置可包括從晶圓分離晶片的機構和傳送晶片的機構。藉此，結合裝置如上所述，將一晶片安裝於電路基板後，為了安裝其他晶片，或將晶片安装於其他處，需重覆執行如上所述之操作。在此種情况下，藉由結合裝置，將所需的晶片全部安裝於電路基板上，需許多的時間和進行步驟。 As is well known, a bonding device is a device that separates a chip from a wafer and mounts it on a circuit board (or lead frame). Such bonding devices are generally used to mount chips on a circuit substrate. Here, the wafer may include semiconductor wafers, small electronic components, and the like. To accomplish this, conventional bonding apparatus may include mechanisms for separating the wafers from the wafer and mechanisms for transferring the wafers. Therefore, as described above, in the bonding device, after mounting a chip on the circuit board, in order to mount other chips or to mount the chip in other places, the above-mentioned operations need to be repeated. In this case, it takes a lot of time and steps to mount all the required chips on the circuit board by bonding the device.

與上述有關的結合裝置於韓國專利發明第1999-0045650號(發明名稱：半導體晶片之搭接方法及其裝置，申請人：東芝股份有限公司)已有揭示。 The bonding device related to the above has been disclosed in Korean Patent Invention No. 1999-0045650 (name of invention: method and device for lapping semiconductor wafers, applicant: Toshiba Co., Ltd.).

有鑑於上述習見的結合裝置所具有之基本上 的缺點，本發明即旨在提供一種結合裝置。 In view of the above-mentioned fundamental disadvantages of conventional coupling devices, the present invention aims to provide a coupling device.

依本發明所提供的結合裝置，其包括：多數個傳送部，用以傳送多數個電路基板；多數個安裝頭組件，其安裝晶片於由所述多數個傳送部所分別傳送的每一所述多數個電路基板上；多數個中間台，其設置成分別對應於所述多數個安裝頭組件，且可臨時安置所述晶片；晶圓安置部，其用以安置晶圓，並使所述晶片放置於所述晶圓；以及晶片拾取部，其用以從安置於所述晶圓安置部的所述晶圓，拾取所述晶片，且將所述晶片傳送至所述多數個中間台的一個。 According to the bonding device provided by the present invention, it includes: a plurality of transfer parts, used to transfer a plurality of circuit substrates; a plurality of mounting head assemblies, which mount chips on each of the transfer parts respectively transferred on a plurality of circuit substrates; a plurality of intermediate stages, which are arranged to respectively correspond to the plurality of mounting head assemblies, and can temporarily place the wafer; a wafer placement part, which is used to place the wafer, and make the wafer placed on the wafer; and a wafer picker configured to pick up the wafer from the wafer placed on the wafer placement unit and transfer the wafer to one of the plurality of intermediate stages .

此外，本發明的結合裝置還可包括預先加熱部，其設置於所述多數個傳送部的每一個。 In addition, the bonding device of the present invention may further include a preheating unit provided in each of the plurality of transfer units.

甚者，本發明的結合裝置還可進一步包括加熱部，其設置於所述多數個傳送部的每一個，且對所述多數個電路基板之每一個中，所述晶片安装於所述每一個電路基板的部分加熱。 Furthermore, the bonding apparatus of the present invention may further include a heating unit provided in each of the plurality of transfer units, and for each of the plurality of circuit boards, the chip is mounted on each of the plurality of circuit boards. Partial heating of the circuit board.

並且，所述多數個安裝頭組件包括相互間隔排列的第一安裝頭組件、第二安裝頭組件、第三安裝頭組件以及第四安裝頭組件，其中，所述第四安裝頭組件和所述第三安裝頭組件中之一個被操作，而所述第二安裝頭組件和所述第一安裝頭組件中之一個被操作。 Moreover, the plurality of mounting head assemblies include a first mounting head assembly, a second mounting head assembly, a third mounting head assembly and a fourth mounting head assembly arranged at intervals, wherein the fourth mounting head assembly and the One of the third head assembly is operated and one of the second head assembly and the first head assembly is operated.

尚且，所述第四安裝頭組件或所述第三安裝頭組件中的另一個安裝頭組件被操作，則所述第二安裝頭組件或所述第一安裝頭組件中的另一個被操作。 Also, the other of the fourth mounting head assembly or the third mounting head assembly is operated, the other of the second mounting head assembly or the first mounting head assembly is operated.

另外，本發明的結合裝置還可進一步包括視覺部，其用以拍攝所述多數個電路基板和所述晶片的至少一個。 In addition, the bonding device of the present invention may further include a vision unit configured to photograph at least one of the plurality of circuit boards and the wafer.

由是，依據本發明之實施例的結合裝置，可將多數個晶片傳送並安裝於電路基板上，此為本發明之一目的。 Therefore, according to the bonding device of the embodiment of the present invention, a plurality of chips can be transferred and mounted on the circuit substrate, which is an object of the present invention.

依據本發明之實施例的結合裝置，可將不同種類的晶片傳送並安裝於電路基板上，此為本發明之另一目的。 According to the bonding device of the embodiment of the present invention, different types of chips can be transferred and mounted on the circuit substrate, which is another object of the present invention.

依據本發明之實施例的結合裝置，可縮減操作順序與操作時間，並可增進操作效率，此為本發明之又一目的。 According to the combination device of the embodiment of the present invention, the operation sequence and operation time can be reduced, and the operation efficiency can be improved, which is another object of the present invention.

100、200、300:結合装置 100, 200, 300: combination device

110、210、310:承載部 110, 210, 310: carrying part

120、220、320:卸載部 120, 220, 320: unloading department

130、230、330:傳送部 130, 230, 330: Transmission Department

131:第一傳送部 131: The first transmission department

131a:第一放置部 131a: the first placement department

131b:第一導軌部 131b: the first rail part

132:第二傳送部 132: The second transmission department

140、240、340‧‧‧清潔器 140, 240, 340‧‧‧cleaner

141‧‧‧清潔器支撐部 141‧‧‧Cleaner support part

142‧‧‧清潔器頭 142‧‧‧Cleaner head

150、250、350‧‧‧預先加熱部 150, 250, 350‧‧‧Preheating part

151‧‧‧第一預先加熱部 151‧‧‧The first preheating part

152‧‧‧第二預先加熱部 152‧‧‧The second preheating part

160、260、360‧‧‧加熱部 160, 260, 360‧‧‧heating part

161‧‧‧第一加熱部 161‧‧‧The first heating part

162‧‧‧第二加熱部 162‧‧‧The second heating part

163‧‧‧第三加熱部 163‧‧‧The third heating part

164‧‧‧第四加熱部 164‧‧‧The fourth heating part

170、270、370‧‧‧安裝頭組件 170, 270, 370‧‧‧mounting head assembly

171‧‧‧第一安裝頭組件 171‧‧‧The first mounting head assembly

171a‧‧‧第一安裝頭 171a‧‧‧first mounting head

171b‧‧‧第一安裝頭支撐部 171b‧‧‧The first installation head support part

171c‧‧‧第一安裝頭驅動部 171c‧‧‧The first installation head driving part

172‧‧‧第二安裝頭組件 172‧‧‧Second mounting head assembly

172a‧‧‧第二安裝頭 172a‧‧‧Second mounting head

173‧‧‧第三安裝頭組件 173‧‧‧The third mounting head assembly

173a‧‧‧第三安裝頭 173a‧‧‧The third mounting head

174‧‧‧第四安裝頭組件 174‧‧‧The fourth mounting head assembly

174a‧‧‧第四安裝頭 174a‧‧‧Fourth mounting head

180‧‧‧中間台(通稱) 180‧‧‧Intermediate station (common name)

181‧‧‧第一中間台 181‧‧‧The first intermediate station

182‧‧‧第二中間台 182‧‧‧The second intermediate platform

183‧‧‧第三中間台 183‧‧‧The third intermediate platform

184‧‧‧第四中間台 184‧‧‧The fourth intermediate platform

185、285、385‧‧‧晶片拾取部 185, 285, 385‧‧‧wafer pickup department

185-1‧‧‧第一晶片拾取部 185-1‧‧‧The first wafer pick-up department

185-1a‧‧‧第一晶片拾取頭 185-1a‧‧‧The first chip pickup head

185-1b‧‧‧第一晶片拾取頭支撐部 185-1b‧‧‧The first wafer pick-up head supporting part

185-2‧‧‧第二晶片拾取部 185-2‧‧‧Second Wafer Pickup Department

185-2a‧‧‧第二晶片拾取頭 185-2a‧‧‧Second chip pickup head

186、286、386‧‧‧晶圓安置部 186, 286, 386‧‧‧Wafer placement department

187、287、387‧‧‧晶圓對準器 187, 287, 387‧‧‧Wafer Aligner

188、288、388‧‧‧晶圓匣 188, 288, 388‧‧‧wafer cassette

189、289、389‧‧‧晶圓傳送部 189, 289, 389‧‧‧Wafer transfer department

191、291、391‧‧‧電路基板預對準視覺部 191, 291, 391‧‧‧circuit substrate pre-alignment visual part

192、292、392‧‧‧連結視覺部 192, 292, 392‧‧‧Link to the Visual Department

193、293、393‧‧‧下方視覺部 193, 293, 393‧‧‧The lower visual department

194、294、394‧‧‧中間視覺部 194, 294, 394‧‧‧Mesovision Department

195、295、395‧‧‧晶圓視覺部 195, 295, 395‧‧‧Wafer Vision Department

280、380‧‧‧中間台 280, 380‧‧‧Intermediate stage

296、297‧‧‧晶片台驅動部 296, 297‧‧‧Wafer stage drive unit

D‧‧‧晶片 D‧‧‧chip

P1、P2、P3、P4‧‧‧電路基板(或導線架) P1, P2, P3, P4‧‧‧circuit substrate (or lead frame)

W‧‧‧晶圓 W‧‧‧Wafer

第1圖是顯示出根據本發明之實施例的結合裝置的平面圖。 Fig. 1 is a plan view showing a coupling device according to an embodiment of the present invention.

第2圖是顯示出第1圖中的結合裝置的承載部、預先加熱部和傳送部之一部分的平面圖。 Fig. 2 is a plan view showing a portion of a loading unit, a preheating unit, and a transfer unit of the bonding device in Fig. 1 .

第3圖顯示出第1圖中的結合裝置的安裝頭組件和裝 卸部的平面圖。 Figure 3 shows the mounting head assembly and assembly of the coupling device in Figure 1. Floor plan of the unloading section.

第4圖是顯示出第1圖中之將晶片從晶圓分離的部分結合裝置的平面圖。 FIG. 4 is a plan view showing the partial bonding apparatus of FIG. 1 for separating wafers from wafers.

第5圖是顯示出依據本發明之另一實施例的結合裝置的平面圖。 Fig. 5 is a plan view showing a coupling device according to another embodiment of the present invention.

第6圖是顯示出依據本發明之另一实施例的結合裝置的平面圖。 Fig. 6 is a plan view showing a coupling device according to another embodiment of the present invention.

藉由参照附圖與以下詳述的實施例，可明確地理解本發明。但是，本發明並不局限於下文中所公開的實施例，而可以各種不同的態樣來實現。本文中的實施例僅是使本發明更加完整，且用以完全地告知在本發明所屬技術領域中，具有通常技藝者可了解本發明之範疇而被提供者，而且，本發明僅由申請專利範圍之範疇來限定。另外，於本說明書中所使用的術語用以說明實施例，而非用以限定本發明。於本說明書中，單數形式的含義也可包括複數形式的含義，除非在上下文中有特别提及。於本說明書中所使用的"包含(comprises)"以及/或"包含的(comprising)"不排除所提及的構成要素、步骤、操作以及/或者組件之外所存在或可追加一個以上的其他構成要素、步驟、操作以及/或者組件。第一、第二等用語可用以描述各種的構成要素，但構成要素不應被該等用語限定。該等用語僅用以區分一個構成要素與其他構成要素。 The present invention can be clearly understood by referring to the accompanying drawings and the embodiments described in detail below. However, the present invention is not limited to the embodiments disclosed below, but can be implemented in various forms. The embodiments herein are only to make the present invention more complete, and are used to fully inform those with ordinary skills in the technical field of the present invention that can understand the scope of the present invention and be provided, and the present invention is only provided by applying for a patent To limit the scope of the scope. In addition, the terms used in this specification are used to describe the embodiments, not to limit the present invention. In this specification, the meaning of the singular form may also include the meaning of the plural form, unless specifically mentioned in the context. The words " comprises " and/or " comprising " used in this specification do not exclude the existence or addition of one or more other components besides the mentioned constituent elements, steps, operations and/or components. Constituent elements, steps, operations and/or components. Terms such as first and second may be used to describe various constituent elements, but the constituent elements should not be limited by these terms. These terms are only used to distinguish one constituent element from other constituent elements.

第1圖是顯示出依據本發明之實施例的結合裝置的平面圖。第2圖是顯示出第1圖中的結合裝置的承載部、預先加熱部和傳送部之一部分的平面圖。第3圖是顯示出第1圖中的結合裝置的安裝頭組件和裝卸部的平面圖。第4圖是顯示出第1圖中之將晶片從晶圓分離的部分結合裝置的平面圖。 Fig. 1 is a plan view showing a bonding device according to an embodiment of the present invention. Fig. 2 is a plan view showing a portion of a loading unit, a preheating unit, and a transfer unit of the bonding device in Fig. 1 . Fig. 3 is a plan view showing a mounting head assembly and a detachable portion of the coupling device in Fig. 1 . FIG. 4 is a plan view showing the partial bonding apparatus of FIG. 1 for separating wafers from wafers.

如第1圖至第4圖所示，本發明之結合裝置100可包括承載部110、卸載部120、傳送部130、清潔器140、預先加熱部150、加熱部160、第一安裝頭組件171、第二安裝頭組件172、第三安裝頭組件173、第四安裝頭組件174、第一中間台181、第二中間台182、第三中間台183、第四中間台184、晶片拾取部185、晶圓安置部186、晶圓對準器187、晶圓傳送部189和視覺部(未示出)。 As shown in FIG. 1 to FIG. 4 , the bonding device 100 of the present invention may include a loading unit 110 , an unloading unit 120 , a conveying unit 130 , a cleaner 140 , a preheating unit 150 , a heating unit 160 , and a first mounting head assembly 171 , the second mounting head assembly 172, the third mounting head assembly 173, the fourth mounting head assembly 174, the first intermediate stage 181, the second intermediate stage 182, the third intermediate stage 183, the fourth intermediate stage 184, and the wafer pick-up unit 185 , a wafer placement section 186, a wafer aligner 187, a wafer transfer section 189, and a vision section (not shown).

電路基板(或導線架)P1、P2、P3和P4可從外部供應至承載部110。此時，承載部110可以用各種方式將電路基板P1、P2、P3和P4供應到傳送部130。作為一實施例，電路基板P1、P2、P3和P4放置於承載部110，且傳送部130可將被放置的電路基板P1、P2、P3和P4裝載並移動。此時，承載部110可拆卸地與傳送部130的一部分结合，或，傳送部130的一部分可以移動到承載部110上。作為另一實施例，承載部110可具有將放置的電路基板P1、P2、P3和 P4移送到傳送部130的機械臂。作為另一實施例，電路基板P1、P2、P3和P4放置於承載部110，且承載部110可包括獨立的傳送带和滾輪等用以傳送電路基板P1、P2、P3和P4。在此情况下，承載部110可藉由操作設置在獨立台上的傳送带和滾輪等來移送電路基板P1、P2、P3和P4。此時，承載部110不限於前述的描述，並且可包括能放置電路基板P1、P2、P3和P4，且將電路基板P1、P2、P3和P4提供到傳送部130的所有形式。 The circuit substrates (or lead frames) P1 , P2 , P3 and P4 may be externally supplied to the carrier part 110 . At this time, the carrier part 110 may supply the circuit substrates P1, P2, P3, and P4 to the transfer part 130 in various ways. As an example, the circuit substrates P1 , P2 , P3 and P4 are placed on the carrying unit 110 , and the transfer unit 130 can load and move the placed circuit substrates P1 , P2 , P3 and P4 . At this time, the carrying part 110 is detachably combined with a part of the transferring part 130 , or a part of the transferring part 130 can be moved onto the carrying part 110 . As another example, the carrier part 110 may have a robot arm that transfers the placed circuit substrates P1 , P2 , P3 , and P4 to the transfer part 130 . As another example, the circuit substrates P1 , P2 , P3 and P4 are placed on the carrier 110 , and the carrier 110 may include independent conveyor belts and rollers for transferring the circuit substrates P1 , P2 , P3 and P4 . In this case, the carrier part 110 can transfer the circuit boards P1, P2, P3, and P4 by operating the conveyor belt, rollers, etc. provided on the independent table. At this time, the carrier part 110 is not limited to the foregoing description, and may include all forms capable of placing the circuit substrates P1 , P2 , P3 and P4 and providing the circuit substrates P1 , P2 , P3 and P4 to the transfer part 130 .

在安装晶片D於由傳送部130傳送的電路基板P1、P2、P3和P4之後，電路基板P1、P2、P3和P4可由傳送部130傳達到卸載部120。此時，卸載部120可以與上述之承載部110類似地形成，並可從傳送部130回收電路基板P1、P2、P3和P4。卸載部120可將安裝晶片D的電路基板P1、P2、P3和P4傳輸到外部。此時，傳輸的方法可以是藉由機械手臂等將電路基板P1、P2、P3和P4自動地傳輸，或者由操作者手動地將其傳輸到外部。 After mounting the die D on the circuit substrates P1 , P2 , P3 and P4 transferred by the transfer unit 130 , the circuit substrates P1 , P2 , P3 and P4 may be transferred to the unloading unit 120 by the transfer unit 130 . At this time, the unloading part 120 may be formed similarly to the carrying part 110 described above, and may recover the circuit substrates P1 , P2 , P3 and P4 from the transfer part 130 . The unloading part 120 may transfer the circuit substrates P1 , P2 , P3 , and P4 on which the wafer D is mounted to the outside. At this time, the transfer method may be to automatically transfer the circuit boards P1 , P2 , P3 , and P4 by a robot arm or the like, or manually transfer them to the outside by an operator.

如上所述之傳送部130可具有兩組。例如，傳送部130可包括相互間隔設置的第一傳送部131和第二傳送部132。此時，第一傳送部131可將第一電路基板P1和第二電路基板P2以第一方向(例如，第1圖的X軸方向)移送，且第二傳送部132可將第三電路基板P3和第四電路基板P4以第一方向移送。此時，因第一傳送部131和第二傳送部132 彼此相同或類似，以下為便於说明，將以第一傳送部131進行詳細描述和說明。 The transmission unit 130 as described above may have two groups. For example, the conveying part 130 may include a first conveying part 131 and a second conveying part 132 that are spaced apart from each other. At this time, the first transfer unit 131 can transfer the first circuit substrate P1 and the second circuit substrate P2 in the first direction (for example, the X-axis direction in FIG. 1 ), and the second transfer unit 132 can transfer the third circuit substrate P3 and the fourth circuit board P4 are transferred in the first direction. At this time, since the first conveying part 131 and the second conveying part 132 are the same or similar to each other, the first conveying part 131 will be used for detailed description and illustration below for the convenience of description.

第一傳送部131可包括放置第一電路基板P1或第二電路基板P2的第一放置部131a以及使第一放置部131a能够線性移動而設置的第一導軌部131b。此時，獨立的線性電動機設置於第一放置部131a和第一導軌部131b之間，所述線性電動機可線性地移動第一放置部131a。 The first conveying part 131 may include a first placing part 131a on which the first circuit substrate P1 or the second circuit substrate P2 is placed, and a first rail part 131b provided to enable the first placing part 131a to linearly move. At this time, an independent linear motor is provided between the first placement part 131a and the first rail part 131b, and the linear motor can linearly move the first placement part 131a.

清潔器140可以與傳送部130分隔設置。此時，清潔器140可包括清潔器支撐部141和可線性移動地設置在清潔器支撐部141的清潔器頭142。此時，清潔器頭142藉由吸入空氣或向電路基板P1、P2、P3和P4供應氣體，去除電路基板P1、P2、P3和P4的外表面的異物。 The cleaner 140 may be provided separately from the transfer part 130 . At this time, the cleaner 140 may include a cleaner support part 141 and a cleaner head 142 linearly movably disposed on the cleaner support part 141 . At this time, the cleaner head 142 removes foreign matter on the outer surfaces of the circuit substrates P1, P2, P3, and P4 by sucking air or supplying air to the circuit substrates P1, P2, P3, and P4.

預先加熱部150可設置成面對著清潔器140。此時，預先加熱部150設置於電路基板P1、P2、P3和P4的下方，並可對電路基板P1、P2、P3和P4加熱。特别地，預先加熱部150可藉由向電路基板P1、P2、P3和P4提供熱氣體或者將光等照射於電路基板P1、P2、P3和P4以將其加熱。作為另一實施例，預先加熱部150可包括加熱器以加熱電路基板P1、P2、P3和P4。此時，預先加熱部150可包括對應於第一傳送部131而設置的第一預先加熱部151，以及對應於第二傳送部132而設置的第二預先加熱部152。 The preheating part 150 may be disposed to face the cleaner 140 . At this time, the preheating unit 150 is disposed under the circuit boards P1 , P2 , P3 and P4 and can heat the circuit boards P1 , P2 , P3 and P4 . In particular, the preheating part 150 may heat the circuit substrates P1, P2, P3, and P4 by supplying hot gas to them or irradiating light or the like to the circuit substrates P1, P2, P3, and P4. As another example, the pre-heating part 150 may include heaters to heat the circuit substrates P1, P2, P3, and P4. At this time, the pre-heating part 150 may include a first pre-heating part 151 provided corresponding to the first transfer part 131 and a second pre-heating part 152 provided corresponding to the second transfer part 132 .

加熱部160可與預先加熱部150分隔設置。此 時，當晶片D安裝於每一個電路基板P1、P2、P3和P4時，加熱部160可獨立地將每一個電路基板P1、P2、P3和P4加熱。在此情况下，加熱部160可局部地加熱晶片D安裝於各個電路基板P1、P2、P3和P4的部分。加熱部160可與預先加熱部150相同地或類似地構成。 The heating part 160 may be separately provided from the preheating part 150 . At this time, when the die D is mounted on each of the circuit substrates P1, P2, P3, and P4, the heating part 160 may independently heat each of the circuit substrates P1, P2, P3, and P4. In this case, the heating part 160 may locally heat portions of the die D mounted on the respective circuit substrates P1 , P2 , P3 and P4 . The heating unit 160 can be configured the same as or similar to the preheating unit 150 .

如上所述之加熱部160可包括對應於第一電路基板P1的第一安裝位置的第一加熱部161，對應於第二電路基板P2的第二安裝位置的第二加熱部162，對應於第三電路基板P3的第三安裝位置的第三加熱部163，以及對應於第四電路基板P4的第四安裝位置的第四加熱部164。在此情况下，第一加熱部161至第四加熱部164可分别具有多數個。於此，多數個第一加熱部161可以用彼此間相互分隔的方式設置，且多數個第二加熱部162可以彼此間相互分隔設置。另外，多數個第三加熱部163可以彼此間相互分隔設置，且多數個第四加熱部164也可以彼此間相互分隔設置。依此，各加熱部160可設置在安裝晶片D的部分。 The heating part 160 as described above may include a first heating part 161 corresponding to the first mounting position of the first circuit board P1, a second heating part 162 corresponding to the second mounting position of the second circuit board P2, and a second heating part 162 corresponding to the second mounting position of the second circuit board P2. The third heating part 163 at the third mounting position of the three circuit boards P3, and the fourth heating part 164 corresponding to the fourth mounting position of the fourth circuit board P4. In this case, each of the first heating part 161 to the fourth heating part 164 may have plural numbers. Herein, the plurality of first heating parts 161 may be arranged in a manner of being separated from each other, and the plurality of second heating parts 162 may be arranged in a manner of being separated from each other. In addition, a plurality of third heating parts 163 can be arranged separately from each other, and a plurality of fourth heating parts 164 can also be arranged separately from each other. Accordingly, each heating unit 160 may be disposed at a portion where the wafer D is mounted.

第一安裝頭組件171至第四安裝頭組件174可各自相互獨立地驅動。於此，第一安裝頭組件171至第四安裝頭組件174可將晶片D安裝於每一個電路基板P1、P2、P3和P4。在此情况下，因第一安裝頭組件171與第四安裝頭組件174彼此相同或類似，以下將以第一安裝頭組件171進行詳細說明。 The first to fourth mounting head assemblies 171 to 174 may each be driven independently of each other. Here, the first mounting head assembly 171 to the fourth mounting head assembly 174 can mount the chip D on each of the circuit substrates P1 , P2 , P3 and P4 . In this case, since the first mounting head assembly 171 and the fourth mounting head assembly 174 are the same or similar to each other, the first mounting head assembly 171 will be described in detail below.

第一安裝頭組件171可包括拾取晶片D而安裝於電路基板P1、P2、P3和P4的第一安裝頭171a和使第一安裝頭171a能够以與第一方向不同的第二方向(例如，第1圖之Y轴方向)線性移動而設置的第一安裝頭支撐部171b。第一安裝頭171a可吸住晶片D而將其安裝於第一電路基板P1上。於此，第一安裝頭171a可藉由真空等吸住晶片D。另外，第一安裝頭支撐部171b可包括導引第一安裝頭171a線性移動的線性運動導件。作為另一實施例，第一安裝頭支撐部171b可包括用以導引第一安裝頭171a線性移動而設置的導軌。於此，第一安裝頭支撐部171b不限於前述所描述的構成，尚可包括其他所有具備等同功能的結構與裝置，其可導引第一安裝頭171a的線性移動，且第一安裝頭171a被設置成可線性移動。如上所述之第一安裝頭支撐部171b，可包括獨立的第一安裝頭驅動部171c，其位於第一安裝頭171a與第一安裝頭支撐部171b之間，且使第一安裝頭171a線性移動。依此，第一安裝頭驅動部171c可用以用各種方式形成。舉例而言，第一安裝頭驅動部171c可包括連接到第一安裝頭171a的滾珠螺桿(ball screw)和設置於第一安裝頭支撐部171b且與所述滾珠螺桿連接的電動機(motor)。作為另一實施例，第一安裝頭驅動部171c可包括設置於第一安裝頭171a和第一安裝頭支撐部171b之間，且與第一安裝頭171a連接的線性電動機(linear motor)。作為另一實施 例，第一安裝頭驅動部171c可包括設置於第一安裝頭支撐部171b且與第一安裝頭171a連接的驅動缸(cylinder)。於此，第一安裝頭驅動部171c不限於前述所描述的構成，且可包括與第一安裝頭171a連接，且使第一安裝頭171a線性移動的所有結構。以下為便於說明，將以第一安裝頭驅動部171c包括線性電動機之情况為例，詳加說明。 The first mounting head assembly 171 may include a first mounting head 171a that picks up a die D to be mounted on the circuit substrates P1, P2, P3, and P4, and a second direction that enables the first mounting head 171a to be different from the first direction (for example, The first mounting head support part 171b provided for linear movement in the Y-axis direction in Fig. 1). The first mounting head 171a can hold the chip D and mount it on the first circuit substrate P1. Here, the first mounting head 171a can suck the chip D by vacuum or the like. In addition, the first mounting head supporting part 171b may include a linear motion guide guiding the linear movement of the first mounting head 171a. As another embodiment, the first mounting head support portion 171b may include a guide rail configured to guide the linear movement of the first mounting head 171a. Here, the first mounting head supporting part 171b is not limited to the above-described structure, and may include all other structures and devices with equivalent functions, which can guide the linear movement of the first mounting head 171a, and the first mounting head 171a is set to move linearly. The first mounting head supporting part 171b as described above may include an independent first mounting head driving part 171c, which is located between the first mounting head 171a and the first mounting head supporting part 171b, and makes the first mounting head 171a linear move. Accordingly, the first head driving part 171c may be formed in various ways. For example, the first mounting head driving part 171c may include a ball screw connected to the first mounting head 171a and a motor disposed on the first mounting head supporting part 171b and connected to the ball screw. As another embodiment, the first mounting head driving part 171c may include a linear motor disposed between the first mounting head 171a and the first mounting head support part 171b and connected to the first mounting head 171a. As another embodiment, the first mounting head driving part 171c may include a driving cylinder (cylinder) disposed on the first mounting head supporting part 171b and connected to the first mounting head 171a. Herein, the first mounting head driving part 171c is not limited to the above-described structure, and may include all structures connected with the first mounting head 171a and linearly moving the first mounting head 171a. For the convenience of description, the case where the first mounting head driving part 171c includes a linear motor will be taken as an example to describe in detail.

晶片D可暫時放置於第一中間台181至第四中間台184。於此，因第一中間台181至第四中間台184之構成係彼此相同或類似，將以第一中間台181為例，詳加說明。 The wafer D can be temporarily placed on the first intermediate stage 181 to the fourth intermediate stage 184 . Here, since the configurations of the first intermediate platform 181 to the fourth intermediate platform 184 are the same or similar to each other, the first intermediate platform 181 will be taken as an example to describe in detail.

由晶片拾取部185所拾取的晶片D可放置於、且可臨時地儲存於第一中間台181。此時，第一中間台181可以是固定的狀態。此外，第一中間台181可以為平板形式之構成，且可設置諸如凹槽等的晶片放置部以放置晶片D。依此，第一中間台181可設置為對應於第一安裝頭組件171，且可設置於第一安裝頭組件171和晶片拾取部185之間。 The wafer D picked up by the wafer picker 185 can be placed on and temporarily stored in the first intermediate stage 181 . At this time, the first intermediate station 181 may be in a fixed state. In addition, the first intermediate stage 181 can be configured in the form of a flat plate, and a wafer placement portion such as a groove can be provided for placing the wafer D. Referring to FIG. Accordingly, the first intermediate stage 181 may be disposed corresponding to the first mounting head assembly 171 , and may be disposed between the first mounting head assembly 171 and the wafer picker 185 .

晶片拾取部185係拾取晶圆W的晶片D並供應到第一中間台181至第四中間台184其中之一。於此，晶片拾取部185可包括將晶片D供應到第一中間台181與第二中間台182的第一晶片拾取部185-1，和將晶片D供應到第三中間台183與第四中間台184的第二晶片拾取部185-2。於此，因第一晶片拾取部185-1和第二晶片拾取部185-2係彼此相同或類似，以下將以第一晶片拾取部185-1為例，詳加說明。 The wafer picker 185 picks up the wafer D of the wafer W and supplies it to one of the first intermediate stage 181 to the fourth intermediate stage 184 . Here, the wafer pickup part 185 may include a first wafer pickup part 185-1 that supplies the wafer D to the first intermediate stage 181 and the second intermediate stage 182, and supplies the wafer D to the third intermediate stage 183 and the fourth intermediate stage 183. The second wafer pickup section 185-2 of the stage 184. Herein, since the first wafer pick-up unit 185-1 and the second wafer pick-up unit 185-2 are the same or similar to each other, the first wafer pick-up unit 185-1 will be taken as an example below for detailed description.

第一晶片拾取部185-1可從晶圆W拾取晶片D。於此，第一晶片拾取部185-1可包括拾取晶片D的第一晶片拾取頭185-1a，可線性移動第一晶片拾取頭185-1a的第一晶片拾取頭支撐部185-1b，以及設置於第一晶片拾取頭支撐部185-1b、且可使第一晶片拾取頭185-1a以第一方向或第二方向線性移動、並可使第一晶片拾取頭185-1a上下移動的第一晶片拾取頭驅動部(未示出)。在此，第一晶片拾取頭185-1a藉由真空等可將晶片D固定。 The first wafer picker 185 - 1 may pick up the wafer D from the wafer W . Here, the first wafer pickup part 185-1 may include a first wafer pickup head 185-1a that picks up the wafer D, a first wafer pickup head support part 185-1b that can linearly move the first wafer pickup head 185-1a, and The first wafer pickup head 185-1b is provided on the first wafer pickup support portion 185-1b, and the first wafer pickup head 185-1a can be linearly moved in the first direction or the second direction, and the first wafer pickup head 185-1a can be moved up and down. A wafer pickup head driving section (not shown). Here, the first wafer pick-up head 185-1a can fix the wafer D by vacuum or the like.

晶圓W可放置於晶圓安置部186。於此，當晶片D從晶圆W被分離時，晶圓安置部186可將晶圓W固定住或可藉由施加某一程度的力量於晶圓W，以使晶片D容易被分離。 The wafer W can be placed on the wafer seating part 186 . Here, when the chip D is separated from the wafer W, the wafer placement part 186 can fix the wafer W or apply a certain degree of force to the wafer W so that the chip D can be easily separated.

晶圓對準器187可機械地排列從裝載晶圓W的晶圓匣188所提取的晶圓W。此時，晶圓對準器187可為以導軌的形式構成而設置於晶圓W的動作路徑上，且可導引晶圓W的移動。 The wafer aligner 187 may mechanically align the wafer W picked up from the cassette 188 on which the wafer W is loaded. At this time, the wafer aligner 187 may be configured in the form of a guide rail and disposed on the moving path of the wafer W, and can guide the movement of the wafer W. Referring to FIG.

晶圓傳送部189可將放置於可裝載晶圓W的環形之晶圓裝載部(未示出)的晶圓W傳送到晶圓安置部186。此時，晶圓傳送部189可為以夾具等形式構成，並可與所述晶圓裝載部連接。在此情况下，晶圓傳送部189藉由改變長度可選擇性地耦合至所述晶圓裝載部。 The wafer transfer part 189 may transfer the wafer W placed on a ring-shaped wafer loading part (not shown) on which the wafer W can be loaded, to the wafer placement part 186 . In this case, the wafer transfer unit 189 may be configured in the form of a jig or the like, and may be connected to the wafer loading unit. In this case, the wafer transfer part 189 can be selectively coupled to the wafer loading part by changing the length.

所述視覺部可拍攝電路基板P1、P2、P3和P4 的位置和晶片D方位中的至少一個。此時，所述視覺部可包括電路基板預對準視覺部191、連結視覺部192、下方視覺部193、中間視覺部194以及晶圓視覺部195。如上所述之視覺部可包括拍攝電路基板P1、P2、P3、P4和晶片D中至少一個的攝影機。可具有單個或多數個如上所述之視覺部。此時，當具有單個或多數個所述視覺部時，所述視覺部可在第一方向和第二方向中之至少一個方向上作線性移動。 The vision unit may photograph at least one of the positions of the circuit boards P1, P2, P3, and P4 and the orientation of the wafer D. At this time, the vision unit may include a circuit board pre-alignment vision unit 191 , a connection vision unit 192 , a lower vision unit 193 , an intermediate vision unit 194 and a wafer vision unit 195 . The vision unit as described above may include a camera for photographing at least one of the circuit boards P1 , P2 , P3 , P4 and the wafer D. There may be a single or multiple visual units as described above. At this time, when there is a single or a plurality of the visual part, the visual part can linearly move in at least one of the first direction and the second direction.

電路基板預對準視覺部191可拍攝每一個電路基板P1、P2、P3和P4的位置。作為一實施例，可具有一個電路基板預對準視覺部191。依此，電路基板預對準視覺部191可移動至每一個電路基板P1、P2、P3和P4的移動路徑，以使其設置在每一個電路基板P1、P2、P3和P4的移動路徑上。例如，當第一電路基板P1和第二電路基板P2移動時，電路基板預對準視覺部191可設置在第一電路基板P1和第二電路基板P2的移動路徑上。此外，當第三電路基板P3和第四電路基板P4移動時，電路基板預對準視覺部191可設置在第三電路基板P3和第四電路基板P4的移動路徑上。此時，電路基板預對準視覺部191可在第二方向上作線性移動，以配置在第三電路基板P3和第四電路基板P4的移動路徑上。作為另一實施例，可具有多數個電路基板預對準視覺部191，且每一個電路基板預對準視覺部191可設置為對應於第一電路基板P1和第三電路基板P3。此時，每一 個電路基板預對準視覺部191可拍攝設置於第一電路基板P1和第三電路基板P3的框標。特别地，每一個電路基板預對準視覺部191可設置於第一電路基板P1和第三電路基板P3各别移動的路徑上。以下為便於了解，將以具有一個電路基板預對準視覺191為例，詳加說明。 The circuit substrate pre-alignment visual part 191 may photograph the position of each of the circuit substrates P1, P2, P3, and P4. As an example, there may be a circuit board pre-alignment optic 191 . Accordingly, the circuit substrate pre-alignment visual part 191 can move to the moving path of each circuit substrate P1 , P2 , P3 and P4 so as to be disposed on the moving path of each circuit substrate P1 , P2 , P3 and P4 . For example, when the first circuit substrate P1 and the second circuit substrate P2 move, the circuit substrate pre-alignment visual part 191 may be disposed on a moving path of the first circuit substrate P1 and the second circuit substrate P2. In addition, when the third circuit substrate P3 and the fourth circuit substrate P4 move, the circuit substrate pre-alignment visual part 191 may be disposed on a moving path of the third circuit substrate P3 and the fourth circuit substrate P4. At this time, the circuit substrate pre-alignment visual part 191 can linearly move in the second direction, so as to be arranged on the moving paths of the third circuit substrate P3 and the fourth circuit substrate P4. As another embodiment, there may be a plurality of circuit substrate pre-alignment visual parts 191 , and each circuit substrate pre-alignment visual part 191 may be configured to correspond to the first circuit substrate P1 and the third circuit substrate P3 . At this time, each circuit substrate pre-alignment vision unit 191 can photograph the frame marks disposed on the first circuit substrate P1 and the third circuit substrate P3. In particular, each circuit substrate pre-alignment visual part 191 can be disposed on the respective moving paths of the first circuit substrate P1 and the third circuit substrate P3 . For the sake of easy understanding, a circuit substrate pre-alignment vision 191 will be taken as an example for detailed description.

連結視覺部192可設置於安裝頭組件170。此時，連結視覺部192可拍摄晶片D結合於每一個電路基板P1、P2、P3和P4的狀態，或是每一個電路基板P1、P2、P3和P4本身的狀態。依此，連結視覺部192可包括用以對應於每一個安裝頭組件170而設置的第一連結視覺部192a、第二連結視覺部192b、第三連結視覺部192c以及第四連結視覺部192d。 The connecting visual part 192 can be disposed on the mounting head assembly 170 . At this time, the connection vision unit 192 can photograph the state of the chip D being bonded to each of the circuit boards P1, P2, P3, and P4, or the state of each of the circuit boards P1, P2, P3, and P4 itself. Accordingly, the connecting visual part 192 may include a first connecting visual part 192 a , a second connecting visual part 192 b , a third connecting visual part 192 c and a fourth connecting visual part 192 d corresponding to each mounting head assembly 170 .

下方視覺部193設置於晶片D的移動路徑上，並可拍攝吸附於每一個安裝頭171a、172a、173a和174a的晶片D的方位(例如，歪斜的程度)。作為一實施例，另外可具有一個下方視覺部193，此時，下方視覺部193可以在第一方向上線性移動，以使其設置在對應於每一個安裝頭之移動路徑的位置。作為另一實施例，又可具有多數個下方視覺部193。此時，可具有兩個下方視覺部193，且一個下方視覺部193可設置在第一安裝頭171a或第二安裝頭172a的移動路徑上，且另一個下方視覺部193可設置在第三安裝頭173a或第四安裝頭174a的移動路徑上。作為另一實施例， 可具有多數個下方視覺部193，可具備四個下方視覺部193。此處，每一個下方視覺部193可設置為各别對應於每一個安裝頭的移動路徑。依此，每一個下方視覺部193可以是固定的狀態。以下為便於了解，將以每一個下方視覺部193設置成對應於每一個安裝頭的路徑的情況為例，詳加說明。 The lower vision unit 193 is provided on the moving path of the wafer D, and can photograph the orientation (for example, the degree of skew) of the wafer D attracted to each of the mounting heads 171a, 172a, 173a, and 174a. As an embodiment, there may be a lower visual part 193, at this time, the lower visual part 193 can linearly move in the first direction, so that it is arranged at a position corresponding to the moving path of each mounting head. As another example, there may be a plurality of lower visual parts 193 . At this time, there may be two lower vision parts 193, and one lower vision part 193 may be set on the moving path of the first mounting head 171a or the second mounting head 172a, and the other lower vision part 193 may be set on the third mounting head 171a or the moving path of the second mounting head 172a. head 173a or the moving path of the fourth mounting head 174a. As another example, a plurality of lower viewing parts 193 may be provided, and four lower viewing parts 193 may be provided. Here, each lower vision part 193 may be provided to correspond to a moving path of each mounting head, respectively. Accordingly, each lower viewing portion 193 can be in a fixed state. For ease of understanding, the following will take the case where each lower visual part 193 is set to correspond to the path of each mounting head as an example to describe in detail.

中間視覺部194設置於中間台181、182、183和184上，並且可拍攝中間台181、182、183和184上之晶片D的方位。作為一實施例，尚可具有一個中間視覺部194，且一個中間視覺部194可以在第一方向和第二方向中至少一個方向上線性移動，以使中間視覺部194對應著相應於各中間台181、182、183和184的位置。作為另一實施例，又可具有兩個中間視覺部194，且一個中間視覺部194可線性移動於第一中間台181與第二中間台182之間，以使其設置在第一中間台181和第二中間台182的上面。此外，另一中間視覺部194可線性移動於第三中間台183與第四中間台184之間，以使其設置在第三中間台183和第四中間台184的上面。而且，作為另一實施例，更可具有四個中間視覺部194，並且，每一個中間視覺部194可設置為對應於各别的第一中間台181至第四中間台184。在此情况下，每一個中間視覺部194可固定在對應於每一個中間台181、182、183和184的位置。 The intermediate vision unit 194 is disposed on the intermediate stages 181 , 182 , 183 and 184 , and can photograph the orientation of the wafer D on the intermediate stages 181 , 182 , 183 and 184 . As an embodiment, there can still be an intermediate vision unit 194, and an intermediate vision unit 194 can move linearly in at least one direction in the first direction and the second direction, so that the intermediate vision unit 194 corresponds to each intermediate platform. 181, 182, 183 and 184 locations. As another embodiment, there may be two middle vision parts 194, and one middle vision part 194 can linearly move between the first intermediate platform 181 and the second intermediate platform 182, so that it is arranged on the first intermediate platform 181 and the top of the second intermediate platform 182. In addition, another intermediate vision unit 194 can linearly move between the third intermediate platform 183 and the fourth intermediate platform 184 so as to be disposed on the third intermediate platform 183 and the fourth intermediate platform 184 . Moreover, as another embodiment, there may be four intermediate vision units 194 , and each intermediate vision unit 194 may be configured to correspond to a respective first intermediate stage 181 to fourth intermediate stage 184 . In this case, each intermediate vision part 194 may be fixed at a position corresponding to each intermediate stage 181 , 182 , 183 and 184 .

晶圓視覺部195係設置於晶圓安置部186的上 方，用以拍攝晶圓W。此時，根據由晶圓視覺部195所拍攝的晶圓W圖像，可判定晶圓W上的晶片D是否有缺損。另外，如上述，由於晶圓視覺部195可拍攝晶圓W的位置，即可藉由所拍攝的晶圓W圖像，判定晶圓W的位置是否與預定的位置相同。 The wafer vision unit 195 is arranged above the wafer placement unit 186 for taking pictures of the wafer W. At this time, based on the image of the wafer W captured by the wafer vision unit 195 , it can be determined whether or not the wafer D on the wafer W is chipped. In addition, as mentioned above, since the wafer vision unit 195 can capture the position of the wafer W, it can determine whether the position of the wafer W is the same as the predetermined position based on the captured image of the wafer W.

藉由測量如上所述之由視覺部所拍攝的晶片D的方位和電路基板P1、P2、P3和P4的位置其中至少一個，可調整電路基板P1、P2、P3和P4的位置或晶片D的方位。在此情况下，為調整電路基板P1、P2、P3和P4的位置，可調整傳送部130的位置或放置於傳送部130之電路基板P1、P2、P3和P4的位置。另外，為調整晶片D的方位，可調整每一個安裝頭171a、172a、173a和174a或者在每一個中間台181、182、183和184上每一個晶片D的方位。在此情况下，電路基板P1、P2、P3和P4和晶片D中，至少一個被放置或被吸附之構成要件可具有獨立的位置調整部，以用來改變電路基板P1、P2、P3和P4與晶片D其中至少一個的位置。 By measuring at least one of the orientation of the wafer D and the positions of the circuit boards P1, P2, P3, and P4 captured by the visual section as described above, the positions of the circuit boards P1, P2, P3, and P4 or the position of the wafer D can be adjusted. position. In this case, to adjust the positions of the circuit boards P1 , P2 , P3 and P4 , the position of the transfer unit 130 or the positions of the circuit boards P1 , P2 , P3 and P4 placed on the transfer unit 130 may be adjusted. In addition, to adjust the orientation of the wafer D, the orientation of each of the mounting heads 171a, 172a, 173a, and 174a or each of the intermediate stages 181, 182, 183, and 184 may be adjusted. In this case, among the circuit boards P1, P2, P3, and P4 and the chip D, at least one component to be placed or sucked may have an independent position adjustment portion for changing the position of the circuit boards P1, P2, P3, and P4. and the position of at least one of them on wafer D.

同時，如上所述之結合裝置100，將多數個晶片D分置在多數個電路基板P1、P2、P3和P4上之後，可將晶片D結合於每一個電路基板P1、P2、P3和P4上。 Simultaneously, the bonding apparatus 100 as described above, after dividing a plurality of chips D on a plurality of circuit substrates P1, P2, P3 and P4, the chip D can be combined on each circuit substrate P1, P2, P3 and P4 .

具體而言，當結合裝置100處於作業狀態時，可藉由晶圓傳送部189提取裝載於晶圓匣188的晶圓W。此 時，藉由晶圓對準器187，晶圓W的位置可被調整，且晶圓W可以是從晶圓於匣188傳送到晶圓安置部186而放置於晶圓安置部186的狀態。 Specifically, when the bonding apparatus 100 is in an operating state, the wafer W loaded on the wafer cassette 188 can be picked up by the wafer transfer unit 189 . At this time, the position of the wafer W can be adjusted by the wafer aligner 187, and the wafer W can be transferred from the wafer in the cassette 188 to the wafer placement part 186 and placed in the wafer placement part 186. .

此外，可依序將第一電路基板P1至第四電路基板P4放置於承載部110而將其傳送到第一傳送部131和第二傳送部132。此時，因藉由第一傳送部131或第二傳送部132來傳送第一電路基板P1至第四電路基板P4的方法類似，以下為便於了解，將針對傳送第二電路基板P2到第一傳送部131的類似方法，詳加說明如下。 In addition, the first circuit substrate P1 to the fourth circuit substrate P4 can be placed on the carrier part 110 in order to be transferred to the first transfer part 131 and the second transfer part 132 . At this time, because the method of transferring the first circuit substrate P1 to the fourth circuit substrate P4 by the first transfer unit 131 or the second transfer unit 132 is similar, the following will be directed at transferring the second circuit substrate P2 to the first circuit substrate for ease of understanding. The similar method of the transmitting unit 131 is described in detail as follows.

第一傳送部131可將供應到第一傳送部131的第二電路基板P2安置在第一預先加熱部151的位置。電路基板預對準視覺部191可拍攝第二電路基板P2的框標。藉由比較預定的圖像與所拍攝的框標，判定第二電路基板P2的位置，且可調整第二電路基板P2的位置，以使所拍攝的框標對應於預定的位置。 The first transfer part 131 may place the second circuit substrate P2 supplied to the first transfer part 131 at the position of the first pre-heating part 151 . The circuit board pre-alignment vision unit 191 can take a picture of the frame mark of the second circuit board P2. By comparing the predetermined image with the captured frame, the position of the second circuit substrate P2 is determined, and the position of the second circuit substrate P2 can be adjusted so that the captured frame corresponds to the predetermined position.

當如上所述之第二電路基板P2安置在第一預先加熱部151之上時，第一預先加熱部151可對第二電路基板P2加熱。之後，第一傳送部131可將第二電路基板P2安設在第二安裝位置上。此時，第二安裝位置可以是第二加熱部162被設置的位置。 When the above-mentioned second circuit substrate P2 is placed on the first preheating part 151, the first preheating part 151 can heat the second circuit substrate P2. Afterwards, the first transfer part 131 can install the second circuit substrate P2 on the second installation position. At this time, the second installation position may be a position where the second heating part 162 is provided.

在如上之第二安裝位置安設第二電路基板P2之後，第一電路基板P1也經過與第二電路基板P2類似的過 程而可將其安設於第一安裝位置。此時，第一安裝位置可以為第一加熱部161被設置的位置。依此，可具有多數個第一放置部131a，且可各别地放置第一電路基板P1和第二電路基板P2於每一個第一放置部131a。 After installing the second circuit substrate P2 at the second installation position as above, the first circuit substrate P1 can also be installed at the first installation position through a process similar to that of the second circuit substrate P2. At this time, the first installation position may be a position where the first heating part 161 is provided. Accordingly, there may be a plurality of first placement portions 131a, and the first circuit substrate P1 and the second circuit substrate P2 may be respectively placed on each first placement portion 131a.

進行如上所述過程之期間，第二傳送部132可將第四電路基板P4安設於第四安裝位置，且可將第三電路基板P3安設於第三安装位置。此時，第四電路基板P4的移動可與第二電路基板P2的移動同時進行，而且，第三電路基板P3的移動可與第一電路基板P1的移動同時進行。 During the process described above, the second conveying part 132 may install the fourth circuit substrate P4 at the fourth installation position, and may install the third circuit substrate P3 at the third installation position. At this time, the movement of the fourth circuit substrate P4 may be performed simultaneously with the movement of the second circuit substrate P2, and the movement of the third circuit substrate P3 may be performed simultaneously with the movement of the first circuit substrate P1.

當第一傳送部131和第二傳送部132將第一電路基板P1至第四電路基板P4分别安設於第一安裝位置至第四安裝位置時，第二電路基板P2和第四電路基板P4可安設於接近卸載部120之處，且第一電路基板P1和第三電路基板P3可安設於接近承載部110之處。 When the first transfer unit 131 and the second transfer unit 132 respectively install the first circuit board P1 to the fourth circuit board P4 at the first installation position to the fourth installation position, the second circuit board P2 and the fourth circuit board P4 The first circuit substrate P1 and the third circuit substrate P3 may be arranged near the unloading part 120 , and the first circuit substrate P1 and the third circuit substrate P3 may be arranged near the carrying part 110 .

如上所述，當第一電路基板P1至第四電路基板P4分别安置在第一安裝位置至第四安裝位置時，新的電路基板P1、P2、P3和P4可分别安置在第一預先加熱部151和第二預先加熱部152。 As described above, when the first circuit substrate P1 to the fourth circuit substrate P4 are respectively arranged at the first installation position to the fourth installation location, new circuit substrates P1, P2, P3 and P4 can be respectively arranged at the first preheating part 151 and the second preheating part 152.

同時，在進行如上所述之操作期間，晶片D可從晶圓W被供應到第一中間台181至第四中間台184。因晶片D被供應到第一中間台181至第四中間台184的方法係類似，以下為便於了解，將以晶片D供應到第四中間台184的 情況為例，詳加說明如後。 Meanwhile, the wafer D may be supplied from the wafer W to the first intermediate stage 181 to the fourth intermediate stage 184 during the operations as described above. Because the method of supplying the wafer D to the first intermediate stage 181 to the fourth intermediate stage 184 is similar, for the sake of easy understanding, the situation that the wafer D is supplied to the fourth intermediate stage 184 will be taken as an example, and will be described in detail later.

具體而言，第二晶片拾取部185-2可拾取安置於晶圆W的晶片D。此時，第二晶片拾取頭185-2a藉由垂直方向的線性移動可拾取晶片D。另外，第二晶片拾取頭185-2a藉由水平方向的線性移動，可將晶片D供應到第四中間台184。此時，藉由晶圓視覺部195所拍攝的圖像，可判定晶片D是否有缺損，而只拾取良好的晶片D。在如上所述之晶片D供應到第四中間台184期間，第一晶片拾取部185-1可將晶片D供應到第二中間台182。 Specifically, the second wafer picker 185-2 can pick up the wafer D placed on the wafer W. Referring to FIG. At this time, the second wafer pickup head 185-2a can pick up the wafer D by linearly moving in the vertical direction. In addition, the second wafer pick-up head 185-2a can supply the wafer D to the fourth intermediate stage 184 by linearly moving in the horizontal direction. At this time, it is possible to determine whether the wafer D is defective based on the image captured by the wafer vision unit 195, and only good wafers D are picked up. During the supply of the wafer D to the fourth intermediate stage 184 as described above, the first wafer picker 185 - 1 may supply the wafer D to the second intermediate stage 182 .

當如上所述之過程完成時，第二晶片拾取部185-2和第一晶片拾取部185-1可將晶片D各别供應到第三中間台183和第一中間台181。 When the process as described above is completed, the second wafer pickup part 185-2 and the first wafer pickup part 185-1 may supply the wafer D to the third intermediate stage 183 and the first intermediate stage 181, respectively.

如上所述，當晶片D被供應到第一中間台181至第四中間台184時，中間視覺部194可拍攝安置在第一中間台181至第四中間台184上的晶片D。藉由比較預定的圖像與所拍攝的晶片圖像，即可判定晶片D的方位(例如，晶片D的歪斜程度等)，而且，改變第一中間台181至第四中間台184的位置，可將晶片D的方位對應到預定的位置。 As described above, when the wafer D is supplied to the first intermediate stage 181 to the fourth intermediate stage 184 , the intermediate vision part 194 may photograph the wafer D placed on the first intermediate stage 181 to the fourth intermediate stage 184 . By comparing the predetermined image with the captured wafer image, the orientation of the wafer D (for example, the degree of skew of the wafer D, etc.) can be determined, and the positions of the first intermediate stage 181 to the fourth intermediate stage 184 can be changed. The orientation of the wafer D can be mapped to a predetermined position.

如上所述，當完成晶片D的方位調整時，第一安裝頭171a至第四安裝頭174a可將各别安設於第一中間台181到第四中間台184的晶片D藉由線性移動，傳送到第一電路基板P1至第四電路基板P4。此時，第一安裝頭171a至 第四安裝頭174a可由接近卸載部130的部分開始移動，而將晶片D安装於每一個電路基板P1、P2、P3和P4上。例如，可如下述之實施例，移動第四安裝頭174a，並且移動第二安裝頭172a，可將晶片D安裝於第四電路基板P4和第三電路基板P3上。之後，移動第三安裝頭173a，並且移動第一安裝頭171a，可將晶片D安裝於第四電路基板P4和第三電路基板P3上。此後，再次依序移動第四安裝頭174a，第二安裝頭172a，第三安裝頭173a和第一安裝頭171a，可將晶片D安裝於第二電路基板P2與第一電路基板P1上。在進行如上所述之操作期間，第一晶片拾取部185-1和第二晶片拾取部185-2可再如上所述地將晶片D放置於第一中間台181至第四中間台184。 As mentioned above, when the orientation adjustment of the wafer D is completed, the first mounting head 171a to the fourth mounting head 174a can linearly move the wafers D mounted on the first intermediate stage 181 to the fourth intermediate stage 184 respectively, Transfer to the first circuit substrate P1 to the fourth circuit substrate P4. At this time, the first mounting head 171a to the fourth mounting head 174a can start to move from the part close to the unloading part 130, so as to mount the chip D on each of the circuit boards P1, P2, P3 and P4. For example, the fourth mounting head 174a can be moved and the second mounting head 172a can be moved to mount the chip D on the fourth circuit substrate P4 and the third circuit substrate P3 as in the following embodiment. Afterwards, the third mounting head 173a is moved, and the first mounting head 171a is moved to mount the die D on the fourth circuit substrate P4 and the third circuit substrate P3. Thereafter, the fourth mounting head 174a, the second mounting head 172a, the third mounting head 173a and the first mounting head 171a are moved in sequence again to mount the chip D on the second circuit substrate P2 and the first circuit substrate P1. During the operations as described above, the first wafer picker 185 - 1 and the second wafer picker 185 - 2 can then place the wafer D on the first intermediate stage 181 to the fourth intermediate stage 184 as described above.

作為另一實施例，第四安裝頭174a將晶片D安裝於第四電路基板P4之後，第三安裝頭173a可將晶片D安裝於第四電路基板P4。此時，當第三安裝頭173a將晶片D安裝於第四電路基板P4上時，第二晶片拾取部185-2可將晶片D放置於第四中間台184。之後，第四安裝頭174a可將晶片D安裝於第二電路基板P2，且第二晶片拾取部185-2可將晶片D安置於第三中間台183。第三安裝頭173a可將第三中間台183的晶片D安裝於第二電路基板P2。 As another example, after the fourth mounting head 174a mounts the chip D on the fourth circuit substrate P4, the third mounting head 173a can mount the chip D on the fourth circuit substrate P4. At this time, when the third mounting head 173 a mounts the chip D on the fourth circuit substrate P4 , the second chip picker 185 - 2 can place the chip D on the fourth intermediate stage 184 . After that, the fourth mounting head 174 a can mount the chip D on the second circuit substrate P2 , and the second chip picker 185 - 2 can place the chip D on the third intermediate stage 183 . The third mounting head 173a can mount the chip D of the third intermediate stage 183 on the second circuit substrate P2.

在進行如上所述之作業後，第二安裝頭172a可將晶片D安裝於第三電路基板P3，且第一安裝頭171a可將 晶片D安裝於第三電路基板P3。之後，第二安裝頭172a與第一安裝頭171a可將晶片D安裝於第一電路基板P1。 After performing the above operations, the second mounting head 172a can mount the chip D on the third circuit substrate P3, and the first mounting head 171a can mount the chip D on the third circuit substrate P3. After that, the second mounting head 172a and the first mounting head 171a can mount the chip D on the first circuit substrate P1.

作為另一實施例，第四安裝頭174a和第三安裝頭173a可同時被操作而將安裝頭片D安装於第四電路基板P4或第二電路基板P2上，且第二安裝頭172a和第一安裝頭171a可同時被操作。 As another example, the fourth mounting head 174a and the third mounting head 173a can be operated simultaneously to mount the mounting head sheet D on the fourth circuit substrate P4 or the second circuit substrate P2, and the second mounting head 172a and the second mounting head 172a A mounting head 171a can be operated simultaneously.

作為另一實施例，其可以是第四安裝頭174a或第三安裝頭173a其中一個被操作，且第二安裝頭172a或第一安裝頭171a之其中一個被操作。另外，也可以是第四安裝頭174a或第三安裝頭173a其中另一個被操作，且第二安裝頭172a或第一安裝頭171a之其中另一個被操作。如此，可依序操作第四安裝頭174a，第二安裝頭172a，第三安裝頭173a和第一安裝頭171a，或者依序操作第三安裝頭173a，第二安裝頭172a，第四安裝頭174a和第一安裝頭171a。作為另一實施例，可依序操作第四安裝頭174a、第一安裝頭171a、第三安裝頭173a和第二安裝頭172a，或者可依序操作第三安裝頭173a、第一安裝頭171a、第四安裝頭174a和第二安裝頭172a。 As another example, one of the fourth installation head 174a or the third installation head 173a may be operated, and one of the second installation head 172a or the first installation head 171a may be operated. In addition, the other of the fourth mounting head 174a or the third mounting head 173a may be operated, and the other of the second mounting head 172a or the first mounting head 171a may be operated. In this way, the fourth mounting head 174a, the second mounting head 172a, the third mounting head 173a and the first mounting head 171a can be operated in sequence, or the third mounting head 173a, the second mounting head 172a, and the fourth mounting head can be operated in sequence. 174a and the first mounting head 171a. As another example, the fourth mounting head 174a, the first mounting head 171a, the third mounting head 173a and the second mounting head 172a may be operated in sequence, or the third mounting head 173a, the first mounting head 171a may be operated in sequence. , the fourth mounting head 174a and the second mounting head 172a.

如上所述，藉由操作第一安裝頭171a至第四安裝頭174a，可將晶片D迅速地安装於第一電路基板P1至第四電路基板P4。 As described above, by operating the first mounting head 171a to the fourth mounting head 174a, the chip D can be quickly mounted on the first circuit board P1 to the fourth circuit board P4.

如上所述，在第一安裝頭171a至第四安裝頭 174a將晶片D移送期間，下方視覺部193可拍攝晶片D的方位。此時，藉由比較被拍攝的晶片D的方位與預定的位置，且變更第一安裝頭171a至第四安裝頭174a的位置(例如，旋轉、上升等)，可將晶片D的方位調整為對應於預定位置之處。另外當第一安裝頭171a至第四安裝頭174a將晶片D安裝於第一電路基板P1至第四電路基板P4時，連結視覺部192藉由測量第一電路基板P1至第四電路基板P4的位置，可調整第一電路基板171a至第四電路基板174a的位置，以使晶片D安裝於正確的位置。 As described above, during the transfer of the wafer D by the first mounting head 171a to the fourth mounting head 174a, the lower vision unit 193 can photograph the orientation of the wafer D. At this time, by comparing the orientation of the photographed wafer D with a predetermined position, and changing the positions of the first mounting head 171a to the fourth mounting head 174a (for example, rotating, rising, etc.), the orientation of the wafer D can be adjusted to corresponding to the predetermined position. In addition, when the first mounting head 171a to the fourth mounting head 174a mount the chip D on the first circuit board P1 to the fourth circuit board P4, the link visual part 192 can measure the surface area of the first circuit board P1 to the fourth circuit board P4 Positions, the positions of the first circuit board 171a to the fourth circuit board 174a can be adjusted, so that the chip D can be installed in a correct position.

如上所述之結合裝置100，除上述之情形之外，可根據晶片D的質量選擇性地將晶片D安裝於第一電路基板P1至第四電路基板P4。 The bonding apparatus 100 described above can selectively mount the chips D on the first circuit board P1 to the fourth circuit board P4 according to the quality of the chips D in addition to the above cases.

例如，當晶圓W被放置到晶圓匣188時，藉由檢查晶圓W的表面，可將有關晶圓W之晶片D的狀態資料記載於晶圓匣188。當將晶圓匣188供應到結合裝置100時，記載的資料可被輸入到結合裝置100。藉此，根據晶片D的階級，結合裝置100可決定要安裝的電路基板的位置。具體而言，結合裝置100可將高階的晶片D僅安裝到鄰近卸載部120的第二電路基板P2和第四電路基板P4。再者，結合裝置100可將低階的晶片D僅安裝到鄰近於承載部110的第一電路基板P1和第三電路基板P3。又，作為另一實施例，結合裝置100可將高階的晶片D安裝於安置在第一傳送部131的 第一電路基板P1和第二電路基板P2。此外，結合裝置100可將低階的晶片D安裝於安置在第二傳送部132的第三電路基板P3和第四電路基板P4。此處，結合裝置100不限於前述的描述，可控制成將高質量的晶片D只安裝於多數個電路基板P1、P2、P3和P4中的一部分，且將低質量的晶片D僅安裝於多數個電路基板P1、P2、P3和P4中其餘的部分。因此，結合裝置100可根據用户的要求和產品的使用環境，提供只安裝高質量的晶片D或只安裝低質量的晶片D的電路基板。 For example, when the wafer W is placed in the cassette 188 , by inspecting the surface of the wafer W, the status data of the wafer D of the wafer W can be recorded in the cassette 188 . When the cassette 188 is supplied to the bonding apparatus 100 , recorded data may be input to the bonding apparatus 100 . Thereby, according to the order of the wafer D, the bonding apparatus 100 can determine the position of the circuit board to be mounted. Specifically, the bonding apparatus 100 may mount high-order wafers D only to the second circuit substrate P2 and the fourth circuit substrate P4 adjacent to the unloading part 120 . Furthermore, the bonding apparatus 100 can mount the low-level die D only to the first circuit substrate P1 and the third circuit substrate P3 adjacent to the carrier part 110 . Also, as another example, the bonding apparatus 100 can mount high-level wafers D on the first circuit substrate P1 and the second circuit substrate P2 placed on the first transfer unit 131 . In addition, the bonding apparatus 100 can mount the low-level wafer D on the third circuit substrate P3 and the fourth circuit substrate P4 placed on the second transfer unit 132 . Here, the combination device 100 is not limited to the foregoing description, and may be controlled to mount high-quality chips D on only a part of the plurality of circuit boards P1, P2, P3, and P4, and mount low-quality chips D on only a plurality of circuit boards P1, P2, P3, and P4. The rest of the circuit boards P1, P2, P3 and P4. Therefore, the bonding device 100 can provide a circuit substrate on which only high-quality chips D are mounted or only low-quality chips D are mounted, according to the user's requirements and the environment in which the product is used.

除了如上所述之情形以外，結合裝置100可將相互不同類型的晶片D安裝於每一個電路基板P1、P2、P3和P4上。舉例而言，第一安裝頭171a和第三安裝頭173a可安裝A類型的晶片D，第二安裝頭172a和第四安裝頭174a可安裝與A類型的晶片D不同的B類型的晶片D。在此情况下，包括A類型的晶片D的晶圆W與包括B類型的晶片D的晶圆W可依序或同時被供應。特别地，在此情况下，可具有多數個晶片拾取部185、晶圓安置部186、晶圓對準器187和晶圓傳送部189，且多數個晶片拾取部185、晶圓安置部186、晶圓對準器187和晶圓傳送部189可以相互疊層的形態來設置或以相互對立的方式來設置。 In addition to the cases described above, the bonding apparatus 100 may mount mutually different types of chips D on each of the circuit substrates P1, P2, P3, and P4. For example, the first mounting head 171a and the third mounting head 173a may mount an A-type die D, and the second mounting head 172a and the fourth mounting head 174a may mount a B-type die D different from the A-type die D. In this case, the wafer W including the A-type wafer D and the wafer W including the B-type wafer D may be supplied sequentially or simultaneously. In particular, in this case, there may be a plurality of wafer pickups 185, wafer placements 186, wafer aligners 187, and wafer transfers 189, and a plurality of wafer pickups 185, wafer placements 186, The wafer aligner 187 and the wafer transfer unit 189 may be provided in a stacked state or may be provided in opposition to each other.

因此，結合裝置100可同時將晶片D各别且獨立地安裝於多數個電路基板P1、P2、P3和P4，因此可增進作 業效率。 Therefore, the bonding apparatus 100 can separately and independently mount the chips D on a plurality of circuit substrates P1, P2, P3, and P4 at the same time, thereby improving work efficiency.

另外，結合裝置100藉由於同一裝置中同時安裝各種類型的晶片D，可以將晶片D安裝在正確的位置上。 In addition, the bonding apparatus 100 can mount the wafers D at correct positions by simultaneously mounting various types of wafers D in the same apparatus.

第5圖顯示根據本發明之另一實施例的結合裝置的平面圖。 Fig. 5 shows a plan view of a bonding device according to another embodiment of the present invention.

参考第5圖，結合裝置200可包括承載部210、卸載部220、傳送部230、清潔器240、預先加熱部250、加熱部260、安裝頭組件270、中間台280、晶片拾取部285、晶圓安置部286、晶圓對準器287、晶圓傳送部289和視覺部(未示出)。在此，因承載部210、卸載部220、傳送部230、清潔器240、預先加熱部250、加熱部260、安裝頭組270、中間台280、晶片拾取部285、晶圓安置部286、晶圓對準器287和晶圓傳送部289與前述第1圖至第4圖中所描述的相同或類似，以下將省略對上列構成之詳細說明。 Referring to FIG. 5, the bonding apparatus 200 may include a carrier part 210, an unloading part 220, a conveying part 230, a cleaner 240, a preheating part 250, a heating part 260, a mounting head assembly 270, an intermediate table 280, a wafer pick-up part 285, a wafer A circle placement section 286, a wafer aligner 287, a wafer transfer section 289, and a vision section (not shown). Here, due to the carrier part 210, the unloading part 220, the conveying part 230, the cleaner 240, the preheating part 250, the heating part 260, the mounting head group 270, the intermediate stage 280, the wafer picking part 285, the wafer setting part 286, the wafer The circular aligner 287 and the wafer transfer unit 289 are the same or similar to those described in FIGS. 1 to 4 above, and a detailed description of the above configurations will be omitted below.

所述視覺部可包括電路基板預對準視覺部291、結合視覺部292、下方視覺部293、中間視覺部294以及晶圓視覺部295。在此，因電路基板預對準視覺部291、結合視覺部292、下方視覺部293、中間視覺部294以及晶圆視覺部295與前述第1圖至第4圖中所描述的相同或類似，故以下將省略對上列構成之詳細說明。 The vision unit may include a circuit board pre-alignment vision unit 291 , a bonding vision unit 292 , a lower vision unit 293 , an intermediate vision unit 294 and a wafer vision unit 295 . Here, since the circuit substrate pre-alignment vision part 291, the joint vision part 292, the lower vision part 293, the intermediate vision part 294 and the wafer vision part 295 are the same or similar to those described in the aforementioned Figures 1 to 4, Therefore, the detailed description of the above-listed configuration will be omitted below.

請參照第5圖以及如前述對第1圖至第4圖之描述，本發明可具有多數個中間台280和晶片拾取部285。 此時，多數個晶片拾取部285可被固定住而使其不移動，並且，多數個中間台280能夠以第一方向和第二方向中之至少一個方向作線性移動。基於此，多數個中間台280可分別設置在使每一個中間台280獨立地作線性移動的晶片台驅動部296、297。如此，晶片台驅動部296、297可以包括線性電動機(linear motor)、滾珠螺桿(ball screw)和電動機(motor)的形態等各種形式形成。作為一實施例，可具有一個晶片台驅動部296、297，使其與所有中間台280連接。作為另一實施例，可具有多數個晶片台驅動部296、297，使其與兩個中間台280連接。作為另一實施例，可具有多數個晶片台驅動部296、297，使其分別與不同的中間台280連接。以下為便於了解，將以多數個晶片台驅動部296、297與兩個中間台280連接的情況為例，詳加說明。 Please refer to FIG. 5 and as described above for FIG. 1 to FIG. 4 , the present invention may have a plurality of intermediate stages 280 and wafer pickers 285 . At this time, the plurality of wafer pickers 285 may be fixed so as not to move, and the plurality of intermediate stages 280 may linearly move in at least one of the first direction and the second direction. Based on this, a plurality of intermediate stages 280 may be respectively provided in the wafer stage drive units 296 and 297 that linearly move each intermediate stage 280 independently. Thus, the wafer stage drive units 296 and 297 can be formed in various forms including a linear motor, a ball screw, and a motor. As an example, there may be one wafer stage driver 296 , 297 connected to all intermediate stages 280 . As another example, there may be a plurality of wafer stage drive units 296 , 297 connected to the two intermediate stages 280 . As another example, a plurality of wafer stage drive units 296 and 297 may be provided so as to be connected to different intermediate stages 280 respectively. For ease of understanding, the situation in which multiple wafer stage driving units 296 , 297 are connected to two intermediate stages 280 will be taken as an example for detailed description.

多數個晶片台驅動部296、297可包括設置為相互對立的第一晶片台驅動部296和第二晶片台驅動部297。此時，第一晶片台驅動部296可與第一中間台(未示出)和第二中間台(未示出)連接，且第二晶片台驅動部297可與第三中間台(未示出)和第四中間台(未示出)連接。 The plurality of wafer stage drivers 296, 297 may include a first wafer stage driver 296 and a second wafer stage driver 297 disposed opposite to each other. At this time, the first wafer stage driving part 296 can be connected with the first intermediate stage (not shown) and the second intermediate stage (not shown), and the second wafer stage driving part 297 can be connected with the third intermediate stage (not shown). out) and a fourth intermediate station (not shown).

如上所述之情况，當結合裝置200處於操作狀態且晶片被供應到每一個中間台280時，第一晶片台驅動部296和第二晶片台驅動部297可將每一個中間台280設置於每一個晶片拾取部285的下方或者每一個晶片拾取部285的 側面。之後，當每一個晶片拾取部285被操作而將晶片D放置到每一個中間台280時，第一晶片台驅動部296和第二晶片台驅動部297可將每一個中間台280歸位，返回初始位置。 As described above, when the bonding apparatus 200 is in operation and wafers are supplied to each intermediate stage 280, the first wafer stage driving part 296 and the second wafer stage driving part 297 can set each intermediate stage 280 on each intermediate stage 280. The bottom of one wafer pickup 285 or the side of each wafer pickup 285 . Afterwards, when each wafer pick-up unit 285 is operated to place the wafer D on each intermediate stage 280, the first wafer stage driver 296 and the second wafer stage driver 297 can return each intermediate stage 280 to return initial position.

然後，將晶片D安裝於電路基板P的方法可與上述相同地或類似地執行。 Then, the method of mounting the die D on the circuit substrate P can be performed the same as or similarly to the above.

因此，結合裝置200可傳送多數個晶片D而將其安裝於電路基板P上。 Therefore, the bonding apparatus 200 can transfer a plurality of chips D to be mounted on the circuit board P. Referring to FIG.

結合裝置200可傳送相互不同類型的晶片D而將其安裝於電路基板P上。 The bonding apparatus 200 can transfer different types of chips D to be mounted on the circuit board P. As shown in FIG.

結合裝置200可縮減作業順序與作業時間，並可增進作業效率。 The combined device 200 can reduce the operation sequence and operation time, and can improve the operation efficiency.

第6圖顯示根據本發明之另一實施例的結合裝置的平面圖。 Fig. 6 shows a plan view of a bonding device according to another embodiment of the present invention.

如第6圖所示，結合裝置300可包括承載部310、卸載部320、傳送部330、清潔器340、預先加熱部350、加熱部360、安裝頭组件370、中間台380、晶片拾取部385、晶圓安置部386、晶圓對準器387、晶圓傳送部389以及視覺部(未示出)。在此，因承載部310、卸載部320、傳送部330、清潔器340、預先加熱部350、加熱部360、安裝頭组件370、中間台380、晶片拾取部385、晶圓安置部386、晶圓對準器387和晶圓傳送部389與前述第1圖至第4圖所示相同或類似，故以下將省略對上列構成之詳細說明。 As shown in FIG. 6 , the bonding device 300 may include a carrier part 310, an unloading part 320, a transfer part 330, a cleaner 340, a preheating part 350, a heating part 360, a mounting head assembly 370, an intermediate stage 380, and a wafer picking part 385. , a wafer placement unit 386, a wafer aligner 387, a wafer transfer unit 389, and a vision unit (not shown). Here, due to the carrier part 310, the unloading part 320, the conveying part 330, the cleaner 340, the preheating part 350, the heating part 360, the mounting head assembly 370, the intermediate table 380, the wafer picking part 385, the wafer setting part 386, the wafer The circular aligner 387 and the wafer transfer unit 389 are the same as or similar to those shown in FIGS. 1 to 4 above, so detailed descriptions of the above configurations will be omitted below.

所述視覺部可包括電路基板預對準視覺部391、連結部392、下方視覺部393、中間視覺部394以及晶圓視覺部395。此處，因電路基板預對準視覺部391、連結視覺部392、中間視覺部394和晶圓視覺部395與前述第1圖至第4圖中所示相同或類似，以下將省略對其之詳細說明。 The vision part may include a circuit board pre-alignment vision part 391 , a connecting part 392 , a lower vision part 393 , an intermediate vision part 394 and a wafer vision part 395 . Here, since the circuit substrate pre-alignment visual part 391, the connection visual part 392, the intermediate visual part 394 and the wafer visual part 395 are the same or similar to those shown in the first to fourth figures, the following will omit them. Detailed description.

請參照第6圖以及如前述對第1圖至第4圖之描述，本發明可具有多數個中間台380和晶片拾取部385。此時，多數個晶片拾取部385可將晶片拾取頭(未示出)往第一方向和第二方向中之至少一個方向移動。此時，多數個中間台380可設置成為固定在預定的位置。如此，每一個晶片拾取部385可具有將每一個晶片拾取頭往第一方向和第二方向中之至少一個方向移動，並且上下移動的晶片拾取頭驅動部(未示出)。在此情况下，所述晶片拾取頭驅動部可以包括直線電動機(linear motor)、滾珠螺桿(ball screw)和電動機(motor)的形態等各種形式形成。作為另一實施例，中間台380和所述晶片拾取頭可以如前述參照第5圖所述般作線性移動。以下為便於了解，將以中間台380線性移動的情况為例，詳加說明。 Please refer to FIG. 6 and as described above for FIG. 1 to FIG. 4 , the present invention may have a plurality of intermediate stages 380 and wafer pick-up parts 385 . At this time, the plurality of wafer pick-up parts 385 can move the wafer pick-up head (not shown) to at least one of the first direction and the second direction. At this time, a plurality of intermediate stages 380 may be installed and fixed at predetermined positions. In this way, each wafer pickup unit 385 may have a wafer pickup head driving unit (not shown) that moves each wafer pickup head in at least one of the first direction and the second direction, and moves up and down. In this case, the wafer pickup driving unit may be formed in various forms including a linear motor, a ball screw, and a motor. As another example, the intermediate stage 380 and the wafer pickup head can be moved linearly as described above with reference to FIG. 5 . For ease of understanding, the case where the intermediate stage 380 moves linearly will be taken as an example for detailed description.

如上所述之情况，當結合装置300處於操作狀態且晶片被供應到每一個中間台380時，每一個晶片拾取部385可將晶片D從每一個晶圓(未示出)分離而供應到每一個中間台380。此時，藉由線性移動，中間台380可被設置為對應到每一個晶片拾取部385的位置。 As described above, when the bonding apparatus 300 is in operation and a wafer is supplied to each intermediate stage 380, each wafer pick-up section 385 can separate the wafer D from each wafer (not shown) and supply it to each intermediate stage 380. A middle table 380. At this time, the intermediate stage 380 may be set to correspond to the position of each wafer picker 385 by linearly moving.

如上所述，當晶片D被安置於每一個中間台380時，藉由各安裝頭組件370的操作，可將晶片D安裝於每一個電路基板P上。依此，第一安裝頭組件371和第四安裝頭組件374可作線性移動。例如，藉由將下方視覺部393設置在第三安裝頭組件373移動晶片D的路徑上，第四安裝頭組件374可在第一方向上作線性移動，以使晶片D通過下方視覺部393的上方，其中所述下方視覺部393被設置在第三安裝頭組件373移動晶片D的路徑上。此外，藉由將下方視覺部393設置在第二安裝頭組件372移動晶片D的路徑上，第一安裝頭組件371可在第一方向上作線性移動，以使晶片D通過下方視覺部393的上方，其中所述下方視覺部393被設置在第二安裝頭組件372移動晶片D的路徑上。在此情况下，下方視覺部393可拍攝各別吸附在第一安裝頭(未示出)和第四安裝頭(未示出)的晶片D的方位。因此，即使不具有四個下方視覺部393，仍可確認吸附在每一個安裝頭(未示出)的晶片D的方位。 As described above, when the chip D is mounted on each intermediate stage 380 , the chip D can be mounted on each circuit substrate P by the operation of each mounting head assembly 370 . Accordingly, the first mounting head assembly 371 and the fourth mounting head assembly 374 can move linearly. For example, by disposing the lower vision part 393 on the path where the third mounting head assembly 373 moves the wafer D, the fourth mounting head assembly 374 can be linearly moved in the first direction so that the wafer D passes through the lower vision part 393. above, wherein the lower visual part 393 is disposed on the path where the third mounting head assembly 373 moves the wafer D. In addition, by disposing the lower vision part 393 on the path where the second mounting head assembly 372 moves the wafer D, the first mounting head assembly 371 can move linearly in the first direction so that the wafer D passes through the lower vision part 393. above, wherein the lower visual part 393 is disposed on the path where the second mounting head assembly 372 moves the wafer D. In this case, the downward vision part 393 can image the orientations of the wafers D attracted by the first mounting head (not shown) and the fourth mounting head (not shown), respectively. Therefore, even without the four lower viewing portions 393, the orientation of the wafer D attracted to each mounting head (not shown) can be confirmed.

如上所述，在確認被吸附於每一個安裝頭的晶片D的方位後，可將每一個晶片D安裝於每一個電路基板P上。此時，因每一個安裝頭組件370將每一個晶片D安裝於電路基板P上的方法與以上所述的相同或類似，以下將省略對其所作之詳細說明。 As described above, each die D can be mounted on each circuit substrate P after confirming the orientation of the die D attracted to each mounting head. At this time, since the method of mounting each die D on the circuit substrate P by each mounting head assembly 370 is the same or similar to that described above, a detailed description thereof will be omitted below.

因此，結合装置300可傳送多數個晶片D而將其安裝於電路基板P上。 Therefore, the bonding apparatus 300 can transfer a plurality of chips D to be mounted on the circuit substrate P. Referring to FIG.

結合裝置300可傳送相互不同類型的晶片D而將其安裝於電路基板P上。 The bonding apparatus 300 can transfer different types of chips D to be mounted on the circuit board P. As shown in FIG.

結合裝置300可縮減操作順序與操作時間，並可增進作業效率。 The combined device 300 can reduce the operation sequence and operation time, and can improve the work efficiency.

雖然本發明針對上述之一或多數個實施例進行描述和說明，但是在不背離本發明所揭示的要旨和範圍的情况下，可以進行各種修改並予以變化。於是，附隨之權利要求的範圍涵蓋落入本發明所揭示的要旨之內的所有此類修改和變化。While the present invention has been described and illustrated with respect to one or more of the above embodiments, various modifications and changes may be made without departing from the spirit and scope of the disclosed invention. Accordingly, the scope of the appended claims embraces all such modifications and changes as fall within the disclosed gist of the invention.

100‧‧‧結合裝置 100‧‧‧combination device

110‧‧‧承載部 110‧‧‧carrying part

120‧‧‧卸載部 120‧‧‧Unloading Department

130‧‧‧傳送部 130‧‧‧Transmission Department

140‧‧‧清潔器 140‧‧‧cleaner

150‧‧‧預先加熱部 150‧‧‧Pre-heating part

160‧‧‧加熱部 160‧‧‧Heating Department

170‧‧‧安裝頭組件 170‧‧‧Installation head assembly

180‧‧‧中間台(通稱) 180‧‧‧Intermediate station (common name)

185‧‧‧晶片拾取部 185‧‧‧Wafer pickup department

186‧‧‧晶圓安置部 186‧‧‧Wafer placement department

187‧‧‧晶圓對準器 187‧‧‧Wafer Aligner

188‧‧‧晶圓匣 188‧‧‧Wafer Cassette

189‧‧‧晶圓傳送部 189‧‧‧Wafer transfer department

191‧‧‧電路基板預對準視覺部 191‧‧‧circuit substrate pre-alignment visual part

192‧‧‧連結視覺部 192‧‧‧Link to the Visual Department

193‧‧‧下方視覺部 193‧‧‧The lower visual department

194‧‧‧中間視覺部 194‧‧‧Intermediate vision department

195‧‧‧晶圓視覺部 195‧‧‧Wafer Vision Department

Claims (6)

一種結合裝置，所述結合裝置包括：多數個傳送部，用以傳送多數個電路基板；多數個安裝頭組件，用以安裝晶片於由所述多數個傳送部之每一個所供應的所述多數個電路基板的每一個上；多數個中間台，其設置為對應於所述多數個安裝頭组件之每一個，且可暫時性地安置所述晶片；晶圓安置部，用以安置晶圓，並使所述晶片放置於所述晶圓；以及晶片拾取部，用以從安置於所述晶圓安置部的所述晶圓拾取所述晶片，且供應所述晶片至所述多數個中間台之一；而且其中所述多數個安裝頭組件包括相互間隔開排列的第一安裝頭組件、第二安裝頭組件、第三安裝頭組件以及第四安裝頭組件，而所述第一安裝頭組件、第二安裝頭組件、第三安裝頭組件和第四安裝頭組件中之至少二個係面對面設置。 A bonding device, comprising: a plurality of transfer parts for transferring a plurality of circuit substrates; a plurality of mounting head assemblies for mounting chips on the plurality of substrates supplied by each of the plurality of transfer parts on each of the circuit substrates; a plurality of intermediate stages, which are arranged to correspond to each of the plurality of mounting head assemblies, and can temporarily place the wafer; a wafer placement part for placing the wafer, and placing the wafer on the wafer; and a wafer pick-up section for picking up the wafer from the wafer placed on the wafer placement section, and supplying the wafer to the plurality of intermediate stages one of; and wherein said plurality of mounting head assemblies includes a first mounting head assembly, a second mounting head assembly, a third mounting head assembly, and a fourth mounting head assembly spaced apart from each other, and said first mounting head assembly , at least two of the second mounting head assembly, the third mounting head assembly and the fourth mounting head assembly are arranged face to face. 如申請專利範圍第1項所述的結合裝置，尚包括：預先加熱部，其設置於所述多個傳送部的每一個。 The bonding device as described in claim 1 of the patent claims further includes: a pre-heating part disposed on each of the plurality of conveying parts. 如申請專利範圍第1項所述的結合裝置，尚包括： 加熱部，其設置於所述多數個傳送部的每一個，且加熱在所述多數個電路基板之每一個中之所述晶片安裝於所述每一個電路基板的部分。 The combination device as described in item 1 of the scope of the patent application also includes: a heating section provided in each of the plurality of transfer sections, and heating a portion of each of the plurality of circuit substrates in which the chip is mounted on the each of the circuit substrates. 如申請專利範圍第1項所述的結合裝置，其中所述第四安裝頭組件和所述第三安裝頭組件中之一個被操作，並且所述第二安裝頭組件和所述第一安裝頭組件中之一個被操作。 The bonding device according to claim 1, wherein one of the fourth mounting head assembly and the third mounting head assembly is operated, and the second mounting head assembly and the first mounting head One of the components is manipulated. 如申請專利範圍第4項所述的結合裝置，其中所述第四安裝頭組件和所述第三安裝頭組件中的另一個被操作，並且所述第二安裝頭組件和所述第一安裝頭組件中的另一個被操作。 The bonding device according to claim 4, wherein the other of the fourth mounting head assembly and the third mounting head assembly is operated, and the second mounting head assembly and the first mounting head assembly Another one of the header components is manipulated. 如申請專利範圍第1項所述的結合裝置，尚包括：視覺部，其拍攝所述多數個電路基板和所述晶片的至少一個。 The bonding device as described in claim 1 of the patent claims further includes: a visual unit for photographing at least one of the plurality of circuit boards and the wafer.
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