TWI785095B - 被處理體之處理方法 - Google Patents
被處理體之處理方法 Download PDFInfo
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- TWI785095B TWI785095B TW107128535A TW107128535A TWI785095B TW I785095 B TWI785095 B TW I785095B TW 107128535 A TW107128535 A TW 107128535A TW 107128535 A TW107128535 A TW 107128535A TW I785095 B TWI785095 B TW I785095B
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- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
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- H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
- H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
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- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
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- H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6336—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition in the presence of a plasma [PECVD]
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- H10P14/6326—Deposition processes
- H10P14/6328—Deposition from the gas or vapour phase
- H10P14/6334—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition
- H10P14/6339—Deposition from the gas or vapour phase using decomposition or reaction of gaseous or vapour phase compounds, i.e. chemical vapour deposition deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD
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- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
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- H10P14/6518—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer
- H10P14/6524—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer the substance being nitrogen
- H10P14/6526—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by introduction of substances into an already-existing insulating layer the substance being nitrogen introduced into an oxide material, e.g. changing SiO to SiON
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- H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
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- H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
- H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
- H10P14/6682—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound being a silane, e.g. disilane, methylsilane or chlorosilane
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- H10P14/6687—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and nitrogen
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- H10P50/264—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means
- H10P50/266—Dry etching; Plasma etching; Reactive-ion etching of conductive or resistive materials by chemical means by vapour etching only
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- H10P76/20—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising organic materials
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- H01J2237/00—Discharge tubes exposing object to beam, e.g. for analysis treatment, etching, imaging
- H01J2237/32—Processing objects by plasma generation
- H01J2237/33—Processing objects by plasma generation characterised by the type of processing
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- H01J2237/3341—Reactive etching
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- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
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- H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
- H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
- H10D64/01326—Aspects related to lithography, isolation or planarisation of the conductor
- H10D64/01328—Aspects related to lithography, isolation or planarisation of the conductor by defining the conductor using a sidewall spacer mask, a transformation under a mask or a plating at a sidewall
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- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Plasma & Fusion (AREA)
- Chemical & Material Sciences (AREA)
- Analytical Chemistry (AREA)
- Electromagnetism (AREA)
- Spectroscopy & Molecular Physics (AREA)
- Drying Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
- Electrical Discharge Machining, Electrochemical Machining, And Combined Machining (AREA)
- Mechanical Treatment Of Semiconductor (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2017162600A JP6913569B2 (ja) | 2017-08-25 | 2017-08-25 | 被処理体を処理する方法 |
| JP2017-162600 | 2017-08-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201920716A TW201920716A (zh) | 2019-06-01 |
| TWI785095B true TWI785095B (zh) | 2022-12-01 |
Family
ID=65437681
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW107128535A TWI785095B (zh) | 2017-08-25 | 2018-08-16 | 被處理體之處理方法 |
| TW111137161A TWI858400B (zh) | 2017-08-25 | 2018-08-16 | 電漿處理裝置 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW111137161A TWI858400B (zh) | 2017-08-25 | 2018-08-16 | 電漿處理裝置 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US10559472B2 (https=) |
| JP (1) | JP6913569B2 (https=) |
| KR (1) | KR102735966B1 (https=) |
| CN (1) | CN109427561B (https=) |
| TW (2) | TWI785095B (https=) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7071175B2 (ja) * | 2017-04-18 | 2022-05-18 | 東京エレクトロン株式会社 | 被処理体を処理する方法 |
| JP7066565B2 (ja) * | 2018-07-27 | 2022-05-13 | 東京エレクトロン株式会社 | プラズマ処理方法およびプラズマ処理装置 |
| US10950428B1 (en) * | 2019-08-30 | 2021-03-16 | Mattson Technology, Inc. | Method for processing a workpiece |
| WO2021050308A1 (en) * | 2019-09-12 | 2021-03-18 | Applied Materials, Inc. | Repulsion mesh and deposition methods |
| US11443923B2 (en) * | 2019-09-25 | 2022-09-13 | Taiwan Semiconductor Manufacturing Company Ltd. | Apparatus for fabricating a semiconductor structure and method of fabricating a semiconductor structure |
| JP7500332B2 (ja) * | 2020-08-05 | 2024-06-17 | キオクシア株式会社 | 半導体記憶装置及びその製造方法 |
| JP2022096079A (ja) * | 2020-12-17 | 2022-06-29 | パナソニックIpマネジメント株式会社 | 素子チップの製造方法 |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070232071A1 (en) * | 2006-03-31 | 2007-10-04 | Applied Materials, Inc. | Method to improve the step coverage and pattern loading for dielectric films |
Family Cites Families (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6635335B1 (en) * | 1999-06-29 | 2003-10-21 | Micron Technology, Inc. | Etching methods and apparatus and substrate assemblies produced therewith |
| JP4727171B2 (ja) * | 2003-09-29 | 2011-07-20 | 東京エレクトロン株式会社 | エッチング方法 |
| CN101416293B (zh) * | 2006-03-31 | 2011-04-20 | 应用材料股份有限公司 | 用于介电膜层的阶梯覆盖与图案加载 |
| US7524750B2 (en) * | 2006-04-17 | 2009-04-28 | Applied Materials, Inc. | Integrated process modulation (IPM) a novel solution for gapfill with HDP-CVD |
| JP5082338B2 (ja) * | 2006-08-25 | 2012-11-28 | 東京エレクトロン株式会社 | エッチング方法及びエッチング装置 |
| KR101564473B1 (ko) * | 2007-11-21 | 2015-10-29 | 램 리써치 코포레이션 | 텅스턴 함유층에 대한 에칭 마이크로로딩을 제어하는 방법 |
| US8133797B2 (en) * | 2008-05-16 | 2012-03-13 | Novellus Systems, Inc. | Protective layer to enable damage free gap fill |
| KR101468028B1 (ko) * | 2008-06-17 | 2014-12-02 | 삼성전자주식회사 | 반도체 소자의 미세 패턴 형성 방법 |
| JP2010283213A (ja) * | 2009-06-05 | 2010-12-16 | Tokyo Electron Ltd | 基板処理方法 |
| US8728956B2 (en) * | 2010-04-15 | 2014-05-20 | Novellus Systems, Inc. | Plasma activated conformal film deposition |
| JP2014003085A (ja) * | 2012-06-15 | 2014-01-09 | Tokyo Electron Ltd | プラズマエッチング方法及びプラズマ処理装置 |
| US20150357232A1 (en) * | 2013-01-22 | 2015-12-10 | Ps4 Luxco S.A.R.L. | Method for manufacturing semiconductor device |
| US9378971B1 (en) * | 2014-12-04 | 2016-06-28 | Lam Research Corporation | Technique to deposit sidewall passivation for high aspect ratio cylinder etch |
| JP6207947B2 (ja) * | 2013-09-24 | 2017-10-04 | 東京エレクトロン株式会社 | 被処理体をプラズマ処理する方法 |
| US9190478B2 (en) * | 2013-12-22 | 2015-11-17 | Alpha And Omega Semiconductor Incorporated | Method for forming dual oxide trench gate power MOSFET using oxide filled trench |
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| CN109427561A (zh) | 2019-03-05 |
| TWI858400B (zh) | 2024-10-11 |
| US11133192B2 (en) | 2021-09-28 |
| US20200135480A1 (en) | 2020-04-30 |
| TW201920716A (zh) | 2019-06-01 |
| KR102735966B1 (ko) | 2024-11-28 |
| TW202305153A (zh) | 2023-02-01 |
| JP6913569B2 (ja) | 2021-08-04 |
| CN109427561B (zh) | 2023-07-07 |
| US10559472B2 (en) | 2020-02-11 |
| JP2019041020A (ja) | 2019-03-14 |
| KR20190022389A (ko) | 2019-03-06 |
| US20190067019A1 (en) | 2019-02-28 |
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