TWI755596B - 半導體製程與半導體結構 - Google Patents

半導體製程與半導體結構 Download PDF

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TWI755596B
TWI755596B TW108115832A TW108115832A TWI755596B TW I755596 B TWI755596 B TW I755596B TW 108115832 A TW108115832 A TW 108115832A TW 108115832 A TW108115832 A TW 108115832A TW I755596 B TWI755596 B TW I755596B
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Taiwan
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dielectric material
dielectric
fin
trench
sidewall
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TW108115832A
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TW202002077A (zh
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彭羽筠
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台灣積體電路製造股份有限公司
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    • H01L21/76229Concurrent filling of a plurality of trenches having a different trench shape or dimension, e.g. rectangular and V-shaped trenches, wide and narrow trenches, shallow and deep trenches
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Abstract

一般而言,本發明提供的例子關於將介電材料填入間隙,比如填入鰭狀物之間的溝槽以用於淺溝槽隔離。在一實施例中,採用原子層沉積製程以順應性地沉積第一介電材料於溝槽中。在順應性地沉積第一介電材料之後,轉換第一介電材料成第二介電材料。在額外例子中,第一介電材料可順應性地沉積於另一溝槽中,且充填介電材料可流入其他溝槽並轉換成其他介電材料。

Description

半導體製程與半導體結構
本發明實施例關於將介電材料填入間隙的方法。
半導體積體電路產業已經歷指數成長。積體電路材料與設計的技術進展,使每一代的積體電路比前一代的積體電路具有更小且更複雜的電路。在積體電路演進中,功能密度(比如單位晶片面積中的內連線裝置數目)隨著幾何尺寸(比如製程所能產生的最小構件或線路)縮小而增加。尺寸縮小的製程通常有利於增加產能並降低相關成本。
隨著裝置尺寸縮小,製程開始採用新的不同材料及/或材料組合以利縮小裝置。尺寸縮小本身或搭配新的不同材料,對較大尺寸的之前世代而言將產生新的挑戰。
本發明一實施例提供之半導體製程,包括:採用原子層沉積製程,順應性地沉積第一介電材料於溝槽中;以及在順應性地沉積第一介電材料之後,轉換第一介電材料成第二介電材料。
本發明一實施例提供之半導體結構,包括:基板,具有第一鰭狀物與第二鰭狀物,第一鰭狀物的第一側壁面對第二鰭狀物的第二側壁,且由第一鰭狀物的第一側壁至第二鰭狀物的第二側壁之寬度小於10nm;介電隔離層,位於第一鰭狀物的第一側壁與第二鰭狀物的第二側壁之間,介電隔離層的上表面低於第一側壁或第二側壁的頂部,介電隔離層自第一鰭狀物的第一側壁延伸至第二鰭狀物的第二側壁且不具有孔洞於其中;以及閘極結構位於介電隔離層 上,沿著第一鰭狀物的第一側壁與第二鰭狀物的第二側壁,並位於第一鰭狀物的第一側壁與第二鰭狀物的第二側壁上。
本發明一實施例提供之半導體製程,包括:順應性地沉積第一介電材料於基板中的第一溝槽與第二溝槽中,第一溝槽定義於第一鰭狀物與第二鰭狀物之間,第二溝槽定義於第三鰭狀物與第四鰭狀物之間,且第二溝槽比第一溝槽寬;在順應性地沉積第一介電材料之後,使第二介電材料流入第二溝槽;以及轉換第一介電材料成第三介電材料,並轉換第二介電材料成第四介電材料。
A-A、B-B、Y-Y:參考剖面
W1:第一寬度
W2:第二寬度
W3:寬度
20:半導體基板
22:鰭狀物
24:順應性介電層
24a、24b:橫向成長端
26:轉換的介電材料
28:充填介電材料
30、60:界面介電層
32:虛置閘極
34:遮罩
36、36’:閘極間隔物
42:磊晶的源極/汲極區
50:接點蝕刻停止層
52:第一層間介電層
62:閘極介電層
64:順應層
66:閘極導電充填材料
70:第二層間介電層
80:導電結構
100、102、104、106、108、110、200、202、204、206、208、210、302、304、306、308、310:步驟
圖1A與1B、2、3、4、5A與5B、6、7A與7B、以及8A與8B係一些實施例中,用於形成鰭狀場效電晶體的製程之個別階段中的個別中間結構。
圖9至14係多種前驅物氣體的化合物之圖式。
圖15係一些實施例中,充填一或多個溝槽之方法的流程圖。
圖16係一些實施例中,充填一或多個溝槽之方法的流程圖。
圖17係一些實施例中,充填一或多個溝槽之方法的流程圖。
下述內容提供的不同實施例或實例可實施本發明的不同結構。下述特定構件與排列的實施例係用以簡化本發明內容而非侷限本發明。舉例來說,形成第一構件於第二構件上的敘述包含兩者直接接觸的實施例,或兩者之間隔有其他額外構件而非直接接觸的實施例。另一方面,本發明之多個實例可重複採用相同標號以求簡潔,但多種實施例及/或設置中具有相同標號的元件並不必然具有相同的對應關係。
此外,本發明實施例之結構形成於另一結構上、連接至另一結構、 及/或耦接至另一結構中,結構可直接接觸另一結構,或可形成額外結構於結構及另一結構之間。此外,空間性的相對用語如「下方」、「其下」、「較下方」、「上方」、「較上方」、或類似用語可用於簡化說明某一元件與另一元件在圖示中的相對關係。空間性的相對用語可延伸至以其他方向使用之元件,而非侷限於圖示方向。元件亦可轉動90°或其他角度,因此方向性用語僅用以說明圖示中的方向。
一般而言,本發明提供的實施例關於以介電材料充填間隙。具體而言,此處所述的實施例關於以介電材料充填窄尺寸的間隙,而不形成縫隙或空洞於介電材料中。在一些實施例中,採用原子層沉積製程以沉積介電材料於間隙(比如鰭狀物之間的溝槽)中。後續製程將介電材料轉換成另一介電材料。舉例來說,後續製程可包括在含氧環境中的退火,在含氧環境中的氣體浸泡、含氧電漿、及/或含氧環境中的紫外線處理。在一些例子中,轉換的介電材料可填入間隙,且不具有縫隙或空洞形成其中。在一些例子中,轉換的介電材料形成於鰭狀物之間的溝槽中,可減少或避免鰭狀物彎曲,並可達其他優點。
此處所述的實施例內容為形成隔離區(如淺溝槽結構)於前段製程中的鰭狀物之間。鰭狀物可用於形成鰭狀場效電晶體。其他實施例可實施其他內容。實施例可泛用於任何間隙、溝槽、凹陷、開口、或類似物,以將介電材料填入其中。可在前段製程、中段製程、與後段製程中形成並填入這些間隙。本發明實施例可實施的內容包括即將填入介電材料的間隙。
下述內容將說明方法與結構的一些變化例。本技術領域中具有通常知識者應理解,其他調整屬於其他實施例的範疇。雖然以特定順序說明實施例中的方法,但多種其他實施例的方可由任何邏輯性的順序進行,且可包含較少或較多的步驟。為了簡化圖式,一些圖式中可省略一些構件或結構的標號,以避免擋住其他構件或結構。
圖1A與1B至圖8A與8B係一些實施例中,形成鰭狀場效電晶體所用的製程其個別階段的個別中間結構。圖1A係方法之一例的階段中的中間結構剖視圖,而圖1B係中間結構的透視圖。
中間結構包含鰭狀物22形成於半導體基板20上。半導體基板20可為或包含半導體基體基板、絕緣層上半導體基板、或類似物,且其可摻雜(如摻雜p型或n型摻質)或未摻雜。在一些實施例中,半導體基板20的半導體材料可包含半導體元素如矽或鍺、半導體化合物、半導體合金、或上述之組合。
鰭狀物22形成於半導體基板20上的方法,可為蝕刻溝槽於半導體基板20中,以形成鰭狀物22。圖案化鰭狀物22於半導體基板20中的方法可為任何合適方法。舉例來說,可採用一或多道光微影製程如雙重圖案化或多重圖案化製程,以圖案化鰭狀物22。一般而言,雙重圖案化或多重圖案化製程結合光微影與自對準製程,其產生的圖案間距小於單一的直接光微影製程所得的圖案間距。舉例來說,一些實施例形成犧牲層於基板上,並採用光微影製程圖案化犧牲層。採用自對準製程,可沿著圖案化的犧牲層側部形成間隔物。接著移除犧牲層,並可採用保留的間隔物圖案化鰭狀物22。
圖1A顯示蝕刻至半導體基板20以形成鰭狀物22的溝槽,其第一寬度W1與第二寬度W2的例子。第一寬度W1可為小尺寸,比如小於或等於約10nm(比如介於約3nm至約10nm之間)。具有第一寬度W1的一或多個溝槽,可具有高深寬比(比如溝槽深度與第一寬度W1的比例),其大於或等於10。第二寬度W2可大於第一寬度W1。在一些例子中,第二寬度W2比第一寬度W1大至少10nm。在多種例子中,相鄰的鰭狀物22之間的溝槽可具有多種寬度,其可為任何寬度的圖案或設置。圖式中的例子僅用以舉例說明。
圖1B亦顯示對應一些剖視圖的參考剖面Y-Y。參考剖面Y-Y越過半導體基板20上的鰭狀物22並與其相交。圖1A、2至4、與5A係多種製程例中對 應參考剖面Y-Y的剖視圖。
如圖2所示,形成順應性介電材料24於鰭狀物22上及溝槽中。在一些例子中,順應性介電材料24包含能轉換為氧化物的氮化物或其他介電材料。順應性介電材料24的沉積方法採用原子層沉積製程。如圖所示,沉積的順應性介電材料24不會填滿鰭狀物22之間的溝槽。
原子層沉積製程包含一或多個循環,且每一循環包含依序提供前驅物的脈衝至腔室中、淨化腔室、提供反應物至腔室中、以及淨化腔室。前驅物為包含矽與有機基團的氣體。在一些例子中,前驅物氣體可為無鹵氣體或可包含鹵素如氯。在一些例子中,前驅物氣體可為無氮氣體或可包含氮。舉例來說,前驅物氣體中包含的有機基團可為或包含-CH2及/或-CH3。在一些例子中,單一前驅物氣體(非前驅物氣體的混合物,但可包含載氣)可用於原子層沉積製程中,提供前驅物氣體的脈衝之步驟。
在一些例子中,前驅物氣體包含矽與有機基團,其可不含鹵素與氮,且可具有化學式如Si(CH2)Si(CH3)xHy,其中x
Figure 108115832-A0305-02-0007-22
0,y
Figure 108115832-A0305-02-0007-23
2,且x+y=6。舉例來說,前驅物氣體可為圖9所示的Si(CH2)SiH6,或圖10所示的Si(CH2)Si(CH3)4H2
在一些例子中,前驅物氣體包含矽、有機基團、與鹵素、且不含氮,其可具有化學式Si(CH2)xSiRyClz,其中R可為-H或-CH3,2
Figure 108115832-A0305-02-0007-24
x
Figure 108115832-A0305-02-0007-26
1,y
Figure 108115832-A0305-02-0007-27
0,z
Figure 108115832-A0305-02-0007-28
1,且y+z=2(4-x)。舉例來說,前驅物氣體可為圖11所示的Si(CH2)Si(CH3)4Cl2,或圖12所示的Si(CH2)2SiCl4
在一些例子中,前驅物氣體包含矽、有機基團、與氮、且不含鹵,其可具有化學式SiHx(CH3)y(R)z,其中R可為-NH(CH3)或-N(CH3)2,x
Figure 108115832-A0305-02-0007-29
0,y
Figure 108115832-A0305-02-0007-30
1,z
Figure 108115832-A0305-02-0007-31
1,且x+y+z=4。舉例來說,前驅物氣體可為圖13所示的Si(CH3)2(N(CH3)2)2,或圖14所示的SiH(CH3)(NH(CH3))2
反應物氣體可含氮。在一些例子中,反應物氣體可為或包含氨、 氮氣、或上述之組合。在一些例子中,反應物氣體可為或包含氫氣與氨氣的混合物、氫氣與氮氣的混合物、或氫氣與氨氣及氮氣的混合物。在原子層沉積製程時個別脈衝步驟中,前驅物氣體及/或反應物氣體可進一步與載氣(如氬氣、氦氣、或類似物)混合。
實施原子層沉積製程的製程溫度介於約150℃至約650℃之間,比如介於約200℃至約500℃之間,或介於約500℃至約650℃之間。原子層沉積製程的循環之脈衝步驟其壓力可介於約30Pa至約1500Pa之間。在一些例子中,原子層沉積製程沉積順應性介電材料24的速率介於約0.3Å/循環至約0.9Å/循環之間。實施原子層沉積製程所用的工具可為爐反應器、旋轉反應器、單一晶圓反應器、批次晶圓反應器、或類似物。
如圖所示的一些例子中,順應性介電材料24的沉積厚度不會填滿窄溝槽(比如具有第一寬度W1的溝槽)。在一些例子中,沉積順應性介電材料24時的階梯覆蓋率大於約95%。如下詳述,順應性介電材料24將轉換成另一介電材料。在一些例子中,順應性介電材料24的轉換造成順應性介電材料24膨脹,因此另一介電材料的體積增加(相對於順應性介電材料24)。由於順應性介電材料24未填滿窄溝槽,轉換的介電材料其增加的體積可容納於窄溝槽中。在一些例子中,體積可增加高達約10%,且這些例子中的順應性介電材料24的厚度可為窄溝槽寬度(如第一寬度W1)的約45.45%至小於50%。在這些例子中,窄溝槽中的順應性介電材料24不具有合併的橫向成長端24a與24b(自個別的相對之鰭狀物22的側壁形成)。此外,由於窄溝槽中的橫向成長端24a與24b不會合併,用於轉換順應性介電材料24的物種可更有效地到達窄溝槽底部的順應性介電材料24以利轉換步驟。
沉積的順應性介電材料24可為或包含碳氮化矽,端視上述的前驅物與反應物而定。有機基團如-CHx可形成於碳氮化矽中。有機基團可使順應性 介電材料24的末端,避免順應性介電材料24中的交聯。有機基團可產生孔洞結構於順應性介電材料24中,及/或產生順應性材料24的鬆散局部骨架。舉例來說,孔洞結構造成順應性介電材料24具有低密度,比如小於或等於約2.4g/cm3。孔洞結構及/或鬆散的局部骨架,可讓順應性介電材料轉換成另一介電材料所用的物種有效地穿透順應性介電材料24。在一些例子中,用於沉積順應性介電材料24的原子層沉積製程為無氧製程,因此順應性介電材料24不含氧。
如圖3所示,將順應性介電材料24轉換成轉換的介電材料26。在一些例子中,順應性介電材料24轉換至氧化物的方法為氧化製程。在其他例子中,可採用任何合適製程將順應性介電材料24轉換成另一介電材料。
一些例子進行氧化物製程,其可包括含氧環境(如蒸汽)中的退火、含氧環境中的氣體浸泡、含氧電漿、及/或含氧環境中的紫外線處理。退火、氣體浸泡、電漿、與紫外線處理中的多者可結合。舉例來說,可同時進行紫外線處理與電漿處理,或在電漿處理之後進行紫外線處理。
含氧環境中的退火可包含使水蒸汽、氧氣、臭氧、類似物、或上述之組合,流入半導體基板20與順應性介電材料24位於其中的腔室內。含氧環境中的退火溫度可大於或等於約400℃,比如介於約400℃至約650℃之間,且特別介於約450℃至約550℃之間。
在含氧環境中的氣體浸泡及/或含氧電漿,可包含將氧氣、臭氧、類似物、或上述之組合,流入順應性介電材料24與半導體基板20位於其中的腔室內。可在低於退火的溫度下進行氣體浸泡及/或電漿製程,比如小於或等於約100℃的溫度,比如介於約10℃至約80℃之間的溫度,且更特別是介於約10℃至約60℃之間的溫度。在電漿製程中,電漿可為產生氧自由基的遠端電漿。與無電漿存在的氧相較,氧自由基可改良對順應性介電材料24的穿透效果。
紫外線處理可包含以紫外線照射順應性介電材料24,其可提供順 應性介電材料24中的反應所用的能量。可在含氧環境如包含氧氣、臭氧、類似物、或上述之組合的環境中,進行紫外線處理。舉例來說,紫外線處理可實施的紫外線波長光譜介於約200nm至約700nm之間。進行紫外線處理的溫度可小於或等於400℃,比如小於或等於約100℃。
在含氧環境中退火、浸泡、電漿處理、及/或紫外線處理順應性介電材料24的製程,可讓含氧物種穿透順應性介電材料24。順應性介電材料24的孔洞結構有利於穿透。此外,來自含氧電漿的氧自由基可具有較佳穿透力。在這些例子中,隨著含氧物種穿透至順應性介電材料24中,含氧物種可與順應性介電材料24的材料反應,以將順應性介電材料24轉換成轉換的介電材料26,其可為氧化物。有機基團造成順應性介電材料24的結構與骨架局部鬆散,使含氧物種得以與順應性介電材料24的材料反應,其可氧化材料並產生一或多種副產物。副產物可包含氮、碳、及/或氫。副產物會擴散穿過順應性介電材料24並除氣。
轉換的介電材料26之體積,可大於順應性介電材料24之體積,比如體積差異高達約10%。順應性介電材料24的氧化,會造成轉換的介電材料26之體積膨脹(相對於順應性介電材料24的體積)。隨著體積膨脹,在轉換成轉換的介電材料26時,橫向成長端(如順應性介電材料24的橫向成長端24a與24b)可合併。因此可避免縫隙及/或空洞形成於窄溝槽中。此外,體積膨脹會造成轉換的介電材料26的緻密性低於順應性介電材料24。此外,自富氮轉換至富氧的介電層,以及氧化造成的較低密度與較大體積,將對應地降低介電常數值。如此一來,轉換的介電材料26的介電常數值小於順應性介電材料24的介電常數值。
製程條件如含氧氣體的流速、壓力、溫度、及/或暴露至含氧環境的時間,會影響順應性介電材料24的氧化量及/或副產物的除氣量。因此可調整製程條件以達具有多種特性的目標材料。舉例來說,轉換的介電材料26之組成 需具有所需的介電常數值及/或蝕刻險擇性。一些組成的例子將進一步說明如下。此外,可進行紫外線處理(比如在低熱預算的製程中),以增進與含氧物種之間的反應,並提供轉換的介電材料26中的額外交聯,其可增加轉化的介電材料26之強度與結構完整性。
在一些例子中,轉換的介電材料26為氧化矽、碳氧化矽、碳氮氧化矽、或類似物。在一些例子中,轉換的介電材料26為氧化矽,其氧與矽的原子比介於約2.2至約1.8之間。在一些例子中,轉換的介電材料26為碳氧化矽或碳氮氧化矽,其氧與矽的原子比大於或等於約2.0,碳的濃度介於約5原子%至約16原子%之間,且氮濃度小於或等於約5原子%。在稀釋氫氟酸中,碳氧化矽或碳氮氧化矽的濕蝕刻速率,為約0.6倍至約1倍的氧化矽的濕蝕刻速率。在一些例子中,轉換的介電材料26為碳氮氧化矽,其氧與矽的原子比介於約1.6至約1.1之間,碳濃度介於約3原子%至約10原子%之間,且氮濃度介於約5原子%至約15原子%之間。在稀釋氫氟酸中,碳氮氧化矽的濕蝕刻速率小於或等於約0.5倍的氧化矽的濕蝕刻速率。在一些例子中,轉換的介電材料26之介電常數值介於約3.4至約3.9之間。改變轉換的介電材料26中的碳濃度,可改變其介電常數值。舉例來說,增加碳濃度會降低介電常數值,而減少碳濃度會增加介電常數值。
如圖所示的一些例子,一些溝槽不會填入轉換的介電材料26。舉例來說,鰭狀物22的一些設置,可填入比窄溝槽寬(比如寬約10nm或更多)的一些溝槽。因此在一些例子中,轉換的介電材料26之兩側側壁之間的溝槽其寬度W3,可為約10nm或更寬。因此這些例子可進行充填製程,以將充填介電材料28填入較寬的溝槽。在此較寬溝槽不存在的其他例子中,可省略充填製程。
如圖4所示,沉積充填介電材料28於轉換的介電材料26上,以填入轉換的介電材料26之前未填滿的溝槽中。在一些例子中,填入溝槽的步驟包括採用可流動的沉積製程,比如可流動的化學氣相沉積製程。可流動的沉積製程 可包括含矽的有機前驅物氣體、含氮的前驅物氣體、與含氧的前驅物氣體。含矽有機前驅物氣體可為或包含聚矽氮烷、矽烷胺(如三矽烷胺或二矽烷胺)、四甲氧基矽烷、八甲基環四矽氧烷、類似物、或上述之組合。含氮前驅物氣體可為或包含氨、氮氣、類似物、或上述之組合。含氧前驅物氣體可為氧氣或類似物。可在遠端電漿中產生電漿,並承載電漿至沉積腔室,以電漿活化含氮前驅物氣體與含氧前驅物氣體。活化的含氮與含氧前驅物氣體可與含矽的有機前驅物氣體反應,以形成流入溝槽的副產物。副產物可形成含矽與氮的材料。在一些例子中,副產物無法流入窄間隙,比如寬度小於10nm的間隙,或具體寬度小於6nm的間隙,因此不會形成空洞。舉例來說,作為副產物的化合物及/或分子的尺寸可大到無法流入小寬度的間隙中,及或力如表面張力可抑制副產物流入小寬度的間隙中。因此採用可流動的沉積製程如可流動的化學氣相沉積時,可能產生空洞於空隙或溝槽中。
接著可使流入溝槽中的材料轉換,且轉換製程可為氧化製程。氧化製程可包含在含氧環境(如蒸汽)中的退火、在含氧環境中的氣體浸泡、含氧電漿、及/或在含氧環境中的紫外線處理,如上所述。轉換製程可將材料轉換成充填介電材料28,其可為或包含氧化矽。
在一些例子中,在即將形成充填介電材料28處,使順應性介電材料24轉換成轉換的介電材料26的步驟,與轉換成充填介電材料28的步驟可同時進行。因此這些例子可省略轉換製程。
在一些例子中,充填介電材料28為氧化矽,其氧與矽的原子比介於約1.5至約2.0之間。在一些例子中,介電材料28為碳氮氧化矽,其氧與矽的原子比介於約1.3至約1.9之間,碳的濃度介於約0原子%至約20原子%之間,且氮的濃度介於約0原子%至約2原子%之間。在稀氫氟酸中,碳氮氧化矽的濕蝕刻速率約為氧化矽的濕蝕刻速率的約1至2倍。在一些例子中,充填介電材料28的介電 常數值介於約3.9至約4.4之間。
如圖5A與5B所示,使轉換的介電材料26與充填介電材料28凹陷,以形成隔離區於鰭狀物22之間。平坦化充填介電材料28與轉換的介電材料26至鰭狀物22的上表面(比如以化學機械研磨),且在平坦化製程之後使轉換的介電材料26與充填介電材料28凹陷(比如以蝕刻法),使鰭狀物自保留的充填介電材料28及轉換的介電材料26之間凸起,且保留的充填介電材料28及轉換的介電材料26形成隔離區。可採用合適的製程如濕蝕刻製程或乾蝕刻製程,以進行上述凹陷步驟。在一些例子中,蝕刻製程為濕蝕刻製程,其採用的蝕刻劑包含氫氟酸如稀釋氫氟酸。在稀釋氫氟酸中,氫氟酸可犧釋於去離子水中,且氫氟酸與去離子水的比例可介於約1:60至約1:500之間,比如約1:100。
圖5B係形成於鰭狀物22之間與半導體基板20上的隔離區之透視圖。圖5B中的結構可為形成場效電晶體的基礎,其例子將說明如下。
圖6係橫越鰭狀物22與隔離區之虛置閘極堆疊(或更一般的閘極結構)的透視圖。虛置閘極堆疊形成於鰭狀物22上,以用於此處所述的置換閘極製程。虛置閘極堆疊的縱向延伸方向,垂直於鰭狀物22的個別縱向方向。每一虛置閘極堆疊包含沿著鰭狀物22並位於鰭狀物22上的界面介電層30、界面介電層30上的虛置閘極32、與虛置閘極32上的遮罩34。
界面介電層30可包含或可為氧化矽、氮化矽、類似物、或上述之多層。虛置閘極32可包含或可為矽(如多晶矽)或另一材料。遮罩34可包含或可為氮化矽、氮氧化矽、碳氮化矽、類似物、或上述之組合。虛置閘極堆疊所用的界面介電層30、虛置閘極32、與遮罩34之層狀物,可由任何可接受的沉積技術依序沉積或形成,再採用光微影與一或多道蝕刻製程圖案化成虛置閘極堆疊。
圖6亦顯示後續圖式所用的參考剖面。參考剖面A-A沿著兩側的源極/汲極區之間的鰭狀物22中的通道。參考剖面B-B垂直於參考剖面A-A,且橫越 不同個別鰭狀物22中的源極/汲極區。圖7A與8A係多種製程例子對應參考剖面A-A的剖視圖,而圖7B與8B係多種製程例子對應參考剖面B-B的剖視圖。額外製程將搭配圖7A、7B、8A、與8B說明。
如圖7A與7B所示,沿著虛置閘極堆疊的側壁及鰭狀物22上形成閘極間隔物36。舉例來說,形成閘極間隔物36的結果之一,為其餘的閘極間隔物36’(或鰭狀物間隔物)亦可沿著鰭狀物22的側壁形成,端視鰭狀物22高於隔離區的高度而定。閘極間隔物36的形成方法可為採用合適製程,以順應性地沉積閘極間隔物36所用的一或多層,並非等向地蝕刻一或多層。閘極間隔物36所用的一或多層可包含或可為碳氧化矽、氮化矽、氮氧化矽、碳氮化矽、類似物、上述之多層、或上述之組合。
接著形成凹陷於虛置閘極堆疊的兩側上的鰭狀物22中。凹陷步驟可為蝕刻製程。蝕刻製程可為等向或非等向,或可對半導體基板20的一或多個結晶平面具有選擇性。因此凹陷可具有多種剖面輪廓,端視實施的蝕刻製程而定。
磊晶的源極/汲極區42形成於凹陷中。磊晶的源極/汲極區42可包含或可為矽鍺、鍺、碳化矽、磷化矽、碳磷化矽、III-V族半導體化合物、II-VI族半導體化合物、或類似物。磊晶的源極/汲極區42可形成於凹陷中,且磊晶成長方法可為合適的沉積製程。在一些例子中,磊晶的源極/汲極區42可具有晶面(其可對應半導體基板20的結晶平面),如圖7B所示。相對於個別的鰭狀物22,磊晶的源極/汲極區42可具有隆起高度,如圖7A所示。在一些例子中,一些鰭狀物22中的磊晶的源極/汲極區可磊晶成長至合併在一起,比如因為靠近相鄰的鰭狀物22,而其他鰭狀物22可具有個別的磊晶的源極/汲極區42(未與其他磊晶的源極/汲極區合併)。圖7B所示的例子中,一些磊晶的源極/汲極區42合併形成合併之磊晶的源極/汲極區42,而其他磊晶的源極/汲極區42未合併。其他例子可包含未合 併與合併的源極/汲極區之任何組合。
在一些例子中,磊晶的源極/汲極區42亦可摻雜,其摻雜方法可為磊晶成長時的原位摻雜,及/或在磊晶成長之後佈植摻質至磊晶的源極/汲極區42中。因此源極/汲極區可由摻雜(比如磊晶成長時的原位摻雜)及/或磊晶成長劃定,其可進一步劃定源極/汲極區劃定其中的主動區。
接點蝕刻停止層50順應性地沉積於磊晶的源極/汲極區42的表面、閘極間隔物36的側壁與上表面、遮罩34的上表面、與隔離區的上表面上。一般而言,蝕刻停止層與相鄰的層狀物或構件具有不同的蝕刻選擇性,可在形成接點或通孔時提供停止蝕刻製程的機制。接點蝕刻停止層50可包含或可為氮化矽、碳氮化矽、氮化碳、類似物、或上述之組合,且其沉積方法可為任何合適的順應性沉積製程。
第一層間介電層52形成於接點蝕刻停止層50上。第一層間介電層52可包含或可為氧化矽、低介電常數介電材料(介電常數低於氧化矽的介電常數之材料)、氮氧化矽、磷矽酸鹽玻璃、硼矽酸鹽玻璃、硼磷矽酸鹽玻璃、未摻雜的矽酸鹽玻璃、氟化矽酸鹽玻璃、有機矽酸鹽玻璃、碳氧化矽、旋轉塗佈玻璃、旋轉塗佈聚合物、碳矽材料、上述之化合物、上述之複合物、類似物、或上述之組合。第一層間介電層52的沉積方法可為任何可接受的沉積製程。
如圖8A與8B所示,以置換閘極結構取代虛置閘極堆疊。第一層間介電層52與接點蝕刻停止層50的上表面與虛置閘極32的上表面共平面,且使上述上表面共平面的方法可為平坦化製程如化學機械研磨。化學機械研磨亦可移除虛置閘極32上的遮罩34(在一些例子中,亦移除閘極間隔物36的上側部份)。綜上所述,虛置閘極32的上表面自第一層間介電層52與接點蝕刻停止層50露出。隨著虛置閘極32自第一層間介電層52與接點蝕刻停止層50露出,可採用一或多道可接受的蝕刻製程移除虛置閘極32。凹陷形成於閘極間隔物36之間的移除虛 置閘極堆疊處,且凹陷露出鰭狀物22的通道區。
置換閘極結構形成於移除虛置閘極堆疊處的凹陷中。如圖所示,置換閘極結構各自包含界面介電層60、閘極介電層62、一或多個視情況形成的順應層64、與閘極導電充填材料66。界面介電層60、閘極介電層62、一或多個視情況形成的順應層64、以及閘極導電充填材料66的沉積方法可為任何合適的沉積技術。界面介電層60沿著通道區形成於鰭狀物22的側壁與上表面上。舉例來說,界面介電層60可為界面介電層30(若未移除)、氧化物如氧化矽、氮化物如氮化矽、及/或另一介電層。
閘極介電層62可順應性地沉積於移除虛置閘極堆疊處的凹陷中(比如隔離區的上表面上、界面介電層60上、與閘極間隔物36的側壁上),以及第一層間介電層52、接點蝕刻停止層50、與閘極間隔物36的上表面上。閘極介電層62可為或可包括氧化矽、氮化矽、高介電常數介電材料、上述之多層、或其他介電材料。高介電常數介電材料的介電常數值可大於約7.0,且可包含鉿、鋁、鋯、鑭、鎂、鋇、鈦、鉛、或上述之組合的金屬氧化物或金數矽酸鹽。
接著可順應性地沉積視情況形成的一或多個順應層64(若超過一個則依序)於閘極介電層62上。一或多個視情況形成的順應層64可包含一或多個阻障及/或蓋層,以及一或多個功函數調整層。一或多個阻障及/或蓋層可包含鉭及/或鈦的氮化物、氮矽化物、碳氮化物、及/或鋁氮化物;鎢的氮化物、碳氮化物、及/或碳化物;類似物、或上述之組合。一或多個功函數調整層可包含或可為鈦及/或鉭的氮化物、氮矽化物、碳氮化物、鋁氮化物、鋁氧化物、及/或鋁碳化物;鎢的氮化物、碳氮化物、及/或碳化物;鈷;鉑;類似物、或上述之組合。
閘極導電充填材料66形成於一或多個視情況形成的順應層64(若實施)上,及/或形成於閘極介電層62上。閘極導電充填材料66可填入移除虛置閘極堆疊處的其餘凹陷。閘極導電充填材料66可為或包括含金屬材料如鎢、鈷、 鋁、釕、銅、上述之多層、上述之組合、或類似物。平坦化製程如化學機械研磨可移除多餘的閘極導電充填材料66、一或多個視情況形成的順應層64、與閘極介電層62。因此可形成包含閘極導電充填材料66、一或多個視情況形成的順應層64、閘極介電層62、與界面介電層60的置換閘極結構,如圖8A所示。
第二層間介電層70形成於第一層間介電層52、接點蝕刻停止層50、閘極間隔物36、與置換閘極結構上。第二層間介電層70可包含或可為氧化矽、低介電常數介電材料、氮氧化矽、磷矽酸鹽玻璃、硼矽酸鹽玻璃、硼磷矽酸鹽玻璃、未摻雜的矽酸鹽玻璃、氟化矽酸鹽玻璃、有機矽酸鹽玻璃、碳氧化矽、旋轉塗佈玻璃、旋轉塗佈聚合物、碳矽材料、上述之化合物、上述之複合物、類似物、或上述之組合。第二層間介電層70的沉積方法可為任何合適的沉積製程。
形成個別開口穿過第二層間介電層70、第一層間介電層52、與接點蝕刻停止層50,以露出個別磊晶的源極/汲極區42的至少一部份。舉例來說,可採用光微影與一或多道蝕刻製程,以圖案化第二層間介電層70、第一層間介電層52、與接點蝕刻停止層50,使其具有開口。
在形成源極/汲極接點開口之後,可形成導電結構於開口中至磊晶的源極/汲極區42。導電結構80可包含形成於磊晶的源極/汲極區42上的矽化物區、黏著及/或阻障層、以及黏著及/或阻障層上的導電充填材料。矽化物區的形成方法可為磊晶的源極/汲極區42之上側部份,與形成於磊晶的源極/汲極區42上的金屬層(未圖示,比如鈦、鉭、或類似物)之間的熱反應。順應性地沉積黏著及/或阻障層於開口中。黏著及/或阻障層可為或包含氮化鈦、氧化鈦、氮化鉭、氧化鉭、任何合適的過渡金屬之氮化物或氧化物、類似物、或任何上述的組合,且其沉積方法可為任何合適的沉積技術。導電充填材料可為或包括鈷、鎢、銅、釕、鋁、金、銀、上述之合金、類似物、或上述之組合,且其沉積方法可為任 何合適的沉積技術。在沉積導電材料之後,可採用平坦化製程如化學機械研磨,移除多餘的導電充填材料與黏著及/或阻障層。導電結構80可稱作接點、插塞、或類似物。
圖15係一些實施例中,填入一或多個溝槽所用的方法之流程圖。舉例來說,圖15的方法可填入基板上的窄溝槽,而基板上不存在大寬度溝槽。在步驟100中,沉積順應性介電材料,比如搭配圖2說明的上述順應性介電材料24。在步驟102中,順應性介電材料轉換為轉換的介電材料,比如搭配圖3說明的上述順應性介電層24轉換成轉換的介電材料26。步驟102中的轉換步驟可包含步驟104中的含氧環境中退火、步驟106中的含氧環境中的氣體浸泡、步驟108中的含氧電漿、與步驟110中的含氧環境中的紫外線處理中的一或多者。步驟102中的轉換步驟可為步驟104中的退火、步驟106中的氣體浸泡、步驟108中的電漿製程、步驟110中的紫外線處理、或上述中至少兩者的組合。在一例中,在步驟108中的電漿處理之後進行步驟110中的紫外線處理,或者同時進行步驟108中的電漿處理與步驟110中的紫外線處理。
圖16係一些實施例中,填入一或多個溝槽的方法之流程圖。舉例來說,圖16的方法可填入基板上的窄溝槽與大寬度溝槽。在步驟100中,沉積順應性介電材料,如搭配圖15說明的上述內容。在步驟102中,將順應性介電材料轉換為轉換的介電材料,如搭配圖15說明的上述內容。在步驟200中,沉積未轉換的充填介電材料,如搭配圖4說明的上述內容。在步驟202中,未轉換的充填介電材料將轉換成充填介電材料,比如搭配圖4說明的上述充填介電材料28。步驟202中的轉換製程可包含步驟204中的含氧環境中的一或多道退火、步驟206中的含氧環境中的氣體浸泡、步驟208中的含氧電漿、及/或步驟210中的含氧環境中的紫外線處理中的任何一者或多者。步驟202中的轉換製程可包括步驟204中的退火、步驟206中的氣體浸泡、步驟208中的電漿製程、步驟210中的紫外線處 理、或上述中至少兩者的組合。在一例中,可在步驟208中的電漿製程之後進行步驟210中的紫外線處理,或者同時進行步驟208中的電漿製程與步驟210中的紫外線處理步驟204、206、208、與210可分別與步驟104、106、108、與110相同或類似。
圖17係一些實施例中,填入一或多個溝槽的方法之流程圖。舉例來說,圖17的方法可填入基板上的窄溝槽與大寬度溝槽。在步驟100中,沉積順應性介電材料,如搭配圖15說明的上述內容。在步驟200中,沉積未轉換之充填介電材料,如搭配圖16說明的上述內容。在此例中,在沉積未轉換之充填介電材料之前,不進行轉換順應性介電材料之轉換製程。在步驟302中,順應性的介電材料與未轉換之充填介電材料,將分別轉換為轉換的介電材料(比如轉換的介電材料26)與充填介電材料(如充填介電材料28)。步驟302中的轉換步驟可包含步驟304中的含氧環境中退火、步驟306中的含氧環境中的氣體浸泡、步驟308中的含氧電漿、與步驟310中的含氧環境中的紫外線處理中的一或多者。步驟302中的轉換步驟可為步驟304中的退火、步驟306中的氣體浸泡、步驟308中的電漿製程、步驟310中的紫外線處理、或上述中至少兩者的組合。在一例中,在步驟308中的電漿處理之後進行步驟310中的紫外線處理,或者同時進行步驟308中的電漿處理與步驟310中的紫外線處理。步驟304、306、308、與310可分別與步驟104、106、108、與110類似。
一些實施例可達一些優點。如上所述,較窄的間隙(比如溝槽)其寬度小於或等於10nm(或小於或等於6nm),其可充填介電材料且不形成縫隙或空洞於介電材料中。此外,當充填鰭狀物之間的溝槽時,可減少或避免鰭狀物彎曲。另一方面,在結構具有較窄與較大的間隙時,可採用原子層沉積製程充填較窄的間隙,再以可流動的沉積製程充填較大的間隙。這可更有效地充填間隙並改善品質。這些製程所形成的介電材料,對於使介電材料凹陷以形成隔離區 的蝕刻與清潔製程可更強健。
一實施例為半導體製程。採用原子層沉積製程,順應性地沉積第一介電材料於溝槽中。在順應性地沉積第一介電材料之後,轉換第一介電材料成第二介電材料。
在一些實施例中,在順應性地沉積第一介電材料之後,溝槽之最窄寬度的個別側壁成長端保持未合併;以及在轉換第一介電材料成第二介電材料之後,第二介電材料填入溝槽之最窄寬度的溝槽側壁之間的溝槽。
在一些實施例中,轉換第一介電材料成第二介電材料的步驟,造成在第一介電材料轉換成第二介電材料時的第一介電材料膨脹。
在一些實施例中,第二介電材料的密度低於第一介電材料的密度。
在一些實施例中,第二介電材料的介電常數值低於第一介電材料的介電常數值。
在一些實施例中,原子層沉積製程包括一或多個循環,且每一循環包括:提供前驅物氣體的脈衝,且前驅物氣體包括矽與有機基團,且前驅物氣體不含氧;以及提供含氮的反應物氣體的脈衝。
在一些實施例中,第一介電材料包括氮化物;以及轉換第一介電材料成第二介電材料的步驟包括氧化製程。
在一些實施例中,轉換第一介電材料成第二介電材料的步驟,包括暴露第一介電材料至含氧環境,且第二介電材料包括氧化物。
在一些實施例中,暴露第一介電材料至含氧環境的步驟包括退火、氣體浸泡、電漿製程、或紫外線處理中的至少一者。
在一些實施例中,上述方法更包括:使溝槽中的第二介電材料凹陷;以及形成閘極結構於凹陷的第二介電材料與溝槽的側壁上;其中溝槽的側壁為多個鰭狀物的個別側壁,且閘極結構形成於鰭狀物上。
另一實施例為半導體結構。基板具有第一鰭狀物與第二鰭狀物,第一鰭狀物的第一側壁面對第二鰭狀物的第二側壁。由第一鰭狀物的第一側壁至第二鰭狀物的第二側壁之寬度小於10nm。介電隔離層位於第一鰭狀物的第一側壁與第二鰭狀物的第二側壁之間。介電隔離層的上表面低於第一側壁或第二側壁的頂部。介電隔離層自第一鰭狀物的第一側壁延伸至第二鰭狀物的該第二側壁且不具有孔洞於其中。閘極結構位於介電隔離層上,沿著第一鰭狀物的第一側壁與第二鰭狀物的第二側壁,並位於第一鰭狀物的第一側壁與第二鰭狀物的該第二側壁上。
在一些實施例中,介電隔離層為碳氧化矽或碳氮氧化矽;介電隔離層中的氧與矽的原子比例大於或等於約2.0;介電隔離層中的碳濃度介於5原子%至16原子%之間;以及介電隔離層中的氮濃度小於或等於5原子%。
在一些實施例中,介電隔離層為碳氮氧化矽;介電隔離層中的氧與矽的原子比例介於1.6至1.1之間;介電隔離層中的碳濃度介於3原子%至10原子%之間;以及介電隔離層中的氮濃度介於約5原子%至約15原子%之間。
在一些實施例中,介電隔離層的介電常數值介於3.4至3.9之間。
又一實施例為半導體製程。順應性地沉積第一介電材料於基板中的第一溝槽與第二溝槽中。第一溝槽定義於第一鰭狀物與第二鰭狀物之間。第二溝槽定義於第三鰭狀物與第四鰭狀物之間。第二溝槽比第一溝槽寬。在順應性地沉積第一介電材料之後,使第二介電材料流入第二溝槽。轉換第一介電材料成第三介電材料,並轉換第二介電材料成第四介電材料。
在一些實施例中,轉換第一介電材料成第三介電材料的步驟,與轉換第二介電材料成第四介電材料的步驟同時進行。
在一些實施例中,使第二介電材料流入第二溝槽的步驟之前,進行轉換第一介電材料成第三介電材料的步驟。
在一些實施例中,在上述轉換步驟之後,第三介電材料填入不具有第四介電材料的第一溝槽,且第三介電材料與第四材料一起填入第二溝槽。
在一些實施例中,轉換步驟包括在含氧環境中的退火、在含氧環境中的氣體浸泡、含氧電漿製程、或含氧環境中的紫外線處理中的至少一者。
在一些實施例中,上述方法更包括:使第一溝槽中的第三介電材料與第二溝槽中的第三介電材料與第四介電材料凹陷;以及形成第一閘極結構與第二閘極結構,第一閘極結構位於第一溝槽中的第三介電材料上並沿著第一鰭狀物與第二鰭狀物的個別側壁,且第二閘極結構位於第二溝槽中的第三介電材料與第四介電材料上並沿著第三鰭狀物與第四鰭狀物的個別側壁。
上述實施例之特徵有利於本技術領域中具有通常知識者理解本發明。本技術領域中具有通常知識者應理解可採用本發明作基礎,設計並變化其他製程與結構以完成上述實施例之相同目的及/或相同優點。本技術領域中具有通常知識者亦應理解,這些等效置換並未脫離本發明精神與範疇,並可在未脫離本發明之精神與範疇的前提下進行改變、替換、或更動。
20:半導體基板
22:鰭狀物
26:轉換的介電材料
28:充填介電材料

Claims (12)

  1. 一種半導體製程,包括:採用一原子層沉積製程,順應性地沉積一第一介電材料於一第一溝槽和一第二溝槽中;在順應性地沉積該第一介電材料之後,轉換該第一介電材料成一第二介電材料,其中在轉換該第一介電材料成該第二介電材料之後,該第一溝槽被該第二介電材料完全填充;以及在轉換該第一介電材料成該第二介電材料之後,在該第二溝槽中的該第二介電材料上方沉積另一介電材料,使該第一溝槽內僅包括單一種介電材料,且該第二溝槽內包括複數種介電材料。
  2. 如申請專利範圍第1項所述之半導體製程,其中:在順應性地沉積該第一介電材料之後,該第一溝槽之最窄寬度的個別側壁成長端保持未合併;以及在轉換該第一介電材料成該第二介電材料之後,該第二介電材料填入該第一溝槽之最窄寬度的溝槽側壁之間的該第一溝槽。
  3. 如申請專利範圍第1或2項所述之半導體製程,其中該第二介電材料的密度低於該第一介電材料的密度。
  4. 如申請專利範圍第1或2項所述之半導體製程,其中該第二介電材料的介電常數值低於該第一介電材料的介電常數值。
  5. 如申請專利範圍第1或2項所述之半導體製程,其中轉換該第一介電材料成該第二介電材料的步驟,包括暴露該第一介電材料至一含氧環境,且該第二介電材料包括氧化物。
  6. 如申請專利範圍第5項所述之半導體製程,其中暴露該第一介電材料至該含氧環境的步驟包括退火、氣體浸泡、電漿製程、或紫外線處理中的 至少一者。
  7. 一種半導體結構,包括:一基板,具有一第一鰭狀物、一第二鰭狀物和鄰接該第二鰭狀物的一第三鰭狀物,該第一鰭狀物的一第一側壁面對該第二鰭狀物的一第二側壁,且由該第一鰭狀物的該第一側壁至該第二鰭狀物的該第二側壁之一寬度小於10nm;一介電隔離層,位於該第一鰭狀物的該第一側壁與該第二鰭狀物的該第二側壁之間以及該第二鰭狀物與該第三鰭狀物之間,該介電隔離層的上表面低於該第一側壁或該第二側壁的頂部,該介電隔離層自該第一鰭狀物的該第一側壁延伸至該第二鰭狀物的該第二側壁且不具有孔洞於其中,其中位於該第一側壁與該第二側壁之間的一第一溝槽內的該介電隔離層由單一種介電材料形成,位於該第二鰭狀物與該第三鰭狀物之間的一第二溝槽內的該介電隔離層由複數種介電材料形成;以及一閘極結構位於該介電隔離層上,沿著該第一鰭狀物的該第一側壁與該第二鰭狀物的該第二側壁,並位於該第一鰭狀物的該第一側壁與該第二鰭狀物的該第二側壁上。
  8. 如申請專利範圍第7項所述的半導體結構,其中:該介電隔離層為碳氧化矽或碳氮氧化矽;該介電隔離層中的氧與矽的原子比例大於或等於約2.0;該介電隔離層中的碳濃度介於5原子%至16原子%之間;以及該介電隔離層中的氮濃度小於或等於5原子%。
  9. 如申請專利範圍第7項所述之半導體結構,其中:該介電隔離層為碳氮氧化矽;該介電隔離層中的氧與矽的原子比例介於1.6至1.1之間;該介電隔離層中的碳濃度介於3原子%至10原子%之間;以及 該介電隔離層中的氮濃度介於約5原子%至約15原子%之間。
  10. 如申請專利範圍第7至9項中任一項所述之半導體結構,其中該介電隔離層的介電常數值介於3.4至3.9之間。
  11. 一種半導體製程,包括:順應性地沉積一第一介電材料於一基板中的一第一溝槽與一第二溝槽中,該第一溝槽定義於一第一鰭狀物與一第二鰭狀物之間,該第二溝槽定義於一第三鰭狀物與一第四鰭狀物之間,且該第二溝槽比該第一溝槽寬;在順應性地沉積該第一介電材料之後,轉換該第一介電材料成一第二介電材料;以及在轉換該第一介電材料成該第二介電材料之後,使一第三介電材料流入該第二溝槽,並轉換該第三介電材料成一第四介電材料,其中該第一溝槽被該第二介電材料完全填充,且該第二溝槽被該第二介電材料和該第四介電材料完全填充。
  12. 如申請專利範圍第11項所述之半導體製程,其中轉換步驟包括在含氧環境中的退火、在含氧環境中的氣體浸泡、含氧電漿製程、或含氧環境中的紫外線處理中的至少一者。
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