CN110783196A - 半导体装置的形成方法 - Google Patents

半导体装置的形成方法 Download PDF

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CN110783196A
CN110783196A CN201910445396.3A CN201910445396A CN110783196A CN 110783196 A CN110783196 A CN 110783196A CN 201910445396 A CN201910445396 A CN 201910445396A CN 110783196 A CN110783196 A CN 110783196A
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gate
oxide
region
layer
spacers
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许议文
陈哲明
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Abstract

远端产生的等离子体能量化制程气体的自由基。制程气体的自由基可与前驱物气体作用,以反应形成氧化物于工件的区域上。形成氧化物的步骤不损伤下方的层状物如低介电常数的介电层。在鳍状场效晶体管装置的形成方法中,氧化物层可对应栅极间隔物上的主要侧壁间隔物。

Description

半导体装置的形成方法
技术领域
本发明实施例关于半导体装置,更特别关于以远端等离子体源形成氧化物层,用于保护栅极结构的间隔物。
背景技术
半导体装置用于多种电子应用,比如个人电脑、手机、数码相机、与其他电子设备。半导体装置的制作方法通常为依序沉积绝缘或介电层、导电层、与半导体层的材料于半导体基板上,并采用微影图案化多种材料层,以形成电路构件与单元于半导体基板上。
半导体产业持续减少最小结构尺寸以持续改良多种电子构件(如晶体管、二极管、电阻、电容、或类似物)的集成密度,以整合更多构件至给定面积。然而随着最小结构尺寸缩小,需解决额外产生的问题。
发明内容
本发明一实施例提供的半导体装置的形成方法包括:形成栅极堆叠于一或多个半导体带状物上;形成多个栅极密封间隔物以与栅极堆叠的两侧相邻;形成多个低介电常数的栅极间隔物以与栅极密封间隔物相邻,且低介电常数的栅极间隔物包括低介电常数的介电材料;以及以远端氧等离子体源与前驱物气体形成氧化物层于低介电常数的栅极间隔物上。
本发明一实施例提供的方法包括:形成虚置栅极结构于一或多个半导体带状物上并与其垂直。形成栅极间隔物于虚置栅极结构的侧壁上,且栅极间隔物包括低介电常数的介电材料。形成虚置间隔物于栅极间隔物上。蚀刻半导体带状物的第一半导体带状物以使其凹陷,且虚置间隔物在蚀刻时保护栅极间隔物。形成源极/漏极材料于凹陷中。移除虚置间隔物。启动远端氧等离子体源。将前驱物注入制程腔室,其中远端氧等离子体源的自由基与前驱物反应形成氧化物层于栅极间隔物上。
本发明一实施例提供的方法包括:形成栅极结构于半导体鳍状物上,且半导体鳍状物位于工件上。方法包括形成低介电常数的间隔物层于栅极结构的两侧上。形成源极/漏极区于半导体鳍状物中以与栅极结构相邻。形成氧化物层于低介电常数的间隔物层上,且布植掺质至半导体鳍状物的源极/漏极区中。氧化物层在布植时保护低介电常数的间隔物层。方法还包括蚀刻氧化物层而不蚀刻低介电常数的间隔物层。
附图说明
图1是一些实施例中,鳍状场效晶体管的三维图。
图2、3、4、5、6、7、8A、8B、9A、9B、10A、10B、10C、10D、11A、 11B、12A、12B、13A、13B、14A、14B、15A、15B、16A、16B、17A、17B、 17C、18A、18B、19A、与19B是一些实施例中,形成鳍状场效晶体管的中间阶段的剖视图。
图20与21是一些实施例的制程腔室。
图22是一些实施例中,候选前驱物气体的化学结构与对应的化学反应。
其中,附图标记说明如下:
A-A、B-B、C-C 参考剖面
G1 制程气体
G1* 自由基
G2 前驱物气体
50 基板
51 分隔线
50N、50P 区域
52 鳍状物
54 绝缘材料
56 浅沟槽隔离区
58 通道区
60 虚置介电层
62 虚置栅极层
64 遮罩层
72 虚置栅极
74 遮罩
80 栅极密封间隔物
82 源极/漏极区
86 栅极间隔物
86t 虚置侧壁间隔物
87 接点蚀刻停止层
88 第一层间介电层
89 区域
90 凹陷
92 栅极介电层
94 栅极
94A 衬垫层
94B 功函数调整层
94C 填充材料
95 远端等离子体制程
96 主要侧壁氧化物
108 第二层间介电层
110 栅极接点
112 源极/漏极接点
200、300 制程腔室
205、305 等离子体源
210 上侧腔室
212 上侧部分
214 下侧部分
215 气体分布板
216 空洞
220 下侧腔室
225、325 工件
230、330 基座
235、240、335、340 气体供应器
245、345 等离子体转移腔室
310 等离子体产生腔室
320 反应腔室
具体实施方式
下述内容提供的不同实施例或实例可实施本发明的不同结构。下述特定构件与排列的实施例是用以简化本发明内容而非局限本发明。举例来说,形成第一构件于第二构件上的叙述包含两者直接接触的实施例,或两者的间隔有其他额外构件而非直接接触的实施例。另一方面,本发明的多个实例可重复采用相同标号以求简洁,但多种实施例及/或设置中具有相同标号的元件并不必然具有相同的对应关系。
此外,本发明实施例的结构形成于另一结构上、连接至另一结构、及/ 或耦接至另一结构中,结构可直接接触另一结构,或可形成额外结构于结构及另一结构之间。此外,空间性的相对用语如“下方”、“其下”、“较下方”、“上方”、“较上方”、或类似用语可用于简化说明某一元件与另一元件在图示中的相对关系。空间性的相对用语可延伸至以其他方向使用的元件,而非局限于图示方向。元件亦可转动90°或其他角度,因此方向性用语仅用以说明图示中的方向。
此处所述的一些实施例细节关于特定内容,比如鳍状场效晶体管与其形成方法。实施例提供远端等离子体源形成的氧化物层,以在形成鳍状场效晶体管装置时保护栅极结构的间隔物。然而本技术领域中技术人员应理解,以鳍状场效晶体管装置说明的技术细节,亦可用于其他内容如下述。
实施例中关于鳍状场效晶体管的说明并非用于局限这些技术的应用。此处说明鳍状场效晶体管的形成方法,且鳍状场效晶体管的例子包括源极/漏极区、栅极结构、与通道区。这些制程的置换仍属此处所述的实施例范围。
实施例的制程采用远端等离子体沉积法,以沉积主要侧壁氧化物材料于低介电常数的栅极间隔物上。在一些实施方式中,主要侧壁氧化物亦可称作屏蔽氧化物、牺牲氧化物、或阻障氧化物。举例来说,在形成虚置栅极堆叠于鳍状场效晶体管的鳍状物上时,可沉积低介电常数的栅极间隔物于虚置栅极堆叠上,并对栅极间隔物进行非等向蚀刻以移除其水平部分。在蚀刻之后,可沉积主要侧壁氧化物材料于低介电常数的栅极间隔物上。若以其他制程形成主要侧壁氧化物,则氧化物的形成方法可能氧化低介电常数的栅极间隔物的部分。之后移除主要侧壁氧化物时,亦移除低介电常数的栅极间隔物的氧化部分,即减少低介电常数的栅极间隔物厚度并造成漏电流问题。然而实施例的制程采用远端等离子体源能量化前驱物,以形成主要侧壁氧化物于低介电常数的栅极间隔物上。由于远端等离子体源的较低能量与前驱物的选择,可消除或降低低介电常数的栅极间隔物的损伤及/或氧化,如下详述。在实质上移除主要侧壁氧化物时,可维持低介电常数的栅极间隔物厚度,以减少漏电流问题的可能性。
图1是一些实施例中,鳍状场效晶体管的三维图。鳍状场效晶体管包括鳍状物52于基板50(如半导体基板)上。浅沟槽隔离区56位于基板50中,而鳍状物52自相邻的浅沟槽隔离区56之间凸起高于浅沟槽隔离区56。虽然附图与说明中的浅沟槽隔离区56与基板50为分开单元,但此处所述的用语“基板”可指半导体基板,或者含有隔离区的半导体基板。此外,虽然附图中的鳍状物52与基板50为单一的连续材料,鳍状物52及/或基板50可包含单一材料或多种材料。在此内容中,鳍状物52指的是自相邻的浅沟槽隔离区56之间延伸的部分。
栅极介电层92沿着鳍状物52的侧壁及上表面上,而栅极94位于栅极介电层92上。源极/漏极区82位于鳍状物52的两侧上(相对于栅极介电层 92与栅极94)。图1亦显示后续附图所用的参考剖面。参考剖面A-A沿着栅极94的纵轴,并垂直于鳍状场效晶体管的源极/漏极区82之间的电流方向。参考剖面B-B垂直于参考剖面A-A,并沿着鳍状物52的纵轴及鳍状场效晶体管的源极/漏极区82之间的电流方向。参考剖面C-C平行于参考剖面A-A,并延伸穿过鳍状场效晶体管的源极/漏极区。后续附图将依据这些参考剖面,以达附图清楚的目的。
此处所述的一些实施例内容为栅极后制制程所形成的鳍状场效晶体管。在其他实施例中,可采用栅极优先制程。此外,一些实施例可实施于平面装置如平面场效晶体管。
图2至19B是一些实施例中,形成鳍状场效晶体管的中间阶段的剖视图。图2至7沿着图1中的参考剖面A-A,差别在于图2至7具有多个鳍状物或鳍状场效晶体管。图8A、9A、10A、11A、12A、13A、14A、15A、16A、 17A、18A、与19A沿着图1的参考剖面A-A,而图8B、9B、10B、11B、 12B、13B、14B、15B、16B、17B、18B、与19B沿着图1的参考剖面B-B,差别在图8A、9A、10A、11A、12A、13A、14A、15A、16A、17A、18A、 19A、8B、9B、10B、11B、12B、13B、14B、15B、16B、17B、18B、与19B 具有多个鳍状物或鳍状场效晶体管。图10C与10D沿着图1的参考剖面C-C,差别在图10C与10D具有多个鳍状物或鳍状场效晶体管。
在图2中,提供基板50。基板50可为半导体基板如基体半导体、绝缘层上半导体基板、或类似物,其可掺杂(比如掺杂p型或n型掺质)或未掺杂。基板50可为晶圆如硅晶圆。一般而言,绝缘层上半导体基板为半导体材料层形成于绝缘层上。举例来说,绝缘层可为埋置氧化物层、氧化硅层、或类似物。提供绝缘层于基板上,且基板通常为硅或玻璃基板。亦可采用其他基板如多层基板或组成渐变基板。在一些实施例中,基板50的半导体材料可包含硅、锗、半导体化合物(包括碳化硅、砷化镓、磷化镓、磷化铟、砷化铟、及/或锑化铟)、半导体合金(包括硅锗、磷砷化镓、砷化铝铟、砷化铝镓、砷化镓铟、磷化镓铟、及/或磷砷化镓铟)、或上述的组合。
基板50具有区域50N与区域50P。区域50N可用于形成n型装置如n 型金属氧化物半导体晶体管(例如n型鳍状场效晶体管)。区域50P可用于形成p型装置如p型金属氧化物半导体晶体管(例如p型鳍状场效晶体管)。区域50N与区域50P可物理分隔(如由分隔线51分隔),且任何数目的结构(如其他主动装置、掺杂区、隔离结构、或类似物)可位于区域50N与区域50P之间。
在图3中,鳍状物52形成于基板50上。鳍状物52可为半导体带状物。在一些实施例中,鳍状物52形成于基板50中的方法可为蚀刻沟槽于基板50 中。蚀刻可为任何可接受的蚀刻制程,比如反应性离子蚀刻、中性束蚀刻、类似方法、或上述的组合。蚀刻可为非等向。
可由任何合适方法图案化鳍状物。举例来说,可采用一或多道光微影制程图案化鳍状物,比如双重图案化或多重图案化制程。一般而言,双重图案化或多重图案化制程结合光微影与自对准制程,其产生的图案间距可小于采用单一直接的光微影制程所得的图案间距。举例来说,一实施例形成牺牲层于基板上,并采用光微影制程图案化牺牲层。采用自对准制程,沿着图案化的牺牲层的侧部形成间隔物。接着移除牺牲层,而保留的间隔物可用于图案化鳍状物。
在图4中,绝缘材料54形成于基板50之上及相邻的鳍状物52之间。绝缘材料54可为氧化物如氧化硅、氮化物、类似物、或上述的组合,且其形成方法可为高密度等离子体化学气相沉积、可流动的化学气相沉积、类似方法、或上述的组合。可流动的化学气相沉积可在远端等离子体系统中沉积化学气相沉积为主的材料,之后硬化沉积的材料以将其转变成另一材料如氧化物。此外亦可采用任何可接受的制程所形成的其他绝缘材料。在所述实施例中,绝缘材料54为可流动的化学气相沉积制程所形成的氧化硅。一旦形成绝缘材料,可进行退火制程。在一实施例中,形成绝缘材料54,使多余的绝缘材料54覆盖鳍状物52。虽然附图中的绝缘材料54为单层,一些实施例可采用多层的绝缘材料54。举例来说,一些实施例可先沿着基板50与鳍状物52的表面形成衬垫层(未图示)。之后可形成前述填充材料于衬垫层上。
在图5中,对绝缘材料54进行移除制程,以移除鳍状物52上的多余绝缘材料54。在一些实施例中,可采用平坦化制程如化学机械研磨、回蚀刻制程、上述的组合、或类似方法。平坦化制程露出鳍状物52,在完成平坦化制程后使鳍状物52与绝缘材料54的上表面齐平。
在图6中,使绝缘材料54凹陷以形成浅沟槽隔离区56。使绝缘材料54 凹陷,因此区域50N及区域50P中的鳍状物52的上侧部分自相邻的浅沟槽隔离区56之间凸起。此外,浅沟槽隔离区56的上表面可具有图示的平坦表面,凸起表面、凹陷表面(如碟化)、或上述的组合。通过适当蚀刻,可形成平面、凸起、及/或凹陷的浅沟槽隔离区56的上表面。浅沟槽隔离区56的凹陷方法可采用可接受的蚀刻制程,比如对绝缘材料54具有选择性的蚀刻制程。举例来说,蚀刻制程对绝缘材料54的蚀刻速率,高于对鳍状物52的材料的蚀刻速率。举例来说,化学氧化物的移除方法采用合适的蚀刻制程,其可采用稀释氢氟酸。
搭配图2至6说明的制程仅为如何形成鳍状物52的一例。在一些实施例中,鳍状物的形成方法可为外延成长制程。举例来说,可形成介电层于基板50的上表面上,并蚀刻穿过介电层以形成露出下方基板50的沟槽。可外延成长同质外延结构于沟槽中并使介电层凹陷,因此同质外延结构自介电层凸起以形成鳍状物。此外,一些实施例的鳍状物52可采用异质外延结构。举例来说,可使图5中的鳍状物52凹陷,并可外延成长不同于鳍状物52的材料于凹陷的鳍状物52上。在这些实施例中,鳍状物52包括凹陷的材料,以及位于凹陷的材料上的外延成长材料。在另一实施例中,介电层可形成于基板50的上表面上,并可蚀刻穿过介电层以形成沟槽。接着可采用不同于基板50的材料,外延成长异质外延结构于沟槽中,并使介电层凹陷,使异质外延结构自介电层凸起以形成鳍状物52。在一些实施例中,外延成长均质外延或异质外延结构。在外延成长时可原位掺杂材料,以省略之前或之后的布植。不过原位掺杂与布植掺杂可一起使用。
此外,外延成长于区域50N(如n型金属氧化物半导体区)的材料,不同于外延成长于区域50P(如p型金属氧化物半导体区)的材料可能有利。在多种实施例中,鳍状物52的上侧部分的组成可为硅锗(SixGe1-x,其中x 可为0至1)、碳化硅、纯或实质上纯锗、III-V族半导体化合物、II-VI族半导体化合物、或类似物。举例来说,形成III-V族半导体化合物的可行材料包括但不限于砷化铟、砷化铝、砷化镓、磷化铟、氮化镓、砷化铟镓、砷化铝铟、锑化镓、锑化铝、磷化铝、磷化镓、或类似物。
在图6中,可形成合适的井(未图示)于鳍状物52及/或基板50中。在一些实施例中,p型井可形成于区域50N中,而n型井可形成于区域50P 中。在一些实施例中,p型井或n型井可形成于区域50N及区域50P中。
在不同型态的井的实施例中,可采用光刻胶或其他遮罩(未图示)达到区域50N与区域50P所用的不同布植步骤。举例来说,可形成光刻胶于区域 50N中的鳍状物52与浅沟槽隔离区56上。图案化光刻胶以露出基板50的区域50P,比如p型金属氧化物半导体区。可采用旋转涂布技术形成光刻胶,并可采用可接受的光微影技术图案化光刻胶。一旦图案化光刻胶,可在区域 50P中进行n型杂质的布植,而光刻胶可作为遮罩以实质上避免n型杂质布植至区域50N(如n型金属氧化物半导体区)中。n型杂质可为磷,砷、或类似物,其布植至区域中的浓度小于或等于1018cm-3,比如介于约1017cm-3至约1018cm-3之间。在布植后可移除光刻胶,且移除方法可为可接受的灰化制程。
在布植区域50P之后,可形成光刻胶于区域50P中的鳍状物52与浅沟槽隔离区56上。图案化光刻胶以露出基板50的区域50N,比如n型金属氧化物半导体区。可采用旋转涂布技术形成光刻胶,并采用可接受的光微影技术图案化光刻胶。一旦图案化光刻胶,可在区域50N中进行p型杂质布植,而光刻胶可作为遮罩以实质上避免p型杂质布植至区域50P(如p型金属氧化物半导体区)中。p型杂质可为硼、二氟化硼、或类似物,其布植于区域中的浓度可小于或等于1018cm-3,比如介于约1017cm-3至约1018cm-3之间。在布植之后可移除光刻胶,且移除方法为可接受的灰化制程。
在布植区域50N与区域50P之后,可进行退火以活化布植的p型及/或 n型杂质。在一些实施例中,可在成长外延鳍状物的材料时进行原位掺杂,其可省略布植。不过仍可一起采用原位掺杂与布植掺杂。
在图7中,虚置介电层60形成于鳍状物52上。举例来说,虚置介电层 60可为氧化硅、氮化硅、上述的组合、或类似物,且其形成方法可为依据可接受的技术的沉积或热成长。虚置栅极层62形成于虚置介电层60上,而遮罩层64形成于虚置栅极层62上。可沉积虚置栅极层62于虚置介电层60上,接着平坦化(如化学机械研磨)虚置栅极层62。可沉积遮罩层64于虚置栅极层62上。虚置栅极层62可为导电材料,其可包含多晶硅、多晶硅锗、金属氮化物、金属硅化物、金属氧化物、或金属。在一实施例中,沉积并再结晶非晶硅以产生多晶硅。虚置栅极层62的沉积方法可为物理气相沉积、化学气相沉积、溅镀沉积、或本技术领域用于沉积导电材料的已知其他技术。虚置栅极层62的组成可为其他材料,其对蚀刻隔离区的步骤具有高蚀刻选择性。举例来说,遮罩层64可包含氮化硅、氮氧化硅、或类似物。在此例中,单一的虚置栅极层62与单一的遮罩层64形成于整个区域50N及区域 50P中。在一些实施例中,分开的虚置栅极层可形成于区域50N与区域50P 中,而分开的遮罩层可形成于区域50N与区域50P中。值得注意的是,虚置介电层60只覆盖鳍状物52的状况仅用于说明目的。在一些实施例中,可沉积虚置介电层60,使虚置介电层60覆盖浅沟槽隔离区56,以延伸于虚置栅极层62及浅沟槽隔离区56之间。
图8A至19B显示形成实施例的装置的多种额外步骤。图8A至19B显示区域50N与区域50P中的结构。举例来说,图8A至19B所示的结构可实施于区域50N与区域50P。若区域50N与区域50P的结构具有任何差异,将搭配附图说明。
在图8A与8B中,可采用可接受的光微影与蚀刻技术图案化遮罩层64,以形成遮罩74。接着可将遮罩74的图案转移至虚置栅极层62。在一些实施例中(未图示),亦可采用可接受的蚀刻技术将遮罩74的图案转移至虚置介电层60,以形成虚置栅极72。虚置栅极72覆盖鳍状物52的个别通道区 58。遮罩74的图案可用于使相邻的虚置栅极72彼此物理分隔。虚置栅极72 的纵向亦可实质上垂直于个别外延的鳍状物52的纵向。
在图8A与8B中,可形成栅极密封间隔物80于虚置栅极72、遮罩74、及/或鳍状物52的露出表面上。热氧化或沉积后可进行非等向蚀刻,以形成栅极密封间隔物80。
在形成栅极密封间隔物80之后,可进行轻掺杂源极/漏极区(未图示) 所用的布植。在不同装置型态的实施例中,与图6中所述的布植类似,可形成遮罩如光刻胶于区域50N上并露出区域50P,且可布植合适型态(如n型或p型)的杂质至区域50P中露出的鳍状物52中。接着可移除遮罩。之后可形成遮罩如光刻胶于区域50P上并露出区域50N,且可布植合适种类的杂质至区域50N中露出的鳍状物52中。接着可移除遮罩。n型杂质可为前述的任何n型杂质,而p型杂质可为前述的任何p型杂质。轻掺杂源极/漏极区的杂质浓度可介于约1015cm-3至约1016cm-3之间。可采用退火以活化布植的杂质。
在图9A与9B中,栅极间隔物86形成于沿着虚置栅极72及遮罩74的侧壁的栅极密封间隔物80上。栅极间隔物86的形成方法可为顺应性沉积绝缘材料,之后非等向蚀刻绝缘材料。在一些实施例中,栅极间隔物86的绝缘材料可为低介电常数的介电材料,比如磷硅酸盐玻璃、硼磷硅酸盐玻璃、氟化硅酸盐玻璃、碳氧化硅、碳氮氧化硅、碳硅材料、上述的化合物、上述的复合物、上述的组合、或类似物,且其形成方法可为任何合适方法如化学气相沉积、等离子体增强化学气相沉积、原子层沉积、热原子层沉积、等离子体增强原子层沉积、或类似方法。适用于低介电常数的介电层的材料,其介电常数介于约2至6之间。在一些实施例中,栅极间隔物86的厚度可介于约1nm至约9nm之间,比如约4nm或5nm,但亦可实施其他尺寸。在一些实施例中,栅极间隔物86的组成可为多个低介电常数层,比如两层或更多层。
在一些实施例中,在蚀刻栅极间隔物86之前,形成虚置侧壁间隔物86t 于栅极间隔物86、虚置栅极72、遮罩74、绝缘材料54、与鳍状物52上。虚置侧壁间隔物86t的形成方法可为顺应性地沉积绝缘材料。之后可非等向蚀刻虚置侧壁间隔物86t的绝缘材料,以移除虚置侧壁间隔物86t的水平部分。在蚀刻虚置侧壁间隔物86t之后,可接着非等向蚀刻栅极间隔物86的绝缘材料,以形成L形的栅极结构物86。在蚀刻栅极间隔物86时,虚置侧壁间隔物86t保留于栅极间隔物86的底部的水平部分上。虚置侧壁间隔物86t 的绝缘材料可为氮化硅、碳化硅、上述的组合、或类似物,且其形成方法可为任何合适方法如化学气相沉积、等离子体增强化学气相沉积、原子层沉积、热原子层沉积、等离子体增强原子层沉积、或类似方法。虚置侧壁间隔物86t 在后续形成外延的源极/漏极区时,可作为保护栅极间隔物86的临时结构。在一些实施例中,虚置侧壁间隔物86t的绝缘材料可为氧化硅,其形成方法可采用远端等离子体氧化物技术,比如关于主要侧壁氧化物96的下述详细内容。
在图10A与10B中,外延的源极/漏极区82形成于鳍状物52中,以施加应力至个别通道区58中,进而改善效能。外延的源极/漏极区82形成于鳍状物52中,使每一虚置栅极72位于个别且相邻的一对外延的源极/漏极区 82之间。在一些实施例中,外延的源极/漏极区82可延伸至鳍状物52中。在一些实施例中,栅极间隔物86用于使外延的源极/漏极区82与虚置栅极分隔合适的横向距离,以避免外延的源极/漏极区82向外短接至最终鳍状场效晶体管的后续形成的栅极。在形成外延的源极/漏极区82之后,可采用合适的湿式蚀刻清洁制程(对虚置侧壁间隔物86t的材料具有选择性)移除虚置侧壁间隔物86t。
区域50N(如n型金属氧化物半导体区)中外延的源极/漏极区82的形成方法,可为遮罩区域50P(如p型金属氧化物半导体区),并蚀刻区域 50N中的鳍状物52的源极/漏极区,以形成凹陷于鳍状物52中。接着外延成长区域50N中的外延的源极/漏极区82于凹陷中。外延的源极/漏极区82可包含任何可接受的材料,比如适用于n型鳍状场效晶体管的材料。举例来说,若鳍状物52为硅,则区域50N中外延的源极/漏极区82可包含施加拉伸应力至通道区58中的材料,比如硅、碳化硅、碳磷化硅、磷化硅、或类似物。区域50N中的外延的源极/漏极区可具有自鳍状物52的个别表面隆起的表面,且可具有晶面。
区域50P(如p型金属氧化物半导体区)中的外延的源极/漏极区82的形成方法,可为遮罩区域50N(如n型金属氧化物半导体区),并蚀刻区域 50P中的鳍状物52的源极/漏极区,以形成凹陷于鳍状物52中。接着外延成长区域50P中的外延的源极/漏极区82于凹陷中。外延的源极/漏极区82可包含任何可接受的材料,比如适用于p型鳍状场效晶体管的材料。举例来说,若鳍状物52为硅,则区域50P中外延的源极/漏极区82可包含施加压缩应力于通道区58中的材料如硅锗、硼化硅锗、锗、锗锡、或类似物。区域50P 中的外延的源极/漏极区82的表面可自鳍状物52的个别表面隆起,且可具有晶面。
用于形成外延的源极/漏极区82于区域50N及区域50P中的外延制程,使外延的源极/漏极区的上表面具有晶面,其横向地向外延伸超出鳍状物52 的侧壁。在一些实施例中,这些晶面造成相同的鳍状场效晶体管的相邻的外延的源极/漏极区82合并,如图10C所示。在其他实施例中,完成外延制程之后的相邻的外延的源极/漏极区82维持分开,如图10D所示。
在图11A与11B中,以远端等离子体制程95形成主要侧壁氧化物96 于栅极间隔物86与外延的源极/漏极区82上。在布植杂质或掺质至源极/漏极区82中的后续布植制程时,主要侧壁氧化物96可用于保护栅极间隔物86 与虚置栅极72。在一些实施例中,可顺应性地形成主要侧壁氧化物96于栅极间隔物86及外延的源极/漏极区82上。在其他实施例中,可毯覆性地形成主要侧壁氧化物96于栅极间隔物86及外延的源极/漏极区82上。在一些实施例中,除了移除虚置侧壁间隔物86t之外,虚置侧壁间隔物86t可作为主要侧壁氧化物96。然而这些实施例中的虚置侧壁间隔物86t的形成方法采用形成主要侧壁氧化物96的技术如下述。
主要侧壁氧化物96的形成方法可采用远端等离子体制程95,而非可能损伤栅极间隔物86的低介电常数材料的直接沉积技术。远端等离子体制程95所用的远端等离子体源的细节将搭配图20至22说明如下。远端等离子体源可用于产生制程气体(如反应物气体,例如氧气)的远端等离子体。在一些实施例中,可采用其他制程气体如一氧化二氮、氨、上述的组合、或类似物。此外亦可存在其他气体如氩气。制程气体的自由基可能量化并撞击注入制程腔室的前驱物。当自由基撞击前驱物,则产生反应并形成氧化物网状物。此氧化物网状物变成主要侧壁氧化物96。举例来说,氧化物网状物包括氧化硅,其前驱物的候选可包含四甲氧基硅烷、四乙氧基硅烷、二甲氧基二甲基硅烷、甲基三甲氧基硅烷、乙基三甲氧基硅烷、乙烯基三甲氧基硅烷、双(三甲氧基硅烷基)乙烷、三硅烷基胺、或上述的组合(见图22)。当氧化物网状物包括另一氧化物,可由类似方式采用其他合适的候选前驱物,如此处所述。
在一些实施例中,当制程气体的自由基撞击前驱物时,可形成氮化物网状物或氮氧化物网状物,端视采用的制程气体与前驱物而定。制程气体的自由基撞击前驱物会造成反应,形成氮化物网状物或氮氧化物网状物,其将转变为侧壁且与主要侧壁氧化物96的功能类似。举例来说,当制程气体包括氨或一氧化二氮时,则可自合适的前驱物形成氮化物及/或氮氧化物。氨或一氧化二氮可解离成氧的自由基(O*)、NO的自由基(NO*)、及/或NHx的自由基(NHx*)。
举例来说,当前驱物为四甲氧基硅烷时,氧气等离子体的氧自由基O* 与四甲氧基硅烷反应,而能量转移造成下述反应:
Si(OCH3)4+O*→SiO2+副产物
如上式所示,产生二氧化硅与副产物。举例来说,副产物可包含甲醇、CH2O、乙烯、一氧化碳、氢气、水、或类似物。此外亦可能残留前驱物的未反应部分。大部分的副产物与前驱物的未反应部分可由排气系统抽出腔室。然而一些副产物可能包含于主要侧壁氧化物96的膜组成中。其他候选前驱物可造成类似反应。
在另一例中,制程气体包括氨或一氧化二氮,氨或氮气可解离成自由基 O*、NO自由基(NO*)、及/或NHx自由基(NHx*)。当前驱物气体为三硅烷基氨时,反应会使三硅烷基氨的一个、两个、或三个氮-硅键断裂,使氧自由基O*键结至硅,造成连锁反应并形成氮氧化物网状物。
远端等离子体源采用的射频功率可介于约1000瓦至约10000瓦之间,以诱发并维持制程气体(如氧气)的远端等离子体于制程腔室中(见图20 至21)。制程腔室的腔室压力可介于约0.5Torr至约5Torr之间,比如约1Torr。在一些实施例中,沉积制程可历时约5秒至约100秒,比如约10秒至30秒。制程温度可维持在约40℃至约90℃之间。可改变其他制程条件如候选前驱物的流速与泵入速度、沉积之前与之后的闲置时间、紫外线硬化制程时间、剂量、与类似参数如所需参数,以达所需的沉积轮廓。在一些实施例中,前驱物的流速或剂量介于约200sccm至约900sccm之间,比如约500sccm。制程气体的流速或剂量可介于约100sccm至约600sccm之间,比如约300sccm。可维持前驱物与制程气体的泵入速度,以维持固定压力。举例来说,可依据腔室压力以节流阀控制泵浦的泵入速度。在沉积之前或之后的闲置时间可介于约10秒至约120秒之间,比如约30秒。紫外线硬化制程时间可介于约30 秒至约600秒之间,比如约150秒。紫外线硬化可促进硅-氧键,而较长时间的紫外线硬化通常形成较致密的氧化物网状物。载气或钝气的流速或剂量可介于约1000sccm至约30000sccm之间,比如约5000sccm。可实施合适的制程条件的其他数值。在一些实施例中,前驱物反应气体与可用自由基之间的比例可介于约2至1之间。较高比例的前驱物反应气体可提供较少的未反应氧自由基。未反应氧自由基会抵达栅极间隔物86的低介电常数材料并与其反应,进而损伤栅极间隔物86。
在一些实施例中,制程腔室(见图20)可包含远端等离子体源,其与包含区域50N及/或区域50P的工件(见图7)之间隔有具备开口形成其中的气体分布板,以自制程腔室的上侧腔室提供远端等离子体至制程腔室的下侧腔室。因此通过插入气体分布板,可让工件在远端等离子体的直线之外。气体分布板可使自由基自上侧腔室扩散至下侧腔室,以减少下侧腔室中可用自由基的数目及/或强度。可将候选的前驱物注入下侧腔室中。这将进一步详述于下。
在一些实施例中,制程腔室(见图21)可包含远端等离子体源,其与制程腔室相邻。产生远端等离子体后,经由等离子体转移腔室提供至容纳工件的制程腔室中,且工件包括区域50N及/或区域50P(见图7)。工件在远端等离子体的直线之外。可在靠近等离子体产生处,沿着等离子体转移腔室、或在制程腔室中注入候选的前驱物。在一些实施例中,气体分布板亦可用于远端等离子体源与制程腔室之间。此将详述于下。
在实施例的制程中,由于等离子体源为远端氧等离子体,栅极间隔物 86的低介电常数材料可实质上维持完整(或不变)。而不被氧等离子体氧化或被其他沉积制程所需的较高热分解。换言之,在形成主要侧壁氧化物96 之前与之后的栅极间隔物86的材料组成实质上相同。可调整制程参数如温度、压力、流速、泵入速度、闲置时间、紫外线硬化制程时间、剂量、与类似制程如上述,以改变主要侧壁氧化物96的形成方法。前驱物的其他变数可为气体比例、流入顺序、以及类似变数。
如图12A与12B所示,在形成主要侧壁氧化物96之后,可采用合适技术蚀刻主要侧壁氧化物96,比如采用合适的光微影技术图案化主要侧壁氧化物96,以露出外延的源极/漏极区82。露出的外延的源极/漏极区82及/或鳍状物52可布植掺质,其与搭配图8A与8B说明的前述制程(用于形成轻掺杂源极/漏极区)类似。之后进行退火以活化掺质。主要侧壁氧化物96可保护栅极间隔物86免于图案化制程的遮罩材料及/或布植。源极/漏极区所用的 n型及/或p型杂质可为前述的任何杂质。在一些实施例中,在成长外延的源极/漏极区82时可进行原位掺杂。
在图13A与13B中,在布植与活化掺质之后可移除主要侧壁氧化物96,且移除方法可为任何合适制程如采用任何合适清洁剂的标准清洁制程。清洁剂可为去离子水、稀释氢氟酸、硫酸、过氧化氢、类似物、或上述的组合。由于形成主要侧壁氧化物96的制程不会损伤或氧化栅极间隔物86的低介电常数材料,移除主要侧壁氧化物96时可保留而不明显损伤栅极间隔物86的低介电常数材料。若以其他技术形成主要侧壁氧化物96,则栅极间隔物86 的损伤及/或氧化低介电常数材料可能损害栅极间隔物86,因此移除主要侧壁氧化物96时会顺便移除一些或所有的栅极间隔物86。相反地,由于主要侧壁氧化物96的形成方法为上述的远端氧等离子体制程,可在移除主要侧壁氧化物96时避免或减少栅极间隔物86的损伤,使栅极间隔物86实质上完整而不损伤。举例来说,一些实施例在移除主要侧壁氧化物96之后的栅极间隔物86的厚度,可与形成主要侧壁氧化物96之前的栅极间隔物86的厚度相同。在一些实施例中,在移除主要侧壁氧化物96之后的栅极间隔物 86的厚度,可大于形成主要侧壁氧化物96之后的栅极间隔物86的厚度的 95%,比如介于95%至100%之间。换言之,通过移除主要侧壁氧化物96,栅极间隔物86的厚度的减少量可小于5%,比如介于0%至5%之间。此外亦可进行一或多道额外清洁制程。举例来说,包含区域50N及/或区域50P的工件可为晶圆,且可在晶圆上进行多种清洁制程如斜向清洁制程。
在图14A与14B中,依照搭配图11A与11B说明的制程沉积第一层间介电层88于结构上。第一层间介电层88的组成可为介电材料,且其沉积方法可为任何合适方法如化学气相沉积、等离子体增强化学气相沉积、或可流动的化学气相沉积。介电材料可包含磷硅酸盐玻璃、硼硅酸盐玻璃、未掺杂的硅酸盐玻璃、或类似物。半导体材料可包含非晶硅、硅锗(SixGe1-x,其中 x可为近似0至1)、纯锗、或类似物。此外亦可采用任何可接受的制程所形成的其他绝缘或半导体材料。在一些实施例中,接点蚀刻停止层87位于第一层间介电层88与外延的源极/漏极区82、遮罩74、及栅极间隔物86之间。接点蚀刻停止层87可包含介电材料,比如氮化硅、氧化硅、氮氧化硅、或类似物,其蚀刻选择性不同于上方的第一层间介电层88的材料的蚀刻选择性。
在图15A与15B中,可进行平坦化制程如化学机械研磨,使第一层间介电层88及虚置栅极72的上表面齐平。平坦化制程亦可移除虚置栅极72 上的遮罩74,以及沿着遮罩74的侧壁的栅极密封间隔物80与栅极间隔物 86的部分。在平坦化制程之后,虚置栅极72、栅极密封间隔物80、栅极间隔物86、与第一层间介电层88的上表面齐平。综上所述,虚置栅极72的上表面自第一层介电层88露出。
在图16A与16B中,在蚀刻步骤中移除虚置栅极72,以形成凹陷90。亦可移除凹陷90中的虚置介电层60的部分。在一些实施例中,只移除虚置栅极72并保留虚置介电层60,且凹陷90露出虚置介电层60。在一些实施例中,自晶粒的第一区(如核心逻辑区)中的凹陷90移除虚置介电层60,并保留晶粒的第二区(如输入/输出区)中的凹陷90内的虚置介电层60。在一些实施例中,以非等向干蚀刻制程移除虚置栅极72。举例来说,蚀刻制程可包含干蚀刻制程,其采用的反应气体可选择性地蚀刻虚置栅极72而不蚀刻第一层间介电层88或栅极间隔物86。每一凹陷90露出个别鳍状物52的通道区58。每一通道区58位于相邻的一对外延的源极/漏极区82之间。在移除虚置栅极72的蚀刻步骤时,虚置介电层60可作为蚀刻停止层。在移除虚置栅极72之后,可接着视情况移除虚置介电层60。
在图17A与17B中,形成栅极介电层92与栅极94以用于置换栅极。图17C显示图17B的区域89的细节图。栅极介电层92可顺应性地沉积于凹陷90中,比如沉积于鳍状物52的上表面与侧壁上以及栅极密封间隔物80 (或栅极间隔物86)的侧壁上。栅极介电层92亦可形成于第一层间介电层 88的上表面上。在一些实施例中,栅极介电层92包括氧化硅、氮化硅、或上述的多层。在一些实施例中,栅极介电层92为高介电常数的介电材料。在这些实施例中,栅极介电层92的介电常数大于约7.0,且可包含铪、铝、锆、镧、镁、钡、钛、铅、或上述的组合的金属氧化物或金属硅酸盐。栅极介电层92的形成方法可包括分子束沉积、原子层沉积、等离子体增强化学气相沉积、或类似方法。在虚置介电层60的部分保留于凹陷90中的实施例,栅极介电层92包含虚置介电层60的材料如氧化硅。
栅极94沉积于栅极介电层92上,并填入凹陷90的其余部分。栅极94 可为含金属材料如氮化钛、氧化钛、氮化钽、碳化钽、钴、钌、铝、钨、上述的组合、或上述的多层。举例来说,虽然图17B所示的栅极94为单层,栅极94可包含任何数目的衬垫层94A、任何数目的功函数调整层94B、与填充材料94C,如图17C所示。在填入栅极94之后,可进行平坦化制程如化学机械研磨,以移除第一层间介电层88的上表面上的栅极介电层92与栅极 94的多余部分。栅极94与栅极介电层92的材料的保留部分,形成最终鳍状场效晶体管的置换栅极。栅极94与栅极介电层92可一起称作栅极堆叠。栅极与栅极堆叠可沿着鳍状物52的通道区58的侧壁延伸。
可同时形成栅极介电层92于区域50N及区域50P中,使每一区中的栅极介电层92的组成为相同材料。亦可同时形成栅极94,使每一区中的栅极 94的组成为相同材料。在一些实施例中,每一区中的栅极介电层92可由分开制程形成,使每一区的栅极介电层92为不同材料;及/或每一区中的栅极 94可由分开制程形成,使每一区的栅极94为不同材料。在采用分开的制程时,多种遮罩步骤可用于遮罩并露出合适区域。
在图18A与18B中,第二层间介电层108沉积于第一层间介电层88上。在一实施例中,第二层间介电层108为可流动的化学气相沉积法所形成的可流动膜。在一些实施例中,第二层间介电层108的组成为介电材料,比如磷硅酸盐玻璃、硼硅酸盐玻璃、硼磷硅酸盐玻璃、未掺杂的硅酸盐玻璃、或类似物,且其沉积方法可为任何合适方法如化学气相沉积或等离子体增强化学气相沉积。
在图19A与19B中,一些实施例形成栅极接点110与源极/漏极接点112 以穿过第二层间介电层108与第一层间介电层88。形成穿过第一层间介电层 88与第二层间介电层108的开口以用于源极/漏极接点112,并形成穿过第二层间介电层108的开口以用于栅极接点110。开口的形成方法可采用可接受的光微影与蚀刻技术。衬垫层(如扩散阻障层、粘着层、或类似物)与导电材料形成于开口中。衬垫层可包含钛、氮化钛、钽、氮化钽、或类似物。导电材料可为铜、铜合金、银、金、钨、钴、铝、镍、或类似物。可进行平坦化制程以自第二层间介电层108的表面移除多余材料。保留的衬垫层与导电材料形成源极/漏极接点112及栅极接点110于开口中。可进行退火制程以形成硅化物于外延的源极/漏极区82与源极/漏极接胆112之间的界面。源极/ 漏极接点112物理与电性耦接至外延的源极/漏极区82,而栅极接点110物理与电性耦接至栅极。源极/漏极接点112与栅极接点110可由不同制程形成,或者由相同制程形成。虽然附图中的栅极接点110与源极/漏极接点112形成于相同剖面中,但应理解其可形成于不同剖面中以避免接点短路。
图20与21是一些实施例中,用于对区域50N及/或区域50P进行制程的制程腔室。如图20所示,制程腔室200包含远端等离子体源205。远端等离子体源205位于制程腔室200的上侧腔室210中。远端等离子体源205设定为自制程气体G1产生等离子体。制程气体G1可由气体供应器235注入上侧腔室210。可采用任何合适的制程气体,比如搭配图11A与11B说明的上述内容。以远端等离子体源205产生等离子体时,在上侧腔室210产生制程气体G1的自由基G1*,并以等离子体转移腔室245将自由基G1*转移至下侧腔室220。
制程腔室200可包含气体分布板215位于等离子体转移腔室245与制程腔室200的下侧腔室220之间,使自由基G1*的部分在直线之外,且工件225 位于下侧腔室220的基座230上。气体分布板215可位于下侧腔室220中,以将下侧腔室220隔成上侧部分212与下侧部分214(后续反应发生处)。气体分布板215含有孔洞216位于其中,其可让制程气体G1的自由基G1* 的部分自上侧腔室移动至下侧腔室220。气体分布板215可接地。一些自由基G1*会撞击气体分布板215而转变为去能量化。一些自由基G1*会穿过空洞216至下侧腔室220。
通过气体供应器240,可将前驱物气体G2注入下侧腔室220的下侧部分214。可采用任何合适的前驱物气体G2,比如搭配图11A与11B说明的上述内容(且将搭配图22进一步说明如下)。气体供应器240可设置以将前驱物气体G2注入下侧腔室220的一或多处。当自由基G1*接触前驱物气体 G2,自由基G1*的能量会使反应发生,以形成氧化物(如主要侧壁氧化物96) 与副产物。氧化物可收集至位于基座230上的工件225上,以形成氧化物层于其上。由于反应为自由基化的制程气体起始的二次反应,用以形成氧化物层的制程温度可低于以直接化学反应形成氧化物的反应温度。举例来说,制程温度可介于约40℃至约90℃之间。此外,由于自由基化的制程气体先穿过气体分布板,可减少自由基数目,使足够的能量等级可用于自远端等离子体源205产生并维持等离子体,并能控制抵达下侧腔室220及工件225的自由基数目及/或强度。如此一来,在形成主要侧壁氧化物96时可减少等离子体或自由基对工件225的损伤。
在一些实施例中,可垂直移动基座230,使工件225更靠近或更远离气体分布板215,以进一步控制工件225接收的能量。举例来说,当工件225 较靠近气体分布板215时,未反应的自由基G1*到达工件225的可能性更高,其可能损伤工件225的最顶层,比如搭配图11A与11B说明的上述主要侧壁氧化物96。然而工件225较靠近气体分布板215亦会加速沉积氧化物。
如图21所示,制程腔室300包括等离子体源305位于等离子体产生腔室310中。等离子体产生腔室310经由等离子体转移腔室345连接至反应腔室320。等离子体转移腔室345可自等离子体产生腔室310提供等离子体至反应腔室320的一侧中。工件325位于反应腔室320中的基座330上。等离子体源305设置为自制程气体G1产生等离子体。制程气体G1可由气体供应器335注入等离子体产生腔室310中。制程气体G1可包含任何合适的制程气体,比如搭配图17A、17B、与17C说明的上述内容。以等离子体源305 产生等离子体时,在等离子体产生腔室310中产生制程气体G1的自由基G1*。
通过气体供应器340,可将前驱物气体G2注入反应腔室320。前驱物气体G2可包含任何合适气体,比如搭配图11A与11B说明的上述内容。气体供应器340可设置以注入前驱物气体G2至反应腔室320中的一或多处。在一些实施例中,气体供应器340可设置以将前驱物气体G2注入等离子体转移腔室345或等离子体产生腔室310。当自由基G1*经由等离子体转移腔室 345输送至反应腔室320并接触前驱物气体G2,自由基G1*的能量会使反应发生,以形成氧化物与副产物。氧化物可收集至工件325上,以形成氧化物层于其上。由于反应为自由基化的制程气体起始的二次反应,用以形成氧化物层的制程温度可低于以直接化学反应形成氧化物的反应温度。举例来说,制程温度可介于约40℃至约90℃之间。此外,由于自由基化的制程气体并非直线导向工件325,可减少接触工件325的自由基数目(与等离子体源直线导向工件的制程腔室相较)。如此一来,在形成氧化物时可减少等离子体或自由基对工件325的损伤。
在一些实施例中,气体分布板可位于等离子体产生腔室310与反应腔室 320之间。气体分布板可与图20的气体分布板215类似,但可垂直安装。在这些实施例中,气体分布板可进一步控制抵达反应腔室320的等离子体与自由基。
在一些实施例中,可垂直移动基座330,使工件325靠近或远离等离子体转移腔室345,以进一步控制工件325接收的能量,比如搭配图20的基座 230说明的上述内容。
应理解的是,搭配图20与21说明的制程腔室200与300仅用以举例说明远端等离子体系统,其提供来自制程气体自由基的反应,并由物理位置及 /或中介的气体分布板,使工件维持在等离子体与自由基的直线之外。可采用或设置任何合适的制程腔室以达此结果。
图22显示搭配图11A与11B说明的一些上述前驱物气体所用的化学化合物。图22显示一些候选的前驱物气体的化学结构。图22显示(A)四甲氧基硅烷、(B)四乙氧基硅烷、(C)二甲氧基二甲基硅烷、(D)甲基三甲氧基硅烷、(E)乙基三甲氧基硅烷、(F)乙烯基三甲氧基硅烷、(G) 三硅烷基胺、与(H)双(三甲氧基硅烷基)乙烷。亦可采用其他前驱物气体或其组合。如上所述,每一化合物与氧的自由基结合时,可形成氧化硅网状物与副产物(未图示)。
实施例提供氧化物所用的沉积技术,其采用远端产生的等离子体使制程气体的自由基能量化。制程气体的自由基与前驱物气体反应,形成氧化物于工件的区域上。由于以远端等离子体形成氧化物,可减少或消除对氧化物下的层状物(如低介电常数的介电层)的损伤。后续移除氧化物时,下方层状物可维持未损伤的状态。举例来说,远端等离子体沉积技术可用于形成鳍状场效晶体管装置的主要侧壁氧化物、屏蔽氧化物、牺牲氧化物、或阻障氧化物的中间制程。
一实施例的方法包括:形成栅极堆叠于一或多个半导体带状物上。形成栅极密封间隔物以与栅极堆叠的两侧相邻。形成低介电常数的栅极间隔物以与栅极密封间隔物相邻,且低介电常数的栅极间隔物包括一低介电常数的介电材料。以远端氧等离子体源与前驱物气体形成氧化物层于低介电常数的栅极间隔物上。
一些实施例可包括方法的一或多个额外特征。方法亦可包括图案化氧化物层以露出源极/漏极区,以及布植掺质至源极/漏极区中。前驱物气体可包括四甲氧基硅烷、四乙氧基硅烷、二甲氧基二甲基硅烷、甲基三甲氧基硅烷、乙基三甲氧基硅烷、乙烯基三甲氧基硅烷、双(三甲氧基硅烷基)乙烷、三硅烷基氨、或上述的组合。远端氧等离子体源可在制程腔室的上侧腔室中。前驱物气体可注入制程腔室的下侧腔室。上侧腔室与下侧腔室可隔有气体分布板。远端氧等离子体源与制程腔室可隔有等离子体转移腔室。工件包括栅极堆叠,其可位于远端氧等离子体源的直线路径之外。形成氧化物层之后,低介电常数的栅极间隔物实质上不含氧。形成氧化物层之后的低介电常数的栅极间隔物的材料组成,可与形成氧化物层之前的低介电常数的栅极间隔物的材料组成相同。
另一实施例的方法包括:形成虚置栅极结构于一或多个半导体带状物上并与其垂直。形成栅极间隔物于虚置栅极结构的侧壁上,且栅极间隔物包括低介电常数的介电材料。形成虚置间隔物于栅极间隔物上。蚀刻半导体带状物的第一半导体带状物以使其凹陷,且虚置间隔物在蚀刻时保护栅极间隔物。形成源极/漏极材料于凹陷中。移除虚置间隔物。启动远端氧等离子体源。将前驱物注入制程腔室,其中远端氧等离子体源的自由基与前驱物反应形成氧化物层于栅极间隔物上。
一些实施例可包括方法的一或多个额外特征。方法可包括蚀刻氧化物层以移除氧化物层,其中蚀刻氧化物层之前的栅极间隔物具有第一厚度,蚀刻氧化物层之后的栅极间隔物层具有第二厚度,且第二厚度大于95%的第一厚度。在形成氧化物层之后的栅极间隔物可实质上不含氧。形成氧化物层之前的栅极间隔物具有第一材料组成,形成氧化物层之后的栅极间隔物具有第二材料组成,且第一材料组成与第二材料组成可相同。制程腔室与远端氧等离子体源隔有等离子体转移腔室或气体分布板。这些额外特征可结合至上述的其他实施例。
另一实施例的方法包括:形成栅极结构于半导体鳍状物上,且半导体鳍状物位于工件上。方法包括形成低介电常数的间隔物层于栅极结构的两侧上。形成源极/漏极区于半导体鳍状物中以与栅极结构相邻。形成氧化物层于低介电常数的间隔物层上,且布植掺质至半导体鳍状物的源极/漏极区中。氧化物层在布植时保护低介电常数的间隔物层。方法还包括蚀刻氧化物层而不蚀刻低介电常数的间隔物层。
一些实施例可包括方法的一或多个额外特征。蚀刻氧化物层的步骤可包括以稀释氢氟酸湿蚀刻氧化物层。形成氧化物层的步骤可包括自制程腔室远端产生氧等离子体;输送氧等离子体的第一部分至制程腔室;以及提供前驱物气体至制程腔室,使氧等离子体的第一部分与前驱物气体反应形成氧化物层。方法可还包括:形成蚀刻停止层于源极/漏极区上与低介电常数的间隔物层的侧壁上;形成层间介电层于蚀刻停止层上;移除栅极结构的虚置栅极;以及形成置换栅极。形成氧化物层之后的低介电常数的间隔物层的氧化程度小于5%。工件可位于氧等离子体源的直线路径之外。工件与氧等离子体源可隔有气体分布板。这些额外特征可结合至上述的其他实施例。
上述实施例的特征有利于本技术领域中技术人员理解本发明。本技术领域中技术人员应理解可采用本发明作基础,设计并变化其他制程与结构以完成上述实施例的相同目的及/或相同优点。本技术领域中技术人员亦应理解,这些等效置换并未脱离本发明精神与范围,并可在未脱离本发明的精神与范围的前提下进行改变、替换、或变动。

Claims (1)

1.一种半导体装置的形成方法,包括:
形成一栅极堆叠于一或多个半导体带状物上;
形成多个栅极密封间隔物以与该栅极堆叠的两侧相邻;
形成多个低介电常数的栅极间隔物以与所述栅极密封间隔物相邻,且该低介电常数的栅极间隔物包括一低介电常数的介电材料;以及
以一远端氧等离子体源与一前驱物气体形成一氧化物层于该低介电常数的栅极间隔物上。
CN201910445396.3A 2018-07-31 2019-05-27 半导体装置的形成方法 Pending CN110783196A (zh)

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