TWI755338B - 智能電源模組 - Google Patents

智能電源模組 Download PDF

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TWI755338B
TWI755338B TW110122620A TW110122620A TWI755338B TW I755338 B TWI755338 B TW I755338B TW 110122620 A TW110122620 A TW 110122620A TW 110122620 A TW110122620 A TW 110122620A TW I755338 B TWI755338 B TW I755338B
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power module
chip
processing chips
lead frame
intelligent power
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TW202301613A (zh
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林容生
黃志豐
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立錡科技股份有限公司
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Abstract

本發明提出一種智能電源模組，其包含：一導線架(Lead frame)；多個處理晶片，設置於導線架上；至少一橋接晶片(Bridge die)，用於訊號連接多個處理晶片之間；以及一封裝結構，以封裝導線架、處理晶片以及至少一橋接晶片。

Description

智能電源模組
本發明係有關一種智能電源模組，特別是指一種藉由橋接晶片用以訊號連接各處理晶片的智能電源模組。
先前技術中，智能電源模組需處理複雜的訊號接線，例如圖1的智能電源模組10的驅動晶片110與功率晶片115，需與周圍導線架120的接點以及其他晶片，需要大空間的封裝結構130，才夠容置這些元件。智能電源模組10受限於導線架120的結構，無法提供複雜的訊號連線(例如一個驅動晶片110搭配兩個功率晶片115)。圖2中智能電源模組20，包含設置微處理器220的一印刷電路板210，微處理器220所需的連線較多，需搭配印刷電路板210以提供多種不同訊號線路，其線路連接選擇多於圖1的智能電源模組10。其中，智能電源模組20內需預留空間給印刷電路板210，也需預留空間給印刷電路板210的固定支架215，如此智能電源模組20的封裝結構240尺寸十分龐大。此外，因印刷電路板210的生產技術限制，印刷電路板210上銲線W數量多且分散。因此，除了印刷電路板210、固定支架215外，智能電源模組20內更須提供空間給分散設置的銲線W(例如連接印刷電路板210、功率晶片230等)。此外，印刷電路板210的相關製程，也非封裝製程的標準步驟，需與不同廠商、治具、製程搭配，其複雜程度增加許多。
如此，先前技術中各種智能電源模組所需體積較大，其製程複雜，生產品質難控制。如何使智能電源模組體積縮小、簡化其製程、提升生產品質，是很重要的課題。
就其中一個觀點言，本發明提供了一種智能電源模組，以解決前述之困擾，其具有縮小體積、製程簡單、銲線分布集中且理線布局容易、生產品質易控制等優點。此智能電源模組包含：一導線架(Lead frame)；多個處理晶片，設置於導線架上；至少一橋接晶片(Bridge die)，用於訊號連接處理晶片；以及一封裝結構，以封裝導線架、處理晶片以及橋接晶片。
前述的橋接晶片，可用於提供處理晶片間多個通訊線路，提供線路橋接之功能。橋接晶片內的線路，不提供運算功能，即無主動處理訊號的功能。本發明的一些實施例中，在智能電源模組中的封裝結構內，因採用橋接晶片，可不包含印刷電路板。
一實施例中，多個處理晶片可依搭配的橋接晶片進行訊號連接組合。
一實施例中，橋接晶片的應用，可大幅地集中晶片間銲線的布局以及降低理線布局的混亂狀態。如此，本發明所使用的驅動晶片，可不限於單相閘極驅動積體電路，而採用一多相閘極驅動積體電路。
一實施例中，橋接晶片可藉由多個銲線以訊號連接多個處理晶片。相較於先前技術中雜亂的銲線理線布局，本發明中經由橋接晶片的銲線理線布局集中許多，銲線的理線布局複雜度下降。又一實施例中，封裝結構包覆的導線架的部分中包含多個內接點，內接點藉由銲線以連接處理晶片、橋接晶片、或導線架。此外，除了銲線以外，橋接晶片也可藉由多個矽通道以訊號連接處理晶片。
導線架於該封裝結構外的部分，具有多個外接點，用以傳遞晶片與智能電源模組外部間的訊號。
底下藉由具體實施例詳加說明，當更容易瞭解本發明之目的、技術內容、特點及其所達成之功效。
本發明中的圖式均屬示意，主要意在表示各電路組成部分間之相互關係，至於形狀與尺寸則並未依照比例繪製。
就其中一個觀點言，圖3中顯示本發明的一種智能電源模組30，具有體積小、製程簡單、銲線W分布集中且理線布局容易等優點。其中，智能電源模組30包含：一導線架310(Lead frame)；多個處理晶片320、325、327(圖3顯示多個處理晶片，若需要，智能電源模組也可僅包含兩個處理晶片)，設置於導線架310上；至少一橋接晶片330 (Bridge die)，用於訊號連接其中的處理晶片320、325、327；以及一封裝結構340，封裝結構340封裝導線架310、處理晶片320以及橋接晶片330。重要地，圖3僅用於舉例說明，而非限制本發明之技術內容。其中各實施例，請參照其中之說明，而不必限制於圖3中繪示的各元件關係。
前述的橋接晶片330，可為半導體製程所製作的晶片，其中可具有單層或多層電路的線路。單層或多層電路可用於提供處理晶片320、325、327間多個通訊線路，即作為線路橋接之用，如此可省略、簡化或取代先前技術中智能電源模組的印刷電路板，提升智能電源模組內空間使用效率以及銲線W連接的理線布局。橋接晶片330內的線路，不提供運算功能，即無主動處理訊號的功能，僅提供連接與傳遞訊號。換言之，本發明的一些實施例中，在智能電源模組330中採用橋接晶片330，雖省略印刷電路板，卻具有較好的空間使用效率以及理線效果。
前述的實施例中，智能電源模組30不需要容置印刷電路板，可進一步省略容置印刷電路板的固定支架的龐大空間、以及減少散布各處的銲線W所需的空間等，如此可大幅降低智能電源模組30的封裝尺寸。
一實施例中，處理晶片的組合，可依主控制晶片與搭配的功能晶片進行訊號連接組合。例如，主控制晶片為微處理器(MCU)，搭配的功能晶片為驅動晶片、功率晶片的組合。又例如，參照圖3，主控制晶片為微處理器320與驅動晶片325，搭配的功能晶片為功率晶片327。處理晶片的組合，端視需要而定，也可為其他處理晶片的組合，無須受限於圖3中所示的元件或元件數量。
一實施例中，處理晶片也可包含不同的半導體製程，包含：絕緣閘雙極電晶體(IGBT)、金氧半場效電晶體(MOSFET)、或碳化矽(SiC)製程等。若需要，任何適用於本發明半導體的設計方式，藉可應用於本發明的智能電源模組。
參照圖3，本發明中橋接晶片330的應用，可大幅地提升晶片間銲線W的理線布局簡易度。若需要，更可以降低所需銲線W的數量。一實施例中，本發明所使用的驅動晶片325，可不限於單相閘極驅動積體電路，也可根據合併多個單相閘極驅動積體電路的方式，採用一多相閘極驅動積體電路，例如三相閘極驅動積體電路(Three phase gate driver IC)。如此的晶片功能合併，可降低驅動晶片325所需空間，並藉由橋接晶片330集中銲線W的理線布局，進一步降低智能電源模組30的封裝尺寸。或者，與先前技術相比，相同的封裝尺寸中，本發明的智能電源模組30可具有更多的功能。此外，橋接晶片330中單層或多層積體電路，藉由銲墊以及用於訊號連接銲墊的銲線W，與處理晶片320、325、327或導線架310進行訊號連接。
一實施例中，因橋接晶片330的使用，使搭配功率晶片327的驅動晶片325數量減少，提升智能電源模組30內部的空間使用率。例如，先前技術的圖1中三個驅動晶片110搭配六組功率晶片115，而本發明的一個驅動晶片325搭配六組功率晶片327，如此可大幅提高空間使用率。然而，搭配功率晶片327的驅動晶片，可不限於圖3中所示，可依需要而改變其設計或數量。
參照圖3，一些實施例中，橋接晶片330可藉由多個銲線W以訊號連接多個處理晶片，使銲線W集中在橋接晶片330附近(例如圖3中銲線布線集中區C)。相較於先前技術中銲線W理線布局的雜亂，本發明中經由橋接晶片330使銲線W的理線布局集中許多，銲線W的理線布局也隨之簡單許多。
一實施例中，封裝結構340包覆的導線架310的部分中包含多個內接點312，內接點312藉由銲線W以連接處理晶片320、325、327或橋接晶片330。一實施例中，除了銲線W以外，橋接晶片330也可選擇藉由矽通道以訊號連接處理晶片320、325、或327，如此可進一步縮減銲線W的數量。前述的內接點312，導線架310於封裝結構外，可具有多個外接點314。處理晶片320藉由內接點312與外接點314，與智能電源模組30外進行訊號傳遞。
以上已針對實施例來說明本發明，唯以上所述者，僅係為使熟悉本技術者易於了解本發明的內容而已，並非用來限定本發明之權利範圍。在本發明之相同精神下，熟悉本技術者可以思及各種等效變化，例如晶片、內外接點、或銲線的數量、相對位置與設計。本發明的範圍應涵蓋上述及其他所有等效變化。
10,20,30:智能電源模組 110:驅動晶片 115:功率晶片 120:導線架 130:封裝結構 210:印刷電路板 215: 固定支架 220:微處理器 230: 功率晶片 240:封裝結構 310:導線架 312:內接點 314:外接點 320:微處理器 325:驅動晶片 327:功率晶片 330:橋接晶片 340:封裝結構 C:銲線布線集中區 W:銲線
圖1、2顯示先前技術中智能電源模組的示意圖。 圖3顯示根據本發明的智能電源模組的示意圖。
30:智能電源模組
310:導線架
312:內接點
314:外接點
320:微處理器
325:驅動晶片
327:功率晶片
330:橋接晶片
340:封裝結構
C:銲線布線集中區
W:銲線

Claims (10)

  1. 一種智能電源模組，包含： 一導線架(Lead frame)； 多個處理晶片，設置於該導線架(Lead frame)上； 至少一橋接晶片(Bridge die)，用於訊號連接該些處理晶片之間；以及 一封裝結構，以封裝該導線架、該些處理晶片以及該至少一橋接晶片。
  2. 如請求項1所述之智能電源模組，其中該橋接晶片具有多層的電路結構，其包含該些處理晶片間的多個通訊線路。
  3. 如請求項1所述之智能電源模組，其中該些處理晶片不直接訊號連接於一印刷電路板(PCB)上。
  4. 如請求項1所述之智能電源模組，其中該些處理晶片包含微處理器(MCU)、驅動晶片、功率晶片的組合。
  5. 如請求項4所述之智能電源模組，其中該驅動晶片包含一三相閘極驅動積體電路。
  6. 如請求項1所述之智能電源模組，其中該橋接晶片藉由多個銲線以訊號連接該些處理晶片與該導線架。
  7. 如請求項6所述之智能電源模組，其中該封裝結構包覆的該導線架的部分中包含多個內接點，該些處理晶片或該橋接晶片藉由至少一該銲線以訊號連接該些內接點中至少其一。
  8. 如請求項1所述之智能電源模組，其中該些處理晶片的半導體製程包含：絕緣閘雙極電晶體(IGBT)、金氧半場效電晶體(MOSFET)、或碳化矽(SiC)製程。
  9. 如請求項1所述之智能電源模組，其中該導線架於該封裝結構外的部分，具有多個外接點，該些處理晶片藉由該些外接點以訊號連接至該智能電源模組外。
  10. 如請求項1所述之智能電源模組，其中該至少一橋接晶片包含半導體製程所製作的單層或多層電路，該橋接晶片中包含銲墊，該智能電源模組包含訊號連接該銲墊與該些處理晶片的銲線。
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US20210098448A1 (en) * 2019-09-27 2021-04-01 Alpha And Omega Semiconductor International Lp Intelligent power module containing igbt and super-junction mosfet

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