TWI752169B - 蝕刻方法 - Google Patents
蝕刻方法 Download PDFInfo
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- TWI752169B TWI752169B TW107105007A TW107105007A TWI752169B TW I752169 B TWI752169 B TW I752169B TW 107105007 A TW107105007 A TW 107105007A TW 107105007 A TW107105007 A TW 107105007A TW I752169 B TWI752169 B TW I752169B
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- 238000005530 etching Methods 0.000 title claims abstract description 115
- 238000000034 method Methods 0.000 title claims abstract description 26
- 239000000758 substrate Substances 0.000 claims abstract description 123
- 239000003513 alkali Substances 0.000 claims abstract description 56
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims abstract description 24
- 239000001301 oxygen Substances 0.000 claims abstract description 24
- 229910052760 oxygen Inorganic materials 0.000 claims abstract description 24
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 11
- 230000003647 oxidation Effects 0.000 claims abstract description 10
- 238000002844 melting Methods 0.000 claims abstract description 7
- 230000008018 melting Effects 0.000 claims abstract description 7
- HEMHJVSKTPXQMS-UHFFFAOYSA-M Sodium hydroxide Chemical compound [OH-].[Na+] HEMHJVSKTPXQMS-UHFFFAOYSA-M 0.000 claims description 69
- 239000013078 crystal Substances 0.000 claims description 34
- 239000012298 atmosphere Substances 0.000 claims description 18
- 229910010271 silicon carbide Inorganic materials 0.000 description 72
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 71
- 239000010408 film Substances 0.000 description 24
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 15
- 235000012431 wafers Nutrition 0.000 description 15
- 238000007654 immersion Methods 0.000 description 14
- 238000002474 experimental method Methods 0.000 description 10
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- 238000000227 grinding Methods 0.000 description 7
- 238000012986 modification Methods 0.000 description 6
- 230000004048 modification Effects 0.000 description 6
- 229910001873 dinitrogen Inorganic materials 0.000 description 5
- 239000000463 material Substances 0.000 description 5
- 229910052757 nitrogen Inorganic materials 0.000 description 5
- 238000012545 processing Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 5
- KWYUFKZDYYNOTN-UHFFFAOYSA-M Potassium hydroxide Chemical compound [OH-].[K+] KWYUFKZDYYNOTN-UHFFFAOYSA-M 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000007789 gas Substances 0.000 description 4
- 239000007788 liquid Substances 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 230000003746 surface roughness Effects 0.000 description 4
- 229910003460 diamond Inorganic materials 0.000 description 3
- 239000010432 diamond Substances 0.000 description 3
- 238000007598 dipping method Methods 0.000 description 3
- 238000009826 distribution Methods 0.000 description 3
- 230000002349 favourable effect Effects 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 230000004075 alteration Effects 0.000 description 2
- 238000005470 impregnation Methods 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- 238000005259 measurement Methods 0.000 description 2
- 239000010409 thin film Substances 0.000 description 2
- 238000001039 wet etching Methods 0.000 description 2
- 206010065226 Non-dipping Diseases 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 239000000470 constituent Substances 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000011156 evaluation Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000001000 micrograph Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 230000001590 oxidative effect Effects 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 230000008569 process Effects 0.000 description 1
- 238000012552 review Methods 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- -1 temperature Substances 0.000 description 1
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Abstract
本發明係提供一種蝕刻方法,係以熔融鹼來蝕刻基板的蝕刻方法,該蝕刻方法係包括下列步驟:使用已設定為預定高溫域的熔融鹼AL,於高溫且含氧的環境下,一邊在基板PL的被蝕刻面形成氧化被膜,一邊藉由對於被蝕刻面進行等向性蝕刻而去除氧化被膜的去除步驟。
在前述去除步驟中,係以被蝕刻面作為上面側,使基板相對於水平面傾斜預定角度,且使熔融鹼從被蝕刻面的上部側流動至下部側,而且,藉由將基板的氧化速度設為前述氧化被膜的熔解速度以上而對被蝕刻面進行前述等向性蝕刻。
Description
本發明係關於一種以熔融鹼來蝕刻基板的蝕刻方法。
在半導體的製造等中,已廣泛地進行將SiC(silicon carbide,碳化矽)等的基板進行蝕刻以檢測缺陷。另外,SiC基板係由於其優異的特性而被期待作為下一世代的功率(power)半導體基板。
另一方面,在製造高性能且良率高的半導體裝置時,重要的是要將損傷少之良好的面形成於基板。
專利文獻1:日本特開2014-22677號公報
然而,要將損傷少之良好的面形成於基板,會有所需處理步驟數較多,而要耗費更多的時間及成本的問題。此外,為了要獲得無缺陷的狀態,需要有精密 的研磨加工,因此,必要的處理步驟數會變多,而這又成為耗費更多時間及成本的主要原因。
尤其SiC基板為高硬度,除了一部分的藥品以外均為化學上安定的難加工材料、難切削材料,因此,其研磨、研削會耗費時間,使此等問題更為顯著。
有鑑於上述問題,本發明之目的為提供一種蝕刻方法,係可在蝕刻凹坑(etch pit)不存在的狀態下進行蝕刻,結果可製造出具有不存在缺陷的表面狀態與鏡面的晶圓。
本發明人為了解決上述問題,乃經不斷檢討,著眼於以熔融鹼(熔融的鹼)檢查出SiC晶圓之缺陷的方法。此方法係檢測出存在於SiC晶圓表面附近之缺陷的方法,是藉由將SiC晶圓浸漬於熔融鹼中,使缺陷呈現為蝕刻凹坑而被觀察到。
再者,經過不斷實驗並進行檢討,已發現不將基板浸漬於熔融鹼中,而是藉由一邊形成氧化被膜一邊連續地進行蝕刻,可獲得不存在蝕刻凹坑之鏡面的晶圓。然後,再經過不斷的實驗及檢討,終至完成本發明。
用以解決上述問題之本發明的一態樣,係一種蝕刻方法,係包括下列步驟:使用已設定為預定高溫域的熔融鹼,於高溫且含氧的環境下,一邊在基板的被蝕刻面形成氧化被膜,一邊藉由對前述被蝕刻面進行等向性蝕刻而去除前述氧化被膜的去除步驟。在前述去除步驟 中,係以前述被蝕刻面作為上面側而使前述基板相對於水平面傾斜預定角度,且使前述熔融鹼從前述被蝕刻面的上部側流動至下部側,而且,藉由將前述基板的氧化速度設為前述氧化被膜的熔解速度以上而對前述被蝕刻面進行前述等向性蝕刻。
藉此,即可獲得一種蝕刻方法,係可在不存在蝕刻凹坑的狀態下進行蝕刻,結果可製造出具有不存在缺陷之表面狀態與鏡面之晶圓。
前述熔融鹼係可使用熔融氫氧化鈉(熔融的氫氧化鈉)。
前述預定的高溫域可設為650℃以上。
前述基板係可使用SiC基板。
此時,可進行「將聚集雷射光的雷射集光器以非接觸方式配置於SiC結晶構件之被照射面上的步驟」、「藉由前述雷射集光器將雷射光照射於前述被照射面而將前述雷射光聚集於前述SiC結晶構件內部,並且使前述雷射集光器與前述SiC結晶構件相對地移動,而在前述SiC結晶構件內部形成2次元狀之改質層的步驟」、以及「將被前述改質層分離而成的結晶層從前述改質層剝離,從而形成SiC結晶基板的步驟」,並可使用經由前述剝離所獲得的前述SiC結晶基板作為前述SiC基板。
前述高溫且含氧的環境,係可設為在大氣中使用前述熔融鹼的環境。
前述高溫且含氧的環境,亦可設為在將氧 氣供給至前述被蝕刻面的空間中使用前述熔融鹼的環境。
依據本發明,可提供一種可廣範圍地高速形成良好之鏡面的蝕刻方法。
10‧‧‧容器
11‧‧‧XY平台
13‧‧‧修正環
14‧‧‧雷射集光手段
15‧‧‧集光透鏡
16‧‧‧第1透鏡
18‧‧‧第2透鏡
20‧‧‧SiC結晶構件
20r‧‧‧被照射面
22‧‧‧改質層
30‧‧‧電爐
32‧‧‧基板保持部
34‧‧‧槽
34m‧‧‧供給口
36‧‧‧收容部
38‧‧‧傾斜保持板
39、42‧‧‧開閉閥
40‧‧‧氧供給部
AL‧‧‧熔融鹼
B‧‧‧雷射光
E‧‧‧外周部
EP、MP‧‧‧集光點
F‧‧‧界面位置
IM‧‧‧浸漬部
M‧‧‧中央部
NIM‧‧‧非浸漬部
PL‧‧‧SiC基板
PLS‧‧‧基板面
SHL‧‧‧熔融氫氧化鈉
V‧‧‧界面附近
第1圖(a)至(c)係分別說明以本發明之一實施形態之蝕刻方法依序將基板進行蝕刻的示意前視圖。
第2圖係第1圖(b)的部分放大側視圖。
第3圖係顯示以本發明之一實施形態之蝕刻方法來形成所要使用之基板的基板加工裝置之一例的透視圖。
第4圖係說明第3圖所示之基板加工裝置之修正環內之透鏡的側視圖。
第5圖係說明以本發明之一實施形態之變形例的蝕刻方法將基板進行蝕刻的示意側視圖。
第6圖係顯示實驗例1中之蝕刻後之基板面之粗糙度的曲線圖。
第7圖係顯示實施例1中之蝕刻後之基板面之非浸漬部中之界面附近的照相圖。
第8圖係顯示實施例1中之蝕刻後之基板面之浸漬部的照相圖。
第9圖係顯示實施例1中以AFM(Atomic Force Microscope,原子力顯微鏡)拍攝蝕刻後之非浸漬部所獲得的透視圖。
第10圖係顯示實驗例2中之蝕刻溫度與蝕刻速率(etching rate)之關係的曲線圖。
第11圖係關於實驗例2,(a)係顯示浸漬部中之蝕刻時間與粗糙度之關係的曲線圖,(b)係顯示非浸漬部之界面附近中之蝕刻時間與粗糙度之關係的曲線圖。
第12圖係關於實驗例2,(a)係顯示氮流量與蝕刻速率之關係的曲線圖,(b)係顯示氮流量與粗糙度之關係的曲線圖。
第13圖係關於實驗例2,(a)係顯示空氣流量與蝕刻速率之關係的曲線圖,(b)係顯示空氣流量與粗糙度之關係的曲線圖。
以下參照所附圖式來說明本發明的實施形態。在以下的說明中,對於與已說明者為相同或類似的構成要素係賦予相同或類似的符號,且適當省略其詳細的說明。
第1圖(a)至(c)係分別說明以本發明之一實施形態(以下稱本實施形態)的蝕刻方法依序將基板進行蝕刻的示意前視圖。第2圖係第1圖(b)的部分放大側視圖。
本實施形態的蝕刻方法,係將基板以熔融鹼進行蝕刻的蝕刻方法,且為「使用已設為預定高溫域的熔融鹼,於高溫且含氧的環境下,一邊在基板的被蝕刻面形成氧化被膜,一邊藉由對被蝕刻面進行等向性蝕刻而將氧化被膜予以去除」的方法。
再者,在本實施形態中,係藉由將基板的氧化速度設為氧化被膜的熔解速度以上而對被蝕刻面進行等向性蝕刻。具體而言,係使用熔融氫氧化鈉作為熔融鹼,使用SiC基板作為基板。再者,藉由將SiC基板PL之氧化速度設為氧化被膜的熔解速度以上而對被蝕刻面進行等向性蝕刻。高溫且含氧的環境係設為在大氣中使用熔融鹼AL的環境。
具體而言,係在大氣中,首先將SiC基板PL置入於已放入容器10中的熔融鹼AL中(參照第1圖(a))。然後,將SiC基板PL以一定速度緩緩地拉升(參照第1圖(a)至(c))。因此,SiC基板PL之基板面PLS中的熔融鹼AL的界面位置F(熔融鹼AL的液面位置),會從基板上端逐漸往下方移動。另外,如第1圖、第2圖所示,在本說明中,所謂界面位置F,係與熔融鹼AL的液面位置相同。
由於配置有熔融鹼AL,故其周圍之大氣的溫度會上升。因此,SiC基板PL的基板面PLS會因為大氣中的氧而成為易被氧化的環境。再者,在SiC基板PL的界面附近V,會因為大氣中的氧而效率良好地進行氧化反應,且效率良好地形成氧化被膜。再者,與此同時地,藉由熔融鹼AL而將氧化被膜去除,因此而高速地進行良好的蝕刻。更詳而言之,在液面的交界區域,熔融鹼會因為表面張力而攀上SiC面,作出薄的熔融鹼液的膜。再者,由於此膜較薄,故易於將空氣中的氧供給至SiC面,而使 氧化活躍。然後,會活躍地重複進行熔融鹼去除該氧化膜的循環。因此,會效率良好地促進鏡面化(等向性蝕刻)。
而且,藉由將SiC基板的氧化速度設為氧化被膜的熔解速度以上,而避免了未氧化之階段的基板材料(SiC)被蝕刻。亦即,即使在基板材料產生了缺陷(結晶缺陷),此缺陷也會在氧化後(亦即成為氧化被膜後)被蝕刻,結果SiC基板PL會被等向性蝕刻。
因此,若以此方式使SiC基板PL中之熔融鹼AL的界面位置F依序移動,即使是高硬度且為難加工材料的SiC基板PL,也會因等向性蝕刻而使蝕刻之面的缺陷被去除,故可在基板面PLS廣範圍地高速形成良好的鏡面。亦即,相較於「藉由將SiC基板全部整個浸漬於熔融鹼AL中(使基板整體成為浸漬部)而進行蝕刻」,可在極短時間內涵蓋基板全面地形成該良好的鏡面。此係由於在整個浸漬之狀態下,會難以受到氧氣的影響而無法形成安定的氧化被膜,故只會變成產生與通常蝕刻同樣的蝕刻凹坑的狀態之故。
SiC基板PL的拉升速度(上升速度),係考慮到氧化被膜的厚度或氧化被膜形成速度與蝕刻速度的關係,並因應熔融鹼的種類、溫度、氣體氛圍中的氧濃度等,以能進行良好的蝕刻之方式來決定。藉由去除氧化被膜而進行等向性蝕刻,避免基板面PLS之缺陷部分會先被蝕刻的異向性蝕刻。
在此,當使用熔融氫氧化鈉作為熔融鹼時, 可使用廉價且易於取得的材料來達成上述效果。
另外,即使藉由使SiC基板PL從上方以一定速度緩緩地下降至熔融鹼AL,而使SiC基板PL中之熔融鹼AL的界面位置F(熔融鹼AL的液面位置)往基板上方依序移動,也可在SiC基板PL的基板面PLS廣範圍地高速形成良好的鏡面。
就熔融鹼而言,可舉例如熔融氫氧化鈉(NaOH)、熔融氫氧化鉀(KOH)等,但從成本等的觀點而言,係以熔融氫氧化鈉SHL(參照第1圖、第2圖)為佳。此時,當使用已使氫氧化鈉成為600℃以上(更佳為650至1100℃的範圍或其以上的溫度)的熔融氫氧化鈉時,即易於進行此種高速且良好的蝕刻而鏡面化。另外,在1000℃以上之情形時,會成為比「後述之第10圖所示之750℃的蝕刻速率」更高的蝕刻速率。
在此,當使用熔融氫氧化鈉時,即易於以高速來蝕刻SiC基板PL的Si面。由於Si面在機械上或在化學上都難以研磨,故此點在將Si面高速鏡面化上極具功效。另外,在要將C面蝕刻而非將Si面蝕刻時,就將C面予以效率良好地去除(蝕刻速度的高速化)且鏡面化的觀點來看,係以使用熔融氫氧化鉀為佳。
此外,在將熔融鹼AL的溫度增高時,蝕刻速率會大幅上升,隨此而可將界面附近V的粗糙度在短時間內縮小(亦參照後述的實驗例2、第10圖、第11圖(b)),因此,可將熔融鹼AL散佈於基板面PLS的凸部而使之有 效率地平滑化。
此外,可在基板面PLS形成溫度分布而提升在溫度較高之基板面部分的蝕刻速率,藉此而調整基板面PLS的平面度。此溫度分布係例如可藉由雷射光照射等而進行。
此外,在使SiC基板PL的被蝕刻面(亦即基板面PLS)氧化而進行蝕刻時,可一邊形成預定厚度(例如數nm至數十nm的厚度)的氧化被膜,一邊以已設為預定高溫域的熔融氫氧化鈉SHL將此氧化被膜予以去除。此時,最終會被蝕刻去除的氧化被膜厚度(蝕刻深度)係以設為10至80μm的範圍為佳。當較10μm更薄時,會有蝕刻量易於不足之虞,當較80μm更厚時,即易於變得難以獲得鏡面。
此外,就SiC基板PL而言,可為從SiC結晶構件切出者,或亦可為從SiC結晶構件剝離者。
若要從SiC結晶構件剝離而獲得SiC基板PL,係例如依據以下方式獲得。首先,如第3圖所示,在XY平台(stage)11上載置SiC結晶構件20。然後,進行「將聚集雷射光B的雷射集光手段14(雷射集光器)以非接觸方式配置於SiC結晶構件20的被照射面20r上的步驟」。
然後,進行「藉由雷射集光手段14,將雷射光B照射於SiC結晶構件20(在第3圖中係被描繪成基板狀以作為一例)的被照射面20r,而將雷射光B聚集於SiC結晶構件20內部的預定厚度位置,並且使雷射集光手段 14與SiC結晶構件20相對地移動,而於SiC結晶構件20的內部形成2次元狀之改質層22的步驟」。
再者,進行「將被改質層22分離而成的結晶層從改質層22剝離,藉此而形成SiC結晶基板的步驟」。使用由此剝離而獲得的SiC結晶基板作為SiC基板PL。藉此,可藉由蝕刻而在預定厚度之SiC結晶基板的剝離面廣範圍地高速形成良好的鏡面。
再者,即使該剝離面(基板面)的表面粗糙度較粗糙,亦可將熔融鹼AL散佈在剝離面的凸部而使之有效率地平滑化,此外,亦可在剝離面形成溫度分布而提升在溫度較高之基板面部分的蝕刻速率,藉此而調整剝離面的平面度。
所使用之SiC結晶構件20,係可為第3圖所示的基板狀,因此而可藉由從改質層22剝離來獲得預定厚度的2片SiC結晶基板。
此外,雷射集光手段14係具備修正環13、以及保持於修正環13內的集光透鏡15,並可具有修正因SiC結晶構件20的折射率所引起之像差的功能,亦即可具有作為像差修正環的功能。具體而言,如第4圖所示,集光透鏡15係在空氣中集光時,以使「到達集光透鏡15之外周部E的雷射光B」比「到達集光透鏡15之中央部M的雷射光B」更在集光透鏡側聚集之方式進行修正。換言之,在集光時,以使「到達集光透鏡15之外周部E的雷射光B的集光點EP」成為比「到達集光透鏡15之中央部 M的雷射光B的集光點MP」更靠近集光透鏡15的位置之方式進行修正。藉此,即可易於縮短由雷射光之集光所形成之加工痕之在雷射照射方向的長度,亦即易於使改質層22的厚度變薄。
如此,若要使改質層22的厚度變薄,則例如以「在空氣中集光的第1透鏡16」及「配置於該第1透鏡16與SiC結晶構件20之間的第2透鏡18」來構成該集光透鏡15。再者,藉由調整修正環13的旋轉位置,亦即調整第1透鏡16與第2透鏡18的間隔,即可調整集光點EP與集光點MP的間隔,雷射集光手段14係被設為以簡單的構成具有作為「附設修正環之透鏡」的功能。
以下說明一邊使容器內的熔融鹼流動一邊進行蝕刻之例子。在本變形例中,如第5圖所示,係配置:電爐30;基板保持部32,係配置於電爐30內,用以將基板保持於上面側;槽34,係貯存熔融鹼,可從供給口34m供給熔融鹼;及收容部36,使在基板保持部32上之基板面PLS所流動的熔融鹼AL流入而予以收容。
在基板保持部32中,係設有在上面側保持基板PL(SiC晶圓)的傾斜保持板38。就此傾斜保持板38而言,係構成為以傾斜角度可變之方式相對於水平面傾斜而使流動於基板PL上部的熔融鹼AL朝基板PL下方流動,並且,可相對於供給口34m以跨越基板PL上部整體 之方式而水平移動(朝紙面正交方向移動)。另外,亦可從噴嘴將熔融鹼AL朝基板PL上部噴附,此外,亦可構成為使傾斜保持板38繞著旋轉軸旋轉。
此外,對於電爐30,係隔著開閉閥39而連接有氧供給部40(例如氧氣瓶)。再者,電爐30係連接開閉閥42,可釋出電爐內的氣體。
在本變形例中,係使傾斜保持板38相對於水平面傾斜預定角度,且使基板PL以上面側作為被蝕刻面之方式保持於該傾斜保持板38。再者,在已設為氧氛圍的電爐30內,係一邊使熔融鹼AL(例如熔融氫氧化鈉SHL)從槽34流動至基板PL的被蝕刻面(亦即基板面)(基板上表面)PLS的上部側,一邊使傾斜保持板38水平移動(朝紙面正交方向移動)而使熔融鹼AL涵蓋基板PL上部整體而朝下部側流動。電爐30內的溫度、熔融鹼AL的溫度、熔融鹼AL的流量、基板PL的移動速度等係調整為使SiC基板PL的氧化速度為氧化被膜之熔解速度以上,而且,使形成於基板PL之被蝕刻面亦即基板面PLS的氧化被膜以良好效率被去除。
在本變形例中,係以此方式在傾斜的基板PL的基板面PLS使熔融鹼從上部朝下方流動,因此,可一邊將基板PL進行等向性蝕刻,一邊高效率地進行「在基板面PLS廣範圍地高速形成良好的鏡面」。
另外,即使不如本變形例般以氧氣置換電爐內的全域,若藉由至少以氧氣覆蓋被蝕刻面(基板面), 亦可獲得與本變形例同等的效果。
在本實驗例中,係將SiC晶圓浸漬一半左右於熔融NaOH(熔融氫氧化鈉)中,藉此而在產生「浸漬於熔融NaOH的浸漬部IM」及「未浸漬於熔融NaOH的非浸漬部NIM」的狀態下進行蝕刻。另外,以下之實驗例中所使用的SiC晶圓,係經鑽石砂輪(diamond wheel)的# 1000將表面進行研磨作為前加工。
本發明人係將固態的NaOH約5g置入Ni(鎳)製的坩堝,以電爐加熱而使之成為750℃的熔融狀態,並將經由Ni線固定的SiC晶圓(SiC基板)浸漬一半左右於已熔融的NaOH,進行20分鐘的蝕刻。所使用的晶圓係傾斜角4°、10mm見方的4H-SiC晶圓。以前加工而言,係藉由鑽石砂輪(SD # 1000)進行研削。蝕刻速率的評估係從蝕刻前後之厚度的差而求出。粗糙度的測量,係使用觸針式粗糙度測量機(Taylor Hobson公司製PGI840)。另外,進行研削之主要的理由,係為了要先將晶圓的起伏或翹曲予以去除。
第6圖係顯示蝕刻後之SiC晶圓表面的形狀。在為了獲得第6圖的測量中,係測量了在基板面沿著直線的表面 的高度。
從第6圖可得知,比起浸漬部IM,非浸漬部NIM被蝕刻去除更多。尤其在非浸漬部NIM中,在從界面位置F算起距離1mm的區域中,係比起浸漬部IM而被多去除了60μm。
此外,藉由雷射顯微鏡像來觀察浸漬部IM與非浸漬部NIM的界面附近V並進行攝影。茲將攝影結果分別顯示於第7圖、第8圖。
在浸漬部IM中觀察到有產生蝕刻凹坑(參照第8圖),在非浸漬部NIM中則確認到無蝕刻凹坑的平滑面(參照第7圖)。
再者,茲將藉由AFM以1μm×1μm測量非浸漬部NIM的結果顯示於第9圖。此測量結果,確認到粗糙度為0.54nmRa、8.7nmRz的鏡面。
在本實驗例中,係進行了檢查蝕刻的特性會在溫度、氣體氛圍下受到何種影響的實驗。
以實驗例1的實驗方法為基礎,將實驗時間設為20至120分鐘、溫度設為600至750℃進行了蝕刻實驗。在 本實驗例中,係針對浸漬部IM與非浸漬部NIM的界面附近V,檢查了蝕刻溫度與蝕刻速率的關係。實驗結果如第10圖所示。
可得知浸漬部IM、界面附近V都有溫度愈高則蝕刻速率愈大的傾向,兩者變大的比例均為相同程度。再者,在界面附近V的蝕刻速率,係較浸漬部IM高出2至3倍左右。尤其在750℃,高至289μm/h的值。
此外,第11圖(a)係顯示浸漬部IM之蝕刻面的粗糙度,第11圖(b)係顯示非浸漬部NIM之界面附近V之蝕刻面的粗糙度。在浸漬部IM中,可看出有粗糙度一度增大但之後則減少的傾向。從蝕刻面的觀察結果來考察,推測係因為在蝕刻初期出現因為鑽石砂輪所導致的潛傷,之後則逐漸變得平滑之故。
此外,在浸漬部IM為蝕刻速率較低,並可認為120分鐘的實驗係尚不足以減少浸漬部IM的粗糙度的時間。然而,由於可看出有蝕刻凹坑增加的傾向,故被認為難以適用於鏡面化。
另一方面,可得知在非浸漬部NIM中,當到達700℃時,即達到了到達面粗糙度1.4nmRa。再者,從蝕刻面的觀察結果可得知,任何條件均未發現有產生蝕刻凹坑。關於此蝕刻凹坑,從蝕刻速率低至23μm/h的處理條件的600℃ 120分鐘之蝕刻處理後的觀察結果來看,亦未發現有產生蝕刻凹坑。
以實驗例1的實驗條件為基礎,實驗時間係設為30分鐘,分別在氣體氛圍為大氣與氮氣(排除氧氣而使之為惰性的氣體)的情形下進行實驗,調查其影響。
一邊使氮氣流通於電爐內,一邊進行蝕刻。關於浸漬部IM與非浸漬部NIM的界面附近V,係分別於第12圖(a)顯示氮氣流量與蝕刻速率的關係,於第12圖(b)顯示氮氣流量與粗糙度的關係。另外,第12圖(a)中,氮氣流量0L/min係指不流通氮氣,故電爐內仍為大氣氛圍。
關於蝕刻率,在浸漬部IM、界面附近V均於氮氣流量10L/min時會大幅降低,而在超過該流量的流量則未見到超過其程度的變化。
另一方面,關於粗糙度,在浸漬部IM、界面附近V均有氮氣流量愈增加則愈增大的傾向。因此,可推測是在蝕刻時會先露出因研削所導致的潛傷,之後消失,從而成為鏡面。從蝕刻面的觀察結果來看,浸漬部IM、界面附近V均觀察到潛傷,可推知粗糙度的增大傾向是因蝕刻速率之降低而導致鏡面過程的鈍化之故。
接著,進行了用以檢查大氣影響的蝕刻。關於浸漬部IM與非浸漬部NIM的界面附近V,係分別於第13圖(a) 顯示空氣流量與蝕刻速率的關係,於第13圖(b)顯示空氣流量與粗糙度的關係。在浸漬部IM、界面附近V,蝕刻速率均與空氣流量無關而幾乎未見變化。然而,可得知即使是相同的蝕刻時間,在浸漬部IM係空氣流量愈增加而潛傷(蝕刻凹坑)就愈被去除。此外,在空氣流量為20L/min時,於界面附近V會產生膜狀的凹凸,粗糙度顯著地增大。
另外,結果在大氣中及至空氣流量10L/min為止時可獲得所要達成的蝕刻狀態。當空氣流量超過該程度時,氧化被膜會產生過多,而有可能變得不理想。惟若非僅調整空氣流量,而是有調整蝕刻溫度與熔融氫氧化鈉之液量的關係,就可能使空氣流量即使超過該程度時亦能獲得效果。
經由以上的實驗結果及推測,可得知空氣會在蝕刻時產生作用。因此,可推知在非浸漬部NIM中,由鹼蒸氣或表面張力所導致之熔融鹼薄膜會在與SiC反應時引進大氣的氧氣而促進氧化。
綜上所述,經由實驗例1、2而發現,藉由使用了熔融NaOH的SiC基板之濕式蝕刻,而導致在非浸漬部中之SiC晶圓面之高效率的鏡面化現象。從用以調查該基礎特性的實驗可得知,藉由750℃、20分鐘的蝕刻而導致到達面粗糙度1.4nmRa,由750℃、45分鐘而導致蝕刻速率成為最大的304μm/h。再者,可得知在蝕刻氛圍中,空氣有 產生作用。
以上雖已說明了實施形態及實驗例,但此等實施形態及實驗例,係用以將本發明之技術思想予以具體化的例示,發明之範圍並未限定於此等。此等實施形態係可藉由其他各種形態來實施,只要在不脫離發明之要旨的範圍內,可進行各種省略、置換及變更。
此外,以上之實施形態及實驗例雖是以蝕刻SiC基板之例來進行說明,但即使基板為此等以外之種類之基板(例如矽結晶基板),亦可適用。
依據本發明,由於可效率良好地進行蝕刻,故可利用於半導體領域、顯示器領域、能源領域等廣泛的領域,例如結晶基板,若為SiC基板(矽基板),則可應用於太陽電池,此外,若為GaN系半導體元件等藍寶石(sapphire)基板等,則可應用於發光二極體(light emitting diode)、雷射二極體(laser diode)等,若為SiC等,則可應用於SiC系功率元件(power device)等,可適用於透明電子領域、照明領域、複合型(hybrid)/電動汽車領域等廣泛的領域。
10‧‧‧容器
AL‧‧‧熔融鹼
F‧‧‧界面位置
IM‧‧‧浸漬部
NIM‧‧‧非浸漬部
PL‧‧‧SiC基板
SHL‧‧‧熔融氫氧化鈉
Claims (6)
- 一種蝕刻方法,係包括下列步驟:使用已設定為預定高溫域的熔融鹼,於高溫且含氧的環境下,一邊在基板的被蝕刻面形成氧化被膜,一邊藉由對前述被蝕刻面進行等向性蝕刻而去除前述氧化被膜的去除步驟;在前述去除步驟中,係以前述被蝕刻面作為上面側而使前述基板相對於水平面傾斜預定角度,且使前述熔融鹼從前述被蝕刻面的上部側流動至下部側,而且,藉由將前述基板的氧化速度設為前述氧化被膜的熔解速度以上而對前述被蝕刻面進行前述等向性蝕刻;前述高溫且含氧的環境係設為在大氣中使用前述熔融鹼的環境。
- 如申請專利範圍第1項所述之蝕刻方法,其中,前述熔融鹼係使用熔融氫氧化鈉。
- 如申請專利範圍第2項所述之蝕刻方法,其中,前述預定的高溫域係設為650℃以上。
- 如申請專利範圍第3項所述之蝕刻方法,其中,前述基板係使用SiC基板。
- 如申請專利範圍第4項所述之蝕刻方法,係進行下列步驟:將聚集雷射光的雷射集光器以非接觸方式配置於SiC結晶構件之被照射面上的步驟;藉由前述雷射集光器將雷射光照射於前述被照射 面而將前述雷射光聚集於前述SiC結晶構件內部,並且使前述雷射集光器與前述SiC結晶構件相對地移動,而在前述SiC結晶構件內部形成2次元狀之改質層的步驟;以及將被前述改質層分離而成的結晶層從前述改質層剝離,從而形成SiC結晶基板的步驟;並且,使用經由前述剝離所獲得的前述SiC結晶基板作為前述SiC基板。
- 如申請專利範圍第1項所述之蝕刻方法,其中,前述高溫且含氧的環境係設為在將氧氣供給至前述被蝕刻面的空間中使用前述熔融鹼的環境。
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Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW546848B (en) * | 2001-06-29 | 2003-08-11 | Sharp Kk | Method of manufacturing thin sheet and solar battery |
CN102569055A (zh) * | 2010-12-14 | 2012-07-11 | 北京天科合达蓝光半导体有限公司 | 一种SiC单晶平整度的调整方法—湿法刻蚀 |
JP2015123466A (ja) * | 2013-12-26 | 2015-07-06 | 信越ポリマー株式会社 | 基板加工装置及び基板加工方法 |
Family Cites Families (19)
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JP3593195B2 (ja) * | 1995-12-28 | 2004-11-24 | 新日本製鐵株式会社 | SiC単結晶基板の製造方法 |
EP1143033B1 (en) * | 2000-04-07 | 2004-09-01 | Hoya Corporation | Silicon carbide and method for producing the same |
JP2008028178A (ja) * | 2006-07-21 | 2008-02-07 | Toyota Motor Corp | 単結晶基板の評価方法 |
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JP5560774B2 (ja) * | 2010-03-03 | 2014-07-30 | 日立金属株式会社 | 炭化珪素単結晶基板の製造方法 |
JP2011241096A (ja) * | 2010-05-14 | 2011-12-01 | Mitsubishi Electric Corp | 炭化ケイ素単結晶の製造方法 |
US9644288B2 (en) * | 2011-11-23 | 2017-05-09 | University Of South Carolina | Pretreatment method for reduction and/or elimination of basal plane dislocations close to epilayer/substrate interface in growth of SiC epitaxial films |
US9885124B2 (en) * | 2011-11-23 | 2018-02-06 | University Of South Carolina | Method of growing high quality, thick SiC epitaxial films by eliminating silicon gas phase nucleation and suppressing parasitic deposition |
KR101341937B1 (ko) * | 2012-05-30 | 2013-12-17 | 엑스탈테크놀로지 주식회사 | 갈륨비소 다결정 잉곳 화학 에칭 세정장치 |
JP2014022677A (ja) | 2012-07-23 | 2014-02-03 | Disco Abrasive Syst Ltd | ウェーハの加工方法 |
US20150110707A1 (en) * | 2013-10-22 | 2015-04-23 | Corning Incorporated | Process for making chemically activated carbon |
US9279192B2 (en) * | 2014-07-29 | 2016-03-08 | Dow Corning Corporation | Method for manufacturing SiC wafer fit for integration with power device manufacturing technology |
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WO2016132987A1 (ja) * | 2015-02-20 | 2016-08-25 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
JP6574104B2 (ja) * | 2015-04-28 | 2019-09-11 | 一般財団法人ファインセラミックスセンター | 窒化物系半導体のエッチング方法および窒化物系半導体の結晶欠陥検出方法 |
JP6849968B2 (ja) * | 2016-12-16 | 2021-03-31 | 国立大学法人埼玉大学 | エッチング方法 |
JP6999101B2 (ja) * | 2017-02-16 | 2022-01-18 | 国立大学法人埼玉大学 | エッチング方法 |
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Publication number | Priority date | Publication date | Assignee | Title |
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