TWI743351B - 具有阻劑孔的扇出晶圓級封裝 - Google Patents

具有阻劑孔的扇出晶圓級封裝 Download PDF

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TWI743351B
TWI743351B TW107112587A TW107112587A TWI743351B TW I743351 B TWI743351 B TW I743351B TW 107112587 A TW107112587 A TW 107112587A TW 107112587 A TW107112587 A TW 107112587A TW I743351 B TWI743351 B TW I743351B
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die
resist
layer
carrier
holes
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TW107112587A
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Chinese (zh)
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TW201842643A (zh
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貝爾格森 哈巴
伊黎雅斯 莫罕默德
拉傑許 卡特卡爾
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美商英帆薩斯公司
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    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
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    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
TW107112587A 2017-04-13 2018-04-12 具有阻劑孔的扇出晶圓級封裝 TWI743351B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201762484974P 2017-04-13 2017-04-13
US62/484,974 2017-04-13
US15/873,218 2018-01-17
US15/873,218 US10593563B2 (en) 2017-04-13 2018-01-17 Fan-out wafer level package with resist vias

Publications (2)

Publication Number Publication Date
TW201842643A TW201842643A (zh) 2018-12-01
TWI743351B true TWI743351B (zh) 2021-10-21

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US (1) US10593563B2 (enExample)
JP (1) JP6972171B2 (enExample)
TW (1) TWI743351B (enExample)
WO (1) WO2018191380A1 (enExample)

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US11735570B2 (en) * 2018-04-04 2023-08-22 Intel Corporation Fan out packaging pop mechanical attach method
US10748831B2 (en) * 2018-05-30 2020-08-18 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor packages having thermal through vias (TTV)
KR102762976B1 (ko) 2020-01-03 2025-02-07 삼성전자주식회사 반도체 패키지
JP7574747B2 (ja) 2021-06-04 2024-10-29 株式会社デンソー 半導体装置およびその製造方法
KR20230141192A (ko) * 2022-03-31 2023-10-10 삼성전자주식회사 집적회로 소자의 제조 방법
CN115223973A (zh) * 2022-09-20 2022-10-21 盛合晶微半导体(江阴)有限公司 一种扇出型芯片封装结构及封装方法
CN117080087B (zh) * 2023-10-13 2024-02-13 季华实验室 一种扇出型板级封装方法及扇出型板级封装结构

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