TWI701775B - 半導體結構及其製造方法 - Google Patents

半導體結構及其製造方法 Download PDF

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TWI701775B
TWI701775B TW108106004A TW108106004A TWI701775B TW I701775 B TWI701775 B TW I701775B TW 108106004 A TW108106004 A TW 108106004A TW 108106004 A TW108106004 A TW 108106004A TW I701775 B TWI701775 B TW I701775B
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connecting conductor
semiconductor
semiconductor layer
manufacturing
hole
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TW108106004A
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TW202023002A (zh
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蔡宏奇
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南亞科技股份有限公司
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Abstract

本揭露關於一種半導體結構及其製造方法。該半導體結構包括一第一與一第二半導體層、以及一第一、一第二與一第三連結導體。該第二半導體層設於該第一半導體層之上。該第一連結導體設於該第一半導體層之上。該第二連結導體設於該第二半導體層之上。該第三連結導體包括由該第一連結導體與該第二連結導體形成之一矽化物材料。

Description

半導體結構及其製造方法
本申請案主張2018/12/6申請之美國臨時申請案第62/776,174號及2019/1/17申請之美國正式申請案第16/250,676號的優先權及益處，該美國臨時申請案及該美國正式申請案之內容以全文引用之方式併入本文中。
本揭露關於一種半導體結構及其製造方法，特別關於一種具有堆疊結構之半導體結構及其製造方法。
在許多現代設備中，半導體裝置為必備的裝置。隨著科技的進步，半導體裝置逐漸微小化，同時各類電子元件(例如電晶體、二極體、電阻、電容等)的積體密度也逐漸改善。鑑於半導體裝置的尺寸逐漸微小化，堆疊之半導體結構被廣泛應用於例如封裝堆疊(POP)結構、系統級封裝(SiP)結構等。
傳統半導體結構可包括一第一半導體層與一第二半導體層，第一半導體層與第二半導體層透過兩金屬導體結合在一起。然而，傳統半導體結構之配置也會導致一些問題。例如金屬接觸電阻具有缺陷、而造成能源耗損增加。
上文之「先前技術」說明僅係提供背景技術，並未承認上文之「先前技術」說明揭示本揭露之標的，不構成本揭露之先前技術，且上文之「先前技術」之任何說明均不應作為本案之任一部分。
本揭露提供一種半導體結構的製造方法。該製造方法包括：形成一第一連結導體於一第一半導體層的一第一上表面之上，其中該第一連結導體係耦接形成於該第一半導體層中的一第一電子線路結構；形成一第二連結導體於一第二半導體層的一第二上表面上，其中該第二連結導體係耦接形成於該第二半導體層中的一第二電子線路結構；以及結合該第一連結導體與該第二連結導體，其中一第三連結導體形成於該第一連結導體與該第二連結導體之間，且該第三連結導體接觸該第一連結導體與該第二連結導體。
在一些實施例中，該製造方法包括：形成一第一半導體穿孔於該第一半導體層中，其中該第一半導體穿孔耦接該第一連結導體。
在一些實施例中，該製造方法包括：形成一第二半導體穿孔於該第二半導體層中，其中該第二半導體穿孔係耦接該第二連結導體。
在一些實施例中，去除該第一半導體層之一部分，從該第一半導體層之一第一下表面，顯露該第一半導體穿孔。
在一些實施例中，該第一電子線路結構包括一第一電子元件以及耦接該第一電子元件的一第一內連接線路，且該第二電子線路結構包括一第二電子元件以及耦接該第二電子元件的一第二內連接線路。
在一些實施例中，該第一電子元件為形成於該第一半導體層之一第一基材上的一第一電晶體，且該第二電子元件包括形成於該第二半導體層之一第二基材上的一第二電晶體。
在一些實施例中，該製造方法包括：形成一第一半導體穿孔，接觸該第一內連接線路，其中該第一半導體穿孔由該第一內連接線路朝向該第一半導體層之一第一下表面延伸。
在一些實施例中，該製造方法包括：形成一第一導電接墊以及該第一內連接線路之一第一導電插塞，其中該第一半導體穿孔由該第一導電接墊朝該第一下表面延伸，且該第一導電插塞係接觸該第一電子元件與該第一導電接墊。
在一些實施例中，該第一連結導體不同於該第二連結導體，該第三連結導體包括由該第一連結導體與該第二連結導體形成的一矽化物材料，該第一連結導體與該第二連結導體之其中一者包括一矽材料、另一者包括一金屬材料，且該第三連結導體係藉由一熱處理製程或一電處理製程而形成的。
在一些實施例中，該製造方法包括：形成一第一介電材料於該第一上表面之上以及形成一第二介電材料於該第二上表面之上，其中，其中該第一連結導體嵌設於該第一介電材料中，該第二連結導體嵌設於該第二介電材料中。
本揭露另提供一半導體結構，該半導體結構包括：一第一半導體層，包括一第一上表面與一第一電子線路結構；一第二半導體層，設於該第一半導體層之上，其中該第二半導體層包括一第二上表面以及一第二電子線路結構；一第一連結導體，設於該第一上表面之上，其中該第一連結導體耦接該第一電子線路結構；一第二連結導體，設於該第二上表面之上，其中該第二連結導體耦接該第二電子線路結構；以及一第三連結導體，設於該第一連結導體與該第二連結導體之間，其中該第三連結導體接觸該第一連結導體與該第二連結導體。
在一些實施例中，該半導體結構包括一第一半導體穿孔，設於該第一半導體層中，其中該第一半導體穿孔接觸該第一電子線路結構，且該第一半導體穿孔由該第一電子線路結構朝向該第一半導體層之一第一下表面延伸。
在一些實施例中，該半導體結構包括一第二半導體穿孔，設於該第二半導體層中，其中該第二半導體穿孔接觸該第二電子線路結構，且該第二半導體穿孔由該第二電子線路結構朝向該第二半導體層之一第二下表面延伸。
在一些實施例中，該第一連結導體不同於該第二連結導體，且該第三連結導體包括一矽化物材料，該第一連結導體與該第二連結導體之其中一者包括一矽材料、另一者包括一金屬材料。
在一些實施例中，該第一電子線路結構包括一第一電子元件與耦接該第一電子元件的一第一內連接線路，且該第二電子線路結構包括一第二電子元件以及耦接該第二電子元件的一第二內連接線路。
在一些實施例中，該第一電子元件為形成於該第一半導體層之一第一基材上的一第一電晶體，該第二電子元件包括形成於該第二半導體層之一第二基材上的一第二電晶體。
在一些實施例中，該半導體結構包括一第一半導體穿孔，接觸該第一內連接線路，其中該第一半導體穿孔由該第一內連接線路朝向該第一半導體層之一第一下表面延伸。
在一些實施例中，該第一內連接線路包括一第一導電接墊與接觸該第一導電接墊的一第一導電插塞，其中該第一半導體穿孔由該第一導電接墊朝向該第一下表面延伸，且該第一導電插塞接觸該第一電子元件。
在一些實施例中，該第二內連接線路包括一第二導電接墊與接觸該第二導電接墊的一第二導電插塞，其中該第二導電插塞接觸該第二電子元件。
在一些實施例中，該半導體結構包括一第一介電材料以及一第二介電材料，該第一介電材料設於該第一上表面之上，該第一連結導體嵌設於該第一介電材料中，該第二介電材料設於該第二上表面之上，該第二連結導體嵌設於該第二介電材料中。
藉由上述半導體結構，結合之導體可包括至少一矽化物材料。此種設計可有效減少兩半導體層之間的接觸電阻，進而消耗較少能量。此外，矽化物材料具有較佳的熱穩定性。
上文已相當廣泛地概述本揭露之技術特徵及優點，俾使下文之本揭露詳細描述得以獲得較佳瞭解。構成本揭露之申請專利範圍標的之其它技術特徵及優點將描述於下文。本揭露所屬技術領域中具有通常知識者應瞭解，可相當容易地利用下文揭示之概念與特定實施例可作為修改或設計其它結構或製程而實現與本揭露相同之目的。本揭露所屬技術領域中具有通常知識者亦應瞭解，這類等效建構無法脫離後附之申請專利範圍所界定之本揭露的精神和範圍。
本揭露之以下說明伴隨併入且組成說明書之一部分的圖式，說明本揭露實施例，然而本揭露並不受限於該實施例。此外，以下的實施例可適當整合以下實施例以完成另一實施例。
「一實施例」、「實施例」、「例示實施例」、「其他實施例」、「另一實施例」等係指本揭露所描述之實施例可包含特定特徵、結構或是特性，然而並非每一實施例必須包含該特定特徵、結構或是特性。再者，重複使用「在實施例中」一語並非必須指相同實施例，然而可為相同實施例。
本文所使用之術語，僅係用於描述特定實施例，並非用於限制本發明概念。如本文中使用的，單數形式「一個（種）」和「所述（該）」也意圖包括複數形式，除非上下文清楚地另外指明。可進一步理解的是，當用在本說明書中時，術語「包含」和/或「包括」表明存在所陳述的特徵、整體、步驟、操作、元件和/或組成，但是不排除存在或增加一個或多個其它特徵、整體、步驟、操作、元件、組成、和/或其集合。
可理解的是，儘管本文可以使用術語「第一」、「第二」、「第三」等來描述各種元件、層、區域、或區段等，但是這些元件、層、區域、或區段等不應該被這些術語所限制。因為這些術語僅是用來區隔不同元件、層、區域、或區段等。所以，在不脫離本發明概念之教示的情況下，舉例而言，第一元件、層、區域、或區段亦可以被稱為第二元件、層、區域、或區段。
為了使得本揭露可被完全理解，以下說明提供詳細的步驟與結構。顯然，本揭露的實施不會限制該技藝中的技術人士已知的特定細節。此外，已知的結構與步驟不再詳述，以免不必要地限制本揭露。本揭露的較佳實施例詳述如下。然而，除了實施方式之外，本揭露亦可廣泛實施於其他實施例中。本揭露的範圍不限於實施方式的內容，而是由申請專利範圍定義。
圖1為流程圖，例示本揭露一些實施例之半導體結構200的製造方法100。圖2至4為剖面圖，例示本揭露一些實施例之半導體結構200之製造方法100之過程。在一些實施例，製造方法100包括一連串操作(102、104、106與108)，惟以下描述或說明並非用以限制操作之順序。
如圖2所示，提供第一半導體層300與第二半導體層400。第一半導體層300具有第一上表面301與第一下表面302。第二半導體層400具有第二上表面401與第二下表面402。
根據製造方法100之操作102，如圖2所示，第一連結導體350形成於第一上表面301之上。第一連結導體350耦接形成於第一半導體層300中的第一電子線路結構304。在一些實施例，第一連結導體350可以被擴散阻擋層圍繞。
在一些實施例，第一介電材料352形成於第一上表面301之上。第一連結導體350嵌設於第一介電材料352中。在一些實施例，第一介電材料352例如為氧化矽的氧化物。
在一些實施例，第一半導體穿孔310 (Through Semiconductor Via, TSV)形成於第一半導體層300中。第一半導體穿孔310耦接第一連結導體350。在一些實施例，第一半導體穿孔310包括填充有導電材料與圍繞導電材料之擴散阻擋層的穿孔。
在一些實施例，第一電子線路結構304包括第一電子元件305以及耦接第一電子元件305的第一內連接線路306。在一些實施例，第一電子元件305為形成於第一半導體層300之第一基材312上的第一電晶體。在一些實施例，第一電子元件305可以為其他元件，例如二極體、電阻、電容等。
在一些實施例，第一半導體穿孔310接觸第一內連接線路306。第一半導體穿孔310從第一內連接線路306朝向第一下表面302延伸。在一些實施例，第一內連接線路306包括第一導電接墊307與形成於第一半導體層300中的第一導電插塞308。
在一些實施例，第一半導體穿孔310由第一導電接墊307朝向第一下表面302延伸。第一導電插塞308接觸第一電子元件305與第一導電接墊307。在一些實施例，第一半導體穿孔310可藉由進行蝕刻、而後沈積等製程來形成。
根據製造方法100之操作104，如圖2所示，第二連結導體450形成於第二半導體層400之第二上表面401。第二連結導體450耦接形成於第二半導體層400中的第二電子線路結構404。
在一些實施例，第二介電材料452形成於第二上表面401之上。第二連結導體450嵌設於第二介電材料452中。在一些實施例，第二介電材料452為氧化矽或其他適合之氧化物。
在一些實施例，第二電子線路結構404包括第二電子元件405及耦接第二電子元件405的第二內連接線路406。在一些實施例，第二半導體穿孔410形成於第二半導體層400中。第二半導體穿孔410耦接第二連結導體450。在一些實施例，第二半導體穿孔410從第二內連接線路406朝向第二下表面402延伸。
在一些實施例，第二電子元件405包括形成於第二半導體層400之第二基材412上的第二電晶體。在一些實施例，第二電子元件405可包括電阻、二極體、電容等。
在一些實施例，第二內連接線路406包括第二導電接墊407與接觸第二導電接墊407的第二導電插塞408。第二導電插塞408接觸第二電子元件405。在一些實施例，第二導電接墊407以及第二導電插塞408係由導電材料形成的，例如銅、矽化物、鋁合金、或其他導電材料。
根據製造方法100之操作106，如圖3所示，結合第一連結導體350與第二連結導體450。第三連結導體550形成於第一連結導體350與第二連結導體450之間。第三連結導體550接觸第一連結導體350與第二連結導體450。在一些實施例，結合第一連結導體350與第二連結導體450之前，第一連結導體350與第二連結導體450需對準。
在一些實施例，第一連結導體350不同於第二連結導體450。經由熱處理製程或電處理製程，第三連結導體550包括由第一連結導體350與第二連結導體450形成的矽化物材料。
在一些實施例，矽化物材料可以為矽化鎢、矽化鈷、矽化鈦、矽化鎳、矽化鉬、或其組合。在一些實施例，第一連結導體350與第二連結導體450其中一者包括矽材料、另一者包括金屬材料，例如鎢、鈷、鈦、鎳、鉬等。在一些實施例，第一連結導體350與第二連結導體450亦可包括不同之矽化物材料。
根據製造方法100之操作108，如圖4所示，從第一半導體層300之第一下表面302去除第一半導體層300之一部分，顯露第一半導體穿孔310。在一些實施例，從第二半導體層400之第二下表面402去除第二半導體層400之一部分，顯露第二半導體穿孔410。
在一些實施例，製造方法100之操作108可以包括適當之去除製程，例如磨削製程、研磨製程(例如化學機械研磨製程)、蝕刻製程等。
在一些實施例，第一半導體穿孔310可另電性連接設於第一下表面302之上的線路重佈層(redistribution layer)。在一些實施例，第二半導體穿孔410可另外電性連接金屬接墊或設於第二下表面402之上的電路板的錫墊。
如圖2-圖4所示，本揭露提供一種半導體結構200。半導體結構200包括第一半導體層300、第二半導體層400、第一連結導體350、第二連結導體450以及第三連結導體550。第一半導體層300包括第一上表面301與第一電子線路結構304。第二半導體層400設於第一半導體層300之上。第二半導體層400包括第二上表面401與第二電子線路結構404。第一連結導體350設於第一上表面301之上。第一連結導體350耦接第一電子線路結構304。第二連結導體450設於第二上表面401之上。第二連結導體450耦接第二電子線路結構404。第三連結導體550設於第一連結導體350與第二連結導體450之間。第三連結導體550接觸第一連結導體350與第二連結導體450。第一連結導體350不同於第二連結導體450。第三連結導體550包括矽化物材料。第一半導體穿孔310設於第一半導體層300中。第一半導體穿孔310接觸第一電子線路結構304。第一半導體穿孔310由第一電子線路結構304朝第一下表面302延伸。第二半導體穿孔410設於第二半導體層400中。第二半導體穿孔410接觸第二電子線路結構404。第二半導體穿孔410由第二電子線路結構404朝第二下表面402延伸。第一連結導體350與第二連結導體450之其中一者包括矽材料、另一者包括金屬材料。第一電子線路結構304包括第一電子元件305與耦接第一電子元件305的第一內連接線路306。第二電子線路結構404包括第二電子元件405與耦接第二電子元件405的第二內連接線路406。第一電子元件305為形成於第一基材312上之第一電晶體，第二電子元件405包括形成於第二基材412上之第二電晶體。第一半導體穿孔310接觸第一內連接線路306。第一半導體穿孔310由第一內連接線路306朝向第一下表面302延伸。第一內連接線路306包括第一導電接墊307與接觸第一導電接墊307的第一導電插塞308。第一半導體穿孔310從第一導電接墊307朝向第一下表面302延伸。第一導電插塞308接觸第一電子元件305。第二內連接線路406包括第二導電接墊407與接觸第二導電接墊407的第二導電插塞408。第二導電插塞408接觸第二電子元件405。第一介電材料352設於第一上表面301之上。第一連結導體350嵌設於第一介電材料352。第二介電材料452設於第二上表面401之上。第二連結導體450嵌設於第二介電材料452。
總之，藉由上述半導體結構，結合之導體可包括至少一矽化物材料。此種設計可有效減少兩半導體層之間的接觸電阻，進而消耗較少能量。此外，矽化物材料具有較佳的熱穩定性。
雖然已詳述本揭露及其優點，然而應理解可進行各種變化、取代與替代而不脫離申請專利範圍所定義之本揭露的精神與範圍。例如，可用不同的方法實施上述的許多製程，並且以其他製程或其組合替代上述的許多製程。
本揭露一方面提供一種半導體結構的製造方法。該製造方法包括：形成一第一連結導體於一第一半導體層的一第一上表面之上，其中該第一連結導體係耦接形成於該第一半導體層中的一第一電子線路結構；形成一第二連結導體於一第二半導體層的一第二上表面上，其中該第二連結導體係耦接形成於該第二半導體層中的一第二電子線路結構；以及結合該第一連結導體與該第二連結導體，其中一第三連結導體形成於該第一連結導體與該第二連結導體之間，且該第三連結導體接觸該第一連結導體與該第二連結導體。
本揭露另一方面提供一半導體結構，該半導體結構包括一第一半導體層，包括一第一上表面與一第一電子線路結構；一第二半導體層，設於該第一半導體層之上，其中該第二半導體層包括一第二上表面以及一第二電子線路結構；一第一連結導體，設於該第一上表面之上，其中該第一連結導體耦接該第一電子線路結構；一第二連結導體，設於該第二上表面之上，其中該第二連結導體耦接該第二電子線路結構；以及一第三連結導體，設於該第一連結導體與該第二連結導體之間，其中該第三連結導體接觸該第一連結導體與該第二連結導體。
再者，本申請案的範圍並不受限於說明書中所述之製程、機械、製造、物質組成物、手段、方法與步驟之特定實施例。該技藝之技術人士可自本揭露的揭示內容理解可根據本揭露而使用與本文所述之對應實施例具有相同功能或是達到實質相同結果之現存或是未來發展之製程、機械、製造、物質組成物、手段、方法、或步驟。據此，此等製程、機械、製造、物質組成物、手段、方法、或步驟係包含於本申請案之申請專利範圍內。
100        製造方法 102        操作 104        操作 106        操作 108        操作 200        半導體結構 300        第一半導體層 301        第一上表面 302        第一下表面 304        第一電子線路結構 305        第一電子元件 306        第一內連接線路 307        第一導電接墊 308        第一導電插塞 310        第一半導體穿孔 312        第一基材 350        第一連結導體 352        第一介電材料 400        第二半導體層 401        第二上表面 402        第二下表面 404        第二電子線路結構 405        第二電子元件 406        第二內連接線路 407        第二導電接墊 408        第二導電插塞 410        第二半導體穿孔 412        第二基材 450        第二連結導體 452        第二介電材料 550        第三連結導體
參閱實施方式與申請專利範圍合併考量圖式時，可得以更全面了解本申請案之揭示內容，圖式中相同的元件符號係指相同的元件。 圖1為流程圖，例示本揭露一些實施例之半導體結構的製造方法；以及 圖2至4為剖面圖，例示本揭露一些實施例之半導體結構製造方法之過程。
200        半導體結構 300        第一半導體層 301        第一上表面 302        第一下表面 304        第一電子線路結構 305        第一電子元件 306        第一內連接線路 307        第一導電接墊 308        第一導電插塞 310        第一半導體穿孔 312        第一基材 350        第一連結導體 352        第一介電材料 400        第二半導體層 401        第二上表面 402        第二下表面 404        第二電子線路結構 405        第二電子元件 406        第二內連接線路 407        第二導電接墊 408        第二導電插塞 410        第二半導體穿孔 412        第二基材 450        第二連結導體 452        第二介電材料 550        第三連結導體

Claims (8)

  1. 一種半導體結構的製造方法，包括：形成一第一連結導體於一第一半導體層的一第一上表面之上，其中該第一連結導體耦接形成於該第一半導體層中的一第一電子線路結構；形成一第二連結導體於一第二半導體層的一第二上表面上，其中該第二連結導體係耦接形成於該第二半導體層中的一第二電子線路結構；結合該第一連結導體與該第二連結導體，其中一第三連結導體形成於該第一連結導體與該第二連結導體之間，且該第三連結導體接觸該第一連結導體與該第二連結導體；形成一第一半導體穿孔於該第一半導體層中，其中該第一半導體穿孔耦接該第一連結導體；以及去除該第一半導體層之一部分，從該第一半導體層之一第一下表面，顯露該第一半導體穿孔。
  2. 如請求項1所述的製造方法，另包括：形成一第二半導體穿孔於該第二半導體層中，其中該第二半導體穿孔耦接該第二連結導體。
  3. 如請求項1所述的製造方法，其中該第一電子線路結構包括一第一電子元件以及耦接該第一電子元件的一第一內連接線路，且該第二電子線路結構包括一第二電子元件以及耦接該第二電子元件的一第二內連接線路。
  4. 如請求項3所述的製造方法，其中該第一電子元件為形成於該第一半導體層之一第一基材上的一第一電晶體，且該第二電子元件包括形成於該第二半導體層之一第二基材上的一第二電晶體。
  5. 如請求項3所述的製造方法，另包括：形成一第一半導體穿孔，接觸該第一內連接線路，其中該第一半導體穿孔由該第一內連接線路朝向該第一半導體層之一第一下表面延伸。
  6. 如請求項5所述的製造方法，另包括：形成一第一導電接墊以及該第一內連接線路之一第一導電插塞，其中該第一半導體穿孔由該第一導電接墊朝該第一下表面延伸，且該第一導電插塞係接觸該第一電子元件與該第一導電接墊。
  7. 如請求項1所述的製造方法，其中該第一連結導體不同於該第二連結導體，該第三連結導體包括由該第一連結導體與該第二連結導體形成的一矽化物材料，該第一連結導體與該第二連結導體之其中一者包括一矽材料、另一者包括一金屬材料，且該第三連結導體係藉由一熱處理製程或一電處理製程而形成的。
  8. 如請求項1所述的製造方法，另包括：形成一第一介電材料於該第一上表面之上，其中該第一連結導體嵌設於該第一介電材料中；以及形成一第二介電材料於該第二上表面之上，其中該第二連結導體嵌 設於該第二介電材料中。
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