TWI689061B - 具有熱導柱之積體電路封裝 - Google Patents

具有熱導柱之積體電路封裝 Download PDF

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TWI689061B
TWI689061B TW106128747A TW106128747A TWI689061B TW I689061 B TWI689061 B TW I689061B TW 106128747 A TW106128747 A TW 106128747A TW 106128747 A TW106128747 A TW 106128747A TW I689061 B TWI689061 B TW I689061B
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die
molding compound
thermally conductive
conductive pillar
integrated circuit
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TW106128747A
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TW201842635A (zh
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盧克Ｇ 英格蘭
凱薩琳Ｃ 里維拉
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美商格芯（美國）集成電路科技有限公司
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Abstract

本揭示內容的具體實施例係有關於一種積體電路(IC)封裝，其包括位在一第一晶粒上且側向鄰接位在該第一晶粒上之一晶粒堆疊的一模塑料。該晶粒堆疊使該第一晶粒電氣耦合至一最上面晶粒，以及一熱導柱從該第一晶粒延伸穿過該模塑料到該模塑料的上表面。該熱導柱係與該晶粒堆疊及該最上面晶粒電氣隔離。該熱導柱側向抵接且接觸該模塑料。

Description

具有熱導柱之積體電路封裝
本揭示內容係有關於經結構化成能忍受升高工作溫度的積體電路(IC)封裝。特別是，本揭示內容的具體實施例包括積體電路封裝，其包括延伸穿過封裝之模塑料(molding compound)的一或更多熱導柱(thermally conductive pillar)，及其形成方法。
在半導體積體電路(IC)晶片的倒裝晶片加工中，可實作例如受控塌陷晶片連接(controlled collapse chip connect，C4)焊球的金屬接觸，以使IC晶粒連接至封裝及/或互相連接。在形成時，各金屬接觸可提供耦合於直接連接IC晶片之間的導電結構以用作兩個晶片之間的機械及電氣連接。這些組件可一起界定IC“封裝”，亦即，特定晶片或裝置的殼體。該封裝一般包括用於使特定晶片與外部電路電氣連接的各元件，且也可經結構化成可包括及/或耦合至為晶片之主動元件提供物理及化學保護的元件。
在晶片的操作期間，熱可能從IC結構的組件耗散到封裝。在用於三維封裝IC的晶粒對晶圓 (die-to-wafer)總成中，可包括一或更多模塑料供使用於後續的處理及測試。此類模塑料通常用作熱傳導的屏障，且在有些情形下，可阻止熱從IC結構傳遞到封裝的蓋體。因此，模塑料在封裝中的存在可與升高工作溫度相關，例如，相對於產品規格或沒有模塑料在其中的結構類似晶片。
本揭示內容的第一方面提供一種積體電路(IC)封裝，其包括：一模塑料，其位在一第一晶粒上且側向鄰接位在該第一晶粒上之一晶粒堆疊，其中，該晶粒堆疊使該第一晶粒電氣耦合至該晶粒堆疊的一最上面晶粒；以及一熱導柱，其從該第一晶粒延伸穿過該模塑料到該模塑料之上表面，其中，該熱導柱係與該晶粒堆疊及該晶粒堆疊之該最上面晶粒電氣隔離，以及其中，該熱導柱側向抵接且接觸該模塑料。
本揭示內容的第二方面提供一種積體電路(IC)封裝，其包括：一第一晶粒，其耦合至複數個金屬接觸；一晶粒堆疊，其位在該第一晶粒上且電氣耦合至該複數個金屬接觸；一模塑料，其位在該第一晶粒上且側向鄰接該晶粒堆疊；一熱導柱，其位在該第一晶粒上且延伸穿過該模塑料到彼之上表面，其中，該熱導柱係與該晶粒堆疊及該複數個金屬接觸電氣隔離，以及其中，該熱導柱側向抵接且接觸該模塑料；以及一最上面晶粒，其接觸及上覆該晶粒堆疊，其中，該模塑料使該晶粒堆疊之該最上面晶粒與該熱導柱電氣隔離。
本揭示內容的第三方面提供一種形成積體電路(IC)封裝之方法，該方法包括：將複數個金屬接觸裝在一第一晶粒上，該第一晶粒包括耦合至該複數個金屬接觸的複數個連接通孔；形成一熱導柱於該第一晶粒上且側向偏離該複數個連接通孔；形成一晶粒堆疊於該複數個連接通孔上，致使該晶粒堆疊側向偏離該熱導柱；以及形成一模塑料於該第一晶粒上，致使該模塑料側向隔離且電氣隔離該熱導柱與該晶粒堆疊，其中，在形成後，該模塑料側向抵接且接觸該熱導柱。
102‧‧‧金屬接觸
104‧‧‧第一晶粒
106‧‧‧連接通孔
108‧‧‧(暫時性)黏合絕緣體
110‧‧‧暫時性晶圓
120‧‧‧熱導柱
130‧‧‧堆疊晶粒(晶粒堆疊)
132‧‧‧金屬線
134‧‧‧通孔
136‧‧‧最上面晶粒
140‧‧‧模塑料
150‧‧‧積體電路封裝
152‧‧‧互連墊
154‧‧‧有機疊層
156‧‧‧銲錫凸塊或金屬接觸
160‧‧‧黏合塗層
170‧‧‧封裝蓋
180‧‧‧晶圓結構
J‧‧‧直徑
P‧‧‧參考線
將參考以下附圖詳述本揭示內容的具體實施例，其中類似的元件用相同的元件符號表示。
第1圖根據本揭示內容之具體實施例圖示裝上第一晶粒之複數個金屬接觸在平面X-Z的橫截面圖。
第2圖根據本揭示內容之具體實施例圖示加工中之第一晶粒在平面X-Z的橫截面圖。
第3圖根據本揭示內容之具體實施例圖示形成於第一晶粒上之數個熱導柱在平面X-Z的橫截面圖。
第4圖根據本揭示內容之具體實施例圖示形成於第一晶粒上之晶粒堆疊在平面X-Z的橫截面圖。
第5圖根據本揭示內容之具體實施例圖示形成於第一晶粒上之模塑料之陣列在平面X-Z的橫截面圖。
第6圖根據本揭示內容之具體實施例圖示 正被平坦化之模塑料在平面X-Z的橫截面圖。
第7圖根據本揭示內容之具體實施例圖示暫時性晶圓被移除以暴露金屬接觸在平面X-Z的橫截面圖。
第8圖根據本揭示內容之具體實施例圖示積體電路(IC)封裝在平面X-Z的橫截面圖。
第9圖根據本揭示內容之具體實施例圖示積體電路(IC)封裝的透視圖。
第10圖根據本揭示內容之具體實施例圖示正要從晶圓切割之積體電路(IC)封裝在平面X-Y的平面圖。
應注意，本揭示內容的附圖不一定按比例繪製。附圖旨在僅僅描繪本揭示內容的典型方面，因此不應被視為用來限制本揭示內容的範疇。附圖中，類似的元件用相同的元件符號表示。
在以下說明中，參考形成彼之一部份且舉例圖示可實施本發明教導之特定示範具體實施例的附圖。充分詳述這些具體實施例使得熟諳此藝者能夠實施本發明教導，且應瞭解，可使用其他具體實施例及做出改變而不脫離本發明教導的範疇。因此，以下說明僅為示範。
請參考第1圖，本揭示內容係有關於包括例如能忍受升高工作溫度之熱導柱的積體電路(IC)封裝，及其形成方法。提及於本文的各種元件以在平面X-Z中的 二維橫截面描繪；也在本文的他處描述同一個或類似元件在不同二維平面中或在三維空間中的視圖。根據本揭示內容的製造技術可包括：將複數個金屬接觸102裝在第一晶粒104上。第一晶粒104可至少部份由任何當前已知或以後開發的半導體材料構成，可包括但不限於：矽、鍺、碳化矽，以及實質由有由公式AlX1GaX2InX3AsY1PY2NY3SbY4界定之組合物的一或更多III-V族化合物半導體組成之物質，在此X1、X2、X3、Y1、Y2、Y3及Y4為相對比例，各個大於或等於零且X1+X2+X3+Y1+Y2+Y3+Y4=1(1為總相對莫耳量)。其他合適物質可包括有組合物ZnA1CdA2SeB1TeB2的II-VI族化合物半導體，在此A1、A2、B1及B2為相對比例，各個大於或等於零且A1+A2+B1+B2=1(1為總莫耳量)。裝在第一晶粒104上的各金屬接觸102，例如，可由銲錫凸塊構成，包括一或更多可焊接材料、傳導柱(例如，有傳導帽蓋的金屬柱，例如，以錫為帽蓋的銅柱)，及/或任何當前已知或以後開發的導電材料。根據一具體實施例，金屬接觸102，例如，可由有錫及鉛、有錫無鉛、有錫及銅或銀、錫鉍(tin bismuth)、錫銦(tin indium)等等之殘留物的材料形成。金屬接觸102的尺寸至少部份可取決於第一晶粒104及與金屬接觸102連接之其他結構的尺寸(例如，表面積、深度等等)。例如，一或更多金屬接觸102可有不同的尺寸以適應產品的變動載流能力(varying current carrying capacity)及/或間隔要求。
如圖所示，第一晶粒104可包括在其中的 複數個連接通孔106。各連接通孔106可至少部份延伸穿過第一晶粒104到在第一晶粒104之一表面上的接觸點，例如，連接墊(未圖示)。然後，金屬接觸102可藉由形成於其上來電氣連接至各個連接通孔106。各金屬接觸102可經定位成可界定通到一或更多連接通孔106及/或在其下面之連接墊(未圖示)的電氣連接。連接通孔106一般可包括蝕刻穿過第一晶粒104中之半導體材料的一或更多導電材料，以提供與3D晶圓級封裝相容的晶圓對晶圓(wafer-to-wafer)互連方案，例如，使用形成於接觸墊上之金屬接觸102通到底下結構(例如，BEOL介電質材料及/或其他外部結構)的電氣連接。各連接通孔106可用來使第一晶粒104上的電路元件連接至其他組件。連接通孔106可包括以彼等之結構為中心周向設置的實質環形耐火金屬襯墊(未圖示)用以提供附加電氣絕緣及用以防止連接通孔106與在第一晶粒104中的鄰近結構之間的電遷移(electromigration)。此類襯墊可由任何當前已知或以後開發的導電材料構成，例如，耐火金屬，例如釕(Ru)、鉭(Ta)、鈦(Ti)、鎢(W)、銥(Ir)、銠(Rh)及鉑(Pt)等等，或彼等之混合物。在一特定具體實施例中，在第一晶粒104內的一或更多連接通孔106可體現為電源供應通孔(power supply via)用以傳輸大於其他連接通孔106的電流量。如第1圖所示，各連接通孔106在第一晶粒104的軸端之間可實質垂直延伸穿過它。儘管連接通孔106在附圖中呈實質柱形，然而在其他具體實施例中，連接通孔106可具有不同的結構。更一般地，連接通孔106可具有任何所欲形狀或尺寸，且可包括，例如，各自可具有線性輪廓、曲線輪廓、波型輪廓、不規則輪廓等等的一或更多電氣連接構件。
可形成附加材料以屏蔽金屬接觸102、連接通孔106及/或其他元件以免在描述於本文的後續製造步驟中被修改及加工。例如，暫時性黏合絕緣體108可塗在第一晶粒104及/或連接通孔106的暴露部份上，例如，藉由旋塗及/或膜疊層製程(film lamination process)用以形成聚合物於材料上。黏合絕緣體108可包括有黏性的一或更多電絕緣材料。作為實施例，暫時性黏合絕緣體108可包括一或更多電絕緣黏合材料，例如脲烷(urethane)、矽氧樹脂、及/或其他黏合樹脂材料。在本技藝或者被識為“操作晶圓(handle wafer)”的暫時性晶圓110也可位在金屬接觸102及黏合絕緣體108上(例如，可用機械方式放在其上，如第1圖中的箭頭所示)。黏合絕緣體108可使第一晶粒104機械耦合至暫時性晶圓110。暫時性晶圓110可包括能夠機械接合至第一晶粒104的任何合適材料，例如，包括在第一晶粒104之組合物中的一或更多半導體材料，及/或可包括與導電率無關的一或更多不同材料(例如，玻璃)。
翻到第2圖，本揭示內容可包括修改第一晶粒104的結構，例如，以為隨後形成於其上的結構元件製備第一晶粒104。在一具體實施例中，如圖所示，製造者可翻轉第一晶粒104及暫時性晶圓110以暴露第一晶粒104的反面(即，金屬接觸102位於第一晶粒104下面)。然 後，可移除第一晶粒104內的半導體材料，例如，藉由背面研磨，接著是乾蝕刻及化學平面平坦化(chemical planar planarization，CMP)或用於移除部份結構的其他當前已知或以後開發技術，如第2圖中的箭頭所示。CMP通常指用於用化學機械加工移除實心材料層的任何製程，例如，用以金屬互連圖案的表面平坦化及界定。在加工後，如第2圖所示，連接通孔106可在相對兩面之間延伸穿過第一晶粒104。在平坦化後，第一晶粒104在相對垂直兩面之間可具有例如約50微米(μm)的厚度。因此，第一晶粒104的上表面可與暴露連接通孔106的上表面實質共面。
翻到第3圖，本揭示內容可包括形成一或更多熱導柱120於第一晶粒104上。熱導柱120可經結構化成可提供第一晶粒104的熱流通，例如，以在IC裝置的操作期間使熱從第一晶粒104轉移到其他結構。各熱導柱120可包括一或更多導熱金屬及/或用以傳輸熱的其他材料。根據一實施例，熱導柱120可包括銅(Cu)、鋁(Al)及/或其他導電材料。可在第一晶粒104中與連接通孔106電氣隔離的區域上形成熱導柱120。如圖所示，各熱導柱120可側向偏離在第一晶粒104上的連接通孔106，從而與各連接通孔106電氣分離。儘管熱導柱120在有些情形下可至少部份垂直對齊在第一晶粒104之對面上的金屬接觸102，然而熱導柱120可經定位成與連接通孔106及與其耦合的金屬接觸102電氣隔離。例如，用電鍍、沉積及/或形成導電材料於第一晶粒104上的其他方式，可形成熱導柱120。“電鍍”通常指一種將數個金屬薄層鍍於浸入其中含有金屬離子之電解液的加偏壓晶圓結構(例如，第一晶粒104)的表面上的製程。電鍍可選擇性地在先前已例如藉由沉積形成的一或更多種子層上形成材料。如本文所使用的，“沉積(deposition)”或“沉積(depositing)”材料(例如，熱導柱120)可包括適用於待沉積材料的任何當前已知或以後開發技術，包括但不限於，例如：化學氣相沉積(chemical vapor deposition，CVD)、低壓CVD(LPCVD)、電漿增強式CVD(PECVD)、半大氣CVD(SACVD)及高密度電漿CVD(HDPCVD)、快速退火CVD(RTCVD)、超過真空CVD(UHVCVD)、有限反應加工CVD(LRPCVD)、金屬有機CVD(MOCVD)、濺鍍沉積、離子束沉積、電子束沉積、雷射輔助沉積、熱氧化、熱氮化、旋塗方法、物理氣相沉積(physical vapor deposition，PVD)、原子層沉積(atomic layer deposition，ALD)、化學氧化、分子束磊晶(molecular beam epitaxy，MBE)、噴鍍(plating)、蒸發，除了當前已知或以後開發的其他沉積製程以外。
翻到第4圖，本揭示內容的具體實施例可包括在形成熱導柱120後，形成一群堆疊晶粒(stacked dies)130至第一晶粒104的連接通孔106。如圖所示，堆疊晶粒130可包括通過第一晶粒104之連接通孔106至金屬接觸102的一或更多電氣耦合。可用在習知積體電路封裝製造中形成包括金屬線等等之晶粒堆疊的任何當前已知或以後開發製程製成堆疊晶粒130。例如，藉由順序晶粒 對晶圓堆疊配線層於在第一晶粒104上面之介電質材料(例如，一或更多層間介電質材料(inter-level dielectric material，ILD))中，可形成堆疊晶粒130。因此，堆疊晶粒130可包括相繼配置於諸層中的金屬線132，其中通孔134延伸穿過絕緣體材料且將金屬線132連接在一起。第4圖所示金屬線132及通孔134的組態為示範配置，以及本揭示內容的具體實施例可想到金屬線132及通孔134的替代配置。
堆疊晶粒130可包括位在彼等之上表面上的最上面晶粒136，例如，以界定最上面層及/或電氣連接至其他結構或接觸。最上面晶粒136主要可包括描述於本文與第一晶粒104有關的一或更多半導體材料及/或可包括其他半導體材料。最上面晶粒136視需要可包括，例如，導電線、通孔、接觸等等(未圖示)，以使底下的結構電氣連接在一起。最上面晶粒136也可有比第一晶粒104大的厚度，例如，以適應在後續製程被移除的材料。不論任何選定設計及配置如何，堆疊晶粒130可與熱導柱120側向分離及電氣隔離。儘管為了示範將堆疊晶粒130描述成是在熱導柱120後形成，然而應瞭解，在替代具體實施例中，堆疊晶粒130在熱導柱120之前可形成於第一晶粒104的連接通孔106上。
請參考第5圖，本揭示內容的具體實施例可包括形成模塑料140於第一晶粒104上。形成模塑料140於第一晶粒104上可埋藏熱導柱120及在其下的堆疊晶粒 130。模塑料140可包括，例如，一或更多電絕緣樹脂材料，包括但不限於：二氧化矽(SiO2)、氧化鋁(Al2O3)、或有類似性質的其他模塑料。模塑料140可形成於第一晶粒104上，而熱導柱120在被處理或以其他方式允許它在底下結構上固化成固相之前處於未固化的液相。不管用什麼方法體現，模塑料140可側向抵接且接觸熱導柱120而不干預側向位在其間的材料。亦即，與例如半導體貫穿孔(through-semiconductor vias，TSV)的其他傳導結構相比，熱導柱120可缺少耐火金屬襯墊及/或使其材料組合物與模塑料140分離的其他結構。因此，模塑料140可使熱導柱120與經組配成可傳輸電流通過的其他結構(例如，連接通孔106與堆疊晶粒130)物理及電氣分離。在模塑料140形成後，熱導柱120、最上面晶粒136及/或模塑料140在第一晶粒104以上的總高度可大於各結構元件在最終積體電路封裝中的規定高度。
翻到第6圖，根據本揭示內容的方法可包括修改先前形成的結構以產生預定的尺寸及形狀供隨後使用於積體電路封裝。例如，本揭示內容的具體實施例可包括平坦化模塑料140及位於其下的其他結構。如第6圖中的箭頭所示，本揭示內容可包括平坦化模塑料140以及導熱柱120及/或堆疊晶粒130，例如，用機械研磨及/或用於從先驅結構產生平坦化上表面的其他製程。此類製程可移除模塑料140的暴露部份且可進一步部份減少位於其下之材料的厚度。在平坦化結束後，模塑料140的上表面可與 導熱柱120及堆疊晶粒130的上表面實質共面，例如，沿著第6圖的參考線P。可控制平坦化的數量及/或對應時間長度以產生有預定尺寸的各種組件，例如，熱導柱120及堆疊晶粒130，以滿足預定規格。在一示範具體實施例中，熱導柱120在第一晶粒104以上可延伸到有至少約250微米的高度，例如，約300微米。可略減(shade)各熱導柱120的直徑-高度之深寬比以適應堆疊晶粒130的尺寸及形狀。例如，在堆疊晶粒包括例如總共4個晶粒時，各熱導柱120的直徑-高度之深寬比可約為一比一，例如，如熱導柱120的直徑與高度圖示為約有相同的直徑J。在其他情形下，例如，堆疊晶粒130含有8個晶粒，相應地，可調整各熱導柱120的直徑-高度之深寬比，例如，達大約二比一。因此，各熱導柱120的尺寸及尺寸比例在結構上可與IC中的習知傳導結構(例如，通孔、TSV等等)不同，除了在操作上可與此類結構區別以外。
翻到第7圖，本揭示內容可包括從暫時性晶圓110移除描述於本文的各種結構(第1圖至第6圖)。特別是，暫時性晶圓110可與金屬接觸102分離以暴露黏合絕緣體108(第1圖至第6圖)。可從金屬接觸102移除暫時性晶圓110，例如，用任何當前已知或以後開發的晶圓分離技術(例如，化學及/或機械晶圓分離)。黏合絕緣體108的移除也可藉由用於從結構移除絕緣材料的任何當前已知或以後開發製程，例如，化學溶解、選擇性或非選擇性蝕刻等等。根據用於使電路在焊接互連處連結在一起的任何 當前已知或以後開發製程流程，例如，倒裝晶片加工方案，移除黏合絕緣體108及暫時性晶圓110可讓金屬接觸102連結至封裝結構。無論如何，描述本文的本揭示內容具體實施例可產生集成於較大IC結構中的積體電路封裝150。
在操作期間，藉由流通通過容納於模塑料140內的熱導柱120，累積於第一晶粒104、堆疊晶粒130等等內的熱能可逸出到環境及/或其他結構。在習知裝置中，由於模塑料140的熱絕緣，在習知封裝中的第一晶粒之溫度可接近或超過臨界限度(threshold limit)(例如，比規定操作溫度高30或更多℃)。藉由提供在第一晶粒104與一或更多散熱器之間的熱途徑(thermal pathway)，例如描述本文別處的封裝蓋170，有熱導柱120在其中的積體電路封裝150可使第一晶粒104的操作溫度降到臨界值以下。此外，如本文所證實的，在少許修改習知加工技術下，熱導柱120在結構上可集成於積體電路封裝150中。
請參考一起第8圖及第9圖，積體電路封裝150圖示成與各種結構元件集成以形成較大的結構。在第8圖的平面X-Z中圖示積體電路封裝150的橫截面圖。為了進一步圖解說明，第9圖描繪在三維(X-Y-Z)空間中的積體電路封裝150。如本文所述，積體電路封裝150可包括模塑料140，其位在第一晶粒104上且側向鄰接位在第一晶粒104上的堆疊晶粒130。堆疊晶粒130可使第一晶粒104電氣耦合至最上面晶粒136，如本文所述。一或更多熱導柱120可從第一晶粒104延伸穿過模塑料140到它 的上表面，以及各熱導柱120係與堆疊晶粒130及最上面晶粒136電氣隔離。儘管如此，熱導柱120可側向抵接且接觸模塑料140，藉此傳導來自積體電路封裝150之第一晶粒104的熱。
金屬接觸102可經定位成與在直接位於第一晶粒104下面之有機疊層154(例如，一或更多印刷電路板(PCB))上的由互連墊152組成之對應集合(第8圖)接觸。有機疊層(organic laminate)154更可包括電路及/或其他傳導元件(未圖示)，以使第一晶粒104電氣耦合至IC結構的其他元件。有機疊層154本身可包括一或更多銲錫凸塊156用於提供通到外部元件的電氣連接。相對於金屬接觸102，有機疊層154的銲錫凸塊156可有較大的尺寸，例如，以適合一或更多設計規格或限制。應瞭解，金屬接觸102、156在製造期間可完全或部份熔解以增加積體電路封裝150和與其連接之電路元件之間的機械及/或電氣接合。此外，應瞭解，可形成與金屬接觸102、156接觸及/或緊鄰的一或更多黏合絕緣體以增加結構接合，如在說明暫時性晶圓110(第1圖至第6圖)時所述。
只參考第8圖，可提供附加結構以結構性保護及/或隱藏積體電路封裝150。例如，在有機疊層154的一部份及/或外圓周上可形成黏合塗層(adhesive coating)160。黏合塗層160可包括包括在描述於本文他處之黏合絕緣體108(第1圖至第6圖)之組合物中的一或更多材料，及/或可包括任何其他當前已知或以後開發的材料用於把IC 裝置的兩個結構元件接合在一起。通過黏合塗層160，封裝蓋170可機械耦合至有機疊層154。封裝蓋170可包括，例如，一或更多金屬及/或陶瓷材料，其經組配成可通過黏合塗層160及/或通過一或更多硬焊接合(brazed coupling)、密封件及/或其他結構接合技術接合至有機疊層154。
翻到第10圖，形成多個積體電路封裝150可藉由使它的組件與較大的結構分離，例如，在描述於本文的各種製造技術之後。如在第10圖之平面X-Y內的平面圖所示，單一晶圓結構180可經製造成包括模塑料140、多個熱導柱120，各自具有位在其上之最上面晶粒136的多個晶粒堆疊130。包括在晶圓結構180中的各種結構可聚集在一起以便包括在個別產品單元內，例如，使一最上面晶粒136沿著假想線與模塑料140在附近的部份及形成於其中的熱導柱120群組聚集在一起。儘管熱導柱120包括在模塑料140內，然而製造者可將晶圓結構180切割成個別的積體電路封裝150，例如，用任何當前已知或以後開發的程序用於將晶圓分成數個單一產品單元。然後，各積體電路封裝150可連接至其他結構及/或封裝元件，如本文在說明第8圖至第9圖時所述。儘管第10圖之實施例的一晶圓結構180被切割成有熱導柱120在其中的12個單元，然而晶圓結構180的尺寸及形狀可製作成含有任何所欲單元個數(例如，20個單元、50個單元、100個單元、1000個單元等等)。
如以上所述的方法係在製造積體電路晶片時使用。所得積體電路晶片可由製造者以原始晶圓形式(raw wafer form)(也就是具有多個未封裝晶片的單一晶圓)、作為裸晶粒(bare die)或已封裝的形式來銷售。在後一情形下，晶片裝在單晶片封裝中(例如，塑膠載體(plastic carrier)，具有固定至主機板或其他更高層載體的引腳(lead))，或多晶片封裝體中(例如，具有表面互連件(surface interconnection)或內嵌互連件(buried interconnection)任一或兩者兼具的陶瓷載體)。然後，在任一情形下，晶片與其他晶片、離散電路元件及/或其他信號處理裝置集成成為(a)中間產品(例如，主機板)，或(b)最終產品中之任一者的一部分。
用於本文的術語只為了要描述特定具體實施例而非旨在限制本揭示內容。如本文所使用的，單數形式“一(a)”、“一(an)”、及“該(the)”旨在也包括複數形式，除非上下文中另有明確指示。更應瞭解，用語“包含(comprises)”及/或“包含(comprising)”在使用於專利說明書中時係具體描述提及之特徵、整數、步驟、操作、元件及/或組件的存在，但不排除存在或加入一或更多其他特徵、整數、步驟、操作、元件及/或彼等之群組。“視需要的”或“視需要地”意指隨後所述事件或情況可能發生也可能不發生，以及該描述包括發生事件的實例與不發生事件的實例。
可應用如用於本專利說明書及申請專利範 圍中的近似語以修飾允許改變而不導致相關基本功能改變的任何數量表示法。因此，用一用語或數個用語例如“約”、“大約”及“實質上”修飾的數值，不受限於指定的確切數值。至少在某些情況下，該近似語可對應至用於測量該數值之儀器的精確度。在本專利說明書及申請專利範圍中，範圍限制可予以組合及/或互換，此類範圍被識別且包括包含於其中的所有子範圍，除非上下文或語言另有說明。適用於一範圍中之一特定數值的“大約”適用於可表示提及數值的+/-10%的兩個數值，且除非取決於測量該數值之儀器的精確度。
所有構件或步驟的對應結構、材料、動作以及等效物加上下列申請專利範圍之中的功能元件旨在包括用於與其他主張元件結合一起按具體主張方式完成功能的任何結構、材料或動作。提出本揭示內容的描述是為了圖解說明而非旨在窮盡或以所揭示之形式限制本揭示內容。本技藝一般技術人員明白有許多修改及變體而不脫離本揭示內容的範疇及精神。該具體實施例經選擇及描述成可最佳地解釋本揭示內容的原理及其實際應用，且使得本技藝的其他一般技術人員能夠了解本揭示內容有不同修改的不同具體實施例適合使用於想到的特定用途。
102‧‧‧金屬接觸
104‧‧‧第一晶粒
120‧‧‧熱導柱
130‧‧‧堆疊晶粒或晶粒堆疊
140‧‧‧模塑料
150‧‧‧積體電路封裝
152‧‧‧互連墊
154‧‧‧有機疊層
156‧‧‧銲錫凸塊或金屬接觸
160‧‧‧黏合塗層
170‧‧‧封裝蓋

Claims (18)

  1. 一種積體電路(IC)封裝，其包含：一模塑料，其位在一第一晶粒上且側向鄰接位在該第一晶粒上之一晶粒堆疊，其中，該晶粒堆疊使該第一晶粒電氣耦合至在該晶粒堆疊中的一最上面晶粒；一熱導柱，其從該第一晶粒延伸穿過該模塑料到該模塑料之上表面，其中，該熱導柱係與該晶粒堆疊及該最上面晶粒電氣隔離，以及其中，該熱導柱側向抵接且接觸該模塑料；以及複數個金屬接觸，其位在該第一晶粒與直接位於該第一晶粒下面的有機疊層上的一互連墊之間，其中，該複數個金屬接觸直接接觸該互連墊以電氣耦合該第一晶粒至該互連墊。
  2. 如申請專利範圍第1項所述之積體電路封裝，其中，該熱導柱包含銅(Cu)或鋁(Al)中之一者。
  3. 如申請專利範圍第1項所述之積體電路封裝，其中，該模塑料包含其中具有二氧化矽(SiO2)或氧化鋁(Al2O3)中之一者的一樹脂材料。
  4. 如申請專利範圍第1項所述之積體電路封裝，其中，該熱導柱包含位在該第一晶粒上且與該晶粒堆疊電氣隔離的複數個熱導柱中之一者。
  5. 如申請專利範圍第1項所述之積體電路封裝，其中，該熱導柱的上表面經定位成至少高於該第一晶粒約有 250微米(μm)。
  6. 如申請專利範圍第1項所述之積體電路封裝，其中，該熱導柱之上表面與該熱導柱之一側向側壁的深寬比在約一比一與約二比一之間。
  7. 一種積體電路(IC)封裝，其包含：一第一晶粒，其耦合至該第一晶粒下面的複數個金屬接觸；一晶粒堆疊，其位在該第一晶粒上且通過該第一晶粒的連接通孔電氣耦合至該複數個金屬接觸；一模塑料，其位在該第一晶粒上且側向鄰接該晶粒堆疊；一熱導柱，其位在該第一晶粒上且延伸穿過該模塑料到該模塑料之上表面，其中，該熱導柱係與該晶粒堆疊及該複數個金屬接觸電氣隔離，以及其中，該熱導柱側向抵接且接觸該模塑料；以及一最上面晶粒，其接觸及上覆該晶粒堆疊，其中，該模塑料使該最上面晶粒與該熱導柱電氣隔離。
  8. 如申請專利範圍第7項所述之積體電路封裝，其中，該熱導柱包含銅(Cu)或鋁(Al)中之一者。
  9. 如申請專利範圍第7項所述之積體電路封裝，其中，該模塑料包含其中具有二氧化矽(SiO2)或氧化鋁(Al2O3)中之一者的一樹脂材料。
  10. 如申請專利範圍第7項所述之積體電路封裝，其中，該熱導柱包含位在該第一晶粒上且與該晶粒堆疊電氣 隔離的複數個熱導柱中之一者。
  11. 如申請專利範圍第7項所述之積體電路封裝，其中，該複數個金屬接觸使該第一晶粒電氣耦合至位在該複數個金屬接觸下面的一互連墊。
  12. 一種形成積體電路(IC)封裝之方法，該方法包含：將複數個金屬接觸裝在一第一晶粒上，該第一晶粒包括耦合至該複數個金屬接觸的複數個連接通孔；形成一熱導柱於該第一晶粒上且側向偏離該複數個連接通孔；形成一晶粒堆疊於該複數個連接通孔上，致使該晶粒堆疊側向偏離該熱導柱；形成一模塑料於該第一晶粒上，致使該模塑料側向且電氣隔離該熱導柱與該晶粒堆疊，其中，在形成後，該模塑料側向抵接且接觸該熱導柱；以及從一晶圓結構切割出該熱導柱及該晶粒堆疊。
  13. 如申請專利範圍第12項所述之方法，其中，將該複數個金屬接觸裝在該第一晶粒上包括：使具有該複數個連接通孔的該第一晶粒耦合至一暫時性晶圓，該複數個金屬接觸位在該第一晶粒與該暫時性晶圓之間；以及移除該第一晶粒的數個部份以暴露該複數個連接通孔，致使該第一晶粒的上表面與該複數個連接通孔的上表面實質共面。
  14. 如申請專利範圍第13項所述之方法，更包含從該複數 個金屬接觸移除該暫時性晶圓。
  15. 如申請專利範圍第12項所述之方法，其中，該熱導柱包含銅(Cu)或鋁(Al)中之一者。
  16. 如申請專利範圍第12項所述之方法，其中，該模塑料包含其中具有二氧化矽(SiO2)或氧化鋁(Al2O3)中之一者的一樹脂材料。
  17. 如申請專利範圍第12項所述之方法，其中，形成該模塑料於該第一晶粒上包括：形成該模塑料於該第一晶粒、該熱導柱及該晶粒堆疊上；以及平坦化該模塑料，致使該模塑料的上表面與該熱導柱的上表面及該晶粒堆疊實質共面。
  18. 如申請專利範圍第12項所述之方法，其中，形成該熱導柱包括電鍍該熱導柱至該第一晶粒。
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