TWI384612B - 具有雙側連接之積體電路封裝件系統 - Google Patents

具有雙側連接之積體電路封裝件系統 Download PDF

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Publication number
TWI384612B
TWI384612B TW097119626A TW97119626A TWI384612B TW I384612 B TWI384612 B TW I384612B TW 097119626 A TW097119626 A TW 097119626A TW 97119626 A TW97119626 A TW 97119626A TW I384612 B TWI384612 B TW I384612B
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Taiwan
Prior art keywords
integrated circuit
connection structure
circuit package
package system
bottom connection
Prior art date
Application number
TW097119626A
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English (en)
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TW200905856A (en
Inventor
Sungmin Song
Seung Yun Ahn
Johyun Bae
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Stats Chippac Ltd
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Publication of TW200905856A publication Critical patent/TW200905856A/zh
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Publication of TWI384612B publication Critical patent/TWI384612B/zh

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    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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Description

具有雙側連接之積體電路封裝件系統
本發明大體上係關於積體電路封裝件系統，尤指具有多重積體電路之積體電路封裝件系統。
電子裝置要求更多的積體電路於積體電路封裝件內，同時又違背常情地對於增加的積體電路內含要求於系統中提供較小的實體空間。某些技術主要重點放在聚集更多的功能於各積體電路中。其他的技術重點放在包裝更多的積體電路於單一封裝件內。雖然這些方法提供更多的功能於積體電路內，但是他們並未完全滿足有較低高度、較小空間、和降低成本之需求。
現代電子裝置，譬如智慧型電話、個人數位助理、基於位置之服務裝置、伺服器、和儲存陣列，正包裝更多積體電路於非常縮小的實體空間中以期望降低成本。已發展許多的技術用來滿足這些需求。某些研發策略重點放在新的封裝技術，同時其他的重點放在改善現有的封裝技術。
一個已獲證實之減少成本之方法係使用具有現用製造方法和裝備之封裝技術。但悖理的是，再使用現有的製程通常無法獲得減少之封裝尺寸。現有的封裝技術欲有效降低成本以滿足無止境的要求現今的積體電路和封裝技術件的積集度遭遇到困難。
有許多種的封裝方法，譬如堆疊多個積體電路晶粒於封裝件中、器件內置器件堆疊封裝(package-in-package; PIP)、層疊封裝(package-on-package; POP)、或他們的結合。當愈多的積體電路包裝入單一封裝件中時，欲容納大量的電性連接至各積體電路變得愈來愈複雜。
舉例而言，習知的垂直堆疊多晶封裝件需要空間用來形成電性連接，譬如用結合線，以及典型用間隔件(spacer)形成，譬如矽或插入件(interposer)。現用的間隔件需要額外的步驟和結構增加製造成本並減少產量。這些間隔件亦限制高度減少之量。習知的PIP和POP配置需要空間用於封裝件整合和/或堆疊限制封裝件高度之減少。
此外，高速數位系統可以以高速率切換，譬如高於十億赫茲(one gigahertz)。於此種切換速度，切換電流輻射能量(雜訊)，該雜訊干擾敏感的類比電路或甚至其他的數位電路。干擾通常採用訊號串音之形式。
電磁干擾(electromagnetic interference; EMI)為通稱的名稱用於不需要的干擾能量，其要麼傳導為電流，要麼輻射為電磁場。EMI從電子裝置以幾種方式產生。一般而言，來自積體電路的電壓和電流產生電場和磁場，而從積體電路裝置發出輻射。從此種積體、電路裝置產生之EMI輻射將根據導體的形狀和方位、從導體至由電路組件或由耦接至電路組件所提供之任何屏蔽之距離而改變場強度和限抗。
一種類型之設計為提供導電封閉物於電子裝置，而使得EMI場線將終止於此種封閉物。然而不幸的是，包含整個產品或部分的產品之導電封閉物可能非常昂貴。此外， 需要增加積體電路密度已導致發展多重晶片封裝件，其中可封裝多於一個積體電路。
發展趨勢為裝塞更多的積體電路和不同類型之積體電路於單一封裝件中，該封裝件於封裝件內需要EMI屏蔽。典型的情況是，金屬或導電封閉物於封裝件中各種積體電路彼此隔離。此等導電封閉物亦必須接地因此EMI輻射的能量可以由系統吸收而不致輻射入環境或至其他的積體電路。此等解決方式增加了製造複雜度、製造成本、和妨礙多重晶片封裝件之尺寸減少。
而且，當更多的積體電路和不同類型之積體電路形成更複雜之多重晶片封裝件時，在最後組裝多重晶片封裝件之前測試積體電路變得益形重要。如此確保積體電路之已知良好單元(KGU)，否則也許不利地影響影響多重晶片封裝件之產率以及增加多重晶片封裝件之成本。
因此，仍需要維持積體電路封裝件系統提供低成本之製造、改善良率、和改善可靠度。鑑於對節省成本和改善效率持續增加需求，因此對於找到這些問題的答案愈來愈迫切。
已長時間尋求對於這些問題的解決方式，但是先前的研發未揭示或建議任何的解決方法，因此，對於這些問題的解決方法已長期困擾著熟悉此項技術者。
一種積體電路封裝方法，包含：連接積體電路晶粒與底部連接結構；放置黏著劑密封件於該積體電路晶粒和該 底部連接結構之上而暴露該底部連接結構；以及放置頂部連接結構於該黏著劑密封件之上於該底部連接結構之相對側。
本發明之某些實施例除了或取代該等以上提及的態樣外，尚具有其他的態樣。由閱讀下列之詳細說明同時參照所附圖式，該等態樣對熟悉此項技術者而言將變得顯而易見。
下列之實施例充分詳細說明使熟悉此項技術者能夠製造和使用本發明。應了解的是根據本揭示內容將明白其他的實施例，以及可作系統、製程、或機械改變而不偏離本發明之範圍。
於下列說明中，提出了許多特定的詳細說明以提供對本發明之完全了解。然而，很顯然的對於熟悉本技藝者而言，可不必作如此詳細說明即能夠實施本發明。為了不致模糊了本發明焦點，一些已知的電路、系統配置、和處理步驟不予詳細說明。同樣情況，顯示該系統實施例之各圖式為半圖形的，並未按比例繪製，而尤其是一些尺寸是為了清楚表示而於各圖式中予以非常誇大地顯示。
此外，此處揭示並說明了多個實施例，具有一些共同的特徵，用來清楚和容易例示、說明、和對其理解，彼此類似和相同的特徵通常將以相同的參考數字說明。該等實施例為了說明方便起見已被編號為第一實施例、第二實施例、等等，且未含有任何其他的意義，或提供對本發明之 限制。
為了說明之目的，此處所用之“水平面(horizontal)”一詞定義為平行於積體電路之平面或表面之平面，而無關於其方向。“垂直的(vertical)”一詞參考為垂直於剛才所定義之水平面之方向。相關於該水平面而定義譬如“在上方(above)”、“在下方(below)”、“底部(bottom)”、“頂部(top)”、“側(side)”(如於“側壁”)、“較高(higher)”、“較低(lower)”、“上部(upper)”、“在‧‧‧之上(over)”、和“在‧‧‧下面(under)”等詞彙。詞彙“在上面(on)”意指元件之間有直接接觸。此處所用之詞彙“處理(processing)”包含沉積材料、圖案化(patterning)、曝光、顯影(development)、蝕刻、清洗、製模(molding)、和/或去除材料或要求形成所述結構時。此處所用之詞彙“系統(system)”依照所使用詞彙之上下文意指並有關於本發明之方法和裝置。
參照第1圖，圖中顯示本發明之第一實施例中積體電路封裝件系統100之上視圖。該上視圖描繪譬如薄片基板之頂部連接結構102，較佳地具有譬如終端墊之第一周邊墊104、和譬如接觸墊之第一內部墊106。第一周邊墊104較佳地在頂部連接結構102之周邊部分。第一內部墊106較佳地在頂部連接結構102之內部部分，並且在由第一周邊墊104所輪廓出之周邊部分內。
為了例示之目的，第一周邊墊104和第一內部墊106被顯示為具有不同之幾何構形，雖然了解到第一周邊墊104 和第一內部墊106可以有相同的構形。舉例而言，第一周邊墊104和第一內部墊106二者可以具有矩形和圓形之幾何構形。亦為了例示之目的，頂部連接結構102被顯示具有第一周邊墊104和第一內部墊106，雖然了解到頂部連接結構102可以具有不同數目之連接位置和不同類型之連接墊。
參照第2圖，圖中顯示沿著第1圖之線2-2之積體電路封裝件系統100之剖面圖。該剖面圖描繪具有從具有頂部連接結構102之頂端和從具有底部連接結構210(譬如薄片基板)之底端之雙連接選擇之積體電路封裝件系統100。
頂部連接結構102較佳在底部連接結構210上方，而該底部連接結構210之上具有積體電路晶粒212。積體電路晶粒212之非主動側214較佳面對底部連接結構210。積體電路晶粒212之主動側216較佳面對頂部連接結構102。譬如附接晶粒黏著劑(die-attach adhesive)之背側黏著劑218連接積體電路晶粒212之非主動側214和底部連接結構210。譬如結合線或帶狀結合線(ribbon bond wire)之內部互連接220連接積體電路晶粒212與底部連接結構210。
黏著劑密封件222較佳覆蓋積體電路晶粒212和在底部連接結構210之上之內部互連接220。黏著劑密封件222可以由許多的材料形成。例如，黏著劑密封件222可以由具有氮化物混合物之填膠黏著劑(underfill adhesive)形成，其中該填膠黏著劑較佳具有高溫電阻性並且為熱導 電。如另一實例，黏著劑密封件222可以由環氧樹脂黏著劑形成。又如於另一實例，黏著劑密封件222可以用B階段黏著劑，譬如膜上導線(wire on film; WIF)黏著劑形成。
黏著劑密封件222係位於形成該積體電路封裝件系統100之頂部連接結構102下方。頂部連接結構102、底部連接結構210、和其間之黏著劑密封件222提供用於積體電路封裝件系統100之機械剛度用於進一步之操控和處理。
頂部連接結構102較佳提供再分配層(redistribution layer; RDL)用於非在黏著劑密封件222內之外部連接。底部連接結構210較佳提供用於積體電路晶粒212與外部環境之連接性。底部連接結構210亦較佳用作為積體電路晶粒212之輸入/輸出(I/O)和黏著劑密封件222內之外部連接之間之再分配層(RDL)。
底部連接結構210較佳具有第二周邊墊224(譬如端部墊)和第二內部墊226(譬如接觸墊)。第二周邊墊224較佳位於底部連接結構210之周邊部分。第二內部墊226較佳位於底部連接結構210之內部部分，其中該內部部分係在該周邊部分內。
茲參照第3圖，圖中顯示本發明之第二實施例中沿著第1圖之線2--2之上視圖範例之積體電路封裝件系統300之剖面圖。剖面圖描繪具有雙連接選擇自具有頂部連接結構302(譬如薄片基板)之頂部、和選擇自具有底部連接結構310(譬如端子墊)之底部之積體電路封裝件系統300。
頂部連接結構302較佳包含譬如端子板之第一周邊墊 304、和譬如接觸墊之第一內部墊306。第一周邊墊304較佳位於頂部連接結構302之周邊部分。第一內部墊306較佳位於頂部連接結構302之內部部分，其中該內部部分是在該周邊部分內。
頂部連接結構302較佳是在底部連接結構310之上方。積體電路晶粒312較佳是在背側黏著劑318(譬如附接晶粒黏著劑或背側遮瑕劑(backside concealer))之上。積體電路晶粒312之非主動側314較佳面對底部連接結構310之平面和較佳附接於背側黏著劑318。積體電路晶粒312之主動側316較佳面對頂部連接結構302。譬如結合線或帶狀結合線之內部互連接320連接積體電路晶粒312與底部連接結構310。
黏著劑密封件322較佳覆蓋積體電路晶粒312和內部互連接320。黏著劑密封件322較佳暴露底部連接結構310和背側黏著劑318。背側黏著劑318可以供應許多的功能。例如，背側黏著劑318保護積體電路晶粒312周圍防止碎裂和破裂。另一個例子，於製造積體電路封裝件系統300期間亦可使用背側黏著劑318。
為了說明之目的，背側黏著劑318顯示附接於積體電路晶粒312上，雖然了解到背側黏著劑318可以不覆蓋非主動側314。舉例而言，背側黏著劑318可以或有的具有黏著劑密封件322暴露非主動側314。非主動側314可以與黏著劑密封件322共平面或形成具有黏著劑密封件322之凹處。
可以由許多的材料形成黏著劑密封件322。例如，黏著劑密封件322可以由具有氮化物混合物之填膠黏著劑形成，其中填膠黏著劑較佳具有高溫電阻並且為熱導電。如另一實例，黏著劑密封件322可以由環氧樹脂黏著劑形成。又如於另一實例，黏著劑密封件222可以用B階段黏著劑，譬如膜上導線(WIF)黏著劑形成。頂部連接結構302和黏著劑密封件322較佳提供機械剛度用於積體電路封裝件系統300進一步之操控和處理。
頂部連接結構302較佳提供再分配層(RDL)，用於非在黏著劑密封件322內之外部連接。底部連接結構310較佳提供用於積體電路晶粒312與外部環境之連接性。
茲參照第4圖，圖中顯示於本發明之第三實施例中積體電路封裝件系統400之上視圖。該上視圖描繪譬如圖案化導電結構之頂部連接結構402，較佳具有譬如端子板之第一周邊墊404、和譬如接觸墊之第一內部墊406。第一周邊墊404較佳位於頂部連接結構402之周邊部分。第一內部墊406較佳位於頂部連接結構402之內部部分並在由第一周邊墊404所輪廓之周邊部分之內。譬如路由線跡之導電線408較佳連接第一周邊墊404之預定的位置與第一內部墊406之預定的位置。
為了例示之目的，第一周邊墊404和第一內部墊406被顯示具有不同之幾何構形，雖然了解到第一周邊墊404和第一內部墊406可以有相同的幾何構形。舉例而言，第一周邊墊404和第一內部墊406二者可以具有矩形和圓形 之幾何構形。亦為了例示之目的，頂部連接結構402被顯示具有第一周邊墊404和第一內部墊406，雖然了解到頂部連接結構可以具有不同數目之連接位置和不同類型之連接墊。
又為了例示之目的，導電線408顯示於第一周邊墊404和第一內部墊406之預定的位置之間，雖然了解到導電線408可以形成其他的電性連接。例如，導電線408可以連接第一周邊墊404之預定部分至彼此。如另一實例，導電線408可以連接第一內部墊406之預定部分至彼此。
黏著劑密封件410環繞並暴露包含了第一周邊墊404和第一內部墊406之頂部連接結構402。該黏著劑密封件410可以由許多的材料形成。例如，黏著劑密封件410可以由具有氮化物混合物之填膠黏著劑形成，其中該填膠黏著劑較佳具有高溫電阻並且為熱導電。如另一實例，黏著劑密封件410可以由環氧樹脂黏著劑形成。
茲參照第5圖，圖中顯示沿著第4圖之線5--5積體電路封裝件系統之剖面圖。該剖面圖描繪具有從具有頂部連接結構402之頂端和從具有底部連接結構512(譬如端子墊)之底端之雙連接選擇之積體電路封裝件系統400。
頂部連接結構402較佳包含第一周邊墊304、第一內部墊306、和導電線408。頂部連接結構402較佳是在底部連接結構512之上方。積體電路晶粒514較佳是在背側黏著劑516(譬如附接晶粒黏著劑或背側隱蔽器)之上。積體電路晶粒514之非主動側518較佳面對底部連接結構512 之平面和較佳附接於背側黏著劑516。積體電路晶粒514之主動側520較佳面對頂部連接結構402。譬如結合線或帶狀結合線之內部互連接522連接積體電路晶粒514與底部連接結構512。
黏著劑密封件410較佳覆蓋該積體電路晶粒514和該內部互連接522。黏著劑密封件410較佳暴露底部連接結構512和背側黏著劑516。背側黏著劑516可以供應許多的功能。例如，背側黏著劑516保護積體電路晶粒514周圍防止碎裂和破裂。另一個例子，於製造積體電路封裝件系統400期間亦可使用背側黏著劑516。
為了說明之目的，背側黏著劑516顯示附接於積體電路晶粒514上，雖然了解到背側黏著劑516可以不覆蓋該非主動側518。舉例而言，背側黏著劑516可以或有的具有黏著劑密封件410暴露非主動側516。非主動側516可以與黏著劑密封件410共平面或形成具有黏著劑密封件410之凹處。
頂部連接結構402較佳提供再分配層(RDL)用於非在黏著劑密封件410內之外部連接。底部連接結構512較佳提供用於積體電路晶粒514與外部環境之連接性。
茲參照第6圖，圖中顯示於本發明之第四實施例中沿著第4圖之線5--5之上視圖範例之積體電路封裝件系統600之剖面圖。該剖面圖描繪具有雙連接選擇自具有頂部連接結構602(譬如圖案化導電層)之頂部、和選擇自具有底部連接結構612(譬如薄片基板)之底部之積體電路封裝 件系統600。
頂部連接結構602較佳包含第一周邊墊604、第一內部墊606、和導電線608。頂部連接結構602較佳是在底部連接結構612之上方，而該底部連接結構612之上具有積體電路晶粒614。積體電路晶粒614之非主動側620較佳面對頂部連接結構602。譬如附接晶粒黏著劑之背側黏著劑616連接積體電路晶粒614之非主動側618和底部連接結構612。譬如結合線或帶狀結合線之內部互連接622連接積體電路晶粒614與底部連接結構612。
黏著劑密封件610較佳覆蓋積體電路晶粒614和在底部連接結構612之上之內部互連接622。黏著劑密封件610可以由許多的材料形成。例如，黏著劑密封件610可以由具有氮化物混合物之填膠黏著劑形成，其中該填膠黏著劑較佳具有高溫電阻並且為熱導電。如另一實例，黏著劑密封件610可以用B階段黏著劑，譬如膜上導線(WIF)黏著劑形成。
頂部連接結構602較佳提供再分配層(RDL)用於非在黏著劑密封件610內之外部連接。底部連接結構612較佳提供用於積體電路晶粒614與外部環境之連接性。底部連接結構612亦較佳用作為積體電路晶粒614之輸入/輸出(I/O)和黏著劑密封件610內用於外部連接之間之再分配層(RDL)。
底部連接結構612較佳具有第二周邊墊224(譬如端部墊)和第二內部墊626(譬如接觸墊)。第二周邊墊624較佳 位於底部連接結構612之周邊部分。第二內部墊626較佳位於底部連接結構612之內部部分，其中該內部部分係在該周邊部分內。
茲參照第7圖，圖中顯示於本發明之第五實施例中具有第1圖之積體電路封裝件系統100之積體電路層疊封裝系統700之底視圖。該底視圖描繪譬如焊球之附接到封裝件基板704之外部互連接702。
為了例示之目的，外部互連接702以陣列配置顯示，雖然了解到外部互連接702可以不同的配置(譬如一些可以移除之位置)佈設於封裝件基板704上。亦為了例示之目的，積體電路層疊封裝系統700顯示封裝件基板704為薄片類型載體，雖然了解到積體電路封裝件系統100可以具有用於封裝件基板704之其他類型載體，譬如由引線框(lead frame)(未圖示)所形成之引線(未圖示)。
茲參照第8圖，圖中顯示沿著第7圖之線8--8之積體電路層疊封裝系統700之剖面圖。譬如覆晶之第一裝置結構806較佳安裝在封裝件基板704之上。積體電路封裝件系統100較佳安裝在第一裝置結構806之上和較佳用第一內部互連接808(譬如焊球或焊塊)連接至封裝件基板704。第一內部互連接808較佳連接至積體電路封裝件系統100之底部連接結構210。
譬如結合線或帶狀結合線之第二內部互連接812較佳連接頂部連接結構102之第一周邊墊104和封裝件基板704。譬如環氧樹脂模製化合物(epoxy molding compound; EMC)之封裝件密封件818覆蓋在封裝件基板704之上之積體電路封裝件系統100、第一裝置結構806、第一內部互連接808、和第二內部互連接812。封裝件密封件818較佳包含凹部820暴露頂部連接結構102之第一內部墊106。
譬如密封之積體電路之第二裝置結構822較佳安裝在形成積體電路層疊封裝系統700之凹部820中第一內部墊106之上。譬如焊球之導電球824較佳連接該第二裝置結構822和積體電路封裝件系統100之第一內部墊106。
如前面所提及的，積體電路封裝件系統100較佳提供從具有頂部連接結構102之頂端和從具有底部連接結構210之底端之雙連接選擇。頂部連接結構102可以較佳提供第二裝置結構822至積體電路層疊封裝系統700和至次一個系統階層(未圖示)(譬如經由外部互連接之702之印刷電路板或另一積體電路封裝件系統)之電性連接通路。底部連接結構210較佳提供積體電路封裝件系統100至積體電路層疊封裝系統700之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第9圖，圖中顯示由在本發明之第六實施例中沿著第7圖之線8--8之底視圖所例示，具有第2圖之積體電路封裝件系統100之積體電路層疊封裝系統900之剖面圖。譬如覆晶之第一裝置結構906較佳安裝在封裝件基板904之上。積體電路封裝件系統100較佳安裝在第一裝置結構906之上，並較佳用第一內部互連接908(譬如焊球或焊塊)連接至封裝件基板904。第一內部互連接908較佳連 接至積體電路封裝件系統100之底部連接結構210。
譬如結合線或帶狀結合線之第二內部互連接912較佳連接頂部連接結構102之第一周邊墊104和封裝件基板904。安裝結構914較佳位於積體電路封裝件系統100之底部連接結構210之周邊部分和封裝件基板904之間。安裝結構914可以表示許多的結構。例如，安裝結構914可以是積體電路晶粒、提供再分配層(RDL)之結構、或他們的結合。譬如結合線或帶狀結合線之第三內部互連接916較佳電性連接安裝結構914和封裝件基板904。
譬如環氧樹脂模製化合物(EMC)之封裝件密封件918覆蓋在封裝件基板904之上之第一裝置結構906、第一內部互連接908、第二內部互連接912、安裝結構914、和第三內部互連接916。封裝件密封件918較佳包含凹部920暴露頂部連接結構102之第一內部墊106。
譬如密封之積體電路之第二裝置結構922較佳安裝在形成在凹部920中第一內部墊106之上。譬如焊球之導電球924較佳連接該第二裝置結構922和積體電路封裝件系統100之第一內部墊106。
如前面所提及的，積體電路封裝件系統100較佳提供從具有頂部連接結構102之頂端和從具有底部連接結構210之底端之雙連接選擇。頂部連接結構102可以較佳提供第二裝置結構922至積體電路層疊封裝系統900和至次一個系統階層(未圖示)(譬如經由外部互連接902(譬如焊球)之印刷電路板或另一積體電路封裝件系統)之間之電性 連接通路。外部互連接902較佳附接至封裝件基板904之下方。底部連接結構210較佳提供積體電路封裝件系統100至積體電路層疊封裝系統900之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第10圖，圖中顯示由在本發明之第七實施例中沿著第7圖之線8--8之底視圖所例示，具有第3圖之積體電路封裝件系統300之積體電路層疊封裝系統1000之剖面圖。譬如覆晶之第一裝置結構1006較佳安裝在封裝件基板1004之上。積體電路封裝件系統300較佳安裝在第一裝置結構1006之上和較佳用第一內部互連接1008(譬如焊球或焊塊)連接至封裝件基板1004。第一內部互連接1008較佳連接至積體電路封裝件系統300之底部連接結構310。
譬如結合線或帶狀結合線之第二內部互連接1012較佳連接頂部連接結構302之第一周邊墊304和封裝件基板1004。譬如環氧樹脂模製化合物(EMC)之封裝件密封件1018覆蓋在封裝件基板1004之上之第一裝置結構1006、第一內部互連接1008、和第二內部互連接1212。封裝件密封件1018較佳包含凹部1020暴露頂部連接結構302之第一內部墊306。
譬如覆晶之第二裝置結構1022較佳安裝在形成積體電路層疊封裝(POP)系統1000之凹部1020中第一內部墊306之上。譬如焊球之導電球1024較佳連接該第二裝置結構1022和積體電路封裝件系統300之第一內部墊306。
如前面所提及的，積體電路封裝件系統300較佳提供 從具有頂部連接結構302之頂端和從具有底部連接結構310之底端之雙連接選擇。頂部連接結構302可以較佳提供第二裝置結構1022至積體電路層疊封裝系統1000之其他部分和至次一個系統階層(未圖示)(譬如經由外部互連接1002之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。底部連接結構310較佳提供積體電路封裝件系統300至積體電路層疊封裝系統1000之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第11圖，圖中顯示由在本發明之第八實施例中沿著第7圖之線8--8之底視圖所例示，具有第2圖之積體電路封裝件系統100之積體電路層疊封裝系統1100之剖面圖。譬如薄片基板之第一裝置結構1106、具有再分佈層(RDL)之結構、或積體電路裝置，較佳安裝在封裝件基板1104之上。積體電路封裝件系統100較佳安裝在第一裝置結構1106之上。譬如焊球之導電結構1110連接該第一裝置結構1106至積體電路封裝件系統100和封裝件基板1104。
積體電路封裝件系統100亦較佳用譬如焊球或焊塊之第一內部互連接1108連接至封裝件基板1104。第一內部互連接1108較佳連接至積體電路封裝件系統100之底部連接結構210。
譬如結合線或帶狀結合線之第二內部互連接1112較佳連接頂部連接結構102之第一周邊墊104和封裝件基板1104。譬如環氧樹脂模製化合物(EMC)之封裝件密封件1118覆蓋在封裝件基板1104之上之第一裝置結構1106、第一 內部互連接1108、和第二內部互連接1112。封裝件密封件1118較佳包含凹部1120暴露頂部連接結構102之第一內部墊106。
譬如密封之積體電路之第二裝置結構1122較佳安裝在形成積體電路層疊封裝系統1100之凹部1120中第一內部墊106之上。譬如焊球之導電球1124較佳連接該第二裝置結構1122和積體電路封裝件系統100之第一內部墊106。
如前面所提及的，積體電路封裝件系統100較佳提供從具有頂部連接結構102之頂端和從具有底部連接結構210之底端之雙連接選擇。頂部連接結構102可以較佳提供第二裝置結構1122至積體電路層疊封裝系統1100之其他部分和至次一個系統階層(未圖示)(譬如經由外部互連接1102之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。底部連接結構210較佳提供積體電路封裝件系統100至積體電路層疊封裝系統1100之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第12圖，圖中顯示在本發明之第九實施例中沿著第7圖之線8--8之底視圖所例示，具有第2圖之積體電路封裝件系統100之積體電路層疊封裝系統1200之剖面圖。譬如覆晶之第一裝置結構1206較佳安裝在封裝件基板1204之上。積體電路封裝件系統100較佳安裝在第一裝置結構1206之上並較佳用譬如焊球或焊塊之第一內部互連接1208連接至封裝件基板1204。第一內部互連接1208較佳連接至積體電路封裝件系統100之底部連接結構210。
譬如結合線或帶狀結合線之第二內部互連接1212較佳連接頂部連接結構102之第一周邊墊104和封裝件基板1204。埋置之裝置1214較佳在積體電路封裝件系統100之頂部連接結構102之上而不會阻礙第二內部互連接1212之連接。埋置之裝置1214可以表示許多的結構。例如，埋置之裝置1214可以是積體電路晶粒、再分配層(RDL)、或他們的組合。譬如結合線或帶狀結合線之第三內部互連接1216較佳電性連接埋置之裝置1214和第一周邊墊104。
譬如環氧樹脂模製化合物(EMC)之封裝件密封件1218覆蓋在封裝件基板1204之上之第一裝置結構1206、第一內部互連接1208、第二內部互連接1212、埋置之裝置1214、和第三內部互連接1216。封裝件密封件1218較佳包含凹部1220暴露頂部連接結構102之第一內部墊106。
譬如密封之積體電路之第二裝置結構1222較佳安裝在凹部1220中第一內部墊106之上。譬如焊球之導電球1224較佳連接該第二裝置結構1222和積體電路封裝件系統100之第一內部墊106。
如前面所提及的，積體電路封裝件系統100較佳提供從具有頂部連接結構102之頂端和從具有底部連接結構210之底端之雙連接選擇。頂部連接結構102可以較佳提供第二裝置結構1222至積體電路層疊封裝系統1200之其他部分和至次一個系統階層(未圖示)(譬如經由例如焊球之外部互連接1202之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。外部互連接1202較佳附接到 封裝件基板1204之下方。底部連接結構210較佳提供積體電路封裝件系統100至積體電路層疊封裝系統1200之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第13圖，圖中顯示在本發明之第十實施例中沿著第7圖之線8--8之底視圖所例示，具有第3圖之積體電路封裝件系統300之積體電路層疊封裝系統1300之剖面圖。譬如覆晶之第一裝置結構1306較佳安裝在封裝件基板1304之上。積體電路封裝件系統300較佳安裝在第一裝置結構1306之上並較佳用譬如焊球或焊塊之第一內部互連接1308連接至封裝件基板1304。第一內部互連接1308較佳連接至積體電路封裝件系統300之底部連接結構310。
譬如結合線或帶狀結合線之第二內部互連接1312較佳連接頂部連接結構302之第一周邊墊304和封裝件基板1304。譬如環氧樹脂模製化合物(EMC)之封裝件密封件1318覆蓋在封裝件基板1304之上之第一裝置結構1306、第一內部互連接1308、和第二內部互連接1312。封裝件密封件1318較佳包含凹部1320暴露頂部連接結構302之第一內部墊306。
譬如覆晶之第二裝置結構1322較佳安裝在凹部1320中第一內部墊306之上。譬如焊塊之導電球1324較佳連接該第二裝置結構1322和積體電路封裝件系統300之第一內部墊306。譬如被動裝置之第三裝置結構1330亦較佳安裝在凹部1320中第一內部墊306之上。
如前面所提及的，積體電路封裝件系統300較佳提供 從具有頂部連接結構302之頂端和從具有底部連接結構310之底端之雙連接選擇。頂部連接結構302可以較佳提供第二裝置結構1322、第三裝置結構1330、或他們的組合至積體電路層疊封裝系統1300之其他部分和至次一個系統階層(未圖示)(譬如經由外部互連接1302之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。底部連接結構310較佳提供積體電路封裝件系統300至積體電路層疊封裝系統1300之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第14圖，圖中顯示在本發明之第十一實施例中沿著第7圖之線8--8之底視圖所例示，具有第3圖之積體電路封裝件系統之積體電路層疊封裝系統1400之剖面圖。譬如積體電路晶粒之第一裝置結構1406較佳安裝在封裝件基板1404之上。積體電路封裝件系統300較佳安裝在第一裝置結構1406之上而不會阻礙在第一裝置結構1406和封裝件基板1404之間譬如結合線或帶狀結合線之電性連接器1407。積體電路封裝件系統300較佳用譬如焊球或焊塊之第一內部互連接1408連接至封裝件基板1404。第一內部互連接1408較佳連接至積體電路封裝件系統300之底部連接結構310。
譬如結合線或帶狀結合線之第二內部互連接1412較佳連接頂部連接結構302之第一周邊墊304和封裝件基板1404。譬如環氧樹脂模製化合物(EMC)之封裝件密封件1418覆蓋在封裝件基板1404之上之第一裝置結構1406、電性 連接器1407、第一內部互連接1408、和第二內部互連接1412。封裝件密封件1418較佳包含凹部1420暴露頂部連接結構302之第一內部墊306。
譬如覆晶之第二裝置結構1422較佳安裝在凹部1420中第一內部墊306之上。譬如焊塊之導電球1424較佳連接該第二裝置結構1422和積體電路封裝件系統300之第一內部墊306。譬如被動裝置之第三裝置結構1430亦較佳安裝在凹部1420中第一內部墊306之上。
如前面所提及的，積體電路封裝件系統300較佳提供從具有頂部連接結構302之頂端和從具有底部連接結構310之底端之雙連接選擇。頂部連接結構302可以較佳提供第二裝置結構1422、第三裝置結構1430、或他們的組合至積體電路層疊封裝系統1400之其他部分和至次一個系統階層(未圖示)(譬如經由外部互連接1402之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。底部連接結構310較佳提供積體電路封裝件系統300至積體電路層疊封裝系統1400之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第15圖，圖中顯示由在本發明之第十二實施例中沿著第7圖之線8--8之底視圖所例示，具有第5圖之積體電路封裝件系統400之積體電路層疊封裝系統1500之剖面圖。譬如覆晶之第一裝置結構1506較佳安裝在封裝件基板1504之上。積體電路封裝件系統400較佳安裝在第一裝置結構1506之上並較佳用譬如焊球或焊塊之第一內部互 連接1508連接至封裝件基板1504。第一內部互連接1508較佳連接至積體電路封裝件系統400之底部連接結構512。
譬如結合線或帶狀結合線之第二內部互連接1512較佳連接頂部連接結構402之第一周邊墊404和封裝件基板1504。譬如環氧樹脂模製化合物(EMC)之封裝件密封件1518覆蓋在封裝件基板1504之上之第一裝置結構1506、第一內部互連接1508、和第二內部互連接1512。封裝件密封件1518較佳包含凹部1520暴露頂部連接結構402之第一內部墊406。
譬如密封之積體電路之第二裝置結構1522較佳安裝在形成積體電路層疊封裝系統1500之凹部1520中第一內部墊406之上。譬如焊塊之導電球1524較佳連接該第二裝置結構1522和積體電路封裝件系統400之第一內部墊406。
如前面所提及的，積體電路封裝件系統400較佳提供從具有頂部連接結構402之頂端和從具有底部連接結構512之底端之雙連接選擇。頂部連接結構402可以較佳提供第二裝置結構1522至積體電路層疊封裝系統1500之其他部分和至次一個系統階層(未圖示)(譬如經由外部互連接1502之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。底部連接結構512較佳提供積體電路封裝件系統400至積體電路層疊封裝系統1500之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第16圖，圖中顯示由在本發明之第十二實施例中沿著第7圖之線8--8之底視圖所例示，具有第6圖之積 體電路封裝件系統600之積體電路層疊封裝系統1600之剖面圖。譬如覆晶之第一裝置結構1606較佳安裝在封裝件基板1604之上。積體電路封裝件系統600較佳安裝在第一裝置結構1606之上並較佳用譬如焊球或焊塊之第一內部互連接1608連接至封裝件基板1604。第一內部互連接1608較佳連接至積體電路封裝件系統600之底部連接結構612。
譬如結合線或帶狀結合線之第二內部互連接1612較佳連接頂部連接結構602之第一周邊墊604和封裝件基板1604。譬如環氧樹脂模製化合物(EMC)之封裝件密封件1618覆蓋在封裝件基板1604之上之第一裝置結構1606、第一內部互連接1608、和第二內部互連接1612。封裝件密封件1618較佳包含凹部1620暴露頂部連接結構602之第一內部墊606。
譬如密封之積體電路之第二裝置結構1622較佳安裝在形成積體電路層疊封裝系統1600之凹部1620中第一內部墊604之上。譬如焊塊之導電球1624較佳連接該第二裝置結構1622和積體電路封裝件系統600之第一內部墊606。
如前面所提及的，積體電路封裝件系統600較佳提供從具有頂部連接結構602之頂端和從具有底部連接結構612之底端之雙連接選擇。頂部連接結構602可以較佳提供第二裝置結構1622至積體電路層疊封裝系統1600之其他部分和至次一個系統階層(未圖示)(譬如經由外部互連接1602之印刷電路板或另一積體電路封裝件系統)之間之電性連接通路。底部連接結構612較佳提供積體電路封裝 件系統600至積體電路層疊封裝系統1600之其他部分並亦至次一個系統階層之間之電性連接通路。
茲參照第17圖，圖中顯示於本發明之實施例中製造積體電路封裝件系統100之積體電路封裝方法1700之流程圖。該方法1700包含：於方塊1702中連接積體電路晶粒與底部連接結構；於方塊1704中放置黏著劑密封件於積體電路晶粒和該底部連接結構之上而暴露該底部連接結構；以及於方塊1706中放置頂部連接結構於黏著劑密封件之上於該底部連接結構之相對側。
本發明之又另一重要態樣為有用地支援和服務減少成本、減化系統、和增加效能之歷史趨勢。
本發明之這些和其他有用的態樣結果促進技術狀態至至少次一個階層。
因此，已發現到本發明之積體電路封裝件系統提供重要的和迄今未知和尚未獲得的解決方法、能力、和功能態樣，用於改善產率、增加可靠度、和減少積體電路封裝件系統之成本。所得到的製程和配置係明確的、低成本的、不複雜、高度多樣性、正確、靈敏、和有效的，並能夠藉由調適已知的組件而執行容易的、有效的、和經濟的製造、應用和使用。
雖然本發明已結合特定之最佳實施模式而作了說明，但應了解到對於熟習此技藝者而言，在鑑於上述之說明後，可了解該實施例可作許多之替換、修飾和改變。因此，本發明將包含所有落於所包含之申請專利範圍之精神和範 圍內之此等的替換、修飾和改變。此說明書中所提出和所附圖式中所顯示之所有內容係將作例示說明用而並非欲用來限制本發明。
100、300、400、600‧‧‧積體電路封裝件系統
102、302、402、602‧‧‧頂部連接結構
104、304、404、604‧‧‧第一周邊墊
106、306、406、606‧‧‧第一內部墊
210、310、512、612‧‧‧底部連接結構
212、312、514、614‧‧‧積體電路晶粒
214、314、518、618、620‧‧‧非主動側
216、316、520‧‧‧主動側
218、318、516、616‧‧‧背側黏著劑
220、320、522、622、1208‧‧‧內部互連接
222、322、410、610‧‧‧黏著劑密封件
224、624‧‧‧第二周邊墊
226、626‧‧‧第二內部墊
408、608‧‧‧導電線
700、900、1000、1100、1200、1300、1400、1500、1600‧‧‧積體電路層疊封裝系統
702、1002、1102、1202、1302、1402、1502、1602‧‧‧外部互連接
704、904、1004、1104、1204、1304、1404、1504、1604‧‧‧封裝件基板
806、906、1006、1106、1206、1306、1406、1506、1606‧‧‧第一裝置結構
808、908、1008、1108、1308、1408、1508、1608‧‧‧第一內部互連接
812、912、1012、1112、1212、1312、1412、1512、1612‧‧‧第二內部互連接
818、918、1018、1118、1218、1318、1418、1518、1618‧‧‧封裝件密封件
820、920、1020、1120、1220、1320、1420、1520、1620‧‧‧凹部
822、922、1022、1122、1222、1322、1422、1522、1622‧‧‧第二裝置結構
824、924、1024、1124、1224、1324、1424、1524、1624‧‧‧導電球
914‧‧‧安裝結構
916、1216‧‧‧第三內部互連接
1110‧‧‧導電結構
1214‧‧‧埋置之裝置
1330、1430‧‧‧第三裝置結構
1407‧‧‧電性連接器
1700‧‧‧積體電路封裝方法
1702、1704、1706‧‧‧方塊
第1圖為於本發明之第一實施例中積體電路封裝件系統之上視圖；第2圖為沿著第1圖之線2-2之積體電路封裝件系統之剖面圖；第3圖為於本發明之第二實施例中沿著第1圖之線2--2之上視圖範例之積體電路封裝件系統之剖面圖；第4圖為於本發明之第三實施例中積體電路封裝件系統之上視圖；第5圖沿著第4圖之線5-5之積體電路封裝件系統之剖面圖；第6圖為於本發明之第四實施例中沿著第4圖之線5--5之上視圖範例之積體電路封裝件系統之剖面圖；第7圖為於本發明之第五實施例中具有第1圖之積體電路封裝件系統之積體電路層疊封裝(POP)系統之底視圖；第8圖為沿著第7圖之線8--8之積體電路層疊封裝系統之剖面圖；第9圖為由在本發明之第六實施例中沿著第7圖之線8--8之底視圖所例示具有第2圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第10圖為由在本發明之第七實施例中沿著第7圖之線 8--8之底視圖所例示具有第3圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第11圖為由在本發明之第八實施例中沿著第7圖之線8--8之底視圖所例示具有第2圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第12圖為由在本發明之第九實施例中沿著第7圖之線8--8之底視圖所例示具有第2圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第13圖為由在本發明之第十實施例中沿著第7圖之線8--8之底視圖所例示具有第3圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第14圖為由在本發明之第十一實施例中沿著第7圖之線8--8之底視圖所例示具有第3圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第15圖為由在本發明之第十二實施例中沿著第7圖之線8--8之底視圖所例示具有第5圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第16圖為由在本發明之第十二實施例中沿著第7圖之線8--8之底視圖所例示具有第6圖之積體電路封裝件系統之積體電路層疊封裝系統之剖面圖；第17圖為於本發明之實施例中製造積體電路封裝件系統之積體電路封裝方法之流程圖；
1700‧‧‧積體電路封裝方法
1702、1704、1706‧‧‧方塊

Claims (7)

  1. 一種製造積體電路封裝系統之方法，包括：安裝具有非主動側和主動側之積體電路晶粒於底部連接結構之上，且該非主動側朝向該底部連接結構；連接該積體電路晶粒與該底部連接結構；放置黏著劑密封件於該積體電路晶粒和該底部連接結構之上而暴露該底部連接結構；放置頂部連接結構於該黏著劑密封件之上該底部連接結構之相對側並朝向該積體電路晶粒之該主動側處；連接封裝件基板與安裝於該封裝件基板之上的該底部連接結構；連接該封裝件基板與該頂部連接結構；形成具有凹部之封裝件密封件，且該凹部暴露部分該頂部連接結構；以及安裝第二裝置結構於該凹部中該頂部連接結構之上。
  2. 如申請專利範圍第1項所述之方法，復包括：連接該封裝件基板上之第一裝置結構與該第二裝置結構之上的該底部連接結構。
  3. 一種積體電路封裝件系統，包括：底部連接結構；積體電路晶粒，具有位於該底部連接結構之上的非主動側和主動側，且該非主動側朝向該底部連接結構，該積體電路晶粒與該底部連接結構連接；黏著劑密封件，位於該積體電路晶粒和該底部連接結構之上，而暴露該底部連接結構； 頂部連接結構，位於該黏著劑密封件之上於該底部連接結構之相對側；封裝件基板，與安裝於該封裝件基板之上的該底部連接結構連接，並與該頂部連接結構連接；封裝件密封件，具有凹部，且該凹部暴露部分該頂部連接結構；以及第二裝置結構，位於該凹部中該頂部連接結構之上。
  4. 如申請專利範圍第3項所述之系統，復包括：背側黏著劑，附接於該積體電路晶粒之非主動側。
  5. 如申請專利範圍第3項所述之系統，其中，在該黏著劑密封件之上的該頂部連接結構包含由該黏著劑密封件所暴露之該頂部連接結構。
  6. 如申請專利範圍第3項所述之系統，其中，在該黏著劑密封件之上的該頂部連接結構包含由該黏著劑密封件所環繞的該頂部連接結構而暴露該頂部連接結構。
  7. 如申請專利範圍第3項所述之系統，復包括：安裝於該封裝件基板上之第一裝置結構與該第二裝置結構之上的該底部連接結構連接；以及其中：該封裝件基板電性連接至該頂部連接結構。
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