TWI478317B - 具安裝互連之可安裝的積體電路封裝件系統 - Google Patents

具安裝互連之可安裝的積體電路封裝件系統 Download PDF

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Publication number
TWI478317B
TWI478317B TW097139155A TW97139155A TWI478317B TW I478317 B TWI478317 B TW I478317B TW 097139155 A TW097139155 A TW 097139155A TW 97139155 A TW97139155 A TW 97139155A TW I478317 B TWI478317 B TW I478317B
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Taiwan
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integrated circuit
package
circuit device
substrate
interconnect
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TW097139155A
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English (en)
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TW200926393A (en
Inventor
鄒勝源
關協和
蔡佩燕
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星科金朋有限公司
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    • H—ELECTRICITY
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    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
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    • H01L25/10—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices having separate containers
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Description

具安裝互連之可安裝的積體電路封裝件系統
本發明係關於一種積體電路封裝件系統，且尤係關於一種具有包覆體之積體電路封裝件系統。
積體電路封裝科技已經歷了在單一電路板或基板上安裝的積體電路的數量之增加。新的封裝設計就形狀因子(form factor)而言更為簡潔，例如：積體電路的物理尺寸和形狀，並提供整體積體電路密度的顯著增加。然而，積體電路密度持續被可在基板上安裝個別的積體電路的“基板面(real estate)”所限制。即使較大的形狀因子系統，像是個人電腦、電腦系統與儲存伺服器，在相同或更小的“基板面”中需要更多的積體電路。特別是，可攜式個人電子裝置(像是行動電話、數位相機、音樂播放器、個人數位助理以及定位裝置)的需求則已進一步驅動對積體電路密度的需求。
此益增的積體電路密度已導致發展出多晶片封裝件、封裝件內封裝件(package in package；PIP)、層疊封裝件(package on package；POP)或其組合，而使得多於一個之個別積體電路可被封裝。每一封裝件對個別積體電路和一或多層互連線提供機械支持，而該互連線可使積體電路電性連接至週圍電路。目前的多晶片封裝件(通常也稱為多晶片模組)典型地包含基板，該基板上接置有一組個別的積體電路組件。已發現到此種多晶片封裝件可以增加積體電路密度與小型化、提昇信號傳播速度、降低整體積體電路尺寸和重量、提昇性能以及降低成本，而這些皆為電腦工業的首要目標。
具有堆疊組構的多晶片封裝件或PIP也可能造成問題。間隔件結構可用以產生空間而用在堆疊結構中的電性連接，在該堆疊結構中，封裝件結構包含封裝積體電路。典型封裝積體電路的間隔件結構和包覆體材料具有低黏著力且會變成分層來源。習知的間隔件和封裝積體電路介面在此介面處執行較差的分層可靠性測試。
因此，對於積體電路封裝件系統仍是繼續有對積體電路提供低成本的製造、改善良率、以及較薄高度之需求。有鑑於節省成本與改善性能之日益增加的需求，發覺這些問題的解答變得越來越關鍵。
對於這些問題的解決方案已有長久的搜尋，但先前的發展並未教示或建議任何解決方案，因此，對於這些問題的解決方案已長期困擾了所屬技術領域中具有通常知識者。
本發明提供一種可安裝的積體電路封裝方法，包含：於載體之上安裝第一積體電路裝置；於該第一積體電路裝置之上安裝基板，該基板具有安裝互連；在該載體和該基板之間連接第一電性互連；以及形成封裝件包覆體覆蓋該載體、該第一積體電路裝置、該第一電性互連以及該基板，而在該封裝件包覆體的腔室內，該安裝互連係從該封裝件包覆體部分露出並由該封裝件包覆體環繞。
除了或替代以上所述或者從以上顯而易知者，本發明之某些實施例具有其他態樣。當所屬技術領域中具有通常知識者配合附加圖式閱讀以下實施方式時，這些態樣將變得明顯。
以下實施例係充分詳細描述以使熟悉本領域具通常知識者可製造及使用本發明，其他實施例依此揭露可明瞭而理解，而且其系統、製程或機構上的改變並未悖離本發明之範疇。
於下列敘述中，係給定許多特定細節以提供本發明之完整瞭解。然而，本發明顯然亦可無需這些特定細節而予以實施。為避免模糊本發明，一些已知的電路、系統結構及製程步驟未詳細地揭露。同樣地，顯示該系統之實施例之圖式係為部分圖解且不按比例，且特別地，一些尺寸為清楚呈現本發明而誇大地顯示於圖式中。通常，本發明可以在任何方位運作。
另外，在多個實施例中揭露及描述某些共同特徵，為清楚及容易說明、描述及理解，彼此相似及相同特徵將一般以相同元件符號來描述。為了方便描述，這些實施例被編號為第一實施例、第二實施例等而並非具有任何其他含意或是對本發明提供限制。
為了說明，在此使用的用語“水平(horizontal)”係定義為平行該積體電路的平面或表面而不論其定位；用語“垂直(vertical)”係指垂直所定義的“水平”之方向，用語如“在…上面(above)”、“在…下面(below)”、“底部(bottom)”、“上方(top)”、“側邊(side)”(如在“側壁(sidewall)”)、“較高(higher)”、“較低(lower)”、“上面的(upper)”、“在於…之上(over)”以及“在…之下(under)”，係相對該水平平面而定義，用語“在…上(on)”係指在元件間有直接接觸，在此使用之用語“處理(processing)”係包含材料的沉積、圖案化、曝光、顯影、蝕刻、清潔、模造(molding)及/或材料的移除或形成上述結構所需者。在此使用之用語“系統(system)”意指且係指依照使用該用語的背景下的本發明之方法及裝置。
現參考第1圖，此處顯示於本發明的第一實施例之可安裝的積體電路封裝件系統100的上視圖。該上視圖描繪出封裝件包覆體102(如環氧模造化合物)具有腔室104。該腔室104部份露出安裝互連108，例如：在該封裝件包覆體102的腔室104內，從該封裝件包覆體102露出並由該封裝件包覆體102所環繞的焊接凸塊。該安裝互連108可以由包含有錫(Sn)、鉛(Pb)、金(Au)、銅(Cu)或金屬合金的電性傳導材料所形成。
為了說明目的，可安裝的積體電路封裝件系統100係顯示安裝互連108在不均勻分佈之陣列的組構中，但可以瞭解到可安裝的積體電路封裝件系統100可以具有在不同組構下的安裝互連108。例如：安裝互連108可以是在均勻分佈之陣列的組構中。
現參考第2圖，其中係顯示沿著第1圖之2-2線之可安裝的積體電路封裝件系統100之剖面圖。該剖面圖描繪出該安裝積體電路封裝件系統100具有該封裝件包覆體102形成在載體210(例如：基板)之上，該載體210具有第一積體電路裝置212安裝於其上(例如：積體電路晶片、覆晶(flip chip)或封裝積體電路裝置)。較佳者，該第一積體電路裝置212係以第一接著劑214(例如：晶粒接著劑)而安裝於該第一積體電路裝置212的第一非主動側216並面對該載體210的第一載體側218。第二外部互連220(例如：焊球)係接置在該載體210之第二載體側222而相對於該第一載體側218，藉以與如印刷電路板或其他積體電路封裝件系統之下一系統層級(未圖示)連接。
第二積體電路裝置224可視需要地以第二接著劑226(例如：晶接著劑)安裝在該第一積體電路裝置212之上。雖然這個例子是顯示兩個積體電路裝置堆疊在該載體210上面且在基板206之下，但應了解到任何數目的積體電路裝置都可以安裝在該第一載體側218之上以及在該基板206之下。
為了說明目的，該第一積體電路裝置212和該第二積體電路裝置224係顯示作為打線接合(wire bond)積體電路，但應了解到該第一積體電路裝置212和該第二積體電路裝置224可以是不同類型的積體電路。例如：該第一積體電路裝置212和該第二積體電路裝置224可以為積體電路晶粒(die)、封裝積體電路裝置、覆晶或其組合。
該基板206包括具有該安裝互連108的第一基板側230。相對於該第一基板側230之該基板的第二基板側232係以第三接著劑236(像是膜接著劑)安裝在該第二積體電路裝置224之第二主動側234之上。在此例子中，該基板206具有帶有電性互連240之孔隙238，該電性互連240(像是接合線或帶狀接合線)透過該孔隙238連接第二主動側234和該第一基板側230。該電性互連240也可以提供於該第一載體側218和第一主動側228之間的電性連接。類似地，該電性互連240也可以連接該第一載體側218和該第一基板側230。
該封裝件包覆體102覆蓋該第一載體側218、該第一積體電路裝置212、該第二積體電路裝置224、該電性互連240以及該第一基板側230。該封裝件包覆體102包含腔室104於該第一基板側230之上，而在該腔室104內，該安裝互連108係從該封裝件包覆體102部分地露出並由該封裝件包覆體102所環繞。該安裝互連108在該腔室104中係與該封裝件包覆體102的第一包覆體側242共平面。像是例如球狀、柱狀(pillar)或螺栓狀(stub)組構之焊接凸塊的安裝互連108可以使用壓印(coining)、壓製(pressing)或其它平面化製程而予以平坦化。該安裝互連108容納安裝其他積體電路裝置(未圖示)於該第一包覆體側242之上。亦可瞭解，該安裝互連可視需要地包括凸部244凸伸於該第一包覆體側242之上，像是顯示在該腔室104內的虛線。
可發現到本發明以該安裝互連從該封裝件包覆體部分地露出或凸出於該封裝件包覆體的腔室而降低封裝件高度和改善封裝件可靠性。該可安裝的積體電路封裝件系統100在該可安裝的積體電路封裝件系統100和可安裝在該安裝互連之上的安裝積體電路裝置之間提供可靠的電性連接，同時將該積體電路封裝件系統的整體高度降至最低。該安裝互連在該基板之上提供足夠的間隙高度(standoff height)以最小化該基板上或是當接置該安裝積體電路裝置時該基板的傳導接觸件上的接合線偏移(sweep)問題。
也可以發現到本發明在該基板上提供足夠的間隙高度以協助最小化可能在基板上之之傳導接觸件上導致溢膠(mold flash)或漏膠(mold bleed)污染之模流干擾(mold flow disturbance)。本發明更容納在該基板之下的積體電路裝置的中央互連墊與在基板中透過一孔隙的基板頂側之間的接合線，而在包覆製程期間不會影響頂部模具(mold chase)。本發明也避免了在包覆製程之後由於基板的可能傾斜而會露出線路。
更可以發現到本發明排除對具有大焊球尺寸和間距尺寸的安裝積體裝置的需求，以便清理用於內部中央接合線的預先包覆模套(mold cap)。
請參考第3圖，其中係顯示本發明之第二實施例的可安裝的積體電路封裝件系統300之剖面圖，其具有由第1圖所示例的上視圖。該可安裝的積體電路封裝件系統300具有類似於第2圖之可安裝的積體電路封裝件系統100的結構。該剖面圖顯示該可安裝的積體電路封裝件系統300具有封裝件包覆體302形成於例如基板之載體310之上，而該載體310具有第一積體電路裝置312安裝於其上，該第一積體電路裝置312可以為積體電路晶片、覆晶或封裝積體電路裝置。較佳者，該第一積體電路裝置312係以第一接著劑314(如晶粒接著劑)安裝在該第一積體電路裝置312的第一非主動側316而面對該載體310的第一載體側318。如焊球之第二外部互連320則接置在該載體310的第二載體側322而相對於該第一載體側318以便連接到下一系統層級(未圖示)，譬如為印刷電路板或其他積體電路封裝件系統。
雖然該第一積體電路裝置312係顯示做為打線接合積體電路，但應了解到，該第一積體電路裝置312可以是各種類型的積體電路。例如：該第一積體電路裝置312可以是積體電路晶片、封裝積體電路裝置或是覆晶。
第二封裝積體電路裝置346係以第二接著劑326(例如為薄膜內導線(wire-in-film)接著劑)安裝在該第一積體電路裝置312的第一主動側328之上。該第二封裝積體電路裝置346包括基板306，該基板306具有帶有安裝互連308的第一基板側330和相對於該第一基板側330而面對該第一積體電路裝置312之上的第二基板側332。
像是接合線或帶狀接合線之電性互連340在該第一載體側318和該第一基板側330之間連接。該電性互連340也可以提供於該第一載體側318和第一主動側328之間的電性連接。
該封裝件包覆體302覆蓋該第一載體側318、該第一積體電路裝置312、該第二封裝積體電路裝置346、該第一基板側330以及該電性連接340。該封裝件包覆體302包含腔室304於該第一基板側330之上，而該安裝互連308係在該腔室304內從該封裝件包覆體302部分地露出且由該封裝件包覆體302所圍繞。該安裝互連308係與在該腔室304中的該封裝件包覆體302的第一包覆體側342共平面。像是例如球狀、柱狀(pillar)或螺栓狀(stub)組構之焊接凸塊的該安裝互連308係較佳可為使用壓印、壓製或其它平面化製程而予以平坦化。該安裝互連308容納安裝其他積體電路裝置(未圖示)於該第一包覆體側342之上。亦可瞭解，該安裝互連308可視需要地包括凸部344凸伸於該第一包覆體側342之上，像是顯示在該腔室304內的虛線。
現參考第4圖，其中為顯示本發明之第三實施例的可安裝的積體電路封裝件系統400之上視圖。該上視圖描繪封裝件包覆體402(如環氧模造化合物)具有部份露出的安裝互連408，像是從該封裝件包覆體402部分露出且由該封裝件包覆體402環繞的焊接凸塊。該安裝互連408可以由包含有錫(Sn)、鉛(Pb)、金(Au)、銅(Cu)或金屬合金的電性傳導材料所形成。
現參考第5圖，其中為顯示於第4圖中沿著5-5線之該可安裝的積體電路封裝件系統400之剖面圖。該剖面圖描繪該可安裝的積體電路封裝件系統400具有該封裝件包覆體402形成在載體510(像是基板)之上，且該載體510具有第一積體電路裝置512安裝於其上，該第一積體電路裝置512可以是積體電路晶片、覆晶或封裝積體電路裝置。較佳者，該第一積體電路裝置512係以第一接著劑514(如晶粒接著劑)安裝在該第一積體電路裝置512的第一非主動側516而面對該載體510的第一載體側518。而如焊球之第二外部互連520則接置在該載體510之第二載體側522而相對於該第一載體側518，以便連接到下一系統層級(未圖示)，譬如為印刷電路板或其他積體電路封裝件系統。
雖然該第一積體電路裝置512係顯示做為打線接合積體電路，但應了解到，該第一積體電路裝置512可以是各種類型的積體電路。例如：該第一積體電路裝置512可以是積體電路晶片、封裝積體電路裝置、覆晶或其組合。像是接合線或帶狀接合線的電性互連540在該第一載體側518和該第一積體電路裝置512的第一主動側528之間連接。
基板506具有帶有該安裝互連408的第一基板側530，而相對於該第一基板側530之該基板506的第二基板側532係以第二接著劑526(像是薄膜內導線接著劑)安裝在該第一主動側528上。較佳者，該電性互連540也可以連接該第一載體側518和該第一基板側530。
該封裝件包覆體402覆蓋該第一載體側518、該電性 互連540、該第一積體電路裝置512以及該第一基板側530。該安裝互連408係從該封裝件包覆體402部分地露出且由該封裝件包覆體402所圍繞。該安裝互連408係與該封裝件包覆體402的第一包覆體側542共平面。像是例如球狀、柱狀(pillar)或螺栓狀(stub)組構之焊接凸塊的該安裝互連408係可為使用壓印、壓製或其它平面化製程而予以平坦化。該安裝互連408容納安裝其他積體電路裝置(未圖示)於該第一包覆體側542之上。亦可瞭解，該安裝互連408可視需要地包括凸部544凸伸於該第一包覆體側542之上，像是虛線處所顯示者。
現參考第6圖，其中顯示本發明第四實施例之具有由第4圖所示例的上視圖之可安裝的積體電路封裝件系統600。該可安裝的積體電路封裝件系統600具有的結構係類似於第5圖之可安裝的積體電路封裝件系統400。該剖面圖描繪該可安裝的積體電路封裝件系統600具有封裝件包覆體602形成於像是基板之載體610之上，且該載體610具有第一積體電路裝置612安裝於其上，該第一積體電路裝置612可以為積體電路晶片、覆晶或封裝積體電路裝置。較佳者，該第一積體電路裝置612係以第一接著劑614(如晶粒接著劑)安裝在該第一積體電路裝置612的第一非主動側616而面對該載體610的第一載體側618。如焊球之第二外部互連620則接置在該載體610之第二載體側622而相對於該第一載體側618，以便連接到下一系統層級(未圖示)，譬如為印刷電路板或其他積體電路封裝件系統。
雖然該第一積體電路裝置612係顯示做為打線接合積體電路，但應了解到，該第一積體電路裝置612可以是各種類型的積體電路。例如：該第一積體電路裝置612可以是積體電路晶片、封裝積體電路裝置或覆晶。
第二封裝積體電路裝置646係以第二接著劑626(例如為薄膜內導線接著劑)安裝在該第一積體電路裝置612的第一主動側628之上。該第二封裝積體電路裝置646包括基板606，該基板606具有帶有安裝互連608的第一基板側630。像是接合線或帶狀接合線之電性互連640在該第一載體側618和該第一基板側630之間連接。該電性互連640也可以提供於該第一載體側618和第一主動側628之間的電性連接。
該封裝件包覆體602覆蓋該第一載體側618、該第一積體電路裝置612、該第二封裝積體電路裝置646(包含該第一基板側630)以及該電性連接640。該安裝互連608係從該封裝件包覆體602部分地露出且由該封裝件包覆體602圍繞。該安裝互連608係與該封裝件包覆體602的第一包覆體側642共平面。像是例如球狀、柱狀(pillar)或螺栓狀(stub)組構之焊接凸塊的該安裝互連608係較佳可為使用壓印、壓製或其它平面化製程而予以平坦化。該安裝互連608容納安裝其他積體電路裝置(未圖示)於該第一包覆體側642之上。亦可瞭解，該安裝互連608可視需要地包括凸部644凸伸於該第一包覆體側642之上，像是虛線處所顯示者。
現參考第7圖，其中顯示於本發明的第五實施例中應用第2圖之可安裝的積體電路封裝件系統100的積體電路層疊封裝件系統(integrated circuit package-on-package system)700之上視圖。該積體電路層疊封裝件系統700可以由本發明的其他實施例所形成，像是第3圖之該可安裝的積體電路封裝件系統300。像是封裝積體電路之安裝積體電路裝置702安裝在第2圖之可安裝的積體電路封裝件系統100的腔室104內的該可安裝的積體電路封裝件系統100之上。
現參考第8圖，其中顯示沿著第7圖之8-8線之積體電路層疊封裝件系統700之剖面圖。該安裝積體電路裝置702係安裝在該可安裝積體電路封裝件系統100之上，且在該可安裝的積體電路封裝件系統100之該腔室104內露出的該安裝互連108之上。較佳者，安裝接觸件802(如該安裝積體電路裝置702之電性傳導墊或傳導球)安裝於該安裝互連108之上並與該安裝互連108連接以提供在其間的電性連接。為了說明之目的，該積體電路層疊封裝件系統700顯示具有做為封裝積體電路之該安裝積體電路裝置702，但應可暸解到該積體電路層疊封裝件系統700可以和做為該安裝積體電路裝置702之各種類型的積體電路一起形成。例如：該安裝積體電路裝置702可以包含多重積體電路、球柵陣列(BGA)裝置、平面格柵陣列(land grid array,LGA)、四面扁平無接腳(quad flat nonleaded,QFN)裝置、四面扁平封裝件(quad flat package,QFP)裝置、凸塊晶片載體(bump chip carrier，BCC)裝置、覆晶、被動元件或其組合。
現參考第9圖，其中顯示本發明之第六實施例中應用第5圖之可安裝的積體電路封裝件系統400的積體電路層疊封裝件系統900之上視圖。該積體電路層疊封裝件系統900可以由本發明的其他實施例所形成，像是第6圖之該可安裝的積體電路封裝件系統600。像是封裝積體電路之安裝積體電路裝置902安裝在第5圖之可安裝的積體電路封裝件系統400之上。
現參考第10圖，其中顯示為沿著第9圖之10-10線之積體電路層疊封裝件系統900之剖面圖。該安裝積體電路裝置902係安裝在該可安裝的積體電路封裝件系統400之上，且在該可安裝的積體電路封裝件系統400之該安裝互連408之上。較佳者，安裝接觸件1002(如該安裝積體電路裝置902之電性傳導墊或傳導球)安裝於該安裝互連408之上並與該安裝互連408連接以提供在其間的電性連接。為了說明之目的，該積體電路層疊封裝件系統900顯示具有做為封裝積體電路之該安裝積體電路裝置902，但應可暸解到，該積體電路層疊封裝件系統900可以和做為該安裝積體電路裝置902之各種類型的積體電路一起形成。例如：該安裝積體電路裝置902可以包含多重積體電路、球柵陣列(BGA)裝置、平面格柵陣列(LGA)、四面扁平無接腳(QFN)裝置、四面扁平封裝件(QFP)裝置、凸塊晶片載體(BCC)裝置、覆晶、被動元件或其組合。
現參考第11圖，其中顯示於本發明實施例中用以製造該可安裝的積體電路封裝件系統100的可安裝的積體電路封裝方法1100之流程圖。該方法1100包括：在方塊1102中，安裝第一積體電路裝置於載體之上；於方塊1104中，安裝基板於該第一積體電路裝置之上，該基板具有安裝互連；於方塊1106中，連接第一電性互連於該載體和該基板之間；以及於方塊1108中，形成封裝件包覆體覆蓋該載體、該第一積體電路裝置、該第一電性互連和該基板，以使該安裝互連在該封裝件包覆體之腔室內從該封裝件包覆體部分地露出並由該封裝件包覆體圍繞。
而實施例的其他重要態樣包括有價值地支援與幫助降低成本、簡化系統與增加性能之歷史趨勢。
本發明的這些和其他有價值的態樣必然地推動科技狀態於至少下一層級。
因此，可發現到本發明的可安裝的積體電路封裝件系統提供了於系統內可改善可靠度之重要且迄今未知與未曾採用的解決方案、能力和功能性態樣。所產生的製程和組構為明確、節省成本、不繁複、高度多功能且有效的，可以藉由採用已知技術而予以實施，且因此可以容易地適用於有效且經濟地製造積體電路封裝件裝置。
雖然本發明已以特定的最佳模式而描述，但應了解到有鑑於前述說明，許多替代、修改及變化對熟悉此項技藝之人士而言將會是顯而易見的。因此，意欲涵蓋落在所包含的申請專利範圍內的所有這類替代、修改及變化。在此提出或顯示於附圖的所有事項應視為例示之說明而非用於限制。
100、300、400、600‧‧‧可安裝的積體電路封裝件系統
102、302、402、602‧‧‧封裝件包覆體
104、304‧‧‧腔室
108、308、408、608‧‧‧安裝互連
206、306、506、606‧‧‧基板
210、310、510、610‧‧‧載體
212、312、512、612‧‧‧第一積體電路裝置
214、314、514、614‧‧‧第一接著劑
216、316、516、616‧‧‧第一非主動側
218、318、518、618‧‧‧第一載體側
220、320、520、620‧‧‧第二外部互連
222、322、522、622‧‧‧第二載體側
224‧‧‧第二積體電路裝置
226、326、526、626‧‧‧第二接著劑
228、328、528、628‧‧‧第一主動側
230、330、530、630‧‧‧第一基板側
232、332、532‧‧‧第二基板側
234‧‧‧第二主動側
236‧‧‧第三接著劑
238‧‧‧孔隙
240、340、540、640‧‧‧電性互連
242、342、542、642．．．第一包覆體側
244、344、544、644．．．凸部
700、900．．．積體電路層疊封裝件系統
702、902．．．安裝積體電路裝置
802、1002．．．安裝接觸
1100．．．可安裝的積體電路封裝方法
1102、1104、1106、1108．．．流程方塊
第1圖係為本發明之第一實施例的可安裝的積體電路封裝件系統之上視圖；
第2圖係為於第1圖中沿著2-2線之可安裝的積體電路封裝件系統之剖面圖；
第3圖係為本發明之第二實施例的可安裝的積體電路封裝件系統之剖面圖，其具有由第1圖所示例的上視圖；
第4圖係為本發明之第三實施例的可安裝的積體電路封裝件系統之上視圖；
第5圖係為於第4圖中沿著5-5線之可安裝的積體電路封裝件系統之剖面圖；
第6圖係為本發明之第四實施例的可安裝的積體電路封裝件系統之剖面圖，其具有由第4圖所示例的上視圖；
第7圖係為本發明之第五實施例中應用第2圖之可安裝的積體電路封裝件系統的積體電路層疊封裝件系統之上視圖；
第8圖係為於第7圖中沿著8-8線之積體電路層疊封裝件系統之剖面圖；
第9圖係為本發明之第六實施例中應用第5圖之可安裝的積體電路封裝件系統的積體電路層疊封裝件系統之上視圖；第10圖係為於第9圖中沿著10-10線之積體電路層疊封裝件系統之剖面圖；以及第11圖係為根據本發明之實施例中用以製造可安裝的積體電路封裝件系統的可安裝的積體電路封裝方法之流程圖。
100．．．可安裝的積體電路封裝件系統
224．．．第二積體電路裝置
102．．．封裝件包覆體
104．．．腔室
108．．．安裝互連
206．．．基板
210．．．載體
212．．．第一積體電路裝置
236．．．第三接著劑
238．．．孔隙
240．．．電性互連
242．．．第一包覆體側
244．．．凸部
226．．．第二接著劑
228．．．第一主動側
230．．．第一基板側
232．．．第二基板側
234．．．第二主動側
214．．．第一接著劑
216．．．第一非主動側
218．．．第一載體側
220．．．第二外部互連
222．．．第二載體側

Claims (10)

  1. 一種可安裝的積體電路封裝方法(1100)，包括：於載體(210)之上安裝第一積體電路裝置(212)；於該第一積體電路裝置(212)之上安裝基板(206)，該基板(206)具有安裝互連(108)；在該載體(210)和該基板(206)之間，連接第一電性互連(240)；以及形成封裝件包覆體(102)覆蓋該載體(210)、該第一積體電路裝置(212)、該第一電性互連(240)以及該基板(206)，而於該封裝件包覆體(102)的腔室(104)內，該安裝互連(108)係從該封裝件包覆體(102)部分露出並由該封裝件包覆體(102)環繞。
  2. 如申請專利範圍第1項之方法(1100)，復包括：於該第一積體電路裝置(312)和該載體(310)之間，連接該第一電性互連(340)；以及在該第一積體電路裝置(312)之上和部分地在該第一電性互連(340)之上形成薄膜內導線(wire-in-film)接著劑。
  3. 如申請專利範圍第1或2項之方法(1100)，其中，形成該安裝互連(108)包含從該腔室(104)中的該封裝件包覆體(102)露出該安裝互連(108)的凸部(244)。
  4. 如申請專利範圍第1或2項之方法(1100)，復包括在該安裝互連(108)之上安裝第二積體電路裝置(702)。
  5. 如申請專利範圍第1或2項之方法(1100)，其中，安裝 該基板(306)包含以第三積體電路裝置(346)安裝於該第一積體電路裝置(312)之上而安裝該基板(306)。
  6. 一種可安裝的積體電路封裝件系統(100)，包括：載體(210)；第一積體電路裝置(211)，安裝在該載體(210)之上；基板(206)，安裝在該第一積體電路裝置(212)之上，該基板(206)具有安裝互連(108)；第一電性互連(240)，位於該載體(210)和該基板(206)之間；以及封裝件包覆體(102)，覆蓋該載體(210)、該第一積體電路裝置(212)、該第一電性互連(240)以及該基板(206)，而在該封裝件包覆體(102)的腔室(104)內，該安裝互連(108)係從該封裝件包覆體部分露出並由該封裝件包覆體(102)環繞。
  7. 如申請專利範圍第6項之系統(300)，其中：該第一電性互連(340)係位於該第一積體電路裝置(312)和該載體(310)之間；以及復包括：薄膜內導線接著劑(326)，在該第一積體電路裝置(312)之上以及部分地在該第一電性互連(340)之上。
  8. 如申請專利範圍第6或7項之系統(100)，其中，該安裝互連(108)包含在該封裝件包覆體(102)上方的凸部(244)。
  9. 如申請專利範圍第6或7項之系統(700)，復包括第二積體電路裝置(702)，係安裝於該安裝互連(108)之上。
  10. 如申請專利範圍第6或7項之系統(300)，其中，該基板(206)包含安裝在該第一積體電路裝置(212)之上的封裝積體電路裝置(446)。
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