TWI678802B - Display panel and method for manufacturing the same - Google Patents

Abstract

A display panel includes a display area and a peripheral area surrounding the display area. The display panel includes a first substrate, a second substrate, a dielectric layer, and a colloid layer. The first substrate and the second substrate are oppositely disposed, wherein the first substrate has a first region and a second region, the second region is located in the peripheral region and is far from the display region with respect to the first region, and the first substrate is on the surface of the second region The roughness is greater than the surface roughness of the first substrate in the first region. The dielectric layer is disposed on the first substrate and covers the first region. The interface boundary between the dielectric layer and the first substrate is aligned with the boundary line between the first region and the second region. The colloid layer is disposed between the first substrate and the second substrate, and covers the second area.

Description

Display panel and manufacturing method thereof

This disclosure relates to a display panel and a manufacturing method thereof.

Among various electronic products of household appliances, display panels have been widely used to output images or operate menus. In response to the current trend in the consumer market, these electronic products with display panels are gradually designed with narrow bezels.

In this regard, in the manufacturing process of the display panel, the substrate is first adhered to the opposite substrate through the colloidal layer, and then each panel is separated by cutting the mother sheet. In other words, the adhesion relationship between the substrate and the opposing substrate is maintained by the colloidal layer. In the current design of electronic products with narrow bezels, if the arrangement area of the colloidal layer is excessively reduced in order to reduce the bezel, the bonding relationship between the substrate and the opposite substrate will be reduced, and the structural strength of the display panel will therefore be reduced. .

An embodiment of the present disclosure provides a display panel having a display area and a peripheral area surrounding the display area, and the display panel includes a first substrate, A second substrate, a dielectric layer, and a colloid layer. The first substrate and the second substrate are oppositely disposed, wherein the first substrate has a first region and a second region, the second region is located in the peripheral region and is far from the display region with respect to the first region, and the first substrate is on the surface of the second region The roughness is greater than the surface roughness of the first substrate in the first region. The dielectric layer is disposed on the first substrate and covers the first region. The interface boundary between the dielectric layer and the first substrate is aligned with the boundary line between the first region and the second region. The colloid layer is disposed between the first substrate and the second substrate, and covers the second area.

In some embodiments, the dielectric layer is in contact with the colloidal layer, and the interface between the dielectric layer and the colloidal layer is perpendicular to the first substrate to align the boundary between the first region and the second region.

In some embodiments, the display panel further includes a dielectric material. A dielectric material is filled between the dielectric layer and the colloidal layer, and covers the second area together with the colloidal layer.

In some embodiments, the surface roughness of the first substrate in the second region gradually increases in a direction away from the display area.

In some embodiments, the second region is completely covered by the colloid layer.

In some embodiments, the first substrate further has a third region, the second region is located between the first region and the third region, and the surface roughness of the first substrate in the second region is greater than that of the first substrate in the third region. Surface roughness, in which the colloidal layer covers the third area more.

In some embodiments, the surface roughness of the first substrate in the second region is R microns, and 0 <R ≦ 1.

In some embodiments, the display panel further includes an organic light emitting diode. Polar body. The organic light emitting diode is disposed in the display area.

An embodiment of the present disclosure provides a method for manufacturing a display panel, including the following steps. A display element is formed on a display area of the display panel. A dielectric layer is formed in the peripheral area and the display area of the display panel and covers the display element, and the thickness of the dielectric layer in the peripheral area gradually decreases in a direction away from the display area. The dielectric layer in the peripheral region is removed to expose the area of the substrate located below the dielectric layer in the peripheral region. The process of removing the dielectric layer in the peripheral region is anisotropic and causes The surface roughness of the area of the substrate is increased.

In some embodiments, the method for manufacturing a display panel further includes forming a colloid layer on a peripheral region of the display panel and covering a region of the substrate.

In some embodiments, the surface roughness of the substrate in the area gradually increases in a direction away from the display area.

In some embodiments, the step of removing the dielectric layer in the peripheral region includes emitting a laser beam to the dielectric layer in the peripheral region to remove the dielectric layer in the peripheral region. The wavelength of the laser beam falls on Ultraviolet or infrared light.

With the above configuration, when the display panel is in the manufacturing stage, the excess dielectric layer in the peripheral region can be removed from the first substrate, so that the colloidal layer formed later can be closer to the display area, so that the display panel can be used. Suitable for applications with a narrow bezel structure. On the other hand, during the process of removing the excess dielectric layer, the first substrate may increase the roughness due to the removal method and may be regarded as having a microstructure. When the formed colloid layer is covered on the microstructure, the contact area of the colloid layer to the first substrate can be increased, so as to improve the adhesive ability of the colloid layer to the first substrate.

100A, 100B, 100C, 100D, 100E‧‧‧ display panel

102‧‧‧display area

104‧‧‧Peripheral area

110‧‧‧first substrate

111‧‧‧microstructure

112‧‧‧first dielectric layer

114‧‧‧ flat layer

116‧‧‧Second dielectric layer

118‧‧‧Third dielectric layer

120‧‧‧ conductive layer

130‧‧‧Display element

132‧‧‧first electrode layer

134‧‧‧Light-emitting layer

136‧‧‧Second electrode layer

140‧‧‧ fourth dielectric layer

140A‧‧‧thickness decrease

140B‧‧‧Other parts

150‧‧‧ colloid layer

160‧‧‧second substrate

162‧‧‧Dielectric

1B-1B ’, 3B-3B’‧‧‧ line segments

A1‧‧‧First Zone

A2‧‧‧Second Zone

A3‧‧‧Third Zone

L1‧‧‧Distance

TH‧‧‧contact hole

T1, T2, T3, T4‧‧‧thickness

W1, W2, W3, W4, W5, W6, W7, W8‧‧‧Width

FIG. 1A is a schematic top view illustrating a manufacturing method of a display panel in a manufacturing stage according to a first embodiment of the present disclosure.

Fig. 1B is a schematic cross-sectional view taken along line 1B-1B 'of Fig. 1A.

FIG. 2A is a schematic cross-sectional view illustrating a method for manufacturing a display panel in a manufacturing stage according to a first embodiment of the present disclosure.

FIG. 2B is an enlarged schematic view of a part of the second region of the first substrate of FIG. 2A

FIG. 3A is a schematic top view illustrating a manufacturing method of a display panel in a manufacturing stage according to some embodiments of the present disclosure.

Fig. 3B is a schematic cross-sectional view taken along line 3B-3B 'of Fig. 3A.

FIG. 4 is a schematic cross-sectional view of a display panel according to a second embodiment of the present disclosure.

FIG. 5 is a schematic cross-sectional view of a display panel according to a third embodiment of the present disclosure.

FIG. 6 is a schematic cross-sectional view of a display panel according to a fourth embodiment of the present disclosure.

FIG. 7 is a schematic cross-sectional view of a display panel according to a fifth embodiment of the present disclosure.

In the following, a number of implementations of this disclosure will be disclosed graphically. For the sake of clarity, many practical details will be combined in the following description. Instructions. However, it should be understood that these practical details should not be used to limit the disclosure. That is to say, in the embodiments of the disclosure, these practical details are unnecessary. In addition, in order to simplify the drawings, some conventional structures and components will be shown in the drawings in a simple and schematic manner. In this article, the terms first, second, third, etc. are used to identify different components, regions, layers, and not to limit the disclosure.

In the drawings, the thicknesses of layers, films, panels, regions, etc. are exaggerated for clarity. Throughout the description, the same reference numerals denote the same elements. It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to a physical and / or electrical connection.

As used herein, "about" or "substantially" includes the stated value and an average value within an acceptable deviation range of a particular value determined by one of ordinary skill in the art, taking into account the measurement in question and measurement-related errors A specific number (ie, a limitation of the measurement system). For example, "about" or "substantially" may mean within one or more standard deviations of the stated value, or within ± 30%, ± 20%, ± 10%, ± 5%.

It should be understood that, although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, and / or sections, and / Or in part should not be limited by these terms. These terms are only used to refer to an element, part, region, layer, or A section is distinguished from another element, component, region, layer or section. Thus, a "first element," "component," "region," "layer," or "portion" discussed below may be termed a second element, component, region, layer, or portion without departing from the teachings herein.

The display panel disclosed in this disclosure can remove part of the layer during the manufacturing process, so that the colloid layer used to bond the substrate can be formed closer to the display area, so that the finished display panel can be suitable for narrow applications. Border structure.

Please see FIG. 1A and FIG. 1B. FIG. 1A is a schematic top view of the manufacturing method of the display panel 100A according to the first embodiment of the present disclosure during the manufacturing stage, and FIG. 1B is a view along FIG. 1A. A schematic sectional view of the line segments 1B-1B '. The display panel 100A has a display area 102 and a peripheral area 104 surrounding the display area 102. In order not to make the drawing too complicated, the display area 102 in FIG. The display panel 100A includes a first substrate 110. The first substrate 110 may be a light-transmitting substrate, such as a glass substrate. In the manufacturing stages depicted in FIGS. 1A and 1B, a first dielectric layer 112, a flat layer 114, a second dielectric layer 116, and a third dielectric layer 118 are formed on the first substrate 110 of the display panel 100A. , A conductive layer 120, a display element 130, and a fourth dielectric layer 140.

The first dielectric layer 112 is formed on the first substrate 110, and the flat layer 114 is formed on the first dielectric layer 112. The formed first dielectric layer 112 and the flat layer 114 can be located at least in the display area 102. . The first dielectric layer 112 may be a single-layer structure or a composite layer structure, which includes organic or inorganic materials, such as polyimide, silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or the foregoing materials. The combination. The flat layer 114 may be a single-layer structure or a composite layer structure, and includes an organic layer Material, like polyurethane.

The second dielectric layer 116, the third dielectric layer 118, and the conductive layer 120 are formed on the flat layer 114. The second dielectric layer 116 is located between the flat layer 114 and the third dielectric layer 118. The dielectric layer 116 may extend to cover the sidewalls of the first dielectric layer 112 and the flat layer 114 and the first substrate 110. The second dielectric layer 116 and the third dielectric layer 118 can be used together to define the position of the pixel area of the display panel 100A. For example, the second dielectric layer 116 and the third dielectric layer 118 can be used to define settings The boundary position of the display element 130 inside the display panel 100A. In addition, the second dielectric layer 116 and the third dielectric layer 118 may have a contact hole TH in common, thereby facilitating the layout of the internal circuit of the display panel 100A. For example, the conductive layer 120 may be formed in the contact hole TH and used as a display. The internal circuit of the panel 100A is used. The second dielectric layer 116 and the third dielectric layer 118 may include organic or inorganic materials, such as polyimide, silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or a combination of the foregoing materials.

The display element 130 is formed on the flat layer 114, and the formed display element 130 is disposed at least in the display area 102 of the display panel 100A. The display element 130 may be a light emitting diode, such as an organic light emitting diode, and includes a first electrode layer 132, a light emitting layer 134, and a second electrode layer 136. The light emitting layer 134 may include an organic material having electroluminescent properties. In some embodiments, the light-emitting layer 134 may have a composite layer structure. For example, the light-emitting layer 134 may further include a stacked electron transport layer, an electron injection layer, an electron blocking layer, a hole transport layer, a hole injection layer, or a hole block. Floor. The materials of the first electrode layer 132 and the second electrode layer 136 may be different. For example, the first electrode layer 132 may be a non-transparent conductive material, such as a metal, an alloy, or other suitable materials, and the second electrode layer 136 may be Transparent conductive material Materials, such as indium tin oxide, indium zinc oxide, zinc oxide, carbon nanotubes, indium gallium zinc oxide, or other suitable materials. In some embodiments, the first electrode layer 132 and the conductive layer 120 may be formed by patterning the same metal layer and separated from each other (ie, electrically isolated) after patterning. In some embodiments, the formation order of the first electrode layer 132 and the conductive layer 120 may be earlier than the formation order of the second dielectric layer 116, and the formation order of the light emitting layer 134 may be later than the formation order of the second dielectric layer 116. .

The first electrode layer 132 is located between the flat layer 114 and the light emitting layer 134, and the second electrode layer 136 covers the light emitting layer 134, and the second electrode layer 136 may extend into the contact hole TH and be connected to the conductive layer 120. In addition, at the end of some embodiments, a plurality of thin film transistors (not shown) may be formed on the first substrate 110 in the display area 102 of the display panel 100A. The first electrode layer 132 of the display element 130 may be electrically conductive. The thin film transistor is connected, and the conductive layer 120 can be connected to a voltage supply terminal (not shown). Therefore, after the thin film transistor is driven, the first electrode layer 132 and the second electrode layer 136 can provide light emission therebetween. The layer 134 is biased so that the light-emitting layer 134 emits light through an electroluminescence phenomenon. However, the disclosure is not limited to this. In other embodiments, the thin film transistor can be omitted and the driving circuit can be used to control the light emission of the display element 130. For example, the first electrode layer 132 and the conductive layer 120 can be changed. Connected to the drive circuit.

The fourth dielectric layer 140 is formed on the flat layer 114, and the fourth dielectric layer 140 is formed in the display region 102 and the peripheral region 104 of the display panel 100A, and covers the second dielectric layer 116 and the third dielectric layer. Layer 118 and display element 130. The fourth dielectric layer 140 can be used as a passivation layer to prevent the layer body or element located between the fourth dielectric layer 140 and the first substrate 110 from being damaged by external influences. Fourth dielectric layer 140 It may include organic or inorganic materials, such as polyimide, silicon oxide, silicon nitride, silicon oxynitride, other suitable materials, or a combination of the above. The fourth dielectric layer 140 can be formed by deposition, for example, can be formed by chemical vapor deposition (CVD).

In the case where the fourth dielectric layer 140 is formed through deposition, the thickness of the fourth dielectric layer 140 in the peripheral region 104 will gradually decrease in a direction away from the display region 102. For the convenience of explanation, a dotted line is drawn to separate the thickness-reduced portion 140A of the fourth dielectric layer 140 from other portions 140B. The fourth dielectric layer 140 having a decreasing thickness covers a portion of the second dielectric layer 116. In some embodiments, the decreasing width W1 of the fourth dielectric layer 140 is approximately 650 μm to 750 μm, such as 700 μm, and the distance L1 between the fourth dielectric layer 140 and the third dielectric layer 118 is approximately 150 μm. Between 250 μm, it looks like 200 μm.

Please see FIG. 2A again. FIG. 2A is a schematic cross-sectional view of the manufacturing method of the display panel 100A according to the first embodiment of the present disclosure during the manufacturing stage. The cross-sectional position of FIG. 2A is the same as that of FIG. 1B. In addition, the manufacturing stage depicted in Figure 2A is subsequent to the manufacturing stages of Figures 1A and 1B.

In the manufacturing stage depicted in FIG. 2A, the fourth dielectric layer 140 having a decreasing thickness in the peripheral region 104 can be removed. The process of removing the fourth dielectric layer 140 having a decreasing thickness is anisotropic. . For example, in some embodiments, the fourth dielectric layer 140 having a decreasing thickness in the peripheral region 104 may be transmitted by emitting a laser beam to remove it from the first substrate 110. The wavelength of the laser beam can fall in the ultraviolet range, such as using a laser beam with a wavelength of about 365 nanometers, or it can fall in the infrared range, such as using a wavelength of about 1064 nanometers. Laser beam. In other embodiments, a photomask process may also be used, so that the fourth dielectric layer 140 having a decreasing thickness can be removed through anisotropic etching. In addition, during the process of removing the fourth dielectric layer 140 having a decreasing thickness, the second dielectric layer 116 covered by the fourth dielectric layer 140 having a decreasing thickness may be removed from the first substrate 110 in conjunction with the fourth dielectric layer 140.

For the convenience of explanation, the first region A1, the second region A2, and the third region A3 are marked on the first substrate 110. The first region A1 is that the first substrate 110 is still covered by the first dielectric layer after the removal process. The area covered by 112 and the second dielectric layer 116, the second area A2 is the area where the first substrate 110 is exposed due to the removal process, and the third area A3 is the first substrate 110 before the removal process. An area covered by the first dielectric layer 112, the second dielectric layer 116, and the fourth dielectric layer 140, wherein the second area A2 and the third area A3 are located in the peripheral area 104 and are far from the display area relative to the first area A1 102, and the second area A2 is located between the first area A1 and the third area A3.

After the removal process, the fourth dielectric layer 140 of decreasing thickness and the second dielectric layer 116 covered by it may expose the second region A2 of the first substrate 110, while the remaining second dielectric layer 116 remains. It is located on the first substrate 110 and covers at least the first area A1. Specifically, the interface boundary between the second dielectric layer 116 and the first substrate 110 is aligned with the boundary line between the first region A1 and the second region A2.

Since the removed fourth dielectric layer 140 has a decreasing thickness, during the removal process, the second area A2 of the first substrate 110 will be gradually exposed in a direction away from the display area 102. That is, during the removal process, before the fourth dielectric layer 140 having a decreasing thickness is completely removed, even the first substrate 110 A part of the second area A2 has been exposed first, and the removal process will continue. In other words, during the removal process, the removal method (such as using a laser beam) will not only remove the fourth dielectric layer 140, but also irradiate the second area A2 of the first substrate 110, and The second region A2 of the first substrate 110 is changed. For example, when the laser beam irradiates the second region A2 of the first substrate 110, the laser beam may slightly damage the surface of the second region A2 of the first substrate 110 and cause the surface of the second region A2 of the first substrate 110 Roughness increases. In some embodiments, after the removal process is finished, the surface roughness of the first substrate 110 in the second region A2 is about R microns, and 0 <R ≦ 1.

On the other hand, during the removal process, since the surface of the first substrate 110 on the first region A1 is covered by at least one dielectric layer, the surface roughness of the first substrate 110 on the first region A1 does not occur. If the second region A2 changes, the surface roughness of the first substrate 110 in the second region A2 will be greater than the surface roughness of the first substrate 110 in the first region A1. In addition, during the removal process, a mask can be used to shield the laser beam directed to the third region A3 of the first substrate 110, so that the surface roughness of the first substrate 110 in the third region A3 does not generate as the second region The change in A2 causes the surface roughness of the first substrate 110 in the second region A2 to be greater than the surface roughness of the first substrate 110 in the third region A3. Since the second area A2 of the first substrate 110 is gradually exposed in a direction away from the display area 102, the light exposure time of the second area A2 of the first substrate 110 in a direction away from the display area 102 It will also increase gradually. This will make the surface roughness of the first substrate 110 in the second area A2 gradually increase in a direction away from the display area 102. For example, see FIG. 2B, which is the first substrate in FIG. 2A. An enlarged schematic view of a part of the second region A2 of 110. In order to help understanding, The undulation ratio depicted in FIG. 2 is only used for illustration and description, and is not intended to limit the disclosure. As shown in FIG. 2B, the surface roughness of the first substrate 110 in the second area A2 will gradually increase along the right-to-left direction of FIG. 2B (that is, the direction away from the display area 102 in FIG. 2A), or it may be called The degree of undulation is increasing.

Please see FIG. 3A and FIG. 3B. FIG. 3A is a schematic top view illustrating the manufacturing method of the display panel 100A in the manufacturing stage according to some embodiments of the present disclosure, and FIG. 3B is a view along FIG. 3A. A schematic cross-sectional view of the line segments 3B-3B ′, and the production stages depicted in FIGS. 3A and 3B are subsequent to the production stage of FIG. 2A.

In the production stages depicted in FIGS. 3A and 3B, a colloid layer 150 may be formed in the peripheral region 104 of the display panel 100A, wherein the colloid layer 150 is located on the first substrate 110 and covers the second substrate 110. Region A2 and third region A3. After a portion of the fourth dielectric layer 140 is removed, the colloidal layer 150 may be formed closer to the display area 102. Specifically, if the fourth dielectric layer 140 having a decreasing thickness is not removed, the formation position of the colloidal layer 150 will be limited to the third region A3 of the first substrate 110. In this regard, when the fourth dielectric layer 140 having a decreasing thickness is removed, the colloidal layer 150 may be formed to cover the third region A3 of the first substrate 110, and may also cover the first substrate 110. The second area A2 is closer to the display area 102. Since the colloid layer 150 can be formed closer to the display area 102, the third area A3 of the first substrate 110 can be designed to have a smaller width, so that the display panel 100A can be suitably applied to a narrow frame structure. In addition, if the fourth dielectric layer 140 whose thickness is gradually reduced is not removed, the formed colloid layer 150 may also cause poor adhesion due to covering the fourth dielectric layer 140.

In some embodiments, after the removal process, the size configuration in the peripheral region 104 may be: the width W2 of the third region A3 not covered by the colloid layer 150 is between about 150 μm and 250 μm, such as 200 μm; The width W3 of the colloidal layer 150 is between about 1800 μm and 2200 μm, like 2000 μm; the width W4 of the fourth dielectric layer 140 covering the second dielectric layer 116 is between about 150 μm and 2 to 0 μm, like 200 μm; the width W5 of the third dielectric layer 118 covered by the fourth dielectric layer 140 is between 150 μm and 250 μm, like 200 μm; the width W6 of the contact hole TH is between 700 μm and 900 μm, like 800 μm; the width W7 of the third dielectric layer 118 covered by the second electrode layer 136 is between about 400 μm and 600 μm, such as 500 μm. The width W8 of the peripheral region 104 may be between about 3300 μm and 4500 μm, such as 3900 μm.

On the other hand, since the surface roughness of the first substrate 110 in the second region A2 will be greater than the surface roughness of other regions, it can be considered that the surface of the first substrate 110 in the second region A2 has a microstructure 111, and this microstructure The 111 series is covered by at least the colloidal layer 150. Through the microstructure 111, the contact area of the colloidal layer 150 to the first substrate 110 can be increased, so as to improve the adhesion ability of the colloidal layer 150 to the first substrate 110. The colloidal layer 150 may be partially covered on the second region A2 of the first substrate 110, that is, there may be a portion of the second region A2 that is not covered by the colloidal layer 150, and the colloidal layer 150 and the remaining fourth dielectric layer may be 140 is separated by a distance to prevent unexpected results due to process variations.

The second substrate 160 can be assembled on the first substrate 110, that is, the first substrate 110 and the second substrate 160 are oppositely disposed, so that the colloid layer 150 is disposed between the first substrate 110 and the second substrate 160, and can be used. The second substrate 160 is fixed on the first substrate 110. The second substrate 160 may be a transparent substrate, for example Such as a glass substrate. In addition, a dielectric material 162 may be filled between the first substrate 110 and the second substrate 160 to improve the structural strength of the display panel 100A and protect the layer body between the first substrate 110 and the second substrate 160 from being damaged. Damaged by external influences. And since the colloidal layer 150 is separated from the remaining fourth dielectric layer 140, the dielectric material 162 is also filled between the colloidal layer 150 and the remaining fourth dielectric layer 140, and the dielectric material 162 and the colloid The layer 150 may collectively cover the second area A2 to prevent the second area A2 exposed by the fourth dielectric layer 140 having a decreasing thickness from being damaged unexpectedly.

The above-mentioned process of removing the fourth dielectric layer 140 with decreasing thickness may be applied to at least one side of the peripheral region 104 of the display panel 100A. In some embodiments, the process of removing the fourth dielectric layer 140 having a decreasing thickness may be applied to a pair of opposite sides of the peripheral region 104 of the display panel 100A, so that a pair of opposite frames of the display panel 100A Can be adapted to be designed as a narrow bezel. In other embodiments, the process of removing the fourth dielectric layer 140 with decreasing thickness may be applied to three sides of the peripheral region 104 of the display panel 100A, so that the three frames of the display panel 100A may be suitable for design. It is a narrow frame, and the remaining single frame that is not applied can be used to configure driving elements or other electrical components.

Please refer to FIG. 4, which is a schematic cross-sectional view of a display panel 100B according to a second embodiment of the present disclosure. The cross-sectional position of FIG. 4 is the same as that of FIG. 1B. At least one difference between this embodiment and the first embodiment is that the colloidal layer 150 of this embodiment contacts the second dielectric layer 116 and the fourth dielectric layer 140, and the intersection of the second dielectric layer 116 and the colloidal layer 150 The vertical projection of the interface on the first substrate 110 will cut the boundary line between the first area A1 and the second area A2, and the interface between the fourth dielectric layer 140 and the colloidal layer 150 will be at the first The vertical projection of the substrate 110 will also cut the boundary between the first area A1 and the second area A2. In addition, the second region A2 of the first substrate 110 may be completely covered by the colloidal layer 150, so that the microstructure 111 formed on the surface of the second region A2 by the first substrate 110 improves the adhesive ability of the colloidal layer 150 to the first substrate 110. . Since the adhesion ability can be improved through the microstructure 111, the coverage area of the colloid layer 150 can be adjusted and reduced to further narrow the frame of the display panel 100B.

FIG. 5 is a schematic cross-sectional view of a display panel 100C according to a third embodiment of the present disclosure. The cross-sectional position of FIG. 5 is the same as that of FIG. 1B. At least one difference between this embodiment and the first embodiment is that the colloid layer 150 of this embodiment does not cover the third area A3, that is, the vertical projection of the colloid layer 150 on the first substrate 110 falls within the second area A2. . Since the colloidal layer 150 can improve the adhesion ability to the first substrate 110 through the microstructure 111, the covering position of the colloidal layer 150 can be adaptively adjusted when the adhesion ability permits, so as to prevent unexpected results due to process variations. result.

FIG. 6 is a schematic cross-sectional view of a display panel 100D according to a fourth embodiment of the present disclosure. The cross-sectional position of FIG. 6 is the same as that of FIG. 1B. At least one difference between this embodiment and the first embodiment is that the colloidal layer 150 of this embodiment contacts the second dielectric layer 116 and the fourth dielectric layer 140, and the colloidal layer 150 is perpendicular to the projection system of the first substrate 110. It coincides with the second area A2. Furthermore, the vertical projection boundary of the colloidal layer 150 on the first substrate 110 coincides with the boundary of the distribution area of the microstructure 111. Since the colloidal layer 150 can improve the adhesion ability to the first substrate 110 through the microstructure 111, the covering position of the colloidal layer 150 can be adjusted adaptively when the adhesion ability allows, so that the display panel 100D can be adapted to different Production requirements.

FIG. 7 is a schematic cross-sectional view of a display panel 100E according to a fifth embodiment of the present disclosure. The cross-sectional position of FIG. 7 is the same as that of FIG. 1B. At least one difference between this embodiment and the first embodiment is that the light-emitting layer 134 of the display element 130 of this embodiment can be formed on the first electrode layer 132 through an ink-jet printing (IJP) process. The light-emitting layer 134 formed by inkjet printing will have a gradual thickness. For example, the thickness T1 at the edges of the light-emitting layer 134 will be greater than the thickness T2 of the middle region of the light-emitting layer 134, and the thickness from the edge of the light-emitting layer 134 to the middle region will be It's thinner. The second electrode layer 136 formed on the light emitting layer 134 may be formed by evaporation and has a relatively uniform thickness for the light emitting layer 134. For example, the thickness T3 of the second electrode layer 136 corresponding to the edge of the light emitting layer 134 will be substantially It is equal to the thickness T4 of the middle region of the corresponding light emitting layer 134.

In summary, during the manufacturing stage of the display panel of the present disclosure, the excess dielectric layer in the peripheral region can be removed from the first substrate, so that the colloidal layer formed later can be closer to the display area, so that The display panel may be suitably applied as a narrow bezel structure. On the other hand, during the process of removing the excess dielectric layer, the first substrate may increase the roughness due to the removal method and may be regarded as having a microstructure. When the formed colloid layer is covered on the microstructure, the contact area of the colloid layer to the first substrate can be increased, so as to improve the adhesive ability of the colloid layer to the first substrate. In addition, in the manufacturing stage of the display panel, the covering position of the colloid layer can be adaptively adjusted so that the display panel can be adapted to different manufacturing needs.

Although the content of this disclosure has been disclosed above in various ways, it is not intended to limit the content of this disclosure. Any person skilled in this art can make various changes and decorations without departing from the spirit and scope of this disclosure. this The scope of protection of the disclosure shall be determined by the scope of the attached patent application.

Claims (12)

A display panel has a display area and a peripheral area surrounding the display area, and includes: a first substrate and a second substrate which are oppositely arranged, wherein the first substrate has a first area and a second area. The two regions are located in the peripheral region and away from the display region relative to the first region, and the surface roughness of the first substrate in the second region is greater than the surface roughness of the first substrate in the first region; An electrical layer is disposed on the first substrate and covers the first region, wherein an interface boundary between the dielectric layer and the first substrate is aligned with the boundary between the first region and the second region. A boundary line; a colloidal layer disposed between the first substrate and the second substrate and covering the second area; and a dielectric material filled between the dielectric layer and the colloidal layer and with the colloid The layers collectively cover the second area. The display panel according to item 1 of the scope of patent application, wherein the dielectric layer is in contact with the colloidal layer, and the interface between the dielectric layer and the colloidal layer is aligned with the vertical projection of the first substrate to align the first area with The boundary between the second regions. The display panel according to item 1 of the scope of patent application, wherein the surface roughness of the first substrate in the second region increases gradually away from the display region. The display panel according to item 1 of the scope of patent application, wherein the second region is completely covered by the colloid layer. The display panel according to item 1 of the scope of patent application, wherein the first substrate further has a third region, the second region is located between the first region and the third region, and the first substrate is in the first region. The surface roughness of the second region is greater than the surface roughness of the first substrate in the third region, and the colloidal layer further covers the third region. The display panel according to item 1 of the scope of patent application, wherein the surface roughness of the first substrate in the second region is R microns, and 0 <R ≦ 1. The display panel described in item 1 of the scope of patent application further includes an organic light emitting diode and is disposed in the display area. A method for manufacturing a display panel includes: forming a display element in a display area of a display panel; forming a dielectric layer on a peripheral area of the display panel and the display area, and covering the display element, and the peripheral area The thickness of the dielectric layer gradually decreases in a direction away from the display area; and the dielectric layer in the peripheral area is removed to expose one of a substrate located below the dielectric layer in the peripheral area. Area, in which the process of removing the dielectric layer in the peripheral area is anisotropic, and causes the surface roughness of the area of the substrate to increase. The method for manufacturing a display panel according to item 8 of the scope of patent application, further comprises: forming a colloid layer on the peripheral region of the display panel and covering the region of the substrate. The method for manufacturing a display panel according to item 8 of the scope of patent application, wherein the surface roughness of the substrate in the region gradually increases in a direction away from the display region. The method for manufacturing a display panel according to item 8 of the scope of patent application, wherein the step of removing the dielectric layer in the peripheral region includes: emitting a laser beam to the dielectric layer in the peripheral region to remove the dielectric layer. Except for the dielectric layer in the peripheral region, the wavelength of the laser beam falls in an ultraviolet light range or an infrared light range. A display panel has a display area and a peripheral area surrounding the display area, and includes: a first substrate and a second substrate which are oppositely arranged, wherein the first substrate has a first area and a second area. The two regions are located in the peripheral region and away from the display region with respect to the first region, and the surface roughness of the first substrate in the second region is greater than the surface roughness of the first substrate in the first region, wherein the The surface roughness of the first substrate in the second region gradually increases in a direction away from the display region; a dielectric layer is disposed on the first substrate and covers the first region, wherein the dielectric layer The interface boundary between the first substrate and the first substrate is aligned with the boundary between the first region and the second region; and a colloid layer is disposed between the first substrate and the second substrate and covers the The second area.