TWI742977B - Stretchable pixel array substrate - Google Patents
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Abstract
Description
本發明是有關於一種畫素陣列基板,且特別是有關於一種可拉伸的畫素陣列基板。The present invention relates to a pixel array substrate, and particularly relates to a stretchable pixel array substrate.
隨著電子技術的高度發展,電子產品不斷推陳出新。為使電子產品能應用於各種不同的領域,可拉伸、輕薄及外型不受限的特性逐漸受到重視。也就是說,電子產品逐漸被要求依據不同的應用方式以及應用環境而具有不同的外型,因此電子產品需具有可拉伸性。With the rapid development of electronic technology, electronic products continue to introduce new ones. In order to enable electronic products to be used in a variety of different fields, the characteristics of stretchability, thinness and unrestricted appearance are gradually being valued. In other words, electronic products are gradually required to have different appearances according to different application methods and application environments, so electronic products need to be stretchable.
然而,電子產品在被拉伸的狀態下,可能會因為承受應力造成結構上的斷裂,甚至進一步造成內部線路的斷路。因此,如何使可拉伸的電子產品具有良好的製造良率(yield)及產品可靠度(reliability),實為目前亟欲解決的課題。However, when the electronic product is stretched, the structure may break due to the stress, and even further cause the internal circuit to break. Therefore, how to make stretchable electronic products have good manufacturing yield and product reliability is an urgent issue to be solved at present.
本發明提供一種畫素陣列基板,不易裂損。The invention provides a pixel array substrate, which is not easy to be cracked.
本發明提供另一種畫素陣列基板,也不易裂損。The present invention provides another pixel array substrate, which is not easy to be cracked.
本發明的一種可拉伸的畫素陣列基板,包括基底及元件層。基底具有多個第一開口及多個第二開口,其中每一第一開口具有第一開口延伸方向,每一第二開口具有第二開口延伸方向,且第一開口延伸方向與第二開口延伸方向不同。多個第一開口及多個第二開口在第一方向及第二方向上交替排列,以定義基底的多個島及多個橋。第一方向與第二方向交錯,第一方向與第一開口延伸方向交錯,且第二方向與第二開口延伸方向交錯。每一第一開口具有相對的多個第一邊緣及相對的多個第二邊緣,多個第一邊緣在第一方向上排列,且多個第二邊緣在第一開口延伸方向上排列。每一第二開口具有相對的多個第三邊緣及相對的多個第四邊緣,多個第三邊緣在第二方向上排列,且多個第四邊緣在第二開口延伸方向上排列。元件層設置於基底上且包括多個島部及多個橋部。多個島部具有多個畫素結構且分別設置於基底的多個島上。多個橋部具有多條導線且分別設置於基底的多個橋上,其中多條導線電性連接至多個畫素結構。基底的多個島包括第一島及第二島,在第一方向上排列。基底的多個橋包括第一橋,連接第一島與第二島。元件層的多個島部包括第一島部及第二島部,分別設置於基底的第一島及第二島上且分別具有多個畫素結構的第一畫素結構及第二畫素結構。元件層的多個橋部包括第一橋部,設置於基底的第一橋上,且連接元件層的第一島部與第二島部。元件層的第一橋部具有多條導線的第一導線,且第一導線電性連接第一畫素結構與第二畫素結構。基底之第一開口的第一邊緣具有定義基底之第一島的第一段。元件層的第一島部具有相鄰於第一開口的邊緣。第一開口之第一邊緣的第一段與元件層之第一島部的邊緣在第一方向上具有第一距離,且第一距離隨著靠近基底的第一橋而漸增。The stretchable pixel array substrate of the present invention includes a base and a component layer. The substrate has a plurality of first openings and a plurality of second openings, wherein each first opening has a first opening extending direction, each second opening has a second opening extending direction, and the first opening extending direction and the second opening extending The direction is different. The plurality of first openings and the plurality of second openings are alternately arranged in the first direction and the second direction to define a plurality of islands and a plurality of bridges of the substrate. The first direction is staggered with the second direction, the first direction is staggered with the extending direction of the first opening, and the second direction is staggered with the extending direction of the second opening. Each first opening has a plurality of opposing first edges and a plurality of opposing second edges, the plurality of first edges are arranged in the first direction, and the plurality of second edges are arranged in the extending direction of the first opening. Each second opening has a plurality of opposing third edges and a plurality of opposing fourth edges, the plurality of third edges are arranged in the second direction, and the plurality of fourth edges are arranged in the extending direction of the second opening. The element layer is arranged on the substrate and includes a plurality of islands and a plurality of bridges. The multiple islands have multiple pixel structures and are respectively disposed on the multiple islands of the base. The plurality of bridges have a plurality of wires and are respectively disposed on the plurality of bridges of the substrate, and the plurality of wires are electrically connected to the plurality of pixel structures. The multiple islands of the base include a first island and a second island, which are arranged in the first direction. The multiple bridges of the base include a first bridge, which connects the first island and the second island. The multiple island portions of the element layer include a first island portion and a second island portion, which are respectively disposed on the first island and the second island of the substrate and each have a first pixel structure and a second pixel structure having multiple pixel structures . The multiple bridge portions of the element layer include a first bridge portion, which is disposed on the first bridge of the substrate and connects the first island portion and the second island portion of the element layer. The first bridge portion of the element layer has a first conductive line of a plurality of conductive lines, and the first conductive line is electrically connected to the first pixel structure and the second pixel structure. The first edge of the first opening of the substrate has a first section defining the first island of the substrate. The first island portion of the element layer has an edge adjacent to the first opening. The first section of the first edge of the first opening and the edge of the first island portion of the element layer have a first distance in the first direction, and the first distance gradually increases as the first bridge approaches the substrate.
本發明的另一種可拉伸的畫素陣列基板,包括基底、元件層以及多個加強結構。基底具有多個第一開口及多個第二開口,其中每一第一開口具有第一開口延伸方向,每一第二開口具有第二開口延伸方向,且第一開口延伸方向與第二開口延伸方向不同。多個第一開口及多個第二開口在第一方向及第二方向上交替排列,以定義基底的多個島及多個橋。第一方向與第二方向交錯,第一方向與第一開口延伸方向交錯,且第二方向與第二開口延伸方向交錯。每一第一開口具有相對的多個第一邊緣及相對的多個第二邊緣,多個第一邊緣在第一方向上排列,且多個第二邊緣在第一開口延伸方向上排列。每一第二開口具有相對的多個第三邊緣及相對的多個第四邊緣,多個第三邊緣在第二方向上排列,且多個第四邊緣在第二開口延伸方向上排列。元件層設置於基底上,且包括多個島部及多個橋部。多個島部具有多個畫素結構且分別設置於基底的多個島上。多個橋部具有多條導線且分別設置於基底的多個橋上,其中多條導線電性連接至多個畫素結構。多個加強結構設置於基底的多個橋上,且與元件層的多個橋部隔開。Another stretchable pixel array substrate of the present invention includes a base, a component layer, and a plurality of reinforcing structures. The substrate has a plurality of first openings and a plurality of second openings, wherein each first opening has a first opening extending direction, each second opening has a second opening extending direction, and the first opening extending direction and the second opening extending The direction is different. The plurality of first openings and the plurality of second openings are alternately arranged in the first direction and the second direction to define a plurality of islands and a plurality of bridges of the substrate. The first direction is staggered with the second direction, the first direction is staggered with the extending direction of the first opening, and the second direction is staggered with the extending direction of the second opening. Each first opening has a plurality of opposing first edges and a plurality of opposing second edges, the plurality of first edges are arranged in the first direction, and the plurality of second edges are arranged in the extending direction of the first opening. Each second opening has a plurality of opposing third edges and a plurality of opposing fourth edges, the plurality of third edges are arranged in the second direction, and the plurality of fourth edges are arranged in the extending direction of the second opening. The element layer is arranged on the substrate and includes a plurality of islands and a plurality of bridges. The multiple islands have multiple pixel structures and are respectively disposed on the multiple islands of the base. The plurality of bridges have a plurality of wires and are respectively disposed on the plurality of bridges of the substrate, and the plurality of wires are electrically connected to the plurality of pixel structures. A plurality of reinforcing structures are arranged on the plurality of bridges of the base, and are separated from the plurality of bridges of the element layer.
現將詳細地參考本發明的示範性實施例,示範性實施例的實例說明於附圖中。只要有可能,相同元件符號在圖式和描述中用來表示相同或相似部分。Reference will now be made in detail to the exemplary embodiments of the present invention, and examples of the exemplary embodiments are illustrated in the accompanying drawings. Whenever possible, the same component symbols are used in the drawings and descriptions to indicate the same or similar parts.
應當理解,當諸如層、膜、區域或基板的元件被稱為在另一元件“上”或“連接到”另一元件時,其可以直接在另一元件上或與另一元件連接,或者中間元件可以也存在。相反,當元件被稱為“直接在另一元件上”或“直接連接到”另一元件時,不存在中間元件。如本文所使用的,“連接”可以指物理及/或電性連接。再者,“電性連接”或“耦合”可以是二元件間存在其它元件。It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements can also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements. As used herein, "connected" can refer to physical and/or electrical connection. Furthermore, "electrically connected" or "coupled" may mean that there are other elements between two elements.
本文使用的“約”、“近似”、或“實質上”包括所述值和在本領域普通技術人員確定的特定值的可接受的偏差範圍內的平均值,考慮到所討論的測量和與測量相關的誤差的特定數量(即,測量系統的限制)。例如,“約”可以表示在所述值的一個或多個標準偏差內,或±30%、±20%、±10%、±5%內。再者,本文使用的“約”、“近似”或“實質上”可依光學性質、蝕刻性質或其它性質,來選擇較可接受的偏差範圍或標準偏差,而可不用一個標準偏差適用全部性質。As used herein, "about", "approximately", or "substantially" includes the stated value and the average value within the acceptable deviation range of the specific value determined by a person of ordinary skill in the art, taking into account the measurement in question and the The specific amount of measurement-related error (ie, the limitation of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, "about", "approximately" or "substantially" as used herein can be based on optical properties, etching properties or other properties to select a more acceptable range of deviation or standard deviation, and not one standard deviation can be applied to all properties .
除非另有定義,本文使用的所有術語(包括技術和科學術語)具有與本發明所屬領域的普通技術人員通常理解的相同的含義。將進一步理解的是,諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在相關技術和本發明的上下文中的含義一致的含義,並且將不被解釋為理想化的或過度正式的意義,除非本文中明確地這樣定義。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having meanings consistent with their meanings in the context of related technologies and the present invention, and will not be interpreted as idealized or excessive The formal meaning, unless explicitly defined as such in this article.
圖1為本發明一實施例之可拉伸的畫素陣列基板100的俯視示意圖。請參照圖1,可拉伸的畫素陣列基板100包括陣列排列的多個重複單元R。FIG. 1 is a schematic top view of a stretchable
圖2為本發明一實施例之可拉伸的畫素陣列基板100的一個重複單元R的放大示意圖。FIG. 2 is an enlarged schematic diagram of a repeating unit R of the stretchable
圖3為本發明一實施例之可拉伸的畫素陣列基板100的剖面示意圖。3 is a schematic cross-sectional view of a stretchable
請參照圖1、圖2及圖3,可拉伸的畫素陣列基板100包括基底110,用以承載可拉伸的畫素陣列基板100的其它構件。基底110具有彈性及可延展性。換言之,基板110可拉伸。舉例而言,在本實施例中,基底110的材質可包括聚醯亞胺(polyimide;PI)、聚萘二甲酸乙醇酯(polyethylene naphthalate;PEN)、聚對苯二甲酸乙二酯(polyethylene terephthalate;PET)、聚碳酸酯(polycarbonates;PC)、聚醚碸(polyether sulfone;PES)或聚芳基酸酯(polyarylate)、其它合適的材料或前述至少二種材料之組合,但本發明不以此為限。1, 2 and 3, the stretchable
請參照圖1及圖2,基底110具有多個第一開口112及多個第二開口114。每一第一開口112具有第一開口延伸方向E1,每一第二開口114具有第二開口延伸方向E2,且第一開口延伸方向E1與第二開口延伸方向E2不同。舉例而言,在本實施例中,第一開口延伸方向E1與第二開口延伸方向E2可選擇性地垂直。也就是說,在本實施例中,第一開口延伸方向E1與第二開口延伸方向E2的夾角α可為90
o。然而,本發明不以此為限,在其它實施例中,第一開口延伸方向E1與第二開口延伸方向E2的夾角α也可以是大於0
o且小於180
o的其它角度。
Please refer to FIGS. 1 and 2, the
請參照圖1及圖2,基底110的多個第一開口112及多個第二開口114在第一方向D1及第二方向D2上交替排列,以定義基底110的多個島116及多個橋118。第一方向D1與第二方向D2交錯,第一方向D1與第一開口延伸方向E1交錯,且第二方向D2與第二開口延伸方向E2交錯。舉例而言,在本實施例中,第一方向D1與第二方向D2可選擇性地垂直,第一方向D1與第一開口延伸方向E1可選擇性地垂直,且第二方向D2與第二開口延伸方向E2可選擇性地垂直,但本發明不以此為限。1 and 2, the plurality of
請參照圖1圖2,每一第一開口112具有相對的多個第一邊緣112a及相對的多個第二邊緣112b,多個第一邊緣112a在第一方向D1上排列,且多個第二邊緣112b在第一開口延伸方向E1上排列。每一第二開口114具有相對的多個第三邊緣114a及相對的多個第四邊緣114b,多個第三邊緣114a在第二方向D2上排列,且多個第四邊緣114b在第二開口延伸方向E2上排列。Referring to FIG. 1 and FIG. 2, each
舉例而言,在本實施例中,第一開口112可呈一類長方形,第一開口112的第一邊緣112a可為所述類長方形的長邊,且第一開口112的第二邊緣112b可為所述類長方形的短邊。然而,本發明不限於此,在其它實施例中,第一開口112也可以不呈類長方形或長方形,例如:類橢圓形或其它形狀。For example, in this embodiment, the
舉例而言,在本實施例中,第二開口114可呈一類長方形,第二開口114的第三邊緣114a可為所述類長方形的長邊,第二開口114的第四邊緣114b可為所述類長方形的短邊。然而,本發明不限於此,在其它實施例中,第二開口114也可以不呈類長方形或長方形,例如:類橢圓形或其它形狀。For example, in this embodiment, the
請參照圖2,在本實施例中,基底110的每一橋118由對應之一第一開口112的一第二邊緣112b及對應之一第二開口114的一第三邊緣114a所定義,或由對應之一第一開口112的一第一邊緣112a及對應之一第二開口114的一第四邊緣114b所定義。具體而言,在本實施例中,基底110的多個橋118包括多個第一橋118-1及多個第二橋118-2,每一第一橋118-1大致上在第一方向D1上延伸,每一第二橋118-2大致上在第二方向D2上延伸,每一第一橋118-1可由對應之第一開口112的第二邊緣112b及對應之第二開口114的第三邊緣114a所定義,每一第二橋118-2可由對應之第一開口112的第一邊緣112a及對應之第二開口114的第四邊緣114b所定義。Referring to FIG. 2, in this embodiment, each
請參照圖1、圖2及圖3,可拉伸的畫素陣列基板100更包括元件層120,設置於基底110上。請參照圖1及圖2,元件層120包括多個島部126。請參照圖2,元件層120的多個島部126具有多個畫素結構PX且分別設置於基底110的多個島116上。Please refer to FIG. 1, FIG. 2 and FIG. 3, the stretchable
請參照圖2,舉例而言,在本實施例中,基底110的一個島116上可設有元件層120的一個島部126,每一島部126具有至少一畫素結構PX,且每一畫素結構PX包括至少一子畫素結構SPX。舉例而言,在本實施例中,元件層120的一個島部126可具有一個畫素結構PX,所述一個畫素結構PX可包括分別用以顯示紅色、藍色及綠色的三個子畫素結構SPX,但本發明不以此為限。Referring to FIG. 2, for example, in this embodiment, an
圖4為本發明一實施例之可拉伸的畫素陣列基板100的一個子畫素結構SPX的等效電路示意圖。4 is a schematic diagram of an equivalent circuit of a sub-pixel structure SPX of the stretchable
請參照圖2、圖3及圖4,在本實施例中,每一子畫素結構SPX可包括一第一電晶體T1及一畫素電極PE,第一電晶體T1具有第一端T1a、第二端T1b、控制端T1c及半導體圖案T1d,第一端T1a及第二端T1b分別電性連接至半導體圖案T1d的不同兩區,第一絕緣層GI夾設於第一電晶體T1的控制端T1c與半導體圖案T1d之間,第二絕緣層PL夾設於第一電晶體T1與畫素電極PE之間,且畫素電極PE透過第二絕緣層PL的接觸窗PLa電性連接至第一電晶體T1的第二端T1b。在本實施例中,每一子畫素結構SPX可選擇性地更包括一第二電晶體T2(繪示於圖4),其中第二電晶體T2具有第一端T2a、第二端T2b及控制端T2c,且第二電晶體T2的第二端T2b電性連接至第一電晶體T1的控制端T1c;但本發明不以此為限。Please refer to FIG. 2, FIG. 3, and FIG. 4. In this embodiment, each sub-pixel structure SPX may include a first transistor T1 and a pixel electrode PE. The first transistor T1 has a first terminal T1a, The second terminal T1b, the control terminal T1c and the semiconductor pattern T1d. The first terminal T1a and the second terminal T1b are respectively electrically connected to two different regions of the semiconductor pattern T1d. The first insulating layer GI is sandwiched between the control of the first transistor T1 Between the terminal T1c and the semiconductor pattern T1d, the second insulating layer PL is sandwiched between the first transistor T1 and the pixel electrode PE, and the pixel electrode PE is electrically connected to the second insulating layer PL through the contact window PLa of the second insulating layer PL. The second terminal T1b of a transistor T1. In this embodiment, each sub-pixel structure SPX may optionally further include a second transistor T2 (shown in FIG. 4), wherein the second transistor T2 has a first terminal T2a, a second terminal T2b, and The control terminal T2c, and the second terminal T2b of the second transistor T2 is electrically connected to the control terminal T1c of the first transistor T1; but the present invention is not limited to this.
請參照圖1及圖2,元件層120更包括多個橋部128。請參照圖2,元件層120的多個橋部128具有多條導線L且分別設置於基底110的多個橋118上,其中多條導線L電性連接至多個畫素結構PX。Please refer to FIG. 1 and FIG. 2, the
請參照圖2,在本實施例中,元件層120的多個橋部128包括多個第一橋部128-1及多個第二橋部128-2,元件層120的多個第一橋部128-1及多個第二橋部128-2分別設置於基底110的多個第一橋118-1及多個第二橋118-2上,每一第一橋部128-1大致上在第一方向D1上延伸,每一第二橋部128-2大致上在第二方向D2上延伸,多條導線L包括多條第一導線L1及多條第二導線L2,元件層120的多個第一橋部128-1具有多條第一導線L1,元件層120的多個第二橋部128-2具有多條第二導線L2。Referring to FIG. 2, in this embodiment, the plurality of
請參照圖2及圖4,舉例而言,在本實施例中,多條第一導線L1可包括電性連接至子畫素結構SPX之第二電晶體T2之控制端T2c的閘極驅動線、一第一共用線及電性連接至子畫素結構SPX之第一電晶體T1之第一端T1a的第一電源線;多條第二導線L2可包括電性連接至子畫素結構SPX之第二電晶體T2之第一端T2a的資料線、第二共用線及電性連接至子畫素結構SPX之第一電晶體T1之第一端T1a的第二電源線;但本發明不以此為限。2 and 4, for example, in this embodiment, the plurality of first conductive lines L1 may include a gate drive line electrically connected to the control terminal T2c of the second transistor T2 of the sub-pixel structure SPX A first common line and a first power line electrically connected to the first terminal T1a of the first transistor T1 of the sub-pixel structure SPX; the plurality of second wires L2 may include electrically connected to the sub-pixel structure SPX The data line of the first terminal T2a of the second transistor T2, the second common line, and the second power line electrically connected to the first terminal T1a of the first transistor T1 of the sub-pixel structure SPX; but the present invention does not Limited by this.
請參照圖2,在本實施例中,元件層120的每一橋部128靠近對應之第二開口114的第三邊緣114a且遠離對應之第一開口112的第二邊緣112b,或靠近對應之第一開口112的第一邊緣112a且遠離對應之第二開口114的第四邊緣114b。Referring to FIG. 2, in this embodiment, each
舉例而言,在本實施例中,元件層120的每一第一橋部128-1靠近對應之第二開口114的第三邊緣114a且遠離對應之第一開口112的第二邊緣112b;元件層120的每一第二橋部128-2靠近對應之第一開口112的第一邊緣112a且遠離對應之第二開口114的第四邊緣114b;也就是說,在本實施例中,元件層120的每一橋部128由一第一開口112及一第二開口114所定義,每一橋部128靠近第一開口112及第二開口114之一者的長邊且遠離第一開口112及第二開口114之另一者的短邊,但本發明不以此為限。For example, in this embodiment, each first bridge 128-1 of the
請參照圖2,值得注意的是,在本實施例中,可拉伸的畫素陣列基板100更包括多個加強結構130,設置於基底110的多個橋118上且與元件層120的多個橋部128隔開。加強結構130可調整中性軸位置,使得元件層120之橋部128承受壓應變力,而非承受張應變力。藉此,橋部128之導線L的斷線風險可大幅降低。此外,由於加強結構130與元件層120的橋部128隔開,因此,即便加強結構130出現裂痕,裂痕也不易延裂至元件層120的橋部128,造成導線L斷線。Please refer to FIG. 2, it is worth noting that, in this embodiment, the stretchable
舉例而言,在本實施例中,加強結構130可包括一無機層、一金屬層或其組合,但本發明不以此為限。For example, in this embodiment, the reinforcing
在本實施例中一加強結構130可選擇性地電性連接元件層120之多個島部126的相鄰兩者,以傳遞某一種電子訊號。若與加強結構130相鄰之元件層120的導線L斷線時,加強結構130可做為一備用導線使用,以使所述某一種電子訊號仍能順利傳遞。In this embodiment, a reinforcing
請參照圖2,舉例而言,在本實施例中,基底110的多個島116包括在第一方向D1上排列的第一島116-1及第二島116-2,基底110的多個橋118包括連接第一島116-1與第二島116-2的第一橋118-1,元件層120的多個島部126包括第一島部126-1及第二島部126-2,元件層120的第一島部126-1及第二島部126-2分別設置於基底110的第一島116-1及第二島116-2上且分別具有多個畫素結構PX的第一畫素結構PX1及第二畫素結構PX2,元件層120的多個橋部128包括第一橋部128-1,第一橋部128-1設置於基底110的第一橋118-1上且連接元件層120的第一島部126-1與第二島部126-2;基底110的多個島116更包括一第三島116-3,第一島116-1及第三島116-3在第二方向D2上排列;元件層120的多個島部126更包括一第三島部126-3,設置於基底110的第三島116-3上且具有多個畫素結構PX的一第三畫素結構PX3;基底110的多個橋118包括一第二橋118-2,連接基底110的第一島116-1與第三島116-3;元件層120的多個橋部128更包括一第二橋部128-2,設置於基底110的第二橋118-2上且連接元件層120的第一島部126-1與第三島部126-3;元件層120的第二橋部128-2具有多條導線L的第二導線L2,第二導線L2電性連接第一畫素結構PX1與第三畫素結構PX3。Referring to FIG. 2, for example, in this embodiment, the plurality of islands 116 of the substrate 110 includes a first island 116-1 and a second island 116-2 arranged in the first direction D1, and the plurality of islands 116 of the substrate 110 The bridge 118 includes a first bridge 118-1 connecting the first island 116-1 and the second island 116-2, and the multiple island portions 126 of the element layer 120 include a first island portion 126-1 and a second island portion 126-2 , The first island portion 126-1 and the second island portion 126-2 of the element layer 120 are respectively disposed on the first island 116-1 and the second island 116-2 of the substrate 110 and each have a plurality of pixel structures PX The first pixel structure PX1 and the second pixel structure PX2, the plurality of bridges 128 of the element layer 120 includes a first bridge 128-1, and the first bridge 128-1 is disposed on the first bridge 118-1 of the substrate 110 And connect the first island portion 126-1 and the second island portion 126-2 of the element layer 120; the multiple islands 116 of the substrate 110 further include a third island 116-3, the first island 116-1 and the third island 116-3 is arranged in the second direction D2; the multiple island portions 126 of the element layer 120 further include a third island portion 126-3, which is disposed on the third island 116-3 of the substrate 110 and has multiple pixel structures A third pixel structure PX3 of PX; the multiple bridges 118 of the substrate 110 include a second bridge 118-2, which connects the first island 116-1 and the third island 116-3 of the substrate 110; multiple component layers 120 The bridge portion 128 further includes a second bridge portion 128-2, which is disposed on the second bridge 118-2 of the substrate 110 and connects the first island portion 126-1 and the third island portion 126-3 of the device layer 120; the device layer The second bridge portion 128-2 of 120 has a plurality of second conductive lines L2 of conductive lines L, and the second conductive lines L2 are electrically connected to the first pixel structure PX1 and the third pixel structure PX3.
舉例而言,在本實施例中,元件層120的第一橋部128-1具有多條導線L的一第一導線L1,且第一導線L1例如是做為資料線使用;請參照圖2及圖4,設置於第一橋118-1上的加強結構130例如是一備用資料線,電性連接第一畫素結構PX1之子畫素結構SPX的第二電晶體T2的第一端T2a及第二畫素結構PX2之子畫素結構SPX的第二電晶體T2的第一端T2a。倘若元件層120之做為資料線使用的第一導線L1斷線,加強結構130可發揮備用資料線的功能,以使資料訊號仍能夠順利傳遞。然而,本發明不限於此,在其它實施例中,設置於第一橋118-1上的加強結構130也可做為傳遞其它種電子訊號的備用導線使用。For example, in this embodiment, the first bridge portion 128-1 of the
舉例而言,在本實施例中,元件層120的第二橋部128-2具有多條導線L的一第二導線L2,且第二導線L2例如是做為閘極驅動線使用;請參照圖2及圖4,設置於第二橋118-2上的加強結構130例如是一備用閘極驅動線,電性連接第一畫素結構PX1之子畫素結構SPX的第二電晶體T2的控制端T2c及第二畫素結構PX2之子畫素結構SPX的第二電晶體T2的控制端T2c。倘若元件層120之做為閘極驅動線使用的第二導線L2斷線,加強結構130可發揮備用閘極驅動線的功能,以使閘極驅動訊號仍能夠順利傳遞。然而,本發明不限於此,在其它實施例中,設置於第二橋118-2上的加強結構130也可做為傳遞其它種電子訊號的備用導線使用。For example, in this embodiment, the second bridge portion 128-2 of the
請參照圖2,在本實施例中,每一加強結構130可選擇性地與元件層120之多個島部126的相鄰兩者連接,但本發明不以此為限。此外,在本實施例中,加強結構130與第一開口112的一第二邊緣112b在第二方向D2上可具有的一距離k2。舉例而言,距離k2可大於3μm,但本發明不以此為限。Please refer to FIG. 2, in this embodiment, each reinforcing
在此必須說明的是,下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,下述實施例不再重述。It must be noted here that the following embodiments use the element numbers and part of the content of the foregoing embodiments, wherein the same numbers are used to represent the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted parts, reference may be made to the foregoing embodiments, and the following embodiments will not be repeated.
圖5為本發明一實施例之可拉伸的畫素陣列基板100A的一個重複單元RA的放大示意圖。FIG. 5 is an enlarged schematic diagram of a repeating unit RA of the stretchable
請參照圖5,本領域具有通常知識者知曉:可拉伸的畫素陣列基板100A可由陣列排列的多個重複單元RA組成,圖5僅繪示一個重複單元RA為代表,於此便不再繪示陣列排列的多個重複單元RA。Please refer to FIG. 5, those skilled in the art know that the stretchable
圖5之可拉伸的畫素陣列基板100A與圖2之可拉伸的畫素陣列基板100類似,兩者的差異在於:圖5之可拉伸的畫素陣列基板100A的加強結構130A與圖2之可拉伸的畫素陣列基板100的加強結構130不同。The stretchable
請參照圖5,具體而言,在本實施例中,每一加強結構130A與元件層120之多個島部126的相鄰兩者斷開。在本實施例中,加強結構130A與元件層120之多個島部126的相鄰兩者的任一者在第一方向D1上具有距離k1。舉例而言,在本實施例中,距離k1可大於3μm,但本發明不以此為限。Please refer to FIG. 5. Specifically, in this embodiment, each reinforcing
圖6為本發明一實施例之可拉伸的畫素陣列基板100B的一個重複單元RB的放大示意圖。FIG. 6 is an enlarged schematic diagram of a repeating unit RB of the stretchable
請參照圖6,本領域具有通常知識者知曉:可拉伸的畫素陣列基板100B可由陣列排列的多個重複單元RB組成,圖6僅繪示一個重複單元RB為代表,於此便不再繪示陣列排列的多個重複單元RB。Please refer to FIG. 6, those skilled in the art know that the stretchable
圖6之可拉伸的畫素陣列基板100B與圖5之可拉伸的畫素陣列基板100A類似,兩者的差異在於:圖6之可拉伸的畫素陣列基板100B的加強結構130B與圖5之可拉伸的畫素陣列基板100A的加強結構130不同。請參照圖6,具體而言,在本實施例中,每一加強結構130B可包括彼此分離的多個加強圖案132。The stretchable
圖7為本發明一實施例之可拉伸的畫素陣列基板100C的俯視示意圖。請參照圖7,可拉伸的畫素陣列基板100C包括陣列排列的多個重複單元RC。FIG. 7 is a schematic top view of a stretchable
圖8為本發明一實施例之可拉伸的畫素陣列基板100C的一個重複單元RC的放大示意圖。FIG. 8 is an enlarged schematic diagram of a repeating unit RC of the stretchable
圖9為本發明一實施例之可拉伸的畫素陣列基板100C的剖面示意圖。FIG. 9 is a schematic cross-sectional view of a stretchable
圖7至圖9之可拉伸的畫素陣列基板100C與圖1至圖4之可拉伸的畫素陣列基板100類似,兩者的差異在於:可拉伸的畫素陣列基板100C之基底110被元件層120露出的區域的形狀與可拉伸的畫素陣列基板100之基底110被元件層120露出的區域的形狀不同。此外,圖7至圖9之可拉伸的畫素陣列基板100C可選擇性地不包括圖1至圖4之可拉伸的畫素陣列基板100的加強結構130。The stretchable
請參照圖7及圖8,具體而言,在本實施例中,基底110之第一開口112的第一邊緣112a具有定義基底110之第一島116-1的第一段112a-1;元件層120的第一島部126-1具有相鄰於第一開口112的一邊緣126a;第一開口112之第一邊緣112a的第一段112a-1與元件層120之第一島部126-1的邊緣126a在第一方向D1上具有一第一距離A1。7 and 8, specifically, in this embodiment, the
值得注意的是,第一距離A1隨著靠近基底110的第一橋118-1而漸增。或者說,第一開口112之第一邊緣112a的第一段112a-1與元件層120之第一島部126-1的邊緣126a具有一銳角θ1。藉此,第一橋118-1內側(即靠近第一開口112的一側)上的張應力可被均勻分散,進而降低設置於第一橋118-1上之導線L斷線的機率。It is worth noting that the first distance A1 gradually increases as the first bridge 118-1 approaching the
請參照圖8及圖9,需說明的是,元件層120的邊緣126a是指元件層120之整個膜層的邊緣。舉例而言,在本實施例中,元件層120的邊緣126a可指第一絕緣層GI的邊緣GIb、第二絕緣層PL的邊緣PLb或其組合,但本發明不以此為限。Please refer to FIGS. 8 and 9. It should be noted that the
請參照圖8,在本實施例中,第一開口112的第一邊緣112a更包括第二段112a-2,第一開口112之第一邊緣112a的第二段112a-2與第二開口114的第四邊緣114b定義基底110的第二橋118-2;第一開口112之第一邊緣112a的第二段112a-2與元件層120之第二橋部128-2的邊緣128a具有第二距離A2,且第一距離A1大於第二距離A2。舉例而言,在本實施例中,第一距離A1可大於3μm,第二距離A2可小於5μm,但本發明不以此為限。8, in this embodiment, the
另外,在本實施例中,第一開口112的第一邊緣112a的第二段112a-2可包括一曲線;第一開口112的第二邊緣112b可包括一曲線;第二開口114的第四邊緣114b可包括一曲線;但本發明不以此為限。在本實施例中,導線L及/或橋部128可選擇性地呈曲線,但本發明不以此為限。In addition, in this embodiment, the
圖10為本發明一實施例之可拉伸的畫素陣列基板100D的一個重複單元RD的放大示意圖。FIG. 10 is an enlarged schematic diagram of a repeating unit RD of the stretchable
請參照圖10,本領域具有通常知識者知曉,可拉伸的畫素陣列基板100D可由陣列排列的多個重複單元RD組成,圖10僅繪示一個重複單元RD為代表,於此便不再繪示陣列排列的多個重複單元RD。Please refer to FIG. 10, those skilled in the art know that the stretchable
本實施例的可拉伸的畫素陣列基板100D與前述的可拉伸的畫素陣列基板100C類似,兩者的差異在於:在圖10的實施例中,導線L及/或橋部128可選擇性地呈直線。The stretchable
圖11為本發明一實施例之可拉伸的畫素陣列基板100E的一個重複單元RE的放大示意圖。FIG. 11 is an enlarged schematic diagram of a repeating unit RE of the stretchable
請參照圖11,本領域具有通常知識者知曉,可拉伸的畫素陣列基板100E可由陣列排列的多個重複單元RE組成,圖11僅繪示一個重複單元RE為代表,於此便不再繪示陣列排列的多個重複單元RE。Please refer to FIG. 11, those skilled in the art know that the stretchable
本實施例的可拉伸的畫素陣列基板100E與前述的可拉伸的畫素陣列基板100C類似,兩者的差異在於:在圖11的實施例中,可拉伸的畫素陣列基板100E更包括加強結構130B。The stretchable
100、100A、100B、100C、100D、100E:可拉伸的畫素陣列基板 110:基底 112:第一開口 112a:第一邊緣 112a-1:第一段 112a-2:第二段 112b:第二邊緣 114:第二開口 114a:第三邊緣 114b:第四邊緣 116:島 116-1:第一島 116-2:第二島 116-3:第三島 118:橋 118-1:第一橋 118-2:第二橋 120:元件層 126:島部 126a、128a:邊緣 126-1:第一島部 126-2:第二島部 126-3:第三島部 128:橋部 128-1:第一橋部 128-2:第二橋部 130、130A、130B:加強結構 132:加強圖案 A1:第一距離 A2:第二距離 D1:第一方向 D2:第二方向 E1:第一開口延伸方向 E2:第二開口延伸方向 PX:畫素結構 PX1:第一畫素結構 PX2:第二畫素結構 PX3:第三畫素結構 GI:第一絕緣層 GIb、PLb:邊緣 k1、k2:距離 L:導線 L1:第一導線 L2:第二導線 PE:畫素電極 PL:第二絕緣層 PLa:接觸窗 R、RA、RB、RC、RD、RE:重複單元 SPX:子畫素結構 T1:第一電晶體 T1a、T2a:第一端 T1b、T2b:第二端 T1c、T2c:控制端 T1d:半導體圖案 T2:第二電晶體 α:夾角 θ1:銳角100, 100A, 100B, 100C, 100D, 100E: stretchable pixel array substrate 110: Base 112: The first opening 112a: first edge 112a-1: first paragraph 112a-2: second paragraph 112b: second edge 114: second opening 114a: third edge 114b: Fourth edge 116: Island 116-1: First Island 116-2: Second Island 116-3: Third Island 118: Bridge 118-1: First Bridge 118-2: Second Bridge 120: component layer 126: Island 126a, 128a: edge 126-1: First Island 126-2: The Second Island 126-3: Third Island 128: Bridge 128-1: The first bridge 128-2: The second bridge 130, 130A, 130B: reinforced structure 132: Strengthening pattern A1: The first distance A2: Second distance D1: First direction D2: second direction E1: Extension direction of the first opening E2: Extension direction of the second opening PX: Pixel structure PX1: The first pixel structure PX2: Second pixel structure PX3: The third pixel structure GI: first insulating layer GIb, PLb: Edge k1, k2: distance L: Wire L1: first wire L2: second wire PE: pixel electrode PL: second insulating layer PLa: contact window R, RA, RB, RC, RD, RE: repeating unit SPX: Sub-pixel structure T1: The first transistor T1a, T2a: first end T1b, T2b: second end T1c, T2c: control terminal T1d: semiconductor pattern T2: second transistor α: included angle θ1: acute angle
圖1為本發明一實施例之可拉伸的畫素陣列基板100的俯視示意圖。
圖2為本發明一實施例之可拉伸的畫素陣列基板100的一個重複單元R的放大示意圖。
圖3為本發明一實施例之可拉伸的畫素陣列基板100的剖面示意圖。
圖4為本發明一實施例之可拉伸的畫素陣列基板100的一個子畫素結構SPX的等效電路示意圖。
圖5為本發明一實施例之可拉伸的畫素陣列基板100A的一個重複單元RA的放大示意圖。
圖6為本發明一實施例之可拉伸的畫素陣列基板100B的一個重複單元RB的放大示意圖。
圖7為本發明一實施例之可拉伸的畫素陣列基板100C的俯視示意圖。
圖8為本發明一實施例之可拉伸的畫素陣列基板100C的一個重複單元RC的放大示意圖。
圖9為本發明一實施例之可拉伸的畫素陣列基板100C的剖面示意圖。
圖10為本發明一實施例之可拉伸的畫素陣列基板100D的一個重複單元RD的放大示意圖。
圖11為本發明一實施例之可拉伸的畫素陣列基板100E的一個重複單元RE的放大示意圖。
FIG. 1 is a schematic top view of a stretchable
100:可拉伸的畫素陣列基板 100: Stretchable pixel array substrate
110:基底 110: Base
112:第一開口 112: The first opening
112a:第一邊緣 112a: first edge
112b:第二邊緣 112b: second edge
114:第二開口 114: second opening
114a:第三邊緣 114a: third edge
114b:第四邊緣 114b: Fourth edge
116:島 116: Island
116-1:第一島 116-1: First Island
116-2:第二島 116-2: Second Island
116-3:第三島 116-3: Third Island
118:橋 118: Bridge
118-1:第一橋 118-1: First Bridge
118-2:第二橋 118-2: Second Bridge
120:元件層 120: component layer
126:島部 126: Island
126-1:第一島部 126-1: First Island
126-2:第二島部 126-2: The Second Island
126-3:第二島部 126-3: The Second Island
128:橋部 128: Bridge
128-1:第一橋部 128-1: The first bridge
128-2:第二橋部 128-2: The second bridge
130:加強結構 130: Strengthen the structure
D1:第一方向 D1: First direction
D2:第二方向 D2: second direction
E1:第一開口延伸方向 E1: Extension direction of the first opening
E2:第二開口延伸方向 E2: Extension direction of the second opening
PX:畫素結構 PX: Pixel structure
PX1:第一畫素結構 PX1: The first pixel structure
PX2:第二畫素結構 PX2: Second pixel structure
PX3:第三畫素結構 PX3: The third pixel structure
k2:距離 k2: distance
L:導線 L: Wire
L1:第一導線 L1: first wire
L2:第二導線 L2: second wire
R:重複單元 R: repeating unit
SPX:子畫素結構 SPX: Sub-pixel structure
α:夾角 α: included angle
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US17/388,024 US20220059577A1 (en) | 2020-08-21 | 2021-07-29 | Stretchable pixel array substrate |
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TW110103975A TWI758083B (en) | 2020-08-21 | 2021-02-03 | Circuit and fabrication method thereof |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20180090699A1 (en) * | 2016-09-23 | 2018-03-29 | Samsung Display Co., Ltd. | Display device and manufacturing method thereof |
US10304919B2 (en) * | 2016-03-18 | 2019-05-28 | Semiconductor Energy Laboratory Co., Ltd. | Display device |
TW202002276A (en) * | 2018-06-22 | 2020-01-01 | 友達光電股份有限公司 | Display device and manufacturing method thereof |
US20200026332A1 (en) * | 2016-08-18 | 2020-01-23 | Samsung Display Co., Ltd. | Display panel |
US20200258951A1 (en) * | 2015-03-10 | 2020-08-13 | Samsung Display Co., Ltd. | Organic light emitting diode display |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8586440B2 (en) * | 2011-07-27 | 2013-11-19 | GlobalFoundries, Inc. | Methods for fabricating integrated circuits using non-oxidizing resist removal |
US9735280B2 (en) * | 2012-03-02 | 2017-08-15 | Semiconductor Energy Laboratory Co., Ltd. | Semiconductor device, method for manufacturing semiconductor device, and method for forming oxide film |
KR102432345B1 (en) * | 2015-04-30 | 2022-08-12 | 삼성디스플레이 주식회사 | Stretchable display |
KR20180045968A (en) * | 2016-10-26 | 2018-05-08 | 삼성디스플레이 주식회사 | Display device |
CN110133886A (en) * | 2018-02-09 | 2019-08-16 | 京东方科技集团股份有限公司 | Pixel arrangement structure, display base plate and display device |
CN110751902B (en) * | 2018-07-24 | 2021-01-26 | 京东方科技集团股份有限公司 | Display device and method for manufacturing the same |
CN111326543A (en) * | 2018-12-13 | 2020-06-23 | 昆山工研院新型平板显示技术中心有限公司 | Stretchable array substrate and display device |
CN109904338B (en) * | 2019-01-10 | 2021-09-03 | 云谷(固安)科技有限公司 | Display screen body and display device |
CN109860119B (en) * | 2019-01-10 | 2020-11-24 | 云谷(固安)科技有限公司 | Display screen body and display device |
CN209487512U (en) * | 2019-04-22 | 2019-10-11 | 云谷(固安)科技有限公司 | Stretchable display module and stretchable display screen |
CN110518036B (en) * | 2019-08-23 | 2022-11-08 | 京东方科技集团股份有限公司 | Display substrate and display device |
CN110634937B (en) * | 2019-10-31 | 2022-04-26 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
CN116234375A (en) * | 2020-03-16 | 2023-06-06 | 京东方科技集团股份有限公司 | Flexible substrate and display device |
-
2020
- 2020-12-30 TW TW109146912A patent/TWI742977B/en active
-
2021
- 2021-01-04 TW TW110100032A patent/TWI757026B/en active
- 2021-02-03 TW TW110103975A patent/TWI758083B/en active
- 2021-03-16 TW TW110109440A patent/TWI793551B/en active
- 2021-04-21 TW TW110114369A patent/TWI779573B/en active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20200258951A1 (en) * | 2015-03-10 | 2020-08-13 | Samsung Display Co., Ltd. | Organic light emitting diode display |
US10304919B2 (en) * | 2016-03-18 | 2019-05-28 | Semiconductor Energy Laboratory Co., Ltd. | Display device |
US20200026332A1 (en) * | 2016-08-18 | 2020-01-23 | Samsung Display Co., Ltd. | Display panel |
US20180090699A1 (en) * | 2016-09-23 | 2018-03-29 | Samsung Display Co., Ltd. | Display device and manufacturing method thereof |
TW202002276A (en) * | 2018-06-22 | 2020-01-01 | 友達光電股份有限公司 | Display device and manufacturing method thereof |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI830378B (en) * | 2022-02-15 | 2024-01-21 | 群創光電股份有限公司 | Electronic device |
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