TWI812463B - Stretchable pixel array substrate - Google Patents
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- TWI812463B TWI812463B TW111134460A TW111134460A TWI812463B TW I812463 B TWI812463 B TW I812463B TW 111134460 A TW111134460 A TW 111134460A TW 111134460 A TW111134460 A TW 111134460A TW I812463 B TWI812463 B TW I812463B
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Abstract
Description
本發明是有關於一種畫素陣列基板,且特別是有關於一種可拉伸的畫素陣列基板。 The present invention relates to a pixel array substrate, and in particular to a stretchable pixel array substrate.
隨著電子技術的高度發展,電子產品不斷推陳出新。為使電子產品能應用於各種不同的領域,可拉伸、輕薄及外型不受限的特性逐漸受到重視。也就是說,電子產品逐漸被要求依據不同的應用方式以及應用環境而具有不同的外型,因此電子產品需具有可拉伸性。 With the rapid development of electronic technology, electronic products are constantly being introduced. In order to enable electronic products to be used in various fields, the characteristics of stretchability, thinness and unrestricted appearance are gradually gaining attention. In other words, electronic products are gradually required to have different appearances according to different application methods and application environments, so electronic products need to be stretchable.
然而,電子產品在被拉伸的狀態下,可能會因為承受應力造成結構上的斷裂,甚至進一步造成內部線路的斷路。因此,如何使可拉伸的電子產品具有良好的製造良率(yield)及產品可靠度(reliability),實為目前亟欲解決的課題。 However, when electronic products are stretched, they may suffer structural fractures due to stress, and may even cause internal circuit breakage. Therefore, how to make stretchable electronic products have good manufacturing yield and product reliability is an issue that needs to be solved urgently.
本發明提供一種可拉伸的畫素陣列基板,具有高可靠度。 The invention provides a stretchable pixel array substrate with high reliability.
本發明的可拉伸的畫素陣列基板包括基底、多個島狀元件、輔助圖案、導線及絕緣層。基底具有多個畫素區及線路區,其中線路區位於多個畫素區之間且與多個畫素區連接。多個島狀元件分別設置於基底的多個畫素區上,其中每一島狀元件包括畫素驅動電路且具有側壁。輔助圖案設置於基底的線路區上,且至少延伸到多個畫素區的一者的至少一部分上。輔助圖案覆蓋島狀元件的側壁的至少一部分及島狀元件之背向基底的上表面的至少一部分。導線設置於輔助圖案上,且電性連接多個島狀元件的多個畫素驅動電路。絕緣層覆蓋導線及島狀元件。輔助圖案具有接觸窗,輔助圖案的接觸窗重疊於島狀元件之背向基底的上表面的至少一部分,且導線透過輔助圖案的接觸窗電性連接至多個島狀元件的多個畫素驅動電路的一者。 The stretchable pixel array substrate of the present invention includes a substrate, a plurality of island-shaped components, auxiliary patterns, wires and an insulating layer. The substrate has a plurality of pixel areas and a line area, wherein the line area is located between the multiple pixel areas and connected to the multiple pixel areas. A plurality of island-shaped elements are respectively disposed on a plurality of pixel areas of the substrate, wherein each island-shaped element includes a pixel driving circuit and has sidewalls. The auxiliary pattern is disposed on the circuit area of the substrate and extends to at least a part of one of the plurality of pixel areas. The auxiliary pattern covers at least a part of the side wall of the island-shaped component and at least a part of the upper surface of the island-shaped component facing away from the substrate. The wires are arranged on the auxiliary pattern and are electrically connected to the plurality of pixel driving circuits of the plurality of island-shaped components. The insulation covers the wires and island components. The auxiliary pattern has a contact window, the contact window of the auxiliary pattern overlaps at least a part of the upper surface of the island-shaped component facing away from the substrate, and the wires are electrically connected to the plurality of pixel driving circuits of the plurality of island-shaped components through the contact window of the auxiliary pattern. one of.
在本發明的一實施例中,上述的輔助圖案設置於導線與島狀元件的上表面的至少一部分之間,輔助圖案設置於導線與島狀元件的側壁的至少一部分之間,且輔助圖案設置於導線與基板的線路區之間。 In one embodiment of the present invention, the above-mentioned auxiliary pattern is provided between the conductive line and at least a part of the upper surface of the island-shaped component, the auxiliary pattern is provided between the conductive line and at least a part of the side wall of the island-shaped component, and the auxiliary pattern is provided Between the conductor and the circuit area of the substrate.
在本發明的一實施例中,上述的導線的一部分於基板之畫素區上的垂直投影面積小於或等於輔助圖案的一部分於基板之畫素區上的垂直投影面積。 In an embodiment of the present invention, the vertical projected area of a part of the conductor on the pixel area of the substrate is less than or equal to the vertical projected area of a part of the auxiliary pattern on the pixel area of the substrate.
在本發明的一實施例中,上述的輔助圖案的楊氏模數小於10GPa。 In an embodiment of the present invention, the Young's modulus of the above-mentioned auxiliary pattern is less than 10 GPa.
在本發明的一實施例中,上述的輔助圖案之設置於島狀 元件的上表面的一部分具有厚度,且所述厚度小於10μm。 In an embodiment of the present invention, the above-mentioned auxiliary pattern is arranged in an island shape A portion of the upper surface of the element has a thickness, and the thickness is less than 10 μm.
在本發明的一實施例中,上述的島狀元件的上表面包括周邊區及中間區,島狀元件的上表面的周邊區連接於島狀元件的側壁與島狀元件的上表面的中間區之間,輔助圖案包覆島狀元件的側壁及島狀元件之上表面的周邊區,且輔助圖案具有重疊於島狀元件之上表面的中間區的開口。 In one embodiment of the present invention, the upper surface of the island-shaped component includes a peripheral area and a middle area. The peripheral area of the upper surface of the island-shaped component is connected to the side wall of the island-shaped component and the middle area of the upper surface of the island-shaped component. Between them, the auxiliary pattern covers the side wall of the island-shaped component and the peripheral area of the upper surface of the island-shaped component, and the auxiliary pattern has an opening that overlaps the middle area of the upper surface of the island-shaped component.
在本發明的一實施例中,上述的島狀元件的上表面與島狀元件的側壁具有交界,交界包括多個側邊及設置於多個側邊之間的多個轉角;輔助圖案包括彼此分離的多個輔助部,多個輔助部分別跨越交界的多個側邊,且交界的多個轉角位於輔助圖案的多個輔助部之間。 In one embodiment of the present invention, the upper surface of the above-mentioned island-shaped component has an interface with the side wall of the island-shaped component. The interface includes a plurality of sides and a plurality of corners disposed between the plurality of sides; the auxiliary patterns include each other. A plurality of separated auxiliary parts respectively span multiple sides of the interface, and multiple corners of the interface are located between the multiple auxiliary parts of the auxiliary pattern.
在本發明的一實施例中,上述的島狀元件的上表面包括周邊區及中間區,島狀元件的上表面的周邊區連接於島狀元件的側壁與島狀元件的上表面的中間區之間,且島狀元件的上表面的周邊區具有多個側邊子區及設置於多個側邊子區之間的多個轉角子區;輔助圖案包覆島狀元件的側壁之與多個側邊子區連接的多個第一部分、島狀元件之上表面的多個側邊子區及島狀元件之上表面的中間區;輔助圖案具有多個缺角,分別重疊於島狀元件之上表面的多個轉角子區及島狀元件之側壁分別與多個轉角子區連接的多個第二部分。 In one embodiment of the present invention, the upper surface of the island-shaped component includes a peripheral area and a middle area. The peripheral area of the upper surface of the island-shaped component is connected to the side wall of the island-shaped component and the middle area of the upper surface of the island-shaped component. between, and the peripheral area of the upper surface of the island-shaped component has a plurality of side sub-regions and a plurality of corner sub-regions arranged between the plurality of side sub-regions; the auxiliary pattern covers the side walls of the island-shaped component and the plurality of corner sub-regions. A plurality of first parts connected to the side sub-regions, a plurality of side sub-regions on the upper surface of the island-shaped component and a middle region on the upper surface of the island-shaped component; the auxiliary pattern has a plurality of notches, respectively overlapping the island-shaped component The plurality of corner sub-regions on the upper surface and the side walls of the island-shaped component are respectively connected to a plurality of second portions connected to the plurality of corner sub-regions.
10、10A、10B、10C:可拉伸的畫素陣列基板 10, 10A, 10B, 10C: stretchable pixel array substrate
110:基底 110: Base
112:畫素區 112: Pixel area
114:線路區 114: Line area
120:緩衝層 120:Buffer layer
120a、140a、160a、ISa:側壁 120a, 140a, 160a, ISa: side wall
130:半導體圖案 130:Semiconductor pattern
140:閘絕緣層 140: Gate insulation layer
150:控制端 150:Control terminal
160:層間介電層 160: Interlayer dielectric layer
162、174:接觸窗 162, 174: Contact window
170、170A、170B、170C:輔助圖案 170, 170A, 170B, 170C: Auxiliary patterns
170A-1:輔助部 170A-1: Auxiliary Department
172:開口 172:Open your mouth
176:缺角 176: missing corner
182:第一端 182:First end
186:導線 186:Wire
190:絕緣層 190:Insulation layer
200:導電圖案 200: Conductive pattern
210:平坦層 210:Flat layer
220:透明導電圖案 220:Transparent conductive pattern
230:發光二極體元件 230: Light emitting diode components
IS:島狀元件 IS: Island component
ISa-1:第一部分 ISa-1:Part One
ISa-2:第二部分
ISa-2:
ISb:上表面 ISb: upper surface
ISb-1:中間區 ISb-1: Intermediate Zone
ISb-2:周邊區 ISb-2: Surrounding area
ISb-2a:側邊子區 ISb-2a: side subarea
ISb-2b:轉角子區 ISb-2b: corner subarea
i:交界 i:junction
i1:側邊 i1: side
i2:轉角 i2: corner
L170:延伸長度 L170: extension length
PC:畫素驅動電路 PC: pixel drive circuit
T:薄膜電晶體 T: thin film transistor
T170:厚度 T170:Thickness
I-I’、II-II’、III-III’:剖線 I-I’, II-II’, III-III’: section line
圖1為本發明一實施例之可拉伸的畫素陣列基板10的立體示意圖。
FIG. 1 is a schematic three-dimensional view of a stretchable
圖2為本發明一實施例之可拉伸的畫素陣列基板10的島狀元件IS、輔助圖案170及發光二極體元件230的示意圖。
FIG. 2 is a schematic diagram of the island element IS, the
圖3為本發明一實施例之可拉伸的畫素陣列基板10的剖面示意圖。
FIG. 3 is a schematic cross-sectional view of a stretchable
圖4為本發明一實施例之可拉伸的畫素陣列基板10的輔助圖案170及導線186的俯視示意圖。
FIG. 4 is a schematic top view of the
圖5示出本發明一實施例之輔助圖案170之設置於島狀元件IS的上表面ISb的一部分的厚度T170和島狀元件IS於導線186之末端處的應變(strain)的關係。
FIG. 5 shows the relationship between the thickness T170 of a part of the
圖6示出在各種延伸長度L170下本發明一實施例之可拉伸的畫素陣列基板10的整體應變與島狀元件IS的應變的關係。
FIG. 6 shows the relationship between the overall strain of the stretchable
圖7為本發明另一實施例之可拉伸的畫素陣列基板10A的島狀元件IS、輔助圖案170A及發光二極體元件230的示意圖。
FIG. 7 is a schematic diagram of the island element IS, the
圖8為本發明又一實施例之可拉伸的畫素陣列基板10B的島狀元件IS、輔助圖案170B及發光二極體元件230的示意圖。
FIG. 8 is a schematic diagram of the island element IS, the
圖9為本發明又一實施例之可拉伸的畫素陣列基板10B的剖面示意圖。
FIG. 9 is a schematic cross-sectional view of a stretchable
圖10為本發明再一實施例之可拉伸的畫素陣列基板10C的
島狀元件IS、輔助圖案170C及發光二極體元件230的示意圖。
Figure 10 shows a stretchable
圖11為本發明再一實施例之可拉伸的畫素陣列基板10C的剖面示意圖。
FIG. 11 is a schematic cross-sectional view of a stretchable
現將詳細地參考本發明的示範性實施例,示範性實施例的實例說明於附圖中。只要有可能,相同元件符號在圖式和描述中用來表示相同或相似部分。 Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Whenever possible, the same reference numbers are used in the drawings and descriptions to refer to the same or similar parts.
應當理解,當諸如層、膜、區域或基板的元件被稱為在另一元件“上”或“連接到”另一元件時,其可以直接在另一元件上或與另一元件連接,或者中間元件可以也存在。相反,當元件被稱為“直接在另一元件上”或“直接連接到”另一元件時,不存在中間元件。如本文所使用的,“連接”可以指物理及/或電性連接。再者,“電性連接”或“耦合”可以是二元件間存在其它元件。 It will be understood that when an element such as a layer, film, region or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or Intermediate elements may also be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to a physical and/or electrical connection. Furthermore, "electrical connection" or "coupling" may mean the presence of other components between two components.
本文使用的“約”、“近似”、或“實質上”包括所述值和在本領域普通技術人員確定的特定值的可接受的偏差範圍內的平均值,考慮到所討論的測量和與測量相關的誤差的特定數量(即,測量系統的限制)。例如,“約”可以表示在所述值的一個或多個標準偏差內,或±30%、±20%、±10%、±5%內。再者,本文使用的“約”、“近似”或“實質上”可依光學性質、蝕刻性質或其它性質,來選擇較可接受的偏差範圍或標準偏差,而可不用一個標準偏差適用全部性質。 As used herein, "about," "approximately," or "substantially" includes the stated value and the average within an acceptable range of deviations from the particular value as determined by one of ordinary skill in the art, taking into account the measurements in question and the A specific amount of error associated with a measurement (i.e., the limitations of the measurement system). For example, "about" may mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%. Furthermore, the terms "about", "approximately" or "substantially" used herein may be used to select a more acceptable deviation range or standard deviation based on optical properties, etching properties or other properties, and one standard deviation may not apply to all properties. .
除非另有定義,本文使用的所有術語(包括技術和科學術語)具有與本發明所屬領域的普通技術人員通常理解的相同的含義。將進一步理解的是,諸如在通常使用的字典中定義的那些術語應當被解釋為具有與它們在相關技術和本發明的上下文中的含義一致的含義,並且將不被解釋為理想化的或過度正式的意義,除非本文中明確地這樣定義。 Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be construed to have meanings consistent with their meanings in the context of the relevant technology and the present invention, and are not to be construed as idealistic or excessive Formal meaning, unless expressly defined as such herein.
圖1為本發明一實施例之可拉伸的畫素陣列基板10的立體示意圖。圖2為本發明一實施例之可拉伸的畫素陣列基板10的島狀元件IS、輔助圖案170及發光二極體元件230的示意圖。圖3為本發明一實施例之可拉伸的畫素陣列基板10的剖面示意圖。圖3對應圖1的剖線I-I’。圖1示出圖3的可拉伸的畫素陣列基板10的基底110、島狀元件IS、輔助圖案170及導線186,而省可拉伸的畫素陣列基板10的其它構件。
FIG. 1 is a schematic three-dimensional view of a stretchable
請參照圖1及圖3,可拉伸的畫素陣列基板10包括基底110。基底110具有多個畫素區112及線路區114,其中線路區114位於多個畫素區112之間且與多個畫素區112連接。基底110係可拉伸。舉例而言,在本實施例中,基底110的材質可選用有機聚合物,例如:聚醯亞胺(polyimide;PI)、聚萘二甲酸乙醇酯(polyethylene naphthalate;PEN)、聚對苯二甲酸乙二酯(polyethylene terephthalate;PET)、聚碳酸酯(polycarbonates;PC)、聚醚碸(polyether sulfone;PES)或聚芳基酸酯(polyarylate)、其它合適的材料、或前述至少二種材料的組合,
但本發明不以此為限。
Referring to FIGS. 1 and 3 , the stretchable
請參照圖1、圖2及圖3,可拉伸的畫素陣列基板10還包括多個島狀元件IS,分別設置於基底110的多個畫素區112上。每一島狀元件IS包括畫素驅動電路PC且具有側壁ISa。島狀元件IS的側壁ISa和畫素區112與線路區114的界線切齊。
Referring to FIGS. 1 , 2 and 3 , the stretchable
請參照圖1及圖3,在本實施例中,每一島狀元件IS的畫素驅動電路PC可包括薄膜電晶體T,薄膜電晶體T具有控制端150、半導體圖案130、設置於控制端150與半導體圖案130之間的閘絕緣層140和分別與半導體圖案130之不同兩區電性連接的第一端182及第二端(未繪示),而島狀元件IS的側壁ISa可包括閘絕緣層140的側壁140a。
Please refer to FIG. 1 and FIG. 3. In this embodiment, the pixel driving circuit PC of each island element IS may include a thin film transistor T. The thin film transistor T has a
在本實施例中,每一島狀元件IS還可選擇性地包括緩衝層120,其中緩衝層120設置於基底110上,薄膜電晶體T設置於緩衝層120上,而島狀元件IS的側壁ISa還可選擇性地包括緩衝層120的側壁120a,但本發明不以此為限。在本實施例中,每一島狀元件IS還可選擇性地包括層間介電層160,層間介電層160可由單一膜層或相堆疊的多個膜層所組成,層間介電層160設置於薄膜電晶體T的第一端182與控制端150之間,而島狀元件IS的側壁ISa還可選擇性地包括層間介電層160的側壁160a,但本發明不以此為限。
In this embodiment, each island-shaped component IS may also optionally include a
請參照圖1、圖2及圖3,可拉伸的畫素陣列基板10還包括輔助圖案170,設置於基底110的線路區114上,且至少延
伸到畫素區112的至少一部分上。輔助圖案170覆蓋島狀元件IS的側壁ISa的至少一部分及島狀元件IS之背向基底110的上表面ISb的至少一部分。請參照圖1及圖3,舉例而言,在本實施例中,島狀元件IS的上表面ISb包括周邊區ISb-2及中間區ISb-1,島狀元件IS的上表面ISb的周邊區ISb-2連接於島狀元件IS的側壁ISa與島狀元件IS的上表面ISb的中間區ISb-1之間,輔助圖案170包覆島狀元件IS的側壁ISa及島狀元件IS之上表面ISb的周邊區ISb-2,輔助圖案170可具有開口172,且開口172重疊於島狀元件IS之上表面ISb的中間區ISb-1,但本發明不以此為限。
Referring to Figures 1, 2 and 3, the stretchable
輔助圖案170的材質可為具有緩衝效果的各種感光材料。舉例而言,在本實施例中,輔助圖案170的楊氏模數可小於10GPa;輔助圖案170的材質可為聚醯亞胺(PSPI)、酚醛樹脂(phenol-formaldehyde resin)、環氧樹脂(epoxy resin)、聚異戊二烯橡膠(polyisoprene rubber)或其它適當材料;但本發明不以此為限。
The material of the
請參照圖1及圖3,可拉伸的畫素陣列基板10還包括導線186設置於輔助圖案170上,且電性連接多個島狀元件IS的多個畫素驅動電路PC。舉例而言,在本實施例中,導線186可以是電性連接至多個島狀元件IS的多個畫素驅動電路PC的閘極驅動線、電性連接至多個島狀元件IS的多個畫素驅動電路PC的共用線、電性連接至多個島狀元件IS的多個畫素驅動電路PC的
電源線或電性連接至多個島狀元件IS的多個畫素驅動電路PC的資料線,但本發明不以此為限。
Referring to FIGS. 1 and 3 , the stretchable
輔助圖案170具有接觸窗174,輔助圖案170的接觸窗174重疊於島狀元件IS之背向基底110的上表面ISb的至少一部分,導線186可由基底110的線路區114上朝基底110的畫素區112上延伸,以跨上覆蓋島狀元件IS的輔助圖案170,並透過輔助圖案170的接觸窗174與島狀元件IS的畫素驅動電路PC電性連接。在本實施例中,導線186還可選擇性地透過層間介電層160的接觸窗162與島狀元件IS的畫素驅動電路PC電性連接,但本發明不以此為限。
The
在本實施例中,基於導電性的考量,導線186是使用金屬材料。然而,本發明不限於此,根據其他實施例,導線186也可以使用其他導電材料。例如:合金、金屬材料的氮化物、金屬材料的氧化物、金屬材料的氮氧化物、或是金屬材料與其它導電材料的堆疊層。
In this embodiment, based on the consideration of electrical conductivity, the
請參照圖1及圖3,可拉伸的畫素陣列基板10還包括絕緣層190,覆蓋導線186及島狀元件IS。絕緣層190也可稱保護層。在本實施例中,絕緣層190的材料可為無機材料(例如:氧化矽、氮化矽、氮氧化矽、或上述至少二種材料的堆疊層)、有機材料或上述的組合。
Referring to FIGS. 1 and 3 , the stretchable
請參照圖1及圖3,在本實施例中,可拉伸的畫素陣列基板10還可包括導電圖案200,設置於絕緣層190上,且與島狀
元件IS的畫素驅動電路PC電性連接。在本實施例中,可拉伸的畫素陣列基板10還可包括平坦層210,設置於導電圖案200上。在本實施例中,可拉伸的畫素陣列基板10還可包括透明導電圖案220,設置於平坦層210,且電性連接至導電圖案200。可拉伸的畫素陣列基板10用以與發光二極體元件230接合,進而形成可拉伸的顯示裝置。舉例而言,在本實施例中,發光二極體元件230可透過透明導電圖案220及導電圖案200電性連接至島狀元件IS的畫素驅動電路PC,但本發明不以此為限。
Please refer to FIGS. 1 and 3 . In this embodiment, the stretchable
請參照圖1、圖2及圖3,在本實施例中,每一島狀元件IS上可設有分別發出第一色光、第二色光及第三色光的多個發光二極體元件230;第一色光、第二色光及第三色光例如分別是紅光、綠光及藍光;但本發明不以此為限。
Please refer to Figures 1, 2 and 3. In this embodiment, each island element IS can be provided with a plurality of light emitting
請參照圖1及圖3,在本實施例中,輔助圖案170設置於導線186與島狀元件IS的上表面ISb的至少一部分之間,輔助圖案170更設置於導線186與島狀元件IS的側壁ISa的至少一部分之間,且輔助圖案170更設置於導線186與基底110的線路區114之間。
Please refer to FIGS. 1 and 3 . In this embodiment, the
圖4為本發明一實施例之可拉伸的畫素陣列基板10的輔助圖案170及導線186的俯視示意圖。
FIG. 4 is a schematic top view of the
請參照圖1、圖3及圖4,在本實施例中,導線186的一部分於基底110之畫素區112上的垂直投影面積小於或等於輔助圖案170的一部分於基底110之畫素區112上的垂直投影面
積。在本實施例中,於畫素區112內,除了導線186與島狀元件IS接觸的區域(即接觸窗174所在處)外,導線186於基底110上的垂直投影落在輔助圖案170於基底110上的垂直投影內。
Please refer to FIGS. 1 , 3 and 4 . In this embodiment, the vertical projected area of a part of the
圖5示出本發明一實施例之輔助圖案170之設置於島狀元件IS的上表面ISb的一部分的厚度T170和島狀元件IS於導線186之末端處的應變(strain)的關係。請參照圖3及圖5,由圖5的數據知,在本實施例中,輔助圖案170的楊氏模數以小於10GPa為佳,但本發明不以此為限。由圖5的數據知,輔助圖案170於島狀元件IS上的厚度T170增加,則導線186於島狀元件IS上之末端處的應力減少。考量製程能力及材料特性,在本實施例中,輔助圖案170的厚度T170以小於10μm為佳,但本發明不以此為限。
FIG. 5 shows the relationship between the thickness T170 of a part of the
請參照圖3,輔助圖案170具有在島狀元件IS的上表面ISb上的延伸長度L170。圖6示出在各種延伸長度L170下本發明一實施例之可拉伸的畫素陣列基板10的整體應變與島狀元件IS的應變的關係。請參照圖3及圖6,由圖6的數據知,輔助圖案170的延伸長度L170越長,則島狀元件IS的應變越小。可拉伸的畫素陣列基板10的整體應變增加時,島狀元件IS也會受到越大的應變,此時,可透過增加輔助圖案170的延伸長度L170(或者說,增加導線186伸入島狀元件IS的長度)來降低應變量。
Referring to FIG. 3 , the
未繪示之一比較例的可拉伸的畫素陣列基板與本發明一
實施例之可拉伸的畫素陣列基板10的差異在於:比較例的可拉伸的畫素陣列基板不包括輔助圖案170。比較例的可拉伸的畫素陣列基板在島狀元件IS與導線186交界處承受0.94%的應變量,已接近損壞的邊緣,使得整體結構無法承受更大的拉伸量。透過增設輔助圖案170,本發明一實施例之可拉伸的畫素陣列基板10可將島狀元件IS與導線186交界處的應變量降為0.47%。相較於比較例的可拉伸的畫素陣列基板,本發明一實施例之可拉伸的畫素陣列基板10於島狀元件IS與導線186交界處的應變量的下降幅度約50%。
The stretchable pixel array substrate of a comparative example not shown is the same as the present invention.
The difference between the stretchable
在此必須說明的是,下述實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,下述實施例不再重述。 It must be noted here that the following embodiments follow the component numbers and part of the content of the previous embodiments, where the same numbers are used to represent the same or similar elements, and descriptions of the same technical content are omitted. For descriptions of omitted parts, reference may be made to the foregoing embodiments and will not be repeated in the following embodiments.
圖7為本發明另一實施例之可拉伸的畫素陣列基板10A的島狀元件IS、輔助圖案170A及發光二極體元件230的示意圖。
FIG. 7 is a schematic diagram of the island element IS, the
圖7的可拉伸的畫素陣列基板10A與前述的可拉伸的畫素陣列基板10類似,兩者的差異在於:兩者的輔助圖案170A、170不同。請參照圖7,具體而言,在本實施例中,島狀元件IS的上表面ISb與島狀元件IS的側壁ISa具有交界i,交界i包括多個側邊i1及設置於多個側邊i1之間的多個轉角i2,輔助圖案170A包括彼此分離的多個輔助部170A-1,多個輔助部170A-1分
別跨越交界i的多個側邊i1,且交界i的多個轉角i2位於多個輔助部170A-1之間。
The stretchable
圖8為本發明又一實施例之可拉伸的畫素陣列基板10B的島狀元件IS、輔助圖案170B及發光二極體元件230的示意圖。圖9為本發明又一實施例之可拉伸的畫素陣列基板10B的剖面示意圖。圖9對應圖8的剖線II-II’。
FIG. 8 is a schematic diagram of the island element IS, the
本實施例的可拉伸的畫素陣列基板10B與前述的可拉伸的畫素陣列基板10類似,兩者的差異在於:兩者的輔助圖案170B、170不同。請參照圖8及圖9,具體而言,在本實施例中,島狀元件IS的上表面ISb的周邊區ISb-2具有多個側邊子區ISb-2a及設置於多個側邊子區ISb-2a之間的多個轉角子區ISb-2b;輔助圖案170B包覆島狀元件IS的側壁ISa之與多個側邊子區ISb-2a連接的多個第一部分ISa-1、島狀元件IS之上表面ISb的多個側邊子區ISb-2a及島狀元件IS之上表面ISb的中間區ISb-1;輔助圖案170B具有多個缺角176,分別重疊於島狀元件IS之上表面ISb的多個轉角子區ISb-2b及島狀元件IS之側壁ISa分別與多個轉角子區ISb-2b連接的多個第二部分ISa-2。
The stretchable
圖10為本發明再一實施例之可拉伸的畫素陣列基板10C的島狀元件IS、輔助圖案170C及發光二極體元件230的示意圖。圖11為本發明再一實施例之可拉伸的畫素陣列基板10C的剖面示意圖。圖11對應圖10的剖線III-III’。
FIG. 10 is a schematic diagram of the island element IS, the
本實施例的可拉伸的畫素陣列基板10C與前述的可拉伸
的畫素陣列基板10類似,兩者的差異在於,兩者的輔助圖案170、170C不同。請參照圖10及圖11,具體而言,在本實施例中,除了輔助圖案170C需讓導線186穿過以和島狀元件IS連接的地方(即,接觸窗174)以外,輔助圖案170C包覆島狀元件IS的其餘區域。
The stretchable
10:可拉伸的畫素陣列基板 10: Stretchable pixel array substrate
110:基底 110: Base
170:輔助圖案 170: Auxiliary pattern
172:開口 172:Open your mouth
186:導線 186:Wire
IS:島狀元件 IS: Island component
ISb:上表面 ISb: upper surface
I-I’:剖線 I-I’: section line
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