TWI648802B - 3d導線模組之方法及結構 - Google Patents
3d導線模組之方法及結構 Download PDFInfo
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- TWI648802B TWI648802B TW106129251A TW106129251A TWI648802B TW I648802 B TWI648802 B TW I648802B TW 106129251 A TW106129251 A TW 106129251A TW 106129251 A TW106129251 A TW 106129251A TW I648802 B TWI648802 B TW I648802B
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- wiring
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- 238000000034 method Methods 0.000 title claims description 34
- 230000007246 mechanism Effects 0.000 claims abstract description 35
- 239000002184 metal Substances 0.000 claims description 14
- 239000000463 material Substances 0.000 claims description 12
- 230000008569 process Effects 0.000 claims description 12
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- 238000000227 grinding Methods 0.000 claims description 5
- 230000005540 biological transmission Effects 0.000 claims description 4
- 239000003989 dielectric material Substances 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 3
- 238000011049 filling Methods 0.000 claims description 3
- 238000002955 isolation Methods 0.000 claims description 3
- 238000003698 laser cutting Methods 0.000 claims description 3
- 239000007787 solid Substances 0.000 claims description 3
- 238000012360 testing method Methods 0.000 claims description 3
- 238000000149 argon plasma sintering Methods 0.000 claims 2
- 238000007493 shaping process Methods 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 5
- 238000005259 measurement Methods 0.000 description 5
- 238000010276 construction Methods 0.000 description 4
- 238000001514 detection method Methods 0.000 description 4
- 238000013461 design Methods 0.000 description 2
- 238000007689 inspection Methods 0.000 description 2
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- 230000015572 biosynthetic process Effects 0.000 description 1
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- 238000001465 metallisation Methods 0.000 description 1
- 238000003801 milling Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
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- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H01L21/486—Via connections through the substrate with or without pins
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- G01R1/04—Housings; Supporting members; Arrangements of terminals
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B33—ADDITIVE MANUFACTURING TECHNOLOGY
- B33Y—ADDITIVE MANUFACTURING, i.e. MANUFACTURING OF THREE-DIMENSIONAL [3-D] OBJECTS BY ADDITIVE DEPOSITION, ADDITIVE AGGLOMERATION OR ADDITIVE LAYERING, e.g. BY 3-D PRINTING, STEREOLITHOGRAPHY OR SELECTIVE LASER SINTERING
- B33Y80/00—Products made by additive manufacturing
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
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- H—ELECTRICITY
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- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/50—Fixed connections
- H01R12/51—Fixed connections for rigid printed circuits or like structures
- H01R12/52—Fixed connections for rigid printed circuits or like structures connecting to other rigid printed circuits or like structures
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- H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
- H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
- H01R12/70—Coupling devices
- H01R12/7082—Coupling device supported only by cooperation with PCB
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- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/02—Contact members
- H01R13/10—Sockets for co-operation with pins or blades
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- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
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- H05K7/02—Arrangements of circuit components or wiring on supporting structure
- H05K7/10—Plug-in assemblages of components, e.g. IC sockets
- H05K7/1053—Plug-in assemblages of components, e.g. IC sockets having interior leads
- H05K7/1061—Plug-in assemblages of components, e.g. IC sockets having interior leads co-operating by abutting
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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- G01R1/02—General constructional details
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- G01R1/0408—Test fixtures or contact fields; Connectors or connecting adaptors; Test clips; Test sockets
- G01R1/0433—Sockets for IC's or transistors
- G01R1/0483—Sockets for un-leaded IC's having matrix type contact fields, e.g. BGA or PGA devices; Sockets for unpackaged, naked chips
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
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- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/1623—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a pin of the item
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
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- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H01L2924/153—Connection portion
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- H01R13/00—Details of coupling devices of the kinds covered by groups H01R12/70 or H01R24/00 - H01R33/00
- H01R13/02—Contact members
- H01R13/22—Contacts for co-operating by abutting
- H01R13/24—Contacts for co-operating by abutting resilient; resiliently-mounted
- H01R13/2407—Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means
- H01R13/2414—Contacts for co-operating by abutting resilient; resiliently-mounted characterized by the resilient means conductive elastomers
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Abstract
本發明提供一種結構和機制,而藉此可透過運用積層製造程序來創建依可定制圖案連接一區塊之頂部和底部的電氣連接。可在區塊的表面上創建特定的連接點,並且將其等路由連到將原始圖案轉換成較小、較大或是替代性圖案的替代位置。
Description
本申請案參照且併入由本案申請人於2016年6月22日申審且序號15/189,435先前申請案「Trace Anywhere Interconnect」的完整主題項目在本案文內。
本發明概略關於電氣檢測與測量,並且特別是關於一種在區塊中創建導電路徑的新方式。尤其,本發明是關於在兩個或更多個離散接觸點之間形成電氣互連機制,例如但不限於在兩個或多個並聯電路平面內的電路焊盤,而電路是形成在上述兩個或多個電路平面之間的三維空間內,藉以允許透過所述互連裝置來電氣連接兩個或多個電氣裝置。與目前的業界機制相較,本發明的這種新機制可縮短設計時間並且增加導電路徑路由選擇。
傳統的互連技術是透過導電跡線來限制電路到xy平面的佈線。然後,這些跡線通過垂直於跡線,並在跡線上對齊,所形成的孔洞(通孔)在z軸上連接。接著利用部分地或完全地填充的金屬化作業對這些通孔進行塗覆或鍍覆,將這些跡線連接到在x-y平面上方和下方所形成的電路。
這些互連結構在結構的外部主要表面的任一側上具有接觸焊盤陣列是很正常的,偶爾甚至會在結構的次要側面或表面上。這些接觸焊盤的目的是要與位於外部表面上的電子元件電氣耦合。當各側上有大量的接觸焊盤或焊點要進行電氣耦合時,內部電路層就變得非常密集並且需要大量的佈線層。傳統上,這些疊層中的每一層都是以兩層組對的方式形成,夾置於一電介質片的兩側上。這些片材是同時地製造,然後與附加的電介質片層結合在一起以構成多層結構。然後通過或部分地通過這些疊層堆疊來形成並金屬化通孔,從而製作出所需要的z軸互連。可先在該等疊層組對的各者上構成並金屬化部分或埋覆的通孔,然後再將該等疊層黏合為一。
或者,為改善佈線密度,可循序地形成介質層和電路層,並且僅在需要時形成盲孔。如此可消除穿透通孔的需要,它們會在通孔並非必需的疊層上佔據x-y平面內的佈線空間。這種「通孔任處」的方式可大幅地改善佈線密度,但是需要付出循序地構建這些疊層的時間和勞動成本。
本發明提供一種機制及結構,其中形成一電氣連接機制,其在兩個或更多個離散接觸點之間具有複雜的連接,例如但不限於在兩個或更多個並聯電路平面內的電路焊盤,而電路是形成在上述兩個或多個電路平面之間的三維空間內,按此方式,本發明可透過所述互連裝置提供兩個或多個電氣裝置的電氣耦合。
本發明提供一種結構和機制,而藉此可透過運用積層製造程序來創建依可定制圖案連接一區塊之頂部和底部的電氣連接。可在區塊的表面上創建特定的連接點,並且將其等路由連到將原始圖案轉換成較小、較大或是替代性圖案的替代位置。
本申請案參照且併入由本案申請人於2016年6月22日申審且序號15/189,435先前申請案「Trace Anywhere Interconnect」的完整主題項目在本案文內。先前申請案與本案之間的差異為在本申請案中於添增電介質材料,像是例如但不限於塑料,之前先進行金屬化。這與先前「跡線任處互連」應用中的情況恰恰相反。
現參照圖1-7的圖式,圖1-3顯示本發明之結構和機制的基本建造步驟。圖4顯示運用本項機制的一些替代和有利的佈線功能性。圖5及6顯示本發明的兩個實施例。圖7顯示另一實施例,其中本發明結構係經連接以供檢測和測量應用。
圖1-3詳細描述本發明的基本建造技術。首先,令藉由3D列印機或者市售且已知製程(例如材料噴射、黏合劑噴射、材料擠出、粉末機床熔融、定向能量沉積或薄片層壓)所形成的金屬沉積並且透過積層處理來構成為所欲形狀(圖1) (1, 2, 3, 4)。添加通常為環氧材料的電介質(5)來填充該金屬內的間隙(圖2)。亦可藉由不允許模具填充某些區域以將空氣添加到該模型中。一旦填入電介質材料後,即可藉由二次程序,例如研磨、蝕刻、雷射切割或銑削來移除該固定框架(4)。所完成的區塊(6)現具有分別的隔離路徑,其將可提供與該區塊上不同點處的電氣連接。
積層製造可提供在印刷電路板(PCB)中通常無法獲得的許多有利選擇。導電路徑在本文中將被稱為「線路」,即使一些範例並非直接地形同於傳統線路亦然。
第一個接線選項是可按任意角度(1A)的簡單直線接線。這是簡單的點對點連接。第二種選擇是在接線中放置曲線(1B)藉以協助在區塊內進行線路佈線。第三種選擇是在該區塊的線路裡進行多個階梯步進高度變化(1C)。第四種選擇是將許多單獨線路合併成更大的接線來降低電阻、修改電感、修改電容或者簡化結構。第五種選擇則是創建同軸傳輸線結構(1E)、波導或是其他的阻抗控制結構。
可將用於提供支撐的額外機械結構添增到本發明的印刷3D接線區塊內。例如,可將用於蓋件(10)的孔洞以及用於鎖閂機制的特性建構到設計內。相較於傳統機制,如此可減少建構程序中的步驟數量。
圖5說明一插座的本發明實施例,其運用本製程以將較大間距的焊盤圖案縮成較細小的封裝尺寸。藉由添加互連材料(9) (例如導電彈性柱體的片材、彈簧銷或是其他的柔性互連裝置),可將一積體電路晶片(8)插至機板或其他的互連裝置。
在圖6的實施例中,內部框架工件(13)係經顯示為位於該塑料添加機械支撐結構內。此內部框架(13)對於本發明提供許多益處。這將可提供對齊特性(12),其與區塊內之接線的容忍精確度直接地關聯。這可提供像是螺絲孔(11)或夾扣的機械連接特性。如此將能在所有區塊上增加強度,改善固體電介質的強度。這也將能允許修改區塊的溫度膨脹性質。
圖7顯示為檢測測量目的的本發明應用。圖7中的應用是用於檢測和測量應用,其中必須將插座(15)放置在一印刷線路板(16) (PWB或PCB)上以將其電氣連接到自動檢測設備,像是Advantest 93k或Teradyne UltraFlex檢測器。
3D接線區塊(6)可以將PCB (16)上的電氣焊盤圖案轉換成匹配於該待測裝置(DUT) (8)之引腳圖案的較小圖案。
在圖7的應用中,彈性柱體(9)可將3D接線區塊(6)連接到插座(15)。該插座固定彈簧銷(14),如此提供將DUT (8)電氣連接至3D接線區塊(6)的順應性。
在本實例中,本發明的3D接線區塊可供更快速地和容易地製造PCB (16),因為相較於DUT (8)間距,它們具有較大的通孔間距。
此外,「跡線任處互連(Trace Anywhere Interconnect)」應用的各式實施例結構在本文中能夠與本發明的機制和結構相結合。
雖為本揭示之目的描述多項目前較佳實施例,然機制步驟排置上的無數變化以及熟諳本項技術領域人士確可製造設備部件。此等變化係經涵蓋於如後載申請專利範圍中所定義的本發明精神之內。
1A‧‧‧角度
1B‧‧‧曲線
1C‧‧‧階梯步進高度變化
1E‧‧‧同軸傳輸線結構
2‧‧‧所欲形狀
3‧‧‧所欲形狀
4‧‧‧固定框架
5‧‧‧電介質
6‧‧‧完成區塊
8‧‧‧待測裝置(DUT) / 積體電路晶片
9‧‧‧彈性柱體 / 互連材料
10‧‧‧蓋件
11‧‧‧螺絲孔
12‧‧‧對齊特性
13‧‧‧內部框架工件
14‧‧‧插座固定彈簧銷
15‧‧‧插座
16‧‧‧印刷線路板(PCB)
圖1是電介質填充前本發明之積層金屬結構的截面側視圖;
圖2是電介質填充後本發明之積層金屬結構的截面側視圖;
圖3是在去除底板後本發明之金屬和電介質的截面側視圖;
圖4是本發明之實施例的側視圖,其中運用根據本發明之機制的獨特構造選項;
圖5是本發明之一實施例的截面圖,其顯示加強機械力;
圖6是說明本發明之另一實施例的截面圖。
圖7顯示本發明的另一實施例,其中本發明結構係經連接以供檢測和測量應用。
Claims (32)
- 一種用以構成電氣互連機制的方法,其步驟包含:透過積層技術將金屬沉積成所欲形狀;並且添加通常為環氧材料的電介質,藉以填充該金屬中的間隙,透過二次程序移除固定框架藉此產生完成的區塊(具有提供與所述區塊上之不同點處的一個或多個電氣連接的單獨隔離路徑)。
- 如請求項1所述之方法,其中該金屬是由3D列印機所提供。
- 如請求項1所述之方法,其中用以構成該金屬的積層程序為雷射燒結處理。
- 如請求項1所述之方法,其中該電介質為經添加以填充該金屬內之間隙的環氧材料。
- 如請求項4所述之方法,其中該電介質可包括藉由不允許模具填充某些區域所添增至模型內的空氣。
- 如請求項1所述之方法,其中一旦填入該電介質材料後,可藉由研磨、蝕刻、雷射切割或研磨其中之一的二次程序來移除固定框架。
- 如請求項1所述之方法,進一步包含提供一條可按任意角度佈置以供點對點連接之簡單直線接線的步驟。
- 如請求項1所述之方法,進一步包含將一接線塑造為曲線形狀以協助該區塊內的接線佈線。
- 如請求項1所述之方法,進一步包含在接線內製作多個階梯步進高度變化以在區塊內進行佈線路由。
- 如請求項1所述之方法,進一步包含將許多單獨線路合併成更大的接線來降低電阻、修改電感、修改電容或者簡化結構。
- 如請求項1所述之方法,進一步包含提供同軸傳輸線結構、波導或是其他的阻抗控制結構。
- 如請求項1所述之方法,進一步包含提供支撐的附加機械結構,其藉由提供該結構之蓋件的孔洞以及用於該蓋件的鎖閂機制建構在該電氣互連機制內,故而與傳統製程相比,減少建構該結構的步驟。
- 如請求項1所述之方法,進一步包含利用插座將較大間距焊盤圖案縮小為較細小的封裝尺寸,其中可藉由添增互連材料以將積體電路晶片插至一機板或是其他的互連裝置。
- 如請求項13所述之方法,其中該互連材料可為導電彈性柱體的片材、彈簧銷或是其他的柔性互連裝置。
- 如請求項11所述之方法,其中該結構具有一內部框架,其提供直接地與該區塊內之接線的容忍精確度相關聯的對齊,並且提供像是螺絲孔或夾扣的機械連接特性,從而提高所有區塊上的強度,因此增加固體電介質的強度並且允許改變區塊的溫度膨脹性質。
- 如請求項1所述之方法,其中彈性柱體可將3D接線區塊(6)連接到插座(15)。並且該插座固定彈簧銷,如此可提供順應性以將DUT(8)電氣連接到該結構,藉以允許更快速地且容易地製造印刷電路板(PCB),因為相較於待測裝置(DUT)間距擁有較大的通孔間距。
- 一種電氣互連機制,其包含:透過積層處理來沉積金屬並予構成為所欲形狀;以及添加通常為環氧材料的電介質,填充該金屬中的間隙,透過二次程序移除固定框架藉此產生完成的區塊(具有提供與所述區塊上之不同點處的一個或多個電氣連接的單獨隔離路徑)。
- 如請求項17所述之機制,其中該金屬是由3D列印機所提供。
- 如請求項17所述之機制,其中用以構成該金屬的積層程序為雷射燒結處理。
- 如請求項17所述之機制,其中該電介質為經添加以填充該金屬內之間隙的環氧材料。
- 如請求項17所述之機制,其中該電介質可包括藉由不允許模具填充某些區域所添增至模型內的空氣。
- 如請求項17所述之機制,其中一旦填入該電介質材料後,可藉由研磨、蝕刻、雷射切割或研磨其中之一的二次程序來移除固定框架。
- 如請求項17所述之機制,進一步包含一條可按任意角度佈置以供點對點連接的簡單直線接線。
- 如請求項17所述之機制,進一步包含一塑造為曲線形狀的接線以協助該區塊內的接線佈線。
- 如請求項17所述之機制,進一步包含具有多個階梯步進高度變化的接線以在區塊內進行佈線路由。
- 如請求項17所述之機制,進一步包含許多單獨線路合併成更大的接線來降低電阻、修改電感、修改電容或者簡化結構。
- 如請求項17所述之機制,進一步包含同軸傳輸線結構、波導或是其他的阻抗控制結構。
- 如請求項17所述之機制,進一步包含藉由提供該結構之蓋件的孔洞以及用於該蓋件的鎖閂機制可將用於提供支撐的附加機械結構建構在該電氣互連機制內,故而與傳統製程相比,減少建構該結構的步驟。
- 如請求項17所述之機制,進一步包含用以將較大間距焊盤圖案縮小為較細小封裝尺寸的插座,其中可藉由添增互連材料以將積體電路晶片插至一機板或是其他的互連裝置。
- 如請求項29所述之機制,其中該互連材料可為導電彈性柱體的片材或是彈簧銷。
- 如請求項17所述之機制,其中該結構具有一內部框架,其與該區塊內之接線的容忍精確度直接地關聯而對齊,並且提供像是螺絲孔或夾扣的機械連接特性,從而提高所有區塊上的強度,因此增加固體電介質的強度並且允許改變區塊的溫度膨脹性質。
- 如請求項17所述之機制,其中一彈性柱體將3D接線區塊(6)連接到插座(15)。並且該插座固定彈簧銷,如此可提供順應性以將DUT(8)電氣連接到該結構,藉以允許更快速地且容易地製造印刷電路板(PCB),因為相較於待測裝置(DUT)間距擁有較大的通孔間距。
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2017
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- 2017-08-28 US US15/688,238 patent/US10559476B2/en active Active
- 2017-08-28 CN CN201780014908.XA patent/CN109070214B/zh active Active
- 2017-08-28 SG SG11201805911UA patent/SG11201805911UA/en unknown
- 2017-08-28 KR KR1020187025671A patent/KR102206150B1/ko active IP Right Grant
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Patent Citations (3)
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US20110210444A1 (en) * | 2010-02-26 | 2011-09-01 | Taiwan Semiconductor Manufacturing Company, Ltd. | 3D Semiconductor Package Using An Interposer |
TW201620051A (zh) * | 2014-11-26 | 2016-06-01 | 力成科技股份有限公司 | 防止中介導體橋接之半導體封裝件立體堆疊方法 |
CN105428260A (zh) * | 2015-12-22 | 2016-03-23 | 成都锐华光电技术有限责任公司 | 一种基于载体的扇出2.5d/3d封装结构的制造方法 |
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CN109070214A (zh) | 2018-12-21 |
US20180068867A1 (en) | 2018-03-08 |
TW201826420A (zh) | 2018-07-16 |
KR20190028638A (ko) | 2019-03-19 |
KR102206150B1 (ko) | 2021-01-22 |
WO2018044788A1 (en) | 2018-03-08 |
US10559476B2 (en) | 2020-02-11 |
CN109070214B (zh) | 2021-09-24 |
SG11201805911UA (en) | 2018-08-30 |
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