TWI619179B - 模製複合物內之三維結構 - Google Patents

模製複合物內之三維結構 Download PDF

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TWI619179B
TWI619179B TW104133711A TW104133711A TWI619179B TW I619179 B TWI619179 B TW I619179B TW 104133711 A TW104133711 A TW 104133711A TW 104133711 A TW104133711 A TW 104133711A TW I619179 B TWI619179 B TW I619179B
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Taiwan
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substrate
passive
passive structure
integrated circuit
contact points
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TW104133711A
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TW201633411A (zh
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史文 亞伯斯
安德烈亞斯 沃特
克勞斯 倫格魯伯
特羅斯登 梅耶爾
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美商英特爾公司
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    • H01F17/04—Fixed inductances of the signal type  with magnetic core
    • H01F17/045—Fixed inductances of the signal type  with magnetic core with core of cylindric geometry and coil wound along its longitudinal axis, i.e. rod or drum core
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Abstract

一種方法，其包括以下步驟：於基材上藉由增層法形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及於該至少一個被動結構及該等一或多個積體電路晶片上引入模製複合物。一種方法，其包括藉由三維列印程序於基材上形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及將該至少一個被動結構及該等一或多個積體電路晶片嵌入模製複合物中。一種設備，其包括封裝基材，該封裝基材包括嵌入模製材料中之至少一個三維列印被動結構及一或多個積體電路晶片。

Description

模製複合物內之三維結構 發明領域
積體電路封裝。
發明背景
對於更高階層整合及更低成本之需求驅使以封裝「SiP」解決方案來整合諸如系統之組件。在此方面，尺寸及成本之減小以及功能性之增加係原理驅動因素。
根據本發明之一實施例，係特地提出一種方法，其包含以下步驟：於一基材上藉由一增層法形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及於該至少一個被動結構及該等一或多個積體電路晶片上引入一模製複合物。
100、200‧‧‧結構
110‧‧‧載體
115‧‧‧黏合層
120、220、225‧‧‧接觸點
130A~130C、245、345、945A~945C、1045、1145‧‧‧被動結構
140A、140B、330、430、530、630、730、830、930、1030、1130‧‧‧ 積體電路晶片
150‧‧‧模製材料
160‧‧‧介電層
170、190‧‧‧再分配層
180‧‧‧焊料終止材料
210、910‧‧‧基材
230‧‧‧晶片
235‧‧‧底部填充材料
240‧‧‧粉末
250‧‧‧電磁源
255‧‧‧掃描器
260‧‧‧焊料連接(焊料凸塊)
300‧‧‧封裝
400、600、700、800‧‧‧封裝結構
445A、445B、545A、545B、645A、645B、845C、845D‧‧‧線圈
500、900、1000、1100‧‧‧封裝基材
745A、745B、845A、845B‧‧‧被動線圈
750、850A‧‧‧芯
850B‧‧‧磁芯
1200‧‧‧計算裝置
1202‧‧‧板
1204‧‧‧處理器
1206‧‧‧通訊晶片
X‧‧‧X方向
Z‧‧‧Z方向
圖1展示包括黏合層及該黏合層上之接觸點的犧牲載體之截面側視圖。
圖2展示於黏合層上形成被動結構且連接至接觸 點後之圖1之結構。
圖3展示於黏合層上引入兩個積體電路晶片後之圖2之結構。
圖4展示於黏合層上引入模製材料以將被動結構及積體電路晶片嵌入後之圖3之結構。
圖5展示自載體釋放嵌入模製材料中的結構後之圖4之結構。
圖6展示用以包括金屬化層及接觸點之額外晶圓級程序以及於該等接觸點上置放焊料連接後之圖5之結構。
圖7展示以倒裝晶片組態連接至基材上的接觸點之積體電路晶片。
圖8展示於基材上引入粉末材料以及形成被動結構之增層法或加成法後之圖7之結構。
圖9展示藉由加成法或增層法完成被動結構後之圖8之結構。
圖10展示移除未藉由電磁輻射熔融以形成被動結構的粉末後之圖9之結構。
圖11展示將模製材料引入至基材之表面上來將積體電路晶片及被動結構嵌入模製材料中後之圖10之結構。
圖12展示將焊料連接引入至基材之第二側面上的接觸點後之圖11之結構。
圖13展示整合積體電路晶片及垂直線圈之被動結構之封裝。
圖14展示整合積體電路晶片以及處於並排多線圈中之多線圈組態的線圈之封裝結構。
圖15展示積體電路晶片及處於多繞線線圈水平組態之線圈之封裝基材。
圖16展示多繞線線圈垂直組態之封裝結構。
圖17展示將積體電路晶片與處於並排多線圈組態之被動線圈整合之封裝結構，該並排多線圈組態具有例如安置於該等線圈之間的磁性材料芯。
圖18展示整合積體電路晶片以及處於垂直多繞線線圈組態之被動線圈以及處於水平多繞線線圈組態之線圈的封裝結構，該垂直多繞線線圈組態具有穿過其中之磁性材料芯，該水平多繞線線圈組態具有穿過其中之磁芯。
圖19展示整合積體電路晶片及被動結構之封裝基材，該等被動結構中之每一者為互連，尤其是例如銅材料之穿模導電通路。
圖20展示將積體電路晶片與接地屏蔽件之被動結構整合之封裝基材。
圖21展示將積體電路晶片與天線之被動結構整合之封裝基材。
圖22例示計算裝置之一實施例。
詳細說明
已描述在封裝中整合被動組件及諸如一或多個積體電路晶片之主動電路組件之方法。主動電路組件為有 能力電氣地控制電子流之任何類型之電路組件。在此情境中，被動組件或被動結構為不能夠藉助於電信號來控制電流之組件或結構。被動組件或被動結構之實例包括電阻器、電容器、電感器、濾波器、平衡-不平衡轉換器(balun)、收發器、接收器及/或互連、天線以及屏蔽件。在一個實施例中，一種方法包括：於基材上形成被動組件或被動結構，以及於該基材上引入一或多個主動電路組件(例如，一或多個積體電路晶片)，然後於該至少一個被動結構及該等一或多個主動組件上引入模製複合物。在一個實施例中，經由增層法(build-up process)或加成法(additive process)於基材上形成被動結構。代表性地，使用三維加成法(例如，三維列印程序)來產生被動結構。三維加成法之代表為諸如選擇性雷射熔融系統之選擇性熔融或燒結程序，或立體微影術程序，在該立體微影術程序中，例如將液體光聚合物曝露於電磁能量以選擇性地固化該液體。藉由在封裝程序之前或封裝程序期間於增層法或加成法中(例如，逐層)建構被動結構，可創建簡單或複雜之三維結構，例如線圈、天線、電阻器或屏蔽件。此外，整個封裝體積可用來置放且創建額外組件，該等額外組件擴展封裝模組之功能性及/或效能。藉由使用使整個封裝體積可用於主動結構及被動結構之方法，進一步可能以二維被動結構無法達成之方式改良被動結構之電性質。最後，藉由在封裝之全部體積內實行被動組件或被動結構，可使得該封裝之佔據面積相對於具有於印刷電路板上並排安裝之此類被動結構之封裝相對較 小。
圖1至圖6例示用於產生封裝之程序流程之實施例，該程序流程包括嵌入該封裝之體積中之至少一個被動結構及一或多個主動電路組件(例如，一或多個積體電路晶片)之整合。在此實施例中，該程序流程使用扇出晶圓級接合技術，且嵌入最終封裝中之被動結構為線圈。圖1展示犧牲載體之截面側視圖。載體110為例如具有代表厚度(例如，數量級為毫米之厚度)的金屬、聚合物或陶瓷材料，該厚度足以提供用於下一程序操作之功能性。黏合層115安置於結構100之載體110之表面(如所觀察之上表面)上。在一個實施例中，黏合層115為層壓至載體110之雙面黏合箔。在一個實施例中，諸如金屬墊/台之任選接觸點安置於黏合層115上，用於將要形成於該結構上之裝置。
圖2展示於黏合層115上形成被動結構後之圖1之結構，且在此實施例中，該等被動結構連接至接觸點120。在一個實施例中，被動結構130A、被動結構130B以及被動結構130C各自為藉由增層法或加成法(例如，三維列印程序)形成之三維被動結構。圖2展示將被動結構130A及被動結構130B展示為水平安置之線圈，且被動結構130C為垂直安置之線圈。已瞭解，線圈為可藉由諸3D列印程序之增層法或加成法建構而成之結構之一個實例。其他結構包括所涵蓋之其他被動結構。
圖3展示將兩個積體電路晶片引入至結構後之圖2之結構。圖3展示附接至黏合層115之積體電路晶片140A 及積體電路晶片140B。積體電路晶片140A及積體電路晶片140B安置於黏合層115之未由被動結構130A-130C佔據之區域(例如，該等被動結構之間的區域)上。圖3特定地展示安置於被動結構130A與被動結構130C之間的積體電路晶片140A，及安置於積體電路晶片130B與積體電路晶片130C之間的積體電路晶片140B。在一個實施例中，在裝置側面朝向黏合層115(如所觀察，裝置側面向下)的情況下安置積體電路晶片140A及積體電路晶片140B中之每一者。在另一實施例中，可於被動結構130A與被動結構130B及/或被動結構130B與被動結構130C之間置放多個晶片或晶粒。
圖4展示於黏合層上引入模製材料以將該黏合層上之被動結構及積體電路晶片嵌入後之圖3之結構。圖4展示安置於黏合層115上且引入至一厚度以將被動結構130A-130C及積體電路晶片140A-140B嵌入之模製材料150。在一個實施例中，用於模製材料150之適宜材料為諸如KE-G1250FC-20CU之模製複合物或基於填充型環氧樹脂之模製複合物。
圖5展示自載體釋放嵌入模製材料150中之結構後之圖4之結構。在一個實施例中，藉由加入熱能量、化學能量或任何其他形式之能量來釋放(分離)載體。圖5展示釋放基材110及黏合層115後之結構100，該結構包括嵌入模製材料150中之被動結構130A-130C及積體電路晶片140A-140B。
圖6展示額外晶圓級處理後之圖5之結構。此類程 序代表性地包括清洗曝露表面(因釋放載體110而曝露之表面)；引入介電層160，例如，聚醯亞胺、環氧樹脂、聚苯并噁唑、混合物或類似材料；形成接至晶片或被動結構之接觸點之開口或通路；播種及電鍍及圖案化再分配層170以及引入焊料終止材料180。圖6亦展示被列印或置放為預成型球來接至再分配層之接觸點的焊料連接(焊料球)190。
圖7至圖12展示用於將三維被動結構與一或積體電路晶片合併以獲得倒裝晶片封裝的程序流程之實施例。圖7展示以倒裝晶片組態連接至基材(封裝或板)之或接觸點之積體電路晶片，諸如微處理器。結構200包括基材210，該基材例如為無芯基材或具有芯結構之基材，但亦可為模製互連基材(MIS)或陶瓷基材。基材210包括第一側面上之接觸點220及相反的第二側面上之接觸點225。積體電路晶片230安置於基材210上且與接觸點220接觸。晶片230在一個實施例中經由焊料連接(焊料凸塊)或銅柱連接至基材210上之接觸點220。可藉由質量回流或壓力接合來附接此晶片。以倒裝晶片組態，在裝置側面向下或朝向基材210的情況下將晶片230附接至基材210。可對積體電路晶片230至基材210之連接進行底部填充。圖7展示例如聚合物材料之底部填充材料235。
圖8展示在鄰近積體電路晶片203之區域內於基材210上引入粉末材料以及形成被動結構之增層法或加成法後之圖7之結構。參照圖8，在一個實施例中，藉由相繼引入粉末材料(材料粒子)及使用選擇性電磁輻射熔融原理 在所需處加熱該粉末且熔融(燒結)該粉末，來形成被動結構。圖8展示一次一層地於基材210上引入之粉末240。代表性地，可藉由使用與基材210之表面對準之滾輪使來自粉末源之粉末(例如，導電粒子)位移來進行此引入。一旦引入一層粉末，便啟動電磁源且於所需處將電磁輻射施加於粉末上。圖8展示包括掃描器255之電磁源250，該掃描器將電磁輻射260施加於粉末材料240之所需粒子上。掃描器255在一個實施例中受控於包括非暫時性機器可讀指令的控制器，該等指令在被執行時使掃描器255在基材210之含有粉末之區域上的至少二維平面(x方向及y方向)中移動，且於預定位置處衝擊電磁輻射。
圖9展示完成粉末240之引入及熔融以形成被動結構後之圖8之結構。圖9展示水平線圈之被動結構245。如圖9所例示，水平線圈及積體電路晶片230嵌入粉末240中或由粉末240包圍。
圖10展示移除未藉由電磁輻射熔融的粉末240以形成被動結構後之圖9之結構。圖10展示安置於基材210上且連接至該基材之表面上的接觸點220(該等接觸點電連接至基材210)之水平線圈之被動結構245。圖11展示將模製材料或頂部包封(glob top)材料引入至基材210之表面上來將積體電路晶片230及被動結構245嵌入該模製材料中後之圖10之結構。
圖12展示引入接至基材210之第二側面上的接觸點225之焊料連接後之圖11之結構。圖12展示連接至接觸點 225之焊料連接(焊料凸塊)260。
在以上實施例中，於基材上引入或置放晶片後，於封裝基材上形成被動結構。在另一實施例中，可在將晶片置放或引入至封裝基材上之前形成被動結構。
圖13至圖21展示整合至具有一或多個積體電路晶片之封裝中的被動結構之不同實施例。將倒裝晶片封裝用作示範性實施例來例示各種被動結構。圖13展示整合積體電路晶片330及垂直線圈之被動結構345之封裝300。圖14展示整合積體電路晶片430以及處於並排多線圈組態中之多線圈組態之線圈445A及線圈445B的封裝結構400。圖15展示整合積體電路晶片530以及處於多繞線線圈水平組態之線圈545A及線圈545B之封裝基材500。圖16展示整合積體電路晶片630以及處於多繞線線圈垂直組態之線圈645A及線圈645B之封裝結構600。
圖17展示將積體電路晶片730與處於並排多線圈組態之被動線圈745A及被動線圈745B整合之封裝結構700，該並排多線圈組態具有例如安置於該等線圈之間的磁性材料芯750。圖18展示整合積體電路晶片830以及處於垂直多繞線線圈組態之被動線圈845A及被動線圈845B以及處於水平多繞線線圈組態之線圈845C及線圈845D之封裝結構800，該垂直多繞線線圈組態具有穿過其中之磁性材料芯850A，該水平多繞線線圈組態具有穿過其中之磁芯850B。
圖19展示整合積體電路晶片930以及被動結構 945A、被動結構945B及被動結構945C之封裝基材900，該等被動結構中之每一者為互連，尤其是例如銅材料之穿模導電通路。此類穿模通路可單獨連接至基材910上之接觸點。
圖20展示將積體電路晶片1030與接地屏蔽件之被動結構1045整合之封裝基材1000。
圖21展示將積體電路晶片1130與天線之被動結構1145整合之封裝基材1100。
圖22例示根據一個實行方案之計算裝置1200。計算裝置1200容納板1202。板1202可包括許多組件，該等組件包括但不限於處理器1204及至少一個通訊晶片1206。處理器1204實體地且電氣地耦接至板1202。在一些實行方案中，至少一個通訊晶片1206亦實體地且電氣地耦接至板1202。在另外之實行方案中，通訊晶片1206為處理器1204之部分。
取決於其應用，計算裝置1200可包括其他組件，該等其他組件可能或可能並未實體地且電氣地耦接至板1202。此等其他組件可包括但不限於依電性記憶體(例如，DRAM)、非依電性記憶體(例如，ROM)、快閃記憶體、圖形處理器、數位信號處理器、加密處理器、晶片組、天線、顯示器、觸控螢幕顯示器、觸控螢幕控制器、電池、音訊編解碼器、視訊編解碼器、功率放大器、全球定位系統(GPS)裝置、羅盤、加速計、迴轉儀、揚聲器、攝影機以及大容量儲存裝置(諸如硬碟機、光碟片(CD)、數位通用碟片(DVD) 等)。
通訊晶片1206實現無線通訊，用於將資料轉移至計算裝置1200且自計算裝置1200轉移資料。「無線」一詞及其衍生詞可用以描述可藉由使用調變的電磁輻射經由非固體媒體傳達資料之電路、裝置、系統、方法、技術、通訊通道等。該詞並不暗示相關聯的裝置不含有任何導線，然而在一些實施例中該等裝置可能不含有任何導線。通訊晶片1206可實行許多無線標準或協定中之任一者，包括但不限於Wi-Fi(IEEE 802.11系列)、WiMAX(IEEE 802.16系列)、IEEE 802.20、長期演進(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、藍牙、其衍生物，以及命名為3G、4G、5G及以上之任何其他無線協定。計算裝置1200可包括多個通訊晶片1206。例如，第一通訊晶片1206可專用於較短距離無線通訊，諸如Wi-Fi及藍牙，且第二通訊晶片1206可專用於較長距離無線通訊，諸如GPS、EDGE、GPRS、CDMA、WiMAX、LTE、Ev-DO等等。
計算裝置1200之處理器1204包括封裝於處理器1204內之積體電路晶粒。「處理器」一詞可指處理來自暫存器及/或記憶體之電子資料以將該電子資料轉換成可儲存在暫存器及/或記憶體中之其他電子資料的任何裝置或裝置之部分。在一些實行方案中，積體電路晶粒可根據上文所描述之教示與封裝中之被動結構整合。
通訊晶片1206亦包括封裝於通訊晶片1206內之 積體電路晶粒。在一些實行方案中，積體電路晶粒可根據上文所描述之教示與封裝中之被動結構整合。
在另外之實行方案中，計算裝置1200內容納之另一組件可含有包括諸如電晶體或金屬互連之一或多個裝置之積體電路晶粒。在一些實行方案中，積體電路晶粒可根據上文所描述之教示與封裝中之被動結構整合。
在各種實行方案中，計算裝置1200可為膝上型電腦、迷你筆記型電腦、筆記型電腦、輕量級筆記型電腦、智慧型電話、平板電腦、個人數位助理(PDA)、超級行動PC、行動電話、桌上型電腦、伺服器、印表機、掃描器、監視器、機上盒、娛樂控制單元、數位攝影機、可攜式音樂播放器或數位視訊記錄器。在另外之實行方案中，計算裝置1200可為處理資料之任何其他電子裝置。
實例
實例1為一種方法，其包括：藉由增層法於基材上形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及於該至少一個被動結構及該等一或多個積體電路晶片上引入模製複合物。
在實例2中，實例1之方法中之基材包括犧牲基材，且引入模製複合物後，該方法包含移除該犧牲基材。
在實例3中，實例2之方法中之至少一個被動結構及一或多個積體電路晶片中之每一者包括接觸點，且移除犧牲基材使該等接觸點曝露，該方法進一步包括將再分配層耦接至該等接觸點。
在實例4中，實例1之方法中之引入一或多個晶片包括將該等一或多個晶片之接觸點耦接至基材之接觸點。
在實例5中，實例4之方法中之一或多個晶片經由焊料連接耦接至基材。
在實例6中，實例4之方法中之於基材上形成至少一個被動結構包括將該至少一個被動結構耦接至基材之相應一或多個接觸點。
在實例7中，實例1之方法中之增層法包括：於基材上重複沉積導電粉末層，以及選擇性地熔融該沉積層中之導電粉末。
在實例8中，實例1之方法中之增層法包括立體微影術。
在實例9中，實例1之方法中之至少一個被動結構包括線圈。
在實例10中，實例1之方法中之至少一個被動結構包括天線、電阻器或屏蔽件中之至少一者。
在實例11中，藉由實例1-10之方法中之任一者來製造封裝基材。
實例12為一種方法，其包括：藉由三維列印程序於基材上形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及將該至少一個被動結構及該等一或多個積體電路晶片嵌入模製複合物中。
在實例13中，實例12之方法中之基材包括犧牲基材，且將該至少一個被動結構及該等一或多個積體電路嵌 入該模製複合物中後，該方法包含移除該犧牲基材。
在實例14中，實例13之方法中之至少一個被動結構及一或多個積體電路晶片中之每一者包括接觸點，且移除犧牲基材使該等接觸點曝露，該方法進一步包括將金屬化層耦接至該等接觸點。
在實例15中，實例12之方法中之引入一或多個晶片包括將該等一或多個晶片之接觸點耦接至基材之接觸點。
在實例16中，實例15之方法中之一或多個晶片經由焊料連接耦接至基材。
在實例17中，實例15之方法中之於基材上形成至少一個被動結構包括將該至少一個被動結構耦接至基材之相應一或多個接觸點。
在實例18中，實例12之方法中之三維列印程序包括：於基材上重複沉積導電粉末層，以及選擇性地熔融該沉積層中之導電粉末。
在實例19中，實例12之方法中之增層法包括立體微影術。
在實例20中，藉由實例12-19之方法中之任一者來製造封裝基材。
實例21為一種設備，其包括封裝基材，該封裝基材包括嵌入模製材料中之至少一個三維列印被動結構及一或多個積體電路晶片。
在實例22中，實例21之設備中之至少一個被動結 構包括天線、電阻器、線圈或屏蔽件中之至少一者。
在實例23中，進一步實例21之設備中的封裝包括基材，該基材上之具有接觸點，且該至少一個被動結構及該等一或多個積體電路晶片耦接至該基材之該等接觸點中之相應一者。
在實例24中，實例23中之設備中之一或多個積體電路晶片經由焊料連接耦接至該基材之該等接觸點中之相應一者。
包括摘要中所述內容之所例示實行方案之以上描述不欲為窮舉性的或將本發明限制於所揭示之精確形式。雖然本文出於例示目的描述本發明之特定實行方案及本發明之實例，但是本發明範疇內之各種等效修改為可能的，如熟習相關技術者將認識到的。
可根據以上詳細描述對本發明做出此等修改。以下申請專利範圍中所用之術語不應理解為將本發明限制於說明書及申請專利範圍中所揭示之特定實行方案。實情為，範疇將完全由以下申請專利範圍來確定，申請專利範圍將根據申請專利範圍解釋之已建立學說加以理解。
100‧‧‧結構
120‧‧‧接觸點
130A、130B、130C‧‧‧被動結構
140A、140B‧‧‧積體電路晶片
160‧‧‧介電層
170、190‧‧‧再分配層
180‧‧‧焊料終止材料

Claims (16)

  1. 一種用於在模製複合物內形成三維結構之方法，該方法包含以下步驟：於一基材上藉由一增層法形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及於該至少一個被動結構及該等一或多個積體電路晶片上引入一模製複合物，其中該增層法包含於該基材上重複沉積一層導電粉末，選擇性地熔融於該沉積層中之該導電粉末，及將該未被熔融之粉末移除。
  2. 如請求項1之方法，其中該基材包含一犧牲基材，且在引入該模製複合物之後，該方法包含移除該犧牲基材。
  3. 如請求項2之方法，其中該至少一個被動結構及該等一或多個積體電路晶片中之每一者包含接觸點，且移除該犧牲基材會使該等接觸點曝露，該方法進一步包含：將一再分配層耦接至該等接觸點。
  4. 如請求項1之方法，其中引入該等一或多個晶片包含將該等一或多個晶片之接觸點耦接至該基材之接觸點。
  5. 如請求項4之方法，其中該等一或多個晶片係經由焊料連接而耦接至該基材。
  6. 如請求項4之方法，其中於該基材上形成該至少一個被動結構包含將該至少一個被動結構耦接至該基材之各別的一或多個接觸點。
  7. 如請求項1之方法，其中該至少一個被動結構包含一線圈。
  8. 如請求項1之方法，其中該至少一個被動結構包含一天線、一電阻器或一屏蔽件其中之至少一者。
  9. 一種藉由如請求項1至8項之任一項之方法製造的封裝基材。
  10. 一種用於在模製複合物內形成三維結構之方法，該方法包含以下步驟：於一基材上藉由一三維列印程序形成至少一個被動結構；於該基材上引入一或多個積體電路晶片；以及將該至少一個被動結構及該等一或多個積體電路晶片嵌入至一模製複合物中，其中該三維列印程序包含於該基材上重複沉積一層導電粉末，選擇性地熔融於該沉積層中之該導電粉末，及將該未被熔融之粉末移除。
  11. 如請求項10之方法，其中該基材包含一犧牲基材，且在將該至少一個被動結構及該等一或多個積體電路嵌入至該模製複合物中之後，該方法包含移除該犧牲基材。
  12. 如請求項11之方法，其中該至少一個被動結構及該等一或多個積體電路晶片中之每一者包含接觸點，且移除該犧牲基材會使該等接觸點曝露，該方法進一步包含：將一金屬化層耦接至該等接觸點。
  13. 如請求項10之方法，其中引入該等一或多個晶片包含將 該等一或多個晶片之接觸點耦接至該基材之接觸點。
  14. 如請求項13之方法，其中該等一或多個晶片係經由焊料連接而耦接至該基材。
  15. 如請求項13之方法，其中於該基材上形成該至少一個被動結構包含將該至少一個被動結構耦接至該基材之各別的一或多個接觸點。
  16. 一種藉由如請求項10至15項之任一項之方法製造的封裝基材。
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