TWI616764B - 系統晶片上記憶體電路及邏輯電路的佈局 - Google Patents

系統晶片上記憶體電路及邏輯電路的佈局 Download PDF

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Publication number
TWI616764B
TWI616764B TW101143703A TW101143703A TWI616764B TW I616764 B TWI616764 B TW I616764B TW 101143703 A TW101143703 A TW 101143703A TW 101143703 A TW101143703 A TW 101143703A TW I616764 B TWI616764 B TW I616764B
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TW
Taiwan
Prior art keywords
circuits
memory
memory circuits
logic
die
Prior art date
Application number
TW101143703A
Other languages
English (en)
Chinese (zh)
Other versions
TW201324221A (zh
Inventor
喬瑟夫 荷特
羅伊 邁迪爾
布蘭登 古尼爾
史考特Ｂ 安德森
Original Assignee
邁威爾世界貿易有限公司
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Publication date
Application filed by 邁威爾世界貿易有限公司 filed Critical 邁威爾世界貿易有限公司
Publication of TW201324221A publication Critical patent/TW201324221A/zh
Application granted granted Critical
Publication of TWI616764B publication Critical patent/TWI616764B/zh

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Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/02—System on chip [SoC] design
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)
TW101143703A 2011-11-22 2012-11-22 系統晶片上記憶體電路及邏輯電路的佈局 TWI616764B (zh)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201161563001P 2011-11-22 2011-11-22
US61/563,001 2011-11-22
US13/680,530 US8902625B2 (en) 2011-11-22 2012-11-19 Layouts for memory and logic circuits in a system-on-chip
US13/680,530 2012-11-19

Publications (2)

Publication Number Publication Date
TW201324221A TW201324221A (zh) 2013-06-16
TWI616764B true TWI616764B (zh) 2018-03-01

Family

ID=48426797

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101143703A TWI616764B (zh) 2011-11-22 2012-11-22 系統晶片上記憶體電路及邏輯電路的佈局

Country Status (5)

Country Link
US (1) US8902625B2 (cg-RX-API-DMAC7.html)
JP (1) JP6257044B2 (cg-RX-API-DMAC7.html)
CN (1) CN103946848B (cg-RX-API-DMAC7.html)
TW (1) TWI616764B (cg-RX-API-DMAC7.html)
WO (1) WO2013078294A2 (cg-RX-API-DMAC7.html)

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JP5956964B2 (ja) * 2013-08-30 2016-07-27 株式会社東芝 半導体装置
TWI576852B (zh) * 2015-06-30 2017-04-01 宏碁股份有限公司 電子裝置及其固態硬碟的電源管理方法
CN105319964B (zh) * 2015-09-29 2018-06-22 上海新跃仪表厂 基于配置文件的运载火箭测试发射流程生成方法及系统
US11392748B2 (en) * 2018-09-28 2022-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit design using fuzzy machine learning
DE102019124928A1 (de) 2018-09-28 2020-04-02 Taiwan Semiconductor Manufacturing Company, Ltd. Integriertes schaltungsdesign unter verwendung von fuzzy-maschinenlernen
US12314116B2 (en) 2020-07-31 2025-05-27 Qualcomm Incorporated Systems and methods for adaptive power multiplexing

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TW200423404A (en) * 2003-04-29 2004-11-01 Faraday Tech Corp Integrated circuit with one metal layer for programming functionality of a logic operation module
TW200511035A (en) * 2003-08-19 2005-03-16 Sun Microsystems Inc Multi-core multi-thread processor crossbar architecture
TW200527207A (en) * 2003-08-19 2005-08-16 Sun Microsystems Inc Cache bank interface unit
TW200636466A (en) * 2004-12-27 2006-10-16 Intel Corp System and method for non-uniform cache in a multi-core processor
TW200743976A (en) * 2006-05-19 2007-12-01 Nat Applied Res Lab Nat Chip Implementation Ct Multi-project System-on-Chip platform and the design method thereof
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TW200933873A (en) * 2007-09-28 2009-08-01 Sun Microsystems Inc Proximity communication package for processor, cache and memory

Also Published As

Publication number Publication date
WO2013078294A3 (en) 2013-07-18
CN103946848B (zh) 2017-04-12
US20130128648A1 (en) 2013-05-23
WO2013078294A4 (en) 2013-09-06
TW201324221A (zh) 2013-06-16
US8902625B2 (en) 2014-12-02
JP6257044B2 (ja) 2018-01-10
JP2015502660A (ja) 2015-01-22
WO2013078294A2 (en) 2013-05-30
CN103946848A (zh) 2014-07-23

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