CN103946848B - 一种集成电路及其系统和方法 - Google Patents

一种集成电路及其系统和方法 Download PDF

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Publication number
CN103946848B
CN103946848B CN201280057348.3A CN201280057348A CN103946848B CN 103946848 B CN103946848 B CN 103946848B CN 201280057348 A CN201280057348 A CN 201280057348A CN 103946848 B CN103946848 B CN 103946848B
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CN
China
Prior art keywords
memory
circuits
logic
memory circuits
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
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CN201280057348.3A
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English (en)
Chinese (zh)
Other versions
CN103946848A (zh
Inventor
J·霍尔特
R·马德
B·格雷纳
S·B·安德森
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Mawier International Trade Co Ltd
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Mawier International Trade Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/39—Circuit design at the physical level
    • G06F30/392—Floor-planning or layout, e.g. partitioning or placement
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2115/00—Details relating to the type of the circuit
    • G06F2115/02—System on chip [SoC] design
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00—Computer-aided design [CAD]
    • G06F30/30—Circuit design
    • G06F30/32—Circuit design at the digital level
    • G06F30/327—Logic synthesis; Behaviour synthesis, e.g. mapping logic, HDL to netlist, high-level language to RTL or netlist
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B61/00—Magnetic memory devices, e.g. magnetoresistive RAM [MRAM] devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D89/00—Aspects of integrated devices not covered by groups H10D84/00 - H10D88/00
    • H10D89/10—Integrated device layouts

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Architecture (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)
CN201280057348.3A 2011-11-22 2012-11-21 一种集成电路及其系统和方法 Expired - Fee Related CN103946848B (zh)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201161563001P 2011-11-22 2011-11-22
US61/563,001 2011-11-22
US13/680,530 US8902625B2 (en) 2011-11-22 2012-11-19 Layouts for memory and logic circuits in a system-on-chip
US13/680,530 2012-11-19
PCT/US2012/066236 WO2013078294A2 (en) 2011-11-22 2012-11-21 Layouts for memory and logic circuits in a system-on-chip

Publications (2)

Publication Number Publication Date
CN103946848A CN103946848A (zh) 2014-07-23
CN103946848B true CN103946848B (zh) 2017-04-12

Family

ID=48426797

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201280057348.3A Expired - Fee Related CN103946848B (zh) 2011-11-22 2012-11-21 一种集成电路及其系统和方法

Country Status (5)

Country Link
US (1) US8902625B2 (cg-RX-API-DMAC7.html)
JP (1) JP6257044B2 (cg-RX-API-DMAC7.html)
CN (1) CN103946848B (cg-RX-API-DMAC7.html)
TW (1) TWI616764B (cg-RX-API-DMAC7.html)
WO (1) WO2013078294A2 (cg-RX-API-DMAC7.html)

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JP5956964B2 (ja) * 2013-08-30 2016-07-27 株式会社東芝 半導体装置
TWI576852B (zh) * 2015-06-30 2017-04-01 宏碁股份有限公司 電子裝置及其固態硬碟的電源管理方法
CN105319964B (zh) * 2015-09-29 2018-06-22 上海新跃仪表厂 基于配置文件的运载火箭测试发射流程生成方法及系统
US11392748B2 (en) * 2018-09-28 2022-07-19 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit design using fuzzy machine learning
DE102019124928A1 (de) 2018-09-28 2020-04-02 Taiwan Semiconductor Manufacturing Company, Ltd. Integriertes schaltungsdesign unter verwendung von fuzzy-maschinenlernen
US12314116B2 (en) 2020-07-31 2025-05-27 Qualcomm Incorporated Systems and methods for adaptive power multiplexing

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CN1818912A (zh) * 2005-02-11 2006-08-16 思尔芯(上海)信息科技有限公司 可扩展可重配置的原型系统及方法
CN101320707A (zh) * 2008-05-19 2008-12-10 深圳市国微电子股份有限公司 结构化专用集成电路设置和生产方法

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US6605962B2 (en) * 2001-05-06 2003-08-12 Altera Corporation PLD architecture for flexible placement of IP function blocks
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US20050044320A1 (en) * 2003-08-19 2005-02-24 Sun Microsystems, Inc. Cache bank interface unit
JP2006156929A (ja) * 2004-04-19 2006-06-15 Fujitsu Ltd 半導体集積回路及びその設計方法
JP2006099719A (ja) * 2004-08-30 2006-04-13 Sanyo Electric Co Ltd 処理装置
US20060143384A1 (en) * 2004-12-27 2006-06-29 Hughes Christopher J System and method for non-uniform cache in a multi-core processor
JP2006323643A (ja) * 2005-05-19 2006-11-30 Nec Electronics Corp 半導体集積回路のフロアプラン設計プログラム、フロアプラン設計装置、および設計方法
JP2006324471A (ja) * 2005-05-19 2006-11-30 Toshiba Corp 半導体集積回路装置
TW200743976A (en) * 2006-05-19 2007-12-01 Nat Applied Res Lab Nat Chip Implementation Ct Multi-project System-on-Chip platform and the design method thereof
KR101297754B1 (ko) 2006-07-11 2013-08-26 삼성전자주식회사 메모리 컴파일링 시스템 및 컴파일링 방법
JP4951786B2 (ja) * 2007-05-10 2012-06-13 ルネサスエレクトロニクス株式会社 半導体記憶装置
JP5528662B2 (ja) * 2007-09-18 2014-06-25 ソニー株式会社 半導体集積回路
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JP5401699B2 (ja) * 2008-09-18 2014-01-29 ルネサスエレクトロニクス株式会社 半導体装置
KR101047059B1 (ko) 2009-10-30 2011-07-06 주식회사 하이닉스반도체 반도체 메모리 장치

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
US5892703A (en) * 1997-06-13 1999-04-06 Micron Technology, Inc, Memory architecture and decoder addressing
CN1818912A (zh) * 2005-02-11 2006-08-16 思尔芯(上海)信息科技有限公司 可扩展可重配置的原型系统及方法
CN101320707A (zh) * 2008-05-19 2008-12-10 深圳市国微电子股份有限公司 结构化专用集成电路设置和生产方法

Also Published As

Publication number Publication date
WO2013078294A3 (en) 2013-07-18
US20130128648A1 (en) 2013-05-23
WO2013078294A4 (en) 2013-09-06
TW201324221A (zh) 2013-06-16
TWI616764B (zh) 2018-03-01
US8902625B2 (en) 2014-12-02
JP6257044B2 (ja) 2018-01-10
JP2015502660A (ja) 2015-01-22
WO2013078294A2 (en) 2013-05-30
CN103946848A (zh) 2014-07-23

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