TWI556297B - 於介電層中形成導線的方法、半導體裝置的金屬化層與其積體電路 - Google Patents
於介電層中形成導線的方法、半導體裝置的金屬化層與其積體電路 Download PDFInfo
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Description
本揭示關於包括被嵌入於護套內的核心的導線(諸如互連線),尤其是包括展現相對低於該等護套的電阻率的核心之導線。
隨著積體電路特徵被縮小且密度增加,影響觀察到的電阻之材料性質(諸如電阻率)展現相對較明顯的效果。例如,隨著特徵大小下降,互連線延遲可超過閘極延遲且形成總裝置延遲的相對大部分。互連線延遲被理解是至少部份由電阻電容(resistive-capacitance)延遲所造成。電阻電容延遲或RC延遲被理解為作為電阻的函數之信號傳播的延遲,其部份取決於金屬導線組成的電阻率,且作為絕緣體電容的函數,其部份取決於層間介電層的介電係數。降低RC延遲的先前解決方案包括導線幾何最佳化。
此外,積體電路的可靠性受到隨著特徵大小
下降及密度增加而增加的數個應力所影響。這些應力包括電、熱、機械性及環境應力。電遷移為隨著特徵大小下降及功率密度增加而降低半導體可靠性、導致互連線失效、及變得相對較顯著之現象的實例。電遷移被理解為由於離子在導體中移動所造成的材料運送。電遷移可導致形成突起或孔洞於互連線中且最終導致失效。
為了降低電遷延、及其他應力引起的失效,耐火金屬已經被使用於互連線製造中。然而,耐火材料展現增加的電阻率且因此展現增加的電阻,提高電阻電容延遲。為了進一步降低電遷延、及其他應力引起的失效,擴散阻障層已經被沈積於含有互連線的層間介電層中的開口之側壁及底壁上。擴散阻障層被理解成佔用該互連導線的截面積的小部份(典型為20%或更低)。該互連線在給定介電層的表面所暴露的部分以諸如氮化矽的絕緣體加以塗佈。然而,此種配置可能不利地影響諸如電容的導線性質。
因此,隨著特徵大小繼續降低,仍然有空間改善互連線的設計,在一些例子中重點在互連線延遲及對各種應力的阻抗性,諸如那些導致電遷延及熱機械失效者。
102‧‧‧導線
103‧‧‧開口
104‧‧‧金屬化層
106‧‧‧核心
108‧‧‧護套
110‧‧‧外表面
112‧‧‧上表面
114‧‧‧上表面
116‧‧‧擴散阻障層
120‧‧‧壁
122‧‧‧底部
130‧‧‧第一金屬層
132‧‧‧第二開口
134‧‧‧覆蓋層
300‧‧‧方法
本揭示的以上提及與其他特徵、及實現它們的方式可藉由參照此處所述實施例配合隨附圖式的下列說明而變得較明顯且更好地理解,其中:
第1a圖示出複數個導線形成於層間介電層的開口中的實施例之第1b圖的橫剖面,其中該等導線包括核心及護套;第1b圖示出複數個導線形成於該層間介電層的開口中的該實施例之俯視圖;第2圖示出導線形成於層間介電層的開口中的實施例之橫剖面,具有擴散阻障層施加於該層間介電層與該導線間的開口中;第3圖示出沈積導線於包括核心及護套的基板中之方法的實施例;第4a圖示出在沈積導線於層間介電層中所形成之開口中以前的該層間介電層之實施例的橫剖面;第4b圖示出包括第一層的該護套材料的保角塗層之層間介電層的實施例之橫剖面;第4c圖示出在沈積及回焊形成該等導線核心的材料以後的層間介電層的實施例之橫剖面;第4d圖示出在沈積該護套材料的其餘部份以後的層間介電層的實施例之橫剖面;及第4e圖示出在平坦化該護套材料以後的層間介電層(暴露該層間介電層的表面)的實施例之橫剖面;第5圖示出針對具有相同直徑的銅核心及鈷之導線電阻對導線長度的實例;第6圖示出具有從A)鈷護套及銅核心;B)鈷;及C)銅所形成之各種直徑的導線之最大電流密度的實例;
第7圖示出包括核心及護套的層間介電層中所形成之導線的實施例之橫剖面的透射電子顯微鏡影像;第8圖示出包括核心及護套的層間介電層中所形成之導線的實施例之橫剖面的電子分散光譜法影像。
本揭示針對形成包括被形成於護套內的核心之互連導線。該核心展現相對低於該護套的電阻率,其提供擴散阻障及反散射性質,即,在核心表面的電子散射。如以上所提到,隨著積體電路被縮小,某些材料性質(諸如電阻率)展現相對較明顯的效果。例如,互連線延遲可超過閘極延遲且形成總裝置延遲的相對大部分。互連線或互連導線(此處也稱為導線)可被理解成例如積體電路上的組件間的連線。組件包括例如電晶體、二極體、電源、電阻器、電容器、電感器、感測器、收發器、接收器、天線等。互連線延遲被理解是至少部份由電阻電容延遲或RC延遲所造成(信號由於互連線材料的電阻電容效應所造成之延遲)。電阻電容延遲可藉由使用較低電阻率的互連線材料加以降低。此外,材料性質及電流密度影響電遷延,其被理解為由於離子在導體中移動所造成的材料運送。電遷移可導致孔洞或突起形成於互連線中造成失效。本揭示針對提供降低RC延遲以及使用導線的電遷移之導線以及形成此處所述的此種導線之方法。
第1a及1b圖示出的實施例包括複數個導線
102(諸如互連線)形成於金屬化層104(諸如層間介電層)的開口103中。開口103具有長度、寬度及高度且呈現數個橫剖面幾何形狀,諸如U形通道、v形通道等。該金屬化層包括介電材料,其被理解是一種材料,其為絕緣體但在施加電場時被偏極化。在實施例中,該介電質包括低k介電質,那就是,具低於3.9(二氧化矽的介電常數)的介電常數之材料,包括從1.5至3.8的所有值及範圍,例如1.7、1.9、2.1、2.8、2.7等。該介電材料可自其選擇的非限制性實例包括氟摻雜的二氧化矽、碳摻雜的二氧化矽、有機矽酸鹽玻璃、碳氧化矽、氫化碳氧化矽、多孔二氧化矽、以及諸如聚醯亞胺、聚四氟乙烯、聚降冰片烯、苯環丁烯、氫化半矽氧烷(hydrogen silsequioxane)及甲基半矽氧烷(methylsilsesquioxane)的有機聚合物介電質。該金屬化層可具有50nm至300nm範圍中的厚度,包括其中的所有值及範圍,諸如50nm至100nm、50nm至200nm等。
導線102包括第一材料的核心106,該核心被第二材料的護套108圍繞。在實施例中,金屬化層104中的開口103的寬度W以及因此導線102可處於5nm至100nm的範圍中,包括其中的所有值及範圍,諸如10nm、20nm、25nm、30nm、35nm、40nm、45nm、50nm等。開口103的高度H以及因此導線102可處於10nm至200nm的範圍中,包括其中的所有值及範圍,諸如10nm、20nm、25nm、30nm、35nm、40nm、45nm、
50nm等。該等導線的長度L(見第1b圖)可能範圍從次微米至數個微米,包括從0.01μm至5.0μm的所有值及範圍,諸如0.05μm、0.1μm、1μm、2μm。
儘管該導線幾何形狀被示出為大致正方形或矩形且具有相對尖的角,該導線幾何形狀可為圓形、橢圓形、或展現不同半徑的圓角。此外,該核心幾何形狀可能不同於該護套幾何形狀。例如,該核心可為矩形且該護套可為正方形或者該核心可為正方形且該護套為矩形。若該護套及核心展現類似的幾何形狀,護套幾何形狀的長寬比可能相同於或不同於該核心幾何形狀的長寬比。此外,該核心可相對於該導線的橫剖面被置中或者偏移。
如所示,護套108圍繞核心材料106的外表面110,接觸導線核心106的側面。護套108存在於金屬化層104與核心106之間、以及在導線102的上表面114(此處該特定金屬化層的介電材料不存在)。在實施例中,經由護套與核心材料的互擴散(inter-diffusion)或者由於護套與核心材料間的化學黏合,護套108黏合至核心106的外表面110。護套108佔用導線102的體積的25%至75%,包括其中的所有值及範圍,諸如導線102的體積的50%至75%。並且,該核心佔用導線102的體積的25%至75%,包括其中的所有值及範圍,諸如導線102的體積的25%至50%。
在實施例中,護套108佔用導線102的截面積的25%或更高,包括從25%至75%的所有值及範圍,且
尤其是50%至75%等。截面積係垂直於該導線的長度L、或該導線展現如第1a及1b圖所示之最大尺寸的其他方面(長度、寬度或高度)加以測量。核心106佔用導線102的截面積75%或更低,包括從25%至75%的所有值及範圍,且尤其是25%至50%。此外,如所示,核心106被設置低於金屬化層104的台面或上表面112下,其中距離D存在於核心106的上表面114與金屬化層104的上表面112之間。距離D可能為導線102的整個高度H的最多40%,包括從1%至40%、5%至30%、10至20%等的所有值及範圍,其中D=x*H,其中x為從0.01至0.40。
在實施例中,該核心材料展現4.0μΩ‧cm或更低的電阻率ρ1,包括從1.0μΩ‧cm至4.0μΩ‧cm的所有值及範圍,諸如1.7、2.7等。該護套材料展現5.0μΩ‧cm或更高的電阻率ρ2,包括從5.0μΩ‧cm至8.0μΩ‧cm的所有值及範圍。因此,形成該等導線核心的材料展現低於形成該等導線護套的材料的電阻率,其中ρ1<ρ2,ρ1為該核心材料的電阻率,且ρ2為該護套材料的電阻率。該核心材料也展現相對低於該護套材料的熔化溫度,其中T1<T2,T1為該核心材料的熔化溫度,且T2為該護套材料的熔化溫度。在實施例中,T1可為低於T2至少300℃,其中T2-X=T1,其中x處於300℃至2800℃的範圍中。
例如,該核心材料為一種金屬且包括銅、鋁、金、銀或包括這些元素的一或更多者的合金。該護套材料也為一種金屬且包括例如鎢、鈷、釕、鉬或包括這些
元素的一或更多者的合金。在特定實施例中,該核心材料包括銅或其合金且該護套材料排除銅,即,非含有銅。
如第2圖的實施例中所示,任選的擴散阻障層116被設置於導線102與金屬化層104之間。因此,該擴散阻障層被沈積於金屬化層104中的開口103的壁120及底部122上。擴散阻障層116可被理解成降低或防止該導線材料擴散至該層間介電層中的一層材料。該擴散阻障層具有在5nm至10nm範圍中的厚度,包括其中的所有值及範圍。擴散阻障層材料的實例包括下列的一或更多者:鉭、氮化鉭、鈷合金、及氮化鎢。在實施例中,該等材料展現高於該等護套材料的電阻率,諸如10μΩ‧cm或更高,諸如在10μΩ‧cm至300μΩ‧cm的範圍中。如以上所提到,護套108圍繞導線102橫剖面的整個外圍,而擴散阻障層116被設置於接觸該介電層的該導線之側面,包括開口103的側壁120及底部122。此外,擴散阻障層116佔用開口103的截面積的10%或更低,包括其中的所有值及範圍,諸如1%至5%等。
第3圖示出一種提供此處所述導線的方法之實施例且第4a至4e圖示出隨著第3圖中所示方法進行的導線生長。參照第3圖,方法300包括圖案化金屬化層(諸如層間介電層)及形成開口於金屬化層中302。
在實施例中,圖案化包括沈積光阻於該金屬化層之上。該光阻為正或負光阻且可包括例如聚(甲基丙烯酸甲酯)、聚(甲基戊二酸醯亞胺)、DNQ/酚醛清
漆、或SU-8(環氧基的負光阻)。該光阻藉由塗佈程序加以沈積,諸如例如旋塗。旋塗可能以1至10,000rpm(包括其中的所有值及範圍)施行1秒至10秒範圍中的一段時間(包括其中的所有值及範圍)。
該光阻接著藉由使用光微影光學投射所需圖案的影像至該光阻上來加以圖案化,諸如光學光微影、浸漬光微影、深UV微影、極UV微影、或其他技術,其中投射光的波長可能為最多436nm,包括從157nm至436nm的所有值及範圍,諸如157nm、193nm、248nm等。諸如0.1N至0.3N範圍中濃度的氫氧化四甲銨TMAH(具有或沒有表面活性劑)顯影劑被施加至該光阻,諸如藉由旋塗,且該光阻的部分被移除以暴露下層介電層關連於所需圖案的區。
在實施例中,該介電層的烘烤可發生在以上步驟的任一者以前或以後。例如,該金屬化層可在200℃至400℃範圍中的溫度(包括其中的所有值及範圍)被預烤30至60分鐘的時間(包括其中的所有值及範圍)以移除表面水。在施加該光阻以後,後施加烘烤可能發生,其中該光阻中的溶劑的至少一部分被趕走。後施加烘烤為例如在70℃至140℃範圍中的溫度(包括其中的所有值及範圍)施行60秒至240秒範圍中的一段時間(包括其中的所有值及範圍)。在圖案化以後,該光阻可在100℃至300℃範圍中的溫度(包括其中的所有值及範圍)被硬烘烤1分鐘至10分鐘的一段時間(包括其中的所有值及範
圍)。
該金屬化層的已暴露部分被化學蝕刻,其中該表面的已暴露部分被移除直到所需深度被達成,形成開口於該金屬化層中。剩餘的光阻透過諸如灰化的程序加以選擇性移除,其中該光阻被暴露至氧或氟,其與該光阻結合以形成灰。第4a圖示出包括表面112中所形成的一或更多開口103的已圖案化金屬化層104之實施例。
再次參照第3圖,在圖案化該金屬化層以後,第一層的該金屬(形成該護套接觸該等側壁的底部及下部分的部分)被沈積至開口中304。在實施例中,該第一層的護套材料藉由保角塗佈程序加以沈積,其中該第一金屬被沈積於該金屬化層的任何已暴露表面上,包括在該金屬化層中所形成之任何開口的側壁及底部上。保角塗層可因此被理解為被施加至該金屬化層的已暴露表面且例如不只是該等水平表面的塗層。在實施例中,該塗層展現低於35%的厚度變化,包括從1%至35%的所有值及範圍,諸如10%或更低、15%或更低、20%或更低、25%或更低等。該保角塗佈程序選自諸如化學氣相沈積或原子層沈積的程序。在化學氣相沈積中,例如一或更多反應性氣體以1至50sccm的流率提供於包括該介電層的腔室中,包括其中的所有值及範圍。該反應性氣體可選自下列的一或更多者:有或無氫的四氟化鎢、有氫的五氯化鉬、六羰基鉬、六羰基鎢、雙(乙基環戊二烯基)釕(II)、雙(環戊二烯基)釕(II)、雙(五甲基環戊二烯基)釕
(II)、十二羰基三釕、八羰基二鈷、雙(環戊二烯基)鈷(II)、雙(乙基環戊二烯基)鈷(II)、雙(五甲基環戊二烯基)鈷(II)等。該反應性氣體可由諸如惰性氣體(其可包括例如氬氣)的載氣加以提供。
該腔室被維持在大氣壓力、低壓(次大氣壓,即,1×10-1torr至1×10-6torr)或超高真空(1×10-7torr至1×10-8torr)。在實施例中,該腔室被維持在10-1至10-3torr範圍中的壓力(包括其中的所有值及範圍)及20℃至500℃範圍中的溫度(包括其中的所有值及範圍)。該程序可在實施例中為電漿輔助程序,其中電極被提供於該處理室內且被用來離子化該等氣體,或電漿在該腔室的外部形成且該電漿接著被提供至該腔室。在該腔室中,一層的該金屬由於該氣體的反應被沈積於該介電層的表面上。第4b圖示出包括該第一層的該金屬的保角塗層130(形成護套108的一部分於該金屬化層的層間介電層的表面112之上,包括沿著開口103的壁120及底部122)之金屬化層104的實施例。此依次形成第二開口或特徵132,其在另外的步驟中容納該核心材料。
再次參照第3圖,在沈積該第一層的護套材料、形成該護套的一部分以後,該核心材料接著藉由氣相沈積程序加以沈積306,包括物理氣相沈積或化學氣相沈積。物理氣相沈積包括例如磁控濺鍍、蒸發沈積或電子束沈積。化學氣相沈積可藉由以上所述的程序加以施行。
物理氣相沈積的實例包括以5sccm至100
sccm範圍中的流率供應諸如氬氣的惰性氣體(包括其中的所有值及範圍)至處理室中,其被保持在1×10-1至1×10-7torr範圍中的壓力,包括其中的所有值及範圍。該處理室包括加工物(即,該介電質)及由銅或鋁所形成的金屬源(稱為靶材)。該金屬源由額定於0.1至50kW範圍中的DC電源所偏壓,包括其中的所有值及範圍。該加工物或該加工物被放置的工作台也可由額定於0.1至1.5kW範圍中的AC電源所偏壓,包括其中的所有值及範圍。由於位於該靶材附近或後面的磁鐵,電漿形成且被定位圍繞該靶材。該電漿轟擊該靶材隨著蒸汽濺射出金屬原子,其接著被沈積於該加工物上。該程序繼續1秒至100秒範圍的一段時間,包括其中的所有值及範圍,諸如5秒、10秒、30秒等以容許一層核心材料生長於該介電層表面上。
充足的核心材料被施加以僅部份充填由該等開口中沈積的該第一金屬層所形成之第二開口或特徵132,其中各個開口103的總體積的25%至75%以該核心材料充填,其餘在該程序的尾端以該護套材料充填。一旦該核心材料被沈積於該第一金屬層上,該核心材料接著被回焊308以使該核心材料流至該金屬化層的開口中及形成已回焊的核心材料。為了回焊該核心材料,該核心材料受到或暴露至200℃至1100℃範圍中的高溫,包括其中的所有值及範圍,諸如從200℃至800℃、300℃、500℃、800℃,由輻射、爐、燈、微波、或熱氣所施加。該核心
材料可被回焊1分鐘至100分鐘範圍中的一段時間,包括其中的所有值及範圍,諸如30分鐘、45分鐘等。第4c圖示出在回焊發生以後的核心材料之實施例。如所示,核心106部份充填第一金屬層130中所形成的第二開口132,使得核心106材料的上表面114低於金屬化層104的表面112。
再次參照第3圖,在該核心材料被沈積至該金屬化層上以後,在308額外的護套材料(即,第二層)被沈積至特徵132的未充填部分中,如第4d圖中所見。覆蓋層134被生長於金屬化層104及開口103的表面112之上以確保充填特徵132。該覆蓋層可被理解為該金屬化層的介電層表面上的過量材料且將稍後被移除。
在實施中,該第二層的該護套金屬藉由使用氣相沈積加以沈積。例如化學氣相沈積被採用,藉由使用以上針對形成該第一層的護套金屬的保角塗層於該等開口中所述的程序,或者物理氣相沈積可被採用,諸如藉由以上施加該核心材料至該金屬化層所述的程序(以以上所述的護套材料代替該靶材)。在特定實施例中,在充填該護套材料的其餘部份以前,該核心導線被任選地乾或濕清洗以從該核心材料表面移除氧化。此可藉由以離子化氣體濺鍍該核心材料或藉由化學蝕刻以移除任何已氧化材料來加以施行。
該金屬化層被接著平坦化310以移除該覆蓋層。在實施例中,平坦化藉由使用化學機械平坦化加以實
施,其可被理解為一種利用拋光表面、研磨劑及漿料以移除該覆蓋層及平坦化該金屬化層與導線的表片之程序。材料從該金屬化層移除直到該介電層表面被暴露。第4e圖示出平坦化以後的金屬化層104,其中覆蓋層被移除而暴露層間介電層表面112及護套108的一部分。
如以上所提及,該等金屬化層可被直接或間接沈積於基板上(諸如矽晶圓)形成積體電路。該積體電路為類比或數位電路。該積體電路可被使用於數個應用中,諸如微處理器、光電子、邏輯方塊、音訊放大器等。該積體電路可被採用作為用以執行電腦中的一或更多相關功能的部份晶片組。
如以上所提到,可影響可在導線上載送的電流量的因子包括跨越導線與電遷移的最大壓降。
跨越導線的最大壓降部份由導線電阻所支配,其受到該導線材料的電阻率所影響。第5圖示出長度25μm及100μm及250nm2截面積的鈷及銅核心導線的電阻之實例。該圖示出銅核心具有較低之每單位長度的電阻,其容許施加至較長的導線長度。
為了說明材料對最大電流密度的效應,第6
圖示出各種導線大小(直徑)的由鈷護套(A)圍繞的銅核心之估計的最大電流密度相較於相似導線大小的鈷(B)的最大電流密度與銅(C)的最大電流密度之實例。超過該最大電流密度可導致電遷移。如所示,藉由以鈷保護銅核心,該估計的最大電流密度相較於使用單獨銅導線被增加。
樣本依據此處的方法加以準備,其中包括層間介電層(碳摻雜的氧化物沈積於矽上)的金屬化層藉由使用193nm光微影加以圖案化形成數個開口於該層間介電層中。化學輔助的光阻透過在500rpm旋塗60秒加以沈積。在150℃的溫度預烤2分鐘期間以後,該光阻藉由使用193nm光加以圖案化。接著該基板在250℃的溫度再次烘烤5分鐘的一段時間。
鹼性顯影劑透過旋塗加以施加且該光阻的選定部分被移除。該光阻接著在在250℃的溫度被硬烘烤5分鐘的一段時間。該層間介電層的已暴露區藉由使用氟碳化合物電漿蝕刻2分鐘的一段時間、100℃的溫度及介於數毫托與數百毫托的壓力。在蝕刻以後,剩餘的光阻藉由暴露至氧電漿加以移除,該氧電漿與該光阻結合以形成灰。
在蝕刻以後,鈷(金屬1)藉由使用鈷前驅物雙(環戊二烯基)鈷(II)的化學氣相沈積而被沈積至該
層間介電層上。該程序在10Torr的壓力及200℃的溫度施行。前驅物以25sccm的流率引入。該系統於期間被維持在10-100Torr的壓力。該鈷沿著該等金屬化層開口的底部及側壁以及跨越該金屬化層的上表面或台面形成保角塗層,形成凹槽。
銅接著藉由物理氣相沈積(且尤其是磁控濺鍍)被沈積於該鈷上。接著藉由在300至400℃的溫度加熱已沈積的銅50秒至500秒的一段時間造成該銅回焊至該等凹槽中。已回焊的銅部份充填該凹槽使得高度差存在於該銅的上表面與該金屬化層的上表面之間。該等凹槽接著被完全充填且金屬覆蓋層藉由使用鈷透過用來形成該保角塗層的化學氣相沈積程序加以形成。化學機械平坦化接著被用來移除覆蓋層及使該等導線與該基板的上表面同水平。當必要時,在步驟之間,該基板被清洗以減少或移除氧化物及該表面上所形成的其他反應產物。
透射電子顯微鏡(TEM)及電子分散光譜法(EDS)在450kX的放大率、200kV的加速電壓及-1.0mm的工作距離對該樣本施行。第7圖示出該樣本所擷取的TEM影像(左下角的尺度為10nm)且第8圖示出該樣本所擷取的EDS影像(右下角的尺度為20nm)。如該等影像中所見,鈷(金屬1)完全圍繞該金屬化層中所形成之開口內的銅(金屬2)。
如以上實例中所見,此處的配置及方法提供導線電阻的降低,相較於單獨使用耐火金屬於相同幾何形
狀的導線中。隨著給定直徑的導線之長度增加,電阻的降低被改善。此外,該配置提供相對改善的最大電流密度及電子遷移性能,相較於該核心材料被單獨使用的例子。最大電流密度可被理解為可通過導體而沒有發生電遷移的最大可容許電流。在實施例中,該改善被預期到達一個數量及或更高。
本揭示的態樣關於一種形成導線於介電層中的方法。該方法包括形成第一開口於介電層中。在實施例中,該介電層展現低於3.9的介電常數且較佳地1.5至3.8的範圍中的介電常數。例如,該介電層包括選自由下列所組成之群組的一或更多材料:氟摻雜的二氧化矽、碳摻雜的二氧化矽、有機矽酸鹽玻璃、碳氧化矽、氫化碳氧化矽、多孔二氧化矽、以及諸如聚醯亞胺、聚四氟乙烯、聚降冰片烯、苯環丁烯、氫化半矽氧烷及甲基半矽氧烷的有機聚合物介電質。在以上實施例的任一者中,該等開口藉由光微影形成於該介電層中。
該方法也包括沈積第一層的護套材料的保角塗層於該介電層上且形成第二開口於該第一開口中。在以上實施例的任一者中,該保角塗層藉由化學氣相沈積加以形成。替代地或額外地,該保角塗層藉由使用原子層沈積加以形成。
該方法進一步包括沈積核心材料於該保角塗層上且回焊該核心材料,其中該核心材料部份充填該第二開口。在以上實施例的任一者中,該核心材料藉由使用物
理氣相沈積或化學氣相沈積加以沈積。
此外,該方法包括沈積第二層的該護套材料於該核心材料及該第一層的該護套材料之上,充填該第二開口及形成導線,其中該核心材料被該護套材料圍繞。在以上實施例的任一者中,該第二層的該護套材料藉由使用化學氣相沈積或物理氣相沈積加以沈積。
該護套材料展現第一電阻率ρ1且該核心材料展現第二電阻率ρ2且ρ2小於ρ1。在以上實施例的任一者中,該護套材料展現5.0μΩ‧cm或更高的電阻率。在以上實施例的任一者中,該核心材料展現4.0μΩ‧cm或更低的電阻率。例如,該核心材料包含銅且該護套材料排除銅。在以上實施例的任一者中,該核心材料展現第一熔化溫度且該護套材料展現第二熔化溫度,其中該第一熔化溫度小於該第二熔化溫度。在實例中,該核心材料包括選自由下列所組成之群組的一或更多金屬:銅、鋁、金及銀。在實例中該護套材料包括選自由下列所組成之群組的一或更多金屬:鎢、鈷、釕及鉬。
在以上實施例的任一者中,該第一開口界定體積且該護套材料以該體積的25%至75%的範圍存在。
在以上實施例的任一者中,該方法也包括形成該第二層的該護套材料的覆蓋層於該介電層的表面之上。該方法進一步包含平坦化該第二層的該護套材料直到該介電層的該表面被暴露。
在本揭示的另一態樣中,金屬化層被提供。
開口被界定於介電層中且導線位於該開口內。該導線包括被護套材料圍繞的核心材料,其中該護套材料展現第一電阻率ρ1且該核心材料展現第二電阻率ρ2且ρ2小於ρ1。此外,在實施例中,該護套材料以該開口之體積的25%至75%的範圍存在。
在實施例中,該金屬化層展現低於3.9的介電常數且較佳地1.5至3.8的範圍中的介電常數。該金屬化層包括例如選自由下列所組成之群組的一或更多材料:氟摻雜的二氧化矽、碳摻雜的二氧化矽、有機矽酸鹽玻璃、碳氧化矽、氫化碳氧化矽、多孔二氧化矽、以及諸如聚醯亞胺、聚四氟乙烯、聚降冰片烯、苯環丁烯、氫化半矽氧烷及甲基半矽氧烷的有機聚合物介電質。
在以上實施例的任一者中,該護套材料展現5.0μΩ‧cm或更高的電阻率、較佳地在5.0μΩ‧cm至8.0μΩ‧cm的範圍中,且該核心材料展現4.0μΩ‧cm或更低的電阻率、較佳地在1.0μΩ‧cm至4.0μΩ‧cm的範圍中。在以上實施例的任一者中,該核心材料展現第一熔化溫度且該護套材料展現第二熔化溫度,其中該第一熔化溫度小於該第二熔化溫度。例如,該核心材料包括選自由下列所組成之群組的一或更多金屬:銅、鋁、金及銀。例如,護套材料包括選自由下列所組成之群組的一或更多金屬:鎢、鈷、釕及鉬。在特定實施例中,該核心材料包含銅且該護套材料排除銅。
在實施例中,該金屬化層依據以上所述方法
之實施例的任一者加以準備。
在又一實施例中,本揭示關於一種積體電路,包括:一或更多介電層;界定於該等介電層各者中的複數個開口;及連接至關聯於該積體電路的一或更多組件的複數個導線。各個導線位於該等開口的一者內且該等導線包括被該護套材料圍繞的核心材料,其中該護套材料展現第一電阻率ρ1且該核心材料展現第二電阻率ρ2且ρ2小於ρ1。進一步而言,該護套材料以該開口之體積的25%至75%的範圍存在。
在實施例中,該積體電路的該(等)介電層展現低於3.9的介電常數且較佳地1.5至3.8的範圍中的介電常數。該(等)介電層包括例如選自由下列所組成之群組的一或更多材料:氟摻雜的二氧化矽、碳摻雜的二氧化矽、有機矽酸鹽玻璃、碳氧化矽、氫化碳氧化矽、多孔二氧化矽、以及諸如聚醯亞胺、聚四氟乙烯、聚降冰片烯、苯環丁烯、氫化半矽氧烷及甲基半矽氧烷的有機聚合物介電質。
在以上實施例的任一者中,該護套材料展現5.0μΩ‧cm或更高的電阻率、較佳地在5.0μΩ‧cm至8.0μΩ‧cm的範圍中,且該核心材料展現4.0μΩ‧cm或更低的電阻率、較佳地在1.0μΩ‧cm至4.0μΩ‧cm的範圍中。在以上實施例的任一者中,該核心材料展現第一熔化溫度且該護套材料展現第二熔化溫度,其中該第一熔化溫度小於該第二熔化溫度。例如,該核心材料包括選自由下列所組
成之群組的一或更多金屬:銅、鋁、金及銀。例如,護套材料包括選自由下列所組成之群組的一或更多金屬:鎢、鈷、釕及鉬。在特定實施例中,該核心材料包含銅且該護套材料排除銅。
在實施例中,該積體電路依據以上所述方法的任一者加以準備且包括依據以上所述實施例的任一者的金屬化層。
數個方法及實施例的前述說明已經為了例示之目的加以呈現。非意圖為窮舉性或限制申請專利範圍至所揭示的精確步驟及/或形式,且按照以上教導顯然許多修改及變化是可能的。意圖的是本發明的範圍由所附的申請專利範圍加以界定。
300‧‧‧方法
Claims (22)
- 一種於介電層中形成導線的方法,包含:形成第一開口於介電層中;沈積第一層的護套材料的保角塗層於該介電層上且形成第二開口於該第一開口中,其中該護套材料展現第一電阻率ρ1;沈積核心材料於該保角塗層上,其中該核心材料展現第二電阻率ρ2且ρ2小於ρ1;回焊該核心材料,其中該核心材料部份充填該第二開口;及沈積第二層的該護套材料於該核心材料及該第一層的該護套材料之上,充填該第二開口及形成導線,其中該核心材料被該護套材料圍繞。
- 如申請專利範圍第1項的方法,其中該第一開口界定體積且該護套材料以該體積的25%至75%的範圍存在。
- 如申請專利範圍第1項的方法,其中該第二層的該護套材料的覆蓋層(overburden)形成於該介電層的表面之上且該方法進一步包含平坦化該第二層的該護套材料直到該介電層的該表面被暴露。
- 如申請專利範圍第1項的方法,其中該等開口藉由光微影形成於該介電層中。
- 如申請專利範圍第1項的方法,其中該保角塗層藉由使用化學氣相沈積加以沈積。
- 如申請專利範圍第1項的方法,其中該核心材料藉由使用物理氣相沈積加以沈積。
- 如申請專利範圍第1項的方法,其中該核心材料包括選自由下列所組成之群組的一或更多金屬:銅、鋁、金及銀。
- 如申請專利範圍第1項的方法,其中該護套材料包括選自由下列所組成之群組的一或更多金屬:鎢、鈷、釕及鉬。
- 如申請專利範圍第1項的方法,其中該核心材料包含銅且該護套材料排除銅。
- 一種半導體裝置的金屬化層,包含:界定於介電層中的開口;及該開口內的互連線導線;其中:該互連線導線包括含有第一金屬的核心材料及含有第二金屬的護套材料;該護套材料展現第一電阻率ρ1且該核心材料展現第二電阻率ρ2且ρ2小於ρ1;及在該互連線導線的至少一部份的剖面中,該核心材料的整個週邊係被該護套材料所圍繞。
- 如申請專利範圍第10項的金屬化層,其中該護套材料以該開口之體積的25%至75%的範圍存在。
- 如申請專利範圍第10項的金屬化層,其中該介電層展現低於3.9的介電常數。
- 如申請專利範圍第11項的金屬化層,其中該介 電層展現1.5至3.8的範圍中的介電常數。
- 如申請專利範圍第10項的金屬化層,其中該介電層包括選自由下列所組成之群組的一或更多材料:氟摻雜的二氧化矽、碳摻雜的二氧化矽、有機矽酸鹽玻璃、碳氧化矽、氫化碳氧化矽、多孔二氧化矽、以及諸如聚醯亞胺、聚四氟乙烯、聚降冰片烯、苯環丁烯、氫化半矽氧烷(hydrogen silsequioxane)及甲基半矽氧烷(methylsilsesquioxane)的有機聚合物介電質。
- 如申請專利範圍第10項的金屬化層,其中該護套材料展現5.0μΩ‧cm或更高的電阻率。
- 如申請專利範圍第10項的金屬化層,其中該核心材料展現4.0μΩ‧cm或更低的電阻率。
- 如申請專利範圍第10項的金屬化層,其中該核心材料包括銅且該護套材料排除銅。
- 如申請專利範圍第10項的金屬化層,其中該核心材料展現第一熔化溫度且該護套材料展現第二熔化溫度,其中該第一熔化溫度小於該第二熔化溫度。
- 如申請專利範圍第10項的金屬化層,其中該核心材料包括選自由下列所組成之群組的一或更多金屬:銅、鋁、金及銀。
- 如申請專利範圍第10項的金屬化層,其中該護套材料包括選自由下列所組成之群組的一或更多金屬:鎢、鈷、釕及鉬。
- 如申請專利範圍第10項的金屬化層,其中該核 心材料為回焊的核心材料。
- 一種積體電路,包含:一或更多介電層;界定於該等介電層各者中的複數個開口;及連接至關聯於該積體電路的一或更多組件的複數個導線,其中各個導線位於該等開口的一者內且該等導線包括被該護套材料圍繞的核心材料,其中該護套材料展現第一電阻率ρ1且該核心材料展現第二電阻率ρ2且ρ2小於ρ1。
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US20230130273A1 (en) | 2023-04-27 |
US9691657B2 (en) | 2017-06-27 |
US20210020502A1 (en) | 2021-01-21 |
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TW201532130A (zh) | 2015-08-16 |
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SG10201803987PA (en) | 2018-06-28 |
CN105493243A (zh) | 2016-04-13 |
KR20220005643A (ko) | 2022-01-13 |
KR20160061962A (ko) | 2016-06-01 |
US9349636B2 (en) | 2016-05-24 |
EP3050081A4 (en) | 2017-05-10 |
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US11569126B2 (en) | 2023-01-31 |
US10832951B2 (en) | 2020-11-10 |
US20240112952A1 (en) | 2024-04-04 |
CN107731785A (zh) | 2018-02-23 |
KR102472898B1 (ko) | 2022-12-02 |
CN113809003A (zh) | 2021-12-17 |
KR20230006599A (ko) | 2023-01-10 |
US20150084198A1 (en) | 2015-03-26 |
EP3050081A1 (en) | 2016-08-03 |
CN107731785B (zh) | 2022-03-29 |
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