TWI550702B - Removal of wafer wafer recycling method - Google Patents

Removal of wafer wafer recycling method Download PDF

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Publication number
TWI550702B
TWI550702B TW101132517A TW101132517A TWI550702B TW I550702 B TWI550702 B TW I550702B TW 101132517 A TW101132517 A TW 101132517A TW 101132517 A TW101132517 A TW 101132517A TW I550702 B TWI550702 B TW I550702B
Authority
TW
Taiwan
Prior art keywords
wafer
oxide film
polishing
peeling
bonded
Prior art date
Application number
TW101132517A
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English (en)
Chinese (zh)
Other versions
TW201324603A (zh
Inventor
石塚徹
大久保裕司
佐佐木拓也
荒木亮
能登宣彥
Original Assignee
信越半導體股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 信越半導體股份有限公司 filed Critical 信越半導體股份有限公司
Publication of TW201324603A publication Critical patent/TW201324603A/zh
Application granted granted Critical
Publication of TWI550702B publication Critical patent/TWI550702B/zh

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Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/12Preparing bulk and homogeneous wafers
    • H10P90/16Preparing bulk and homogeneous wafers by reclaiming or re-processing
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00Cleaning of wafers, substrates or parts of devices
    • H10P70/50Cleaning of wafers, substrates or parts of devices characterised by the part to be cleaned
    • H10P70/54Cleaning of wafer edges
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19Preparing inhomogeneous wafers
    • H10P90/1904Preparing vertically inhomogeneous wafers
    • H10P90/1906Preparing SOI wafers
    • H10P90/1914Preparing SOI wafers using bonding
    • H10P90/1916Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10Isolation regions comprising dielectric materials
    • H10W10/181Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers

Landscapes

  • Mechanical Treatment Of Semiconductor (AREA)
  • Element Separation (AREA)
TW101132517A 2011-10-17 2012-09-06 Removal of wafer wafer recycling method TWI550702B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2011227893A JP5799740B2 (ja) 2011-10-17 2011-10-17 剥離ウェーハの再生加工方法

Publications (2)

Publication Number Publication Date
TW201324603A TW201324603A (zh) 2013-06-16
TWI550702B true TWI550702B (zh) 2016-09-21

Family

ID=48140536

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101132517A TWI550702B (zh) 2011-10-17 2012-09-06 Removal of wafer wafer recycling method

Country Status (7)

Country Link
US (1) US9496130B2 (https=)
EP (1) EP2770524B1 (https=)
JP (1) JP5799740B2 (https=)
KR (1) KR101905811B1 (https=)
CN (1) CN103875061B (https=)
TW (1) TWI550702B (https=)
WO (1) WO2013057865A1 (https=)

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JP5888286B2 (ja) * 2013-06-26 2016-03-16 信越半導体株式会社 貼り合わせウェーハの製造方法
JP6136786B2 (ja) * 2013-09-05 2017-05-31 信越半導体株式会社 貼り合わせウェーハの製造方法
JP6090184B2 (ja) * 2014-01-27 2017-03-08 信越半導体株式会社 半導体ウェーハの洗浄槽及び貼り合わせウェーハの製造方法
CN103794467A (zh) * 2014-02-21 2014-05-14 上海超硅半导体有限公司 一种薄硅片的重新利用方法
US20180033609A1 (en) * 2016-07-28 2018-02-01 QMAT, Inc. Removal of non-cleaved/non-transferred material from donor substrate
JP6772820B2 (ja) * 2016-12-22 2020-10-21 日亜化学工業株式会社 再生基板の製造方法及び発光素子の製造方法
JP6607207B2 (ja) * 2017-01-25 2019-11-20 信越半導体株式会社 貼り合わせsoiウェーハの製造方法
CN110620126A (zh) * 2019-09-26 2019-12-27 德淮半导体有限公司 图像传感器及其制造方法
KR20230154934A (ko) * 2021-03-09 2023-11-09 도쿄엘렉트론가부시키가이샤 적층 기판의 제조 방법 및 기판 처리 장치
CN113192823B (zh) * 2021-04-27 2022-06-21 麦斯克电子材料股份有限公司 一种soi键合工艺后衬底片的再生加工方法

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TW200603247A (en) * 2004-05-28 2006-01-16 Sumitomo Mitsubishi Silicon SOI substrate and method for manufacturing the same
TW201030830A (en) * 2009-02-12 2010-08-16 Soitec Silicon On Insulator Method for reclaiming a surface of a substrate
TW201131625A (en) * 2010-01-12 2011-09-16 Shinetsu Handotai Kk Bonded wafer manufacturing method

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JP3943782B2 (ja) * 1999-11-29 2007-07-11 信越半導体株式会社 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ
US6884696B2 (en) * 2001-07-17 2005-04-26 Shin-Etsu Handotai Co., Ltd. Method for producing bonding wafer
JP4415588B2 (ja) 2003-08-28 2010-02-17 株式会社Sumco 剥離ウェーハの再生処理方法
JP4474863B2 (ja) * 2003-08-28 2010-06-09 株式会社Sumco 剥離ウェーハの再生処理方法及び再生されたウェーハ
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JP2005079389A (ja) * 2003-09-01 2005-03-24 Sumitomo Mitsubishi Silicon Corp 貼り合わせウェーハの分離方法及びその分離用ボート
JP2005093869A (ja) 2003-09-19 2005-04-07 Mimasu Semiconductor Industry Co Ltd シリコンウエーハの再生方法及び再生ウエーハ
US7402520B2 (en) 2004-11-26 2008-07-22 Applied Materials, Inc. Edge removal of silicon-on-insulator transfer wafer
JP2006294737A (ja) * 2005-04-07 2006-10-26 Sumco Corp Soi基板の製造方法及びその製造における剥離ウェーハの再生処理方法。
JP4715470B2 (ja) * 2005-11-28 2011-07-06 株式会社Sumco 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ
JP5314838B2 (ja) * 2006-07-14 2013-10-16 信越半導体株式会社 剥離ウェーハを再利用する方法
FR2928775B1 (fr) * 2008-03-11 2011-12-09 Soitec Silicon On Insulator Procede de fabrication d'un substrat de type semiconducteur sur isolant
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JP5446160B2 (ja) 2008-07-31 2014-03-19 株式会社Sumco 再生シリコンウェーハの製造方法
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EP2246882B1 (en) * 2009-04-29 2015-03-04 Soitec Method for transferring a layer from a donor substrate onto a handle substrate
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JP5643509B2 (ja) * 2009-12-28 2014-12-17 信越化学工業株式会社 応力を低減したsos基板の製造方法
SG173283A1 (en) * 2010-01-26 2011-08-29 Semiconductor Energy Lab Method for manufacturing soi substrate
US9123529B2 (en) * 2011-06-21 2015-09-01 Semiconductor Energy Laboratory Co., Ltd. Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
TW200603247A (en) * 2004-05-28 2006-01-16 Sumitomo Mitsubishi Silicon SOI substrate and method for manufacturing the same
TW201030830A (en) * 2009-02-12 2010-08-16 Soitec Silicon On Insulator Method for reclaiming a surface of a substrate
TW201131625A (en) * 2010-01-12 2011-09-16 Shinetsu Handotai Kk Bonded wafer manufacturing method

Also Published As

Publication number Publication date
EP2770524A4 (en) 2015-07-22
US9496130B2 (en) 2016-11-15
JP5799740B2 (ja) 2015-10-28
CN103875061B (zh) 2016-07-06
KR101905811B1 (ko) 2018-10-08
EP2770524A1 (en) 2014-08-27
EP2770524B1 (en) 2017-09-27
US20140273400A1 (en) 2014-09-18
TW201324603A (zh) 2013-06-16
WO2013057865A1 (ja) 2013-04-25
CN103875061A (zh) 2014-06-18
JP2013089720A (ja) 2013-05-13
KR20140082701A (ko) 2014-07-02

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