TWI550702B - Removal of wafer wafer recycling method - Google Patents
Removal of wafer wafer recycling method Download PDFInfo
- Publication number
- TWI550702B TWI550702B TW101132517A TW101132517A TWI550702B TW I550702 B TWI550702 B TW I550702B TW 101132517 A TW101132517 A TW 101132517A TW 101132517 A TW101132517 A TW 101132517A TW I550702 B TWI550702 B TW I550702B
- Authority
- TW
- Taiwan
- Prior art keywords
- wafer
- oxide film
- polishing
- peeling
- bonded
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/12—Preparing bulk and homogeneous wafers
- H10P90/16—Preparing bulk and homogeneous wafers by reclaiming or re-processing
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P70/00—Cleaning of wafers, substrates or parts of devices
- H10P70/50—Cleaning of wafers, substrates or parts of devices characterised by the part to be cleaned
- H10P70/54—Cleaning of wafer edges
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
- H10P90/19—Preparing inhomogeneous wafers
- H10P90/1904—Preparing vertically inhomogeneous wafers
- H10P90/1906—Preparing SOI wafers
- H10P90/1914—Preparing SOI wafers using bonding
- H10P90/1916—Preparing SOI wafers using bonding with separation or delamination along an ion implanted layer, e.g. Smart-cut
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/10—Isolation regions comprising dielectric materials
- H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
- Element Separation (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011227893A JP5799740B2 (ja) | 2011-10-17 | 2011-10-17 | 剥離ウェーハの再生加工方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TW201324603A TW201324603A (zh) | 2013-06-16 |
| TWI550702B true TWI550702B (zh) | 2016-09-21 |
Family
ID=48140536
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW101132517A TWI550702B (zh) | 2011-10-17 | 2012-09-06 | Removal of wafer wafer recycling method |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US9496130B2 (https=) |
| EP (1) | EP2770524B1 (https=) |
| JP (1) | JP5799740B2 (https=) |
| KR (1) | KR101905811B1 (https=) |
| CN (1) | CN103875061B (https=) |
| TW (1) | TWI550702B (https=) |
| WO (1) | WO2013057865A1 (https=) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5888286B2 (ja) * | 2013-06-26 | 2016-03-16 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
| JP6136786B2 (ja) * | 2013-09-05 | 2017-05-31 | 信越半導体株式会社 | 貼り合わせウェーハの製造方法 |
| JP6090184B2 (ja) * | 2014-01-27 | 2017-03-08 | 信越半導体株式会社 | 半導体ウェーハの洗浄槽及び貼り合わせウェーハの製造方法 |
| CN103794467A (zh) * | 2014-02-21 | 2014-05-14 | 上海超硅半导体有限公司 | 一种薄硅片的重新利用方法 |
| US20180033609A1 (en) * | 2016-07-28 | 2018-02-01 | QMAT, Inc. | Removal of non-cleaved/non-transferred material from donor substrate |
| JP6772820B2 (ja) * | 2016-12-22 | 2020-10-21 | 日亜化学工業株式会社 | 再生基板の製造方法及び発光素子の製造方法 |
| JP6607207B2 (ja) * | 2017-01-25 | 2019-11-20 | 信越半導体株式会社 | 貼り合わせsoiウェーハの製造方法 |
| CN110620126A (zh) * | 2019-09-26 | 2019-12-27 | 德淮半导体有限公司 | 图像传感器及其制造方法 |
| KR20230154934A (ko) * | 2021-03-09 | 2023-11-09 | 도쿄엘렉트론가부시키가이샤 | 적층 기판의 제조 방법 및 기판 처리 장치 |
| CN113192823B (zh) * | 2021-04-27 | 2022-06-21 | 麦斯克电子材料股份有限公司 | 一种soi键合工艺后衬底片的再生加工方法 |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200603247A (en) * | 2004-05-28 | 2006-01-16 | Sumitomo Mitsubishi Silicon | SOI substrate and method for manufacturing the same |
| TW201030830A (en) * | 2009-02-12 | 2010-08-16 | Soitec Silicon On Insulator | Method for reclaiming a surface of a substrate |
| TW201131625A (en) * | 2010-01-12 | 2011-09-16 | Shinetsu Handotai Kk | Bonded wafer manufacturing method |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2681472B1 (fr) | 1991-09-18 | 1993-10-29 | Commissariat Energie Atomique | Procede de fabrication de films minces de materiau semiconducteur. |
| JP3500063B2 (ja) * | 1998-04-23 | 2004-02-23 | 信越半導体株式会社 | 剥離ウエーハを再利用する方法および再利用に供されるシリコンウエーハ |
| JP3943782B2 (ja) * | 1999-11-29 | 2007-07-11 | 信越半導体株式会社 | 剥離ウエーハの再生処理方法及び再生処理された剥離ウエーハ |
| US6884696B2 (en) * | 2001-07-17 | 2005-04-26 | Shin-Etsu Handotai Co., Ltd. | Method for producing bonding wafer |
| JP4415588B2 (ja) | 2003-08-28 | 2010-02-17 | 株式会社Sumco | 剥離ウェーハの再生処理方法 |
| JP4474863B2 (ja) * | 2003-08-28 | 2010-06-09 | 株式会社Sumco | 剥離ウェーハの再生処理方法及び再生されたウェーハ |
| JP4492054B2 (ja) * | 2003-08-28 | 2010-06-30 | 株式会社Sumco | 剥離ウェーハの再生処理方法及び再生されたウェーハ |
| JP2005079389A (ja) * | 2003-09-01 | 2005-03-24 | Sumitomo Mitsubishi Silicon Corp | 貼り合わせウェーハの分離方法及びその分離用ボート |
| JP2005093869A (ja) | 2003-09-19 | 2005-04-07 | Mimasu Semiconductor Industry Co Ltd | シリコンウエーハの再生方法及び再生ウエーハ |
| US7402520B2 (en) | 2004-11-26 | 2008-07-22 | Applied Materials, Inc. | Edge removal of silicon-on-insulator transfer wafer |
| JP2006294737A (ja) * | 2005-04-07 | 2006-10-26 | Sumco Corp | Soi基板の製造方法及びその製造における剥離ウェーハの再生処理方法。 |
| JP4715470B2 (ja) * | 2005-11-28 | 2011-07-06 | 株式会社Sumco | 剥離ウェーハの再生加工方法及びこの方法により再生加工された剥離ウェーハ |
| JP5314838B2 (ja) * | 2006-07-14 | 2013-10-16 | 信越半導体株式会社 | 剥離ウェーハを再利用する方法 |
| FR2928775B1 (fr) * | 2008-03-11 | 2011-12-09 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat de type semiconducteur sur isolant |
| EP2105957A3 (en) * | 2008-03-26 | 2011-01-19 | Semiconductor Energy Laboratory Co., Ltd. | Method for manufacturing soi substrate and method for manufacturing semiconductor device |
| JP5654206B2 (ja) * | 2008-03-26 | 2015-01-14 | 株式会社半導体エネルギー研究所 | Soi基板の作製方法及び該soi基板を用いた半導体装置 |
| JP5446160B2 (ja) | 2008-07-31 | 2014-03-19 | 株式会社Sumco | 再生シリコンウェーハの製造方法 |
| EP2213415A1 (en) * | 2009-01-29 | 2010-08-04 | S.O.I. TEC Silicon | Device for polishing the edge of a semiconductor substrate |
| EP2246882B1 (en) * | 2009-04-29 | 2015-03-04 | Soitec | Method for transferring a layer from a donor substrate onto a handle substrate |
| SG178179A1 (en) * | 2009-10-09 | 2012-03-29 | Semiconductor Energy Lab | Reprocessing method of semiconductor substrate, manufacturing method of reprocessed semiconductor substrate, and manufacturing method of soi substrate |
| FR2953988B1 (fr) * | 2009-12-11 | 2012-02-10 | S O I Tec Silicon On Insulator Tech | Procede de detourage d'un substrat chanfreine. |
| JP5643509B2 (ja) * | 2009-12-28 | 2014-12-17 | 信越化学工業株式会社 | 応力を低減したsos基板の製造方法 |
| SG173283A1 (en) * | 2010-01-26 | 2011-08-29 | Semiconductor Energy Lab | Method for manufacturing soi substrate |
| US9123529B2 (en) * | 2011-06-21 | 2015-09-01 | Semiconductor Energy Laboratory Co., Ltd. | Method for reprocessing semiconductor substrate, method for manufacturing reprocessed semiconductor substrate, and method for manufacturing SOI substrate |
-
2011
- 2011-10-17 JP JP2011227893A patent/JP5799740B2/ja active Active
-
2012
- 2012-08-29 CN CN201280050352.7A patent/CN103875061B/zh active Active
- 2012-08-29 EP EP12840892.9A patent/EP2770524B1/en active Active
- 2012-08-29 WO PCT/JP2012/005418 patent/WO2013057865A1/ja not_active Ceased
- 2012-08-29 US US14/349,133 patent/US9496130B2/en active Active
- 2012-08-29 KR KR1020147009921A patent/KR101905811B1/ko active Active
- 2012-09-06 TW TW101132517A patent/TWI550702B/zh active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200603247A (en) * | 2004-05-28 | 2006-01-16 | Sumitomo Mitsubishi Silicon | SOI substrate and method for manufacturing the same |
| TW201030830A (en) * | 2009-02-12 | 2010-08-16 | Soitec Silicon On Insulator | Method for reclaiming a surface of a substrate |
| TW201131625A (en) * | 2010-01-12 | 2011-09-16 | Shinetsu Handotai Kk | Bonded wafer manufacturing method |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2770524A4 (en) | 2015-07-22 |
| US9496130B2 (en) | 2016-11-15 |
| JP5799740B2 (ja) | 2015-10-28 |
| CN103875061B (zh) | 2016-07-06 |
| KR101905811B1 (ko) | 2018-10-08 |
| EP2770524A1 (en) | 2014-08-27 |
| EP2770524B1 (en) | 2017-09-27 |
| US20140273400A1 (en) | 2014-09-18 |
| TW201324603A (zh) | 2013-06-16 |
| WO2013057865A1 (ja) | 2013-04-25 |
| CN103875061A (zh) | 2014-06-18 |
| JP2013089720A (ja) | 2013-05-13 |
| KR20140082701A (ko) | 2014-07-02 |
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