TWI489523B - A stretchable form of single crystal silicon for high performance electronics on rubber substrates - Google Patents

Description

Single crystal germanium in an extendable form of high performance electronic components for use on rubber substrates

The present invention relates to a single crystal crucible in an extendable form of a high performance electronic component for use on a rubber substrate.

Since the first demonstration of a fully polymerized transistor printed in 1994, there has been a great interest in the potential new class of electronic systems that include flexible integrated electronic devices on plastic substrates. [Garnier, F., Hajlaoui, R., Yassar, A. and Srivastava, P., Science, Vol. 265, pp. 1684-1686] Recently, a large number of studies have been directed to the development of new flexible plastic electronic devices. Solutions of conductors, dielectrics, and semiconductor components can process materials. However, advances in the field of flexible electronic devices have not only been driven by the development of new solution-processable materials, but also by new device component geometries, high-efficiency devices and device component processing methods, and high-resolution patterns that can be applied to plastic substrates. Driven by technology. It is expected that such materials, device configurations and manufacturing methods will play a key role in the rapid emergence of new flexible integrated electronic devices, systems and circuits.

Interest in the field of flexible electronic devices is caused by several important advantages provided by this technology. First, the mechanical durability of the plastic substrate material provides an electronic device that is less susceptible to damage and/or less susceptible to degradation in electronic performance caused by mechanical stress. Second, the inherent flexibility of such substrate materials allows for their integration into many shapes, providing a large number of useful device configurations that are not available by conventional, sturdy electronic devices based on brittleness. Finally, the combination of solution processable component materials and plastic substrates makes it possible to manufacture continuous, high speed, printing techniques that can produce electronic devices at low cost over large substrate areas.

However, the design and manufacture of flexible electronic devices that exhibit good electronic performance present several significant challenges. First, well-developed methods for fabricating conventional germanium-based electronic devices are incompatible with most plastic materials. For example, conventional high quality inorganic semiconductor components such as single crystal germanium or germanium semiconductors are typically processed by growing a film at certain temperatures (> 1000 degrees Celsius) that significantly exceed the melting of most plastic substrates or Decomposition temperature. In addition, most inorganic semiconductors are substantially insoluble in suitable solvents that allow for solution based processing and delivery. Second, although many amorphous germanium, organic or hybrid organic-inorganic semiconductors are compatiblely incorporated into plastic substrates and can be processed at relatively low temperatures, such materials do not have the ability to provide products with good electronic performance. The electronic properties of bulk electronic devices. For example, thin film transistors having semiconductor elements fabricated from such materials exhibit field effect mobility that is about three orders of magnitude lower than complementary single crystal germanium based devices. As a result of these limitations, flexible electronic devices are currently limited to specific applications that do not require high performance, such as in switching elements for active matrix flat panel displays having non-emissive pixels and in light emitting diodes.

Advances have been made in expanding the electronic performance capabilities of integrated electronic devices on plastic substrates to extend their applicability to a wider range of electronic applications. For example, several new thin film transistor (TFT) designs have emerged that are compatible with processing on plastic substrate materials and exhibit significantly higher film transistors than amorphous germanium, organic or hybrid organic-inorganic semiconductor devices. Device performance characteristics. A class of higher performance flexible electronic devices are based on polycrystalline germanium thin film semiconductor devices fabricated by pulsed laser annealing of amorphous germanium films. While such flexible electronic devices provide enhanced device electronic performance characteristics, the use of pulsed laser annealing limits the ease of manufacture and flexibility of such devices, thereby significantly increasing cost. Another promising new and more efficient flexible electronic device is the use of solutions such as nanowires, nanobelts, nanoparticles and carbon nanotubes to process nanoscale materials as a number of macroelectronic and microelectronic devices. A device for active functional components.

The use of discrete single crystal nanowires or nanobelts has been evaluated as a possible means of providing a printable electronic device on a plastic substrate that exhibits enhanced device performance characteristics. Duan et al. describe a thin-film transistor design with a plurality of selectively oriented single crystal tantalum nanowires or CdS nanobelts as semiconductor channels [Duan, X., Niu, C, Sahl, V., Chen, J ., Parce, J., Empedocles, S. and Goldman, J., Nature, Vol. 425, pp. 274-278]. The authors report a manufacturing process that is said to be compatible with solution processing on a plastic substrate in which a single crystal tantalum nanowire or CdS nanobelt having a thickness of less than or equal to 150 nanometers is dispersed in solution. And it is assembled on the surface of a substrate using a flow direction alignment method to produce a semiconductor element of a thin film transistor. One of the optical micrographs provided by the authors suggests that the disclosed fabrication process produces a single layer of multiple nanowires or nanoribbons in substantially parallel orientation and spaced from about 500 nanometers to about 1000 nanometers. Although the authors report the relatively high intrinsic field effect mobility of individual nanowires or nanoribbons ( 119 cm ² V ^-1 s ^-1 ), but the total device field-effect mobility has recently been determined to be "about two orders of magnitude smaller" than the intrinsic field-effect mobility value reported by Duan et al. [Mitzi, DB, Kosbar, LL, Murray, CE, Copel, M. Afzali, A., Nature, page 428, pages 299-303]. The field effect mobility of this device is several orders of magnitude lower than that of the conventional single crystal inorganic thin film transistor, and may be due to alignment, tight packaging, and electricity using the method and device configuration disclosed by Duan et al. Contact the actual challenges in discrete nanowires or nanobelts.

Nanocrystalline crystal solutions have also been explored as precursors for polycrystalline inorganic semiconductor thin films as a means of providing printable electronic devices that exhibit higher device performance characteristics on plastic substrates. Ridley et al. disclose a solution processing process in which a cadmium selenide crystal crystal solution having a size of about 2 nanometers is processed at a plastic compatible temperature to provide a semiconductor element of a field effect transistor. [Rid Ley, BA, Nivi, B. and Jacobson, JM, Science, Vol. 286, 746-749 (1999)] The authors report a method in which low temperature grain growth in a cadmium selenide crystal solution is provided. A single crystal region containing hundreds of nanometer crystals. Although Ridley et al. report improved electronic properties relative to comparison devices having organic semiconductor components, device mobility achieved by such techniques ( The field effect mobility of the device of 1 cm ² V ^-1 s ^-1 ) is several orders of magnitude lower than that of the conventional single crystal inorganic thin film transistor. The limitation of field effect mobility achieved by Ridley et al.'s device configuration and fabrication methods may be due to electrical contact established between individual nanoparticles. In particular, the use of organic end groups to stabilize the nanocrystal solution and prevent agglomeration prevents the formation of good electrical contact between adjacent nanoparticles, which is necessary to provide high device field-effect mobility. of.

While Duan et al. and Ridley et al. provide methods for fabricating thin film transistors on plastic substrates, the device configurations described are those comprising mechanically rigid device components such as electrodes, semiconductors, and/or dielectrics. The use of a plastic substrate having good mechanical properties provides an electronic device that can operate in an extended or twisted orientation, however, such deformation is expected to create mechanical stress on the individual rigid transistor device components. This mechanical stress can cause damage to individual components, such as cracks, and can also degrade or interrupt electrical contact between device components.

In addition, the electronic substrate based on plastic substrates developed by Duan et al, Ridley et al. and others provide the necessary machinery for many important device applications, including flexible sensor arrays, electronic paper, and wearable electronic devices. The extensibility is not clear. While such teams have demonstrated electronic devices capable of withstanding deformation caused by deflection, such plastic substrate-based systems are unlikely to undergo considerable extension without damage, mechanical failure, or significant degradation in device performance. Thus, such systems are unlikely to withstand the deformation caused by expansion or compression, or the deformation required to conform to a surface that is highly undulating, such as a curved surface having a large radius of curvature.

As noted above, advances in the field of flexible electronic devices are expected to play a key role in several important new technologies and prior art. However, the success of such applications of flexible electronic device technology is highly dependent on new materials, device configurations, and integrated electronics used to fabricate good electronic, mechanical, and optical properties in flexure, deformation, and bending configurations. The continued development of commercially viable manufacturing routes for circuits and devices. In particular, high performance, mechanically extensible materials and device configurations that exhibit useful electronic and mechanical properties in an extended or collapsed configuration are required.

The present invention provides extendable semiconductors and extendable electronic devices, device components and circuits. As used herein, the term "extensible" means that the materials, structures, devices, and device components are capable of withstanding strain without cracking or mechanical failure. The extendable semiconductor and electronic devices of the present invention are extensible and, therefore, extend and/or compress at least to some extent without damage, mechanical failure, or significant degradation in device performance. The extensible semiconductor and electronic circuits of the present invention, which are preferred for certain applications, are flexible (except for being extensible) and are therefore capable of significantly elongating, flexing, bending or performing along one or more axes Other variants.

Useful extendable semiconductor and electronic devices of the present invention are capable of elongating, compressing, twisting, and/or expanding without mechanical failure. Additionally, the extendable semiconductor and electronic circuits of the present invention exhibit good electronic performance even when subjected to significant strain, such as greater than or equal to about 0.5%, preferably 1%, and most preferably 2% strain. Flexible extensible semiconductor and electronic devices, device components, and circuits also exhibit good electrical performance when in a flexed, bent, and/or deformed state. Because the extendable semiconductor components and extendable electronic devices, device components, and circuits of the present invention provide useful electronic properties and mechanical durability in device orientation for flexing, extending, compressing, or deforming, they are suitable for a wide range of device applications. And device configuration.

The extendable and/or flexible semiconductor of the present invention may also (as appropriate) be printable, and (as appropriate) may comprise a composite semiconductor component having an operatively associated with other structures, materials and/or device components A semiconductor structure (such as a dielectric material and layers, electrodes, and other semiconductor materials and layers). The present invention includes a wide range of extendable and/or flexible electronic and/or optoelectronic devices having extendable and/or flexible semiconductors including, but not limited to, transistors, diodes, light emitting diodes ( LED), organic light-emitting diodes (OLEDs), lasers, microelectromechanical devices and nanomechanical devices, microfluidic devices and nanofluid devices, memory devices, and system-level integrated electronic circuits (such as complementary logic circuits) ).

In one aspect, the present invention provides an extendable semiconductor component that provides useful functional properties when in a flexed, expanded, compressed, bent, and/or deformed state. As used herein, the expression "semiconductor element" and "semiconductor structure" are used equally herein and generally refer to any semiconductor material, composition or structure, and particularly include high quality single crystal and polycrystalline semiconductor, manufactured by high temperature processing. Semiconductor materials, doped semiconductor materials, organic and inorganic semiconductors, and composite semiconductor materials and structures having one or more additional semiconductor components and/or non-semiconductor components such as dielectric layers or materials and/or conductive layers or materials .

The extensible semiconductor component of the present invention comprises a flexible substrate having a support surface and a semiconductor structure having a curved inner surface (e.g., a curved inner surface provided by a curved configuration of the semiconductor structure). In this embodiment, at least a portion of the curved inner surface of the semiconductor structure is bonded to the support surface of the flexible substrate. An exemplary semiconductor structure having an inner surface of a curve useful in the present invention comprises a curved structure. As used herein, "curved structure" refers to a structure having a curved configuration resulting from the application of a force. The curved structure of the present invention may have one or more folded regions, raised regions, and/or recessed regions. For example, the curved structure useful in the present invention can be provided in a crimped configuration, a pleated configuration, a wavy configuration, and/or a wavy (ie, waveform) configuration.

A curved structure, such as an extensible curved semiconductor structure having a curved inner surface and an electronic circuit, can be combined with a flexible substrate such as a polymer and/or an elastic substrate in a configuration in which the curved structure is strained. In certain embodiments, the curved structure (such as a curved ribbon structure) is subjected to a strain of equal to or less than about 30%, and is subjected to strains equal to or less than about 10% in embodiments preferred for certain applications, And/or withstand strains equal to or less than about 1% in embodiments preferred for certain applications. In certain embodiments, the curved structure, such as a curved ribbon structure, is subjected to a strain selected from the range of from about 1% to about 30%.

In a useful embodiment, a semiconductor structure having a curved inner surface includes a transferable semiconductor component at least partially bonded to the support flexible substrate. As used herein, a "transferable semiconductor component" is a semiconductor structure that can be transferred from a donor surface to a receptor surface, for example, via deposition techniques, printing techniques, patterning techniques, and/or other material transfer methods. Transferable semiconductor components, composites, and devices useful in the present methods include, but are not limited to, printable semiconductor components.

Suitable flexible substrates include, but are not limited to, polymer substrates, plastic substrates, and/or elastic substrates. For example, in one embodiment, the invention comprises a transferable, and optionally a printable, semiconductor component that is transferred and bonded to a pre-strained elastomeric substrate. Useful transfer methods in this aspect of the invention include printing techniques such as contact printing or solution printing. Subsequent relaxation of the elastic substrate creates a strain on the transferable (as appropriate) printable semiconductor component, resulting in the formation of the inner surface of the curve (e.g., via bending and/or warping of the semiconductor component).

In some embodiments, a semiconductor component having a curved inner surface is fabricated (eg, as described above) and subsequently transferred from a flexible substrate used to create its curved surface to a different flexible substrate and is otherwise flexible The substrate is bonded. Useful embodiments of this aspect of the invention include a transferable and (as appropriate) printable semiconductor structure comprising curved semiconductor strips, wires, strips, discs, plates, cubes, columns or columns having curved inner surfaces The cylinder has a corrugated, ribbed and/or wavy configuration on the inner surface. However, the invention includes an extendable semiconductor wherein the semiconductor component is not provided to the flexible substrate via a printing member and/or wherein the semiconductor component is unprintable.

The present invention includes extendable semiconductors comprising a single semiconductor component having a curved inner surface supported by a single flexible substrate. Alternatively, the extendable semiconductor of the present invention comprises a plurality of extensible semiconductor elements having curved inner surfaces supported by a single flexible substrate. Embodiments of the invention include an array or pattern of extensible semiconductor elements having curved inner surfaces supported by a single flexible substrate. Optionally, the extendable semiconductor component in the array or pattern has a well defined, pre-selected physical size, location, and relative spatial orientation.

The invention also includes an extendable electronic device, device assembly and/or circuit comprising one or more extendable semiconductor structures, and additional integrated device components, such as electrical contacts, electrodes, conductive layers, dielectric layers, and/or Or an additional semiconductor layer (eg, doped layer, PN junction, etc.). In this embodiment, the extendable semiconductor structure and the additional integrated device components are operatively coupled to provide selected device functionality and are electrically or insulative to each other. In certain useful embodiments, at least a portion or all of the additional integrated device components (and the extendable semiconductor) have curved inner surfaces that are supported by the support surface of the flexible substrate. Supported and provided in a curved structure, such as a curved structure having a curled, wavy, ribbed and/or pleated configuration. The curved inner surface of the additional integrated device assembly and the extendable semiconductor can have substantially the same or different contour shapes. The present invention includes embodiments in which the extendable device components are interconnected via metal interconnects that exhibit substantial extensibility or metal interconnects that also have a wavy, wrinkled, curved, and/or raised configuration.

The curved inner surface configuration of the additional integrated device assembly is provided in certain embodiments by a generally curved structure of an electronic device such as a crimp, wave, rib, and/or wrinkle configuration. In such embodiments, the curved structure enables such devices to exhibit good electrical performance even when subjected to significant strain, such as maintaining electrical or insulating properties with a semiconductor component when in an extended, compressed, and/or curved configuration. . Extensible electronic circuits can be fabricated using techniques similar to those described herein for fabricating extensible semiconductor components. For example, in one embodiment, an extendable device component including an extendable semiconductor component is fabricated separately and then interconnected. Alternatively, a device comprising a semiconductor can be fabricated in a flat configuration and the resulting planar device can then be processed to provide a generally curved device structure having curved inner surfaces of some or all of the device components.

The present invention includes extendable electronic devices including a single electronic device having a curved inner surface supported by a single flexible substrate. Alternatively, the invention includes an array of extendable electronic devices comprising a plurality of extendable electronic devices or device components, each having a curved inner surface supported by a single flexible substrate. Alternatively, the extendable electronics in the array of devices of the present invention have well defined, pre-selected physical dimensions, locations, and relative spatial orientations.

In some embodiments of the invention, the curved inner surface of the semiconductor structure or electronic device is provided by a curved structure. The curved structure and curved inner surface of the semiconductor and/or electronic device of the present invention may have any contour shape that provides extensibility and/or flexibility, including but not limited to, at least one raised region, at least one recessed The region or at least one raised region is combined with one of the at least one recessed region as a characteristic contour shape. Contour shapes useful in the present invention include contour shapes that vary in one or two spatial dimensions. The use of a curved structure having an inner surface that exhibits a periodic or aperiodic profile shape in multiple spatial dimensions helps provide extension, compression, flexing, or the ability to extend in multiple directions including orthogonal directions. Other variants of extendable semiconductors and/or electronic devices.

Useful embodiments include curved inner surfaces provided by curved semiconductor structures and/or electronic devices having configurations including a plurality of raised and recessed regions, such as provided in a waveform configuration An alternating pattern of raised and recessed areas. In one embodiment, the curved inner surface of the extendable and/or flexible semiconductor component or electronic device, or (as appropriate) the entire cross-sectional component has a contoured shape characterized by a substantially periodic waveform or a substantially non-periodic waveform. In this context, the periodic waveform may comprise any two- or three-dimensional dimensional waveform including, but not limited to, one or more sine waves, square waves, Aries functions, Gaussian waveforms, Lorentzian waveforms, or the like. A combination of equal waveforms. In another embodiment, the curved inner surface of the semiconductor or electronic device, or (as appropriate) the entire cross-sectional assembly has a contoured shape comprised of a plurality of non-periodic warps having a large amplitude and width. In another embodiment, the curved inner surface of the semiconductor or electronic device, or (as appropriate) the entire cross-sectional assembly has a contour shape consisting of a periodic waveform and a plurality of non-periodic warps.

In one embodiment, the extendable semiconductor component or electronic device of the present invention comprises a curved structure, such as a curved ribbon having a periodic or aperiodic waveform configuration extending along at least a portion of its length and, optionally, the width. structure. By way of example, the present invention includes curved structures comprising a curved ribbon structure having a sinusoidal configuration with a period between about 1 micrometer and 100 micrometers and an amplitude between about 50 nanometers and about 5 micrometers. . The curved structure may be provided in other periodic waveform configurations, such as a square wave and/or a Gaussian waveform extending along at least a portion of the length and/or width of the structures. The extensible and flexible semiconductor component and the extendable electronic device comprising the curved strip structure are expandable and compressible along an axis extending along the length of the semiconductor strip, such as an axis extending along a first waveform of the inner surface of the curved surface. , curved and/or deformed, and (as appropriate) may expand, compress, bend and/or deform along one or more other axes, such as an axis extending along the curved structures and other directions of the inner surface of the curved surface.

In some embodiments, the configuration of the semiconductor structure and electronic device of this aspect of the invention may change when subjected to mechanical stress or when a force is applied. For example, the period and/or amplitude of a curved semiconductor structure and electronic device having a wavy or warped configuration may vary in response to applied mechanical stress and/or force. In some embodiments, the ability to modify the configuration provides for extensible semiconductor structures and electronic circuits to expand, compress, flex, deform, and/or bend without significant mechanical damage, cracking, or substantial electronic properties and/or The ability to reduce the performance of electronic devices.

The curved inner surface of the semiconductor structure and/or the extendable electronic device can be continuously bonded to the support surface (i.e., bonded at substantially all points (e.g., about 90%) along the inner surface of the curve). Alternatively, the curved inner surface of the semiconductor structure and/or the extendable electronic device can be intermittently bonded to the support surface, wherein the curved inner surface is bonded to the support surface at selected points along the inner surface of the curve. The invention includes an embodiment wherein a curved inner surface of the semiconductor structure or electronic device is bonded to the flexible substrate at discrete points, and between discrete bonding points between the inner surface and the flexible substrate The inner surface has a curved configuration. The present invention includes a curved semiconductor structure having an inner surface and an electronic device bonded to the flexible substrate at discrete points, wherein the discrete bonding points are not directly bonded to the flexible substrate The edges are isolated from each other.

In some flexible semiconductor and/or flexible electronic devices of the present invention, only the inner surface of the semiconductor structure or electronic device is provided in a curved configuration. Alternatively, the invention includes an extendable semiconductor and extendable electronic device provided in a curved configuration, wherein the entire cross-sectional assembly of the curved semiconductor structure or electronic device is provided in a curved configuration, such as a wave, wrinkles, ridges or curls Configuration. In such embodiments, the curved configuration extends through the entire thickness of at least a portion of the semiconductor structure or electronic device. For example, the extensible semiconductor of the present invention includes a curved semiconductor strip or strip having a wavy, wrinkled, warped, and/or crimped configuration. The invention also includes compositions or electronic devices in which the entire semiconductor structure or electronic device, or at least a majority of the semiconductor structure or electronic device, is provided in a curved configuration, such as a wavy, wrinkled or curved configuration.

In certain embodiments, the waveform, warp and/or extendable configuration provides a means of adjusting the suitability of the properties of the compositions, materials and devices of the present invention. For example, the mobility of a semiconductor and the nature of its contacts depend, at least in part, on strain. The spatially varying strain in the present invention helps to adjust the material and device properties in an advantageous manner. As another example, the spatially varying strain in the waveguide causes spatially varying refractive index properties (via the bounce effect), which may also be advantageously used for different types of grating couplers.

The bond between the inner surface of the extendable semiconductor structure and/or electronic device and the outer surface of the flexible substrate can be provided using any composition, structure or bonding mechanism that provides a mechanically useful system that is useful in mechanical use. The system should be able to withstand extension and/or compression displacement without mechanical failure or significant degradation of electronic properties and/or performance and (as appropriate) flexural displacement without mechanical failure or significant degradation of electronic properties and/or performance. The useful combination of the semiconductor structure and/or electronic device with the flexible substrate provides a mechanically stable structure that exhibits beneficial electronic properties when subjected to a variety of extension, compression, and/or flexing configurations or deformations. In an embodiment of this aspect of the invention, the bonding between at least a portion of the inner surface of the semiconductor structure and/or the electronic device and the outer surface of the flexible substrate is performed by the semiconductor structure or electronic device Covalent and/or non-covalent bonding between the outer surfaces of the flexible substrate is provided. Exemplary binding mechanisms useful in such structures include van der Waals interaction, dipole-dipole interaction, and/or hydrogen bonding between the semiconductor structure or electronic device and the outer surface of the flexible substrate. Interaction. The invention also includes embodiments in which bonding is provided by a bonded or laminated layer, coating or film between the semiconductor structure or electronic device and the outer surface of the flexible substrate. Useful bonding layers include, but are not limited to, metal layers, polymer layers, partially polymerized polymer precursor layers, and composite layers. The invention also includes the use of a flexible substrate having a chemically modified outer surface to facilitate, for example, a flexible substrate (such as a polymer substrate) and a semiconductor having a plurality of hydroxyl groups disposed on an outer surface thereof. A combination of components or electronic devices. The present invention includes flexible semiconductors and electronic circuits in which the semiconductor structure or electronic circuit is wholly or partially encapsulated in an encapsulation layer or coating, such as a polymeric layer.

The physical dimensions and compositions of the semiconductor structure or electronic device at least partially affect the overall mechanical and electronic properties of the extensible semiconductor component of the present invention. As used herein, the term "thin" means that a structure has a thickness of less than or equal to about 100 microns, and for some applications is preferably less than or equal to about 50 microns. The use of thin semiconductor structures or electronic devices such as thin semiconductor strips, small plates and strip or thin film transistors is important in certain embodiments to facilitate the formation of curved inner surfaces such as corrugated, curled or curved inner surfaces. Thereby providing a configuration that can be extended, shrunk and/or flexed without damage, mechanical failure or significant degradation of electronic properties. The use of thin semiconductor structures such as thin printable semiconductor structures and electronic devices is particularly useful for extensible semiconductors and extendable electronic devices comprising brittle semiconductor materials such as single crystal and/or polycrystalline inorganic semiconductors. In a useful embodiment, the semiconductor structure or electronic circuit has a width selected over a range of from about 1 micrometer to about 1 centimeter and a thickness selected from the range of from about 50 nanometers to about 50 micrometers.

The composition and physical dimensions of the support flexible substrate can also at least partially affect the overall mechanical properties of the extensible semiconductor component and the extendable electronic device of the present invention. Useful flexible substrates include, but are not limited to, flexible substrates having a thickness selected from the range of from about 0.1 mm to about 100 microns. In a useful embodiment, the flexible substrate comprises a poly(dimethyloxane) PDMS layer and has a thickness selected from the range of from about 0.1 mm to about 10 mm.

The invention also includes a partially processed extensible semiconductor component or a partially processed extensible semiconductor circuit. For example, in one embodiment, the invention includes a Si strip having a pn diode device thereon. A Si strip provided in a waveform configuration is optionally provided on a PDMS substrate. Interconnects are provided between the (insulated) diodes such that the diode output (e.g., photocurrent) can be amplified, such as by metal evaporation using a shadow mask. In one embodiment, a plurality of individual extendable transistors are fabricated on the elastomer. Individual transistors are wired in some manner (e.g., by shadow mask evaporation) to make other useful circuits, such as circuits composed of a number of transistors connected in a particular manner. For these conditions, the interconnecting wires are also extendable, so that we have fully extendable circuitry on the elastomer.

In another aspect, the present invention provides a method for fabricating an extensible semiconductor device comprising the steps of: (1) providing a transferable semiconductor structure having an inner surface; (2) providing a pre-strain in an expanded state An elastic substrate, wherein the elastic substrate has an outer surface; (3) bonding at least a portion of an inner surface of the transferable semiconductor structure to an outer surface of the pre-strained elastic substrate in an expanded state; and (4) allowing at least a portion of the elastic substrate The ground relaxes to a relaxed state in which the relaxation of the elastic substrate bends the inner surface of the transferable semiconductor structure, thereby producing an extendable semiconductor component having a curved inner surface. In some embodiments of this aspect of the invention, the pre-strained resilient substrate expands along a first axis and optionally expands along a second axis that is orthogonally positioned relative to the first axis. In a useful embodiment, the transferable semiconductor component provided to the pre-strained elastic substrate is a printable semiconductor component.

In another aspect, the invention provides a method for fabricating an extendable electronic circuit comprising the steps of: (1) providing a transferable electronic circuit having an inner surface; (2) providing an expanded state a pre-strained elastic substrate, wherein the elastic substrate has an outer surface; (3) combining at least a portion of an inner surface of the transferable electronic circuit with an outer surface of the pre-strained elastic substrate in an expanded state; and (4) allowing the The elastic substrate is at least partially relaxed to a relaxed state, wherein slack of the elastic substrate bends an inner surface of the electronic circuit to produce the extendable electronic circuit. In a useful embodiment, the transferable electronic circuit provided to the pre-strained flexible substrate is a printable electronic circuit, such as an electronic circuit that can be transferred via printing techniques, such as dry transfer contact printing. In some embodiments, an electronic circuit includes a plurality of integrated device components including, but not limited to, one or more semiconductor components (such as transferable and (as appropriate) printable semiconductor components), dielectric components , an electrode, a conductive element including a superconducting element, and a doped semiconductor element.

Optionally, the method of the aspect of the invention may further comprise the step of transferring the extendable semiconductor or the extendable electronic circuit from the supporting elastic substrate to a receiving substrate, the transferring manner at least partially retaining the semiconductor element or The curved inner surface and/or curved structure of the electronic circuit. The semiconductor structure or electronic circuit is transferred to a receiving substrate that is flexible, such as a polymer receiving substrate, or a receiving substrate comprising paper, metal or semiconductor. In this embodiment, the transferred extendable semiconductor or extendable electronic device can be combined with the receiving substrate (such as a flexible, polymer receiving substrate) via a wide range of means including, but not limited to, Adhesive and/or laminate layers, films and/or coatings are used, such as adhesive layers (eg, polyimide layers). Alternatively, the transferred extensible semiconductor or extensible electronic device can be hydrogen bonded, covalently bonded, dipole-dipole interaction and transferred between the transferred extensible semiconductor or extendable electronic device and the receiving substrate The Valli force interacts with a receiving substrate such as a flexible, polymer receiving substrate.

In one embodiment, after fabricating a curved semiconductor structure and/or electronic circuit having a wave, ridge, wrinkle or crimp configuration supported by an elastomeric substrate, the structure is formed using a suitable adhesive layer or coating. Transfer to another substrate. For example, in one embodiment, a corrugated photovoltaic device is fabricated on an elastomeric substrate and then transferred to a metal foil, for example, using polyimine as a subbing layer. Electrical connections are established between the photovoltaic devices and the underlying metal foil (which may act as one of the collectors, such as by patterning, etching to make vias to expose metal surfaces, metal deposits, etc.). The wavy surface of this configured photovoltaic device can be utilized to enhance light capture (or reduce light reflection). For example, to obtain better anti-reflection results, further processing can be performed on the wavy surface, such as to make the surface roughness much smaller than the wavelength of the wavy semiconductor. Briefly, some or all of the processed corrugated/curved semiconductor/circuit can be transferred to other substrates (not limited to PDMS), and further processing can be added to obtain more enhanced performance if necessary.

Alternatively, the method of the present invention may further comprise the step of encapsulating, covering or laminating the extensible semiconductor or extendable electronic device. In this context, the encapsulation, in the case of a layered rib structure, includes the geometry and configuration in which the encapsulation material is provided under the raised regions of the ridges to fully embed all sides of the rib structure. . Encapsulation also includes providing an encapsulation layer, such as a polymer layer, on top of the raised and unembossed features of the curved semiconductor structure or electronic circuit. In one embodiment, a prepolymer such as a PDMS prepolymer is cast and cured onto the extensible semiconductor or extendable electronic device. For some applications, the encapsulation or overlay processing steps help to enhance the mechanical stability and robustness of the extensible semiconductor and electronic devices of the present invention. The present invention includes expandable semiconductor and electronic devices that exhibit good mechanical and electrical performance when encapsulated, covered and/or laminated in extended, compressed, curved and/or flexed configurations.

Optionally, the method of this aspect of the invention includes assembling semiconductor components, device components, and/or on a donor substrate such as a polymer substrate (eg, a 2D ultra-thin polymer substrate) or an inorganic substrate (eg, SiO ₂ ). The steps of the functional device. In this embodiment, the structure assembled on the donor substrate is then transferred to a pre-strained elastomeric substrate to form an extensible material, device or device assembly. In an embodiment, a transistor, an array of transistors, or an electronic device having a transistor is first assembled on a donor substrate, such as via printing techniques using printable semiconductor components. Next, the entire device and/or array of devices is transferred to a pre-strained elastic substrate (eg, by contact printing) to form an extendable waveform and/or warp rib system. It is advantageous to fabricate device interconnects and fabricate actual size circuits on a thin, non-elastomeric material (like polythenimine or benzoquinone cyclobutene or PET, etc.) prior to transfer to the extensible elastomeric support. This method is useful. In such systems, aperiodic 2D waveforms or warped structures will be obtained in a combined transistor/polymer film/elastomer substrate system.

The method of pre-straining an elastic substrate useful in the method includes bending, crimping, flexing, and expanding the elastic substrate before and/or during contact and bonding with the semiconductor structure and/or the electronic device (eg, by Use a mechanical platform). One method that is particularly useful for one of the pre-strained elastomeric substrates in multiple directions involves thermally expanding the elastomeric substrate by increasing the temperature of the elastomeric substrate before and/or during contact with and in combination with the semiconductor structure and/or electronic device. In such embodiments, the relaxation of the elastic substrate is achieved by lowering the temperature of the flexible substrate after contact and/or bonding with the transferable and (as appropriate) printable semiconductor component or electronic device. In some methods, the elastic substrate is pre-strained by introducing a strain of from about 1% to about 30%.

As used herein, the expression "elastic substrate" refers to a substrate that can be extended or deformed and can be returned to its original shape without substantial permanent deformation. Elastomeric substrates typically undergo substantial elastic deformation. Exemplary elastic substrates useful in the present invention include, but are not limited to, elastomers and elastomers, composites or mixtures of elastomeric polymers and copolymers. In some methods, the resilient substrate is pre-strained via a mechanism that provides expansion of the elastomeric substrate along one or more spindles. For example, the pre-strain can be provided by expanding the elastic substrate along a first axis. However, the invention also includes a method of expanding the elastomeric substrate along a plurality of axes, such as via expansion of the first and second axes positioned orthogonally relative to one another. The means available in the method for pre-straining the elastic substrate via a mechanism that provides expansion of the elastic substrate includes bending, crimping, flexing, leveling, expanding, or otherwise deforming the elastic substrate. The present invention also includes means for providing pre-strain by increasing the temperature of the elastomeric substrate to provide thermal expansion of the elastomeric substrate.

The method of the present invention can also produce extensible elements, devices and device components from materials other than semiconductor materials. The present invention includes a method of transferring and bonding a non-semiconductor structure such as an insulator, a superconductor, and a semimetal to a pre-strained elastic substrate. Allowing at least partial relaxation of the elastic substrate results in the formation of an extensible non-semiconductor structure having a curved inner surface, such as a non-semiconductor structure having a corrugated and/or chamfered profile. This aspect of the invention includes an extendable non-semiconductor structure having a curved configuration such as a crimped configuration, a pleated configuration, a raised configuration, and/or an inner surface provided in a wave configuration and (as appropriate) )The outer surface.

Flexible substrates useful in the extensible semiconductor, electronic device and/or device assemblies of the present invention include, but are not limited to, polymer substrates and/or plastic substrates. An extensible semiconductor includes a composition comprising one or more transferable, (as appropriate) printable semiconductor structures, such as printable semiconductor components, supported by an elastomeric substrate that is pre-strained during fabrication to produce the semiconductor curve The inner surface. Alternatively, the extendable semiconductor comprises a composition comprising one or more transferable semiconductor structures, such as a printable semiconductor component, supported by a flexible substrate different from the elastic substrate pre-strained during fabrication to produce the semiconductor curve The inner surface. For example, the invention includes an extendable semiconductor in which a semiconductor structure having a curved inner surface is transferred from the flexible substrate to a different flexible substrate.

Referring to the drawings, like reference numerals indicate like elements and the In addition, in the following, the following definitions apply:

"Printable" relates to materials, structures, device components, and/or integrated functional devices that can be transferred, assembled, patterned, organized, and/or integrated onto or into a substrate. In one embodiment of the invention, printable materials, components, device components, and devices can be transferred, assembled, patterned, organized, and/or integrated onto or into a substrate via solution printing or dry transfer contact printing.

The "printable semiconductor component" of the present invention comprises a semiconductor structure that can be assembled (eg, using dry transfer contact printing and/or solution printing methods) and/or integrated onto the surface of the substrate. In one embodiment, the printable semiconductor component of the present invention is a unitary single crystalline, polycrystalline or microcrystalline inorganic semiconductor structure. In this context, the monolithic structure is a single element that is mechanically connected. The semiconductor component of the present invention can be undoped or doped, can have a selected spatial distribution of dopants, and can be doped with a plurality of different dopant materials of P and N-type dopants. The invention includes at least one microstructured printable semiconductor component having a cross-sectional dimension greater than or equal to about 1 micron and at least one nanostructure printable semiconductor component having a cross-sectional dimension of less than or equal to about 1 micrometer. Printable semiconductors useful in many applications include elements that are obtained by "top-down" processing of high purity bulk materials, such as high purity crystalline semiconductor wafers produced using conventional high temperature processing techniques. In one embodiment, the printable semiconductor component of the present invention comprises a composite structure having an operative connection to at least one additional device component or structure (such as a conductive layer, a dielectric layer, an electrode, an additional semiconductor structure, or any of these) Combined) semiconductor. In one embodiment, the printable semiconductor component of the present invention comprises an extendable semiconductor component and/or a heterogeneous semiconductor component.

"Sectional dimension" refers to the dimensions of the cross-section of the device, device component or material. Section dimensions include width, thickness, radius and diameter. For example, a semiconductor component having a strip shape is characterized by a length and two cross-sectional dimensions: thickness and width. For example, a printable semiconductor component having a cylindrical shape is characterized by a length and a cross-sectional dimension: diameter (or radius).

"Supported by a substrate" means a structure that is at least partially present on a substrate surface or at least partially present on one or more intermediate structures between the structure and the substrate surface. The term "supported by a substrate" may also refer to a structure that is partially or fully embedded in a substrate.

"Solution printing" is used to mean a process in which one or more structures, such as a printable semiconductor component, are dispersed into a carrier medium and delivered to selected areas of the substrate surface in a coordinated manner. In an exemplary solution printing method, the selected regions of the structure that are transferred to the surface of a substrate are achieved by methods that are independent of the morphology and/or physical properties of the surface of the substrate being patterned. Solution printing methods that can be used in the present invention include, but are not limited to, ink jet printing, thermal transfer printing, and capillary printing.

By "substantially longitudinally oriented" is meant an orientation that causes the direction of the longitudinal axis of a population of elements, such as a printable semiconductor component, to be substantially parallel to a selected alignment axis. In the context of this definition, substantially parallel to a selected axis means an orientation that is within 10 degrees of the absolute parallel direction, preferably an orientation that is within 5 degrees of the absolute parallel direction.

"Extensible" means the ability of a material, structure, device or device component to withstand strain without rupture. In an exemplary embodiment, an extensible material, structure, device, or device component can withstand greater than about 0.5% strain without cracking, and for some applications, can withstand greater than about 1% strain without cracking, and For some applications it is desirable to withstand strains greater than about 3% without cracking.

The terms "flexible" and "flexible" are used equally herein and mean that the material, structure, device or device component is deformed into a curved shape without being subjected to the ability to introduce significant strain transformations, such significant strains may be Strain such as the point of failure of a characterization of a material, structure, device, or device component. In an exemplary embodiment, the flexible material, structure, device, or device component can be deformed into a curved shape without introducing a strain greater than or equal to about 5%, and for some applications preferably does not introduce greater than or equal to about 1%. The strain, and for some applications, does not introduce a strain greater than or equal to about 0.5%.

The term "warping" refers to a physical deformation that occurs when a thin element, structure, and/or device is bent in response to a compressive strain by bending in a direction out of the plane of the element, structure, and/or device. The present invention includes an extensible semiconductor, device and assembly having one or more surfaces having a contoured shape comprising one or more ridges.

"Semiconductor" means any material that is an insulator at very low temperatures but has a significant electrical conductivity at about 300 absolute temperatures. In this context, the use of the term semiconductor is intended to be consistent with the use of this term in the art of microelectronics and electronic devices. Semiconductors suitable for use in the present invention may comprise elemental semiconductors such as germanium, antimony and diamond, as well as composite semiconductors such as Group IV composite semiconductors (such as SiC and SiGe), Group III-V semiconductors (such as AlSb, AlAs, Aln, AlP). , BN, GaSb, GaAs, GaN, GaP, InSb, InAs, InN, and InP), Group III-V ternary semiconductor alloys (such as Al _x Ga _1-x As), Group II-VI semiconductors (such as CsSe, CdS, CdTe, ZnO, ZnSe, ZnS, and ZnTe), Group I-VII semiconductor CuCl, Group IV-VI semiconductors (such as PbS, PbTe, and SnS), layer semiconductors (such as Pbl ₂ , M _o S _{2 ,} and GaSe) ), an oxide semiconductor such as CuO and Cu ₂ O. The term semiconductor includes exogenous semiconductors and intrinsic semiconductors (including semiconductors having p-type dopants and n-type dopants) doped with one or more selected materials to provide advantageous electronic properties suitable for a given application or device. The term semiconductor includes composite materials comprising a mixture of semiconductors and/or dopants. Specific semiconductor materials suitable for certain applications of the present invention include, but are not limited to, Si, Ge, SiC, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InP, InAs, GaSb, InP, InAs, InSb, ZnO, ZnSe, ZnTe, CdS, CdSe, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, PbS, PbSe, PbTe, AlGaAs, AlInAs, AlInP, GaAsP, GaInAs, GaInP, AlGaAsSb, AlGaInP, and GaInAsP. The porous tantalum semiconductor material is suitable for use in the field of the present invention in the field of sensors and luminescent materials such as light emitting diodes (LEDs) and solid state lasers. The impurity of the semiconductor material is different from the semiconductor material itself or any atom, element, ion and/or molecule provided to the dopant of the semiconductor material. Impurities are undesirable materials present in semiconductor materials that can adversely affect the electronic properties of the semiconductor material, and include, but are not limited to, oxygen, carbon, and metals including heavy metals. Heavy metal impurities include, but are not limited to, the family of elements, calcium, sodium, and all of their ions, complexes, and/or complexes between copper and lead on the periodic table.

"Plastic" means any synthetic or naturally occurring material or combination of materials which are typically molded or shaped and hardened into a desired shape when heated. Exemplary plastics suitable for use in the devices and methods of the present invention include, but are not limited to, polymers, resins, and cellulose derivatives. As used herein, the term plasticity is used to include composite plastic materials comprising one or more plastics having one or more additives, such additives may be provided, for example, as structural enhancers, fillers, fibers, plasticizers, stabilizers, or Additives of desired chemical or physical properties.

"Dielectric" and "dielectric material" are used equivalently herein and refer to a substance that has a high impedance to current. Suitable dielectric materials include, but are not limited to, SiO ₂ , Ta ₂ O ₅ , TiO ₂ , ZrO ₂ , Y ₂ O ₃ , SiN ₄ , STO, BST, PLZT, PMN, and PZT.

"Polymer" means a molecule comprising a plurality of repeating chemical groups commonly referred to as monomers. Polymers are generally characterized by high molecular weight. The polymer usable in the present invention may be an organic polymer or an inorganic polymer, and may be in an amorphous, semi-amorphous, crystalline or partially crystalline state. The polymer may comprise monomers having the same chemical composition or may comprise a plurality of monomers (such as copolymers) having different chemical compositions. Crosslinked polymers having linked monomeric chains are especially useful in certain applications of the invention. Polymers useful in the methods, devices, and device components of the present invention include, but are not limited to, plastics, elastomers, thermoplastic elastomers, elastomeric plastics, elastomers, thermostats, thermoplastics, and acrylates. Exemplary polymers include, but are not limited to, acetal polymers, biodegradable polymers, cellulosic polymers, fluoropolymers, nylon, polyacrylonitrile polymers, polyamido-imine polymers, Polyimine, polyarylate, polybenzimidazole, polybutene, polycarbonate, polyester, polyetherimide, polyethylene, polyethylene copolymer and modified polyethylene, polyketone, poly (Methyl methacrylate), polymethylpentene, polyphenylene ether and polyphenylene sulfide, polyphthalamide, polypropylene, polyurethane, styrene resin, sulfhydryl resin, vinyl Resin or any combination thereof.

"Elastomer" means a polymeric material that can be stretched or deformed and returned to its original shape without substantial permanent deformation. Elastomers are typically subjected to substantial elastic deformation. The elastic substrate suitable for use in the present invention at least partially comprises one or more elastomers. Exemplary elastomers suitable for use in the present invention may comprise a polymer, a copolymer, a composite or a mixture of a polymer and a copolymer. An elastomer layer refers to a layer comprising at least one elastomer. The elastomer layer may also include dopants and other non-elastomeric materials. Elastomers suitable for use in the present invention may include, but are not limited to, thermoplastic elastomers, styrenic materials, olefin materials, polyolefins, polyurethane thermoplastic elastomers, polyamines, synthetic rubbers, PDMS, polybutylene. Diene, polyisobutylene, poly(styrene-butadiene-styrene), polyurethane, polychloroprene and polyfluorene.

"Good electronic performance" and "high performance" are used equally herein, and means that the device and device components have such desirable functions as electronic signal switching and/or amplification, such as field effect mobility, threshold voltage, and on. - Off-line electronic characteristics. Exemplary transferable, and optionally printable, semiconductor devices of the present invention that exhibit good electronic performance can have an intrinsic field effect mobility greater than or equal to 100 cm ² V ^-1 s ^-1 , preferably greater than some applications. Or equal to the intrinsic field effect mobility of about 300 cm ² V ^-1 s ^-1 . An exemplary transistor of the present invention that exhibits good electronic performance can have a device field effect mobility greater than or equal to about 100 cm ² V ^-1 s ^-1 , preferably greater than or equal to about 300 cm ² V for some applications ^. The device field effect mobility of ¹ s ^-1 and, for some applications, preferably has a device field effect mobility greater than or equal to about 800 cm ² V ^-1 s ^-1 . Exemplary transistors show good electron efficacy of the present invention may have less than about 5 volts and the threshold voltage / opening or greater than about 1 × 10 ⁴ - A OFF ratio.

"Large area" means an area greater than or equal to about 36 square feet, such as the area of a receiving surface of a substrate for device fabrication.

"Device field effect mobility" refers to the field effect mobility of an electronic device such as a transistor calculated using output current data corresponding to an electronic device.

"Young's modulus" is a mechanical property of a material, device or layer that refers to the ratio of stress to strain for a given substance. Young's modulus can be provided by the following statement:

Where E is the Young's modulus, L ₀ is the equilibrium length, The length of the L system changes under the applied stress, and the F is the force applied and the area where the force is applied by the A system. Young's modulus can also be expressed by the following equation according to the Lame constant:

Where λ and μ are Lame constants. High Young's modulus (or "high modulus") and low Young's modulus (or "low modulus") are relative descriptions of the magnitude of Young's modulus in a given material, layer or device. In the present invention, the high Young's modulus is larger than the low Young's modulus, preferably about 10 times larger for some applications, and about 100 times larger for other applications, and for other applications. It is best to say that it is about 1000 times larger.

In the following, numerous specific details of the device, device components and methods of the invention are set forth to provide a detailed description of the precise nature of the invention. However, it will be apparent to those skilled in the art that the present invention may be practiced without the specific details.

The present invention provides extendable semiconductor and electronic circuits that provide good performance when extended, compressed, flexed, or otherwise deformed. In addition, the extendable semiconductor and electronic circuits of the present invention can be adapted to a wide range of device configurations to provide fully flexible electronic and optoelectronic devices.

Figure 1 provides an atomic force micrograph showing an extensible semiconductor structure of the present invention. The extendable semiconductor component 700 includes a flexible substrate 705 (such as a polymer and/or an elastic substrate) having a support surface 710 and a curved semiconductor structure 715 having a curved inner surface 720. In this embodiment, at least a portion of the curved inner surface 720 of the curved semiconductor structure 715 is bonded to the support surface 710 of the flexible substrate 705. The curved inner surface 720 can be joined to the support surface 710 at selected points along the inner surface 720 or at substantially all points along the inner surface 720. The exemplary semiconductor structure illustrated in Figure 1 comprises a single crystal germanium ribbon having a width equal to about 100 microns and a thickness equal to about 100 nanometers. The flexible substrate illustrated in Figure 1 is a PDMS substrate having a thickness of about 1 mm. Curved inner surface 720 has a curved configuration that includes a substantially periodic waveform that extends along one of the lengths of the strip. As shown in Figure 1, the amplitude of the wave is about 500 nm and the pitch is about 20 microns. 2 shows an atomic force micrograph showing an expanded view of a curved semiconductor structure 715 having a curved inner surface 720. 3 shows an atomic force micrograph of an array of extensible semiconductor structures of the present invention. Analysis of the atomic force micrographs in Figure 3 shows that the curved semiconductor structures were compressed by about 0.27%. 4 shows an optical micrograph of an extensible semiconductor structure of the present invention.

The contoured shape of the curved inner surface 720 allows the curved semiconductor structure 715 to expand or compress along the deformation axis 730 without undergoing substantial mechanical strain. This contour shape may also allow the semiconductor structure to bend, flex or deform in a direction other than the direction of the deformation axis 730 without significant mechanical damage or loss of performance caused by strain. The curved surface of the semiconductor structure of the present invention can have good mechanical properties (such as extensibility, flexibility and/or bendability) and/or good electronic properties (such as good display when flexed, stretched or deformed). Any contour shape of the field effect mobility). An exemplary contour shape can have the following features: having a plurality of raised and/or recessed regions, and having a sine wave, a Gaussian wave, an Aries function, a square wave, a Loren wave, a periodic wave, a periodic wave, or the like Multiple waveforms of any combination. Waveforms suitable for use in the present invention may vary with respect to two or three physical dimensions.

5 shows an atomic force micrograph of an extensible semiconductor structure of the present invention bonded to a flexible substrate 705 having a three-dimensional relief pattern on a support surface 710 of the substrate. The three-dimensional relief pattern includes a recessed region 750 and an undulating feature 760. As shown in FIG. 5, the curved semiconductor structure 715 is bonded to the support surface 710 in the recessed region 750 and on the relief features 760.

6 shows a flow chart illustrating an exemplary method of fabricating an extensible semiconductor structure of the present invention. In the exemplary method, a pre-strained elastic substrate in one expanded state is provided. Pre-straining can be achieved by any method known in the art including, but not limited to, rolling and/or pre-bending the elastomeric substrate. Pre-straining can also be achieved via thermal methods, such as by thermal expansion caused by raising the temperature of the elastomeric substrate. One of the advantages of pre-straining via thermal methods is that expansion along a plurality of different axes, such as orthogonal axes, can be achieved.

An exemplary elastomeric substrate useful in the method of the present invention is a PDMS substrate having a thickness equal to about 1 mm. The elastic substrate can be pre-strained by expansion along a single axis or by expansion along a plurality of axes. As shown in FIG. 6, at least a portion of the inner surface of the printable semiconductor component is bonded to the outer surface of the pre-strained elastic substrate in an expanded state. Bonding can be achieved by covalent bonding between the inner surfaces of the semiconductor surface, by van der Waals force, by the use of a binder, or by any combination of such methods. In an exemplary embodiment of the elastic substrate system PDMS, the support surface of the PDMS substrate is chemically modified such that it has a plurality of hydroxyl groups extending from its surface to promote covalent bonding with a germanium semiconductor structure. Referring again to Figure 6, after the pre-strained elastic substrate is bonded to the semiconductor structure, the elastic substrate is allowed to at least partially relax to a relaxed state. In this embodiment, the relaxation of the elastic substrate bends the inner surface of the semiconductor structure to produce a semiconductor component having a curved inner surface.

As shown in FIG. 6, the manufacturing method may optionally include a second transfer step and optionally a bonding step, wherein the transferable semiconductor device 715 having a curved inner surface 720 is transferred from the elastic substrate to another substrate. A flexible substrate such as a polymer substrate is preferred. This second transfer step can be accomplished by contacting the exposed surface of the semiconductor structure 715 having a curved inner surface 720 with another receiving surface of the substrate bonded to the exposed surface of the semiconductor structure 715. The bonding to the other substrate can be accomplished by any means that at least partially maintains the curved structure of the semiconductor component, including covalent bonds, bonding via Van der Valli, dipole-dipole interaction, London (London) Force bond and / or hydrogen bonding. The invention also includes the use of an adhesive layer, coating and/or film provided between an exposed surface of the transferable semiconductor structure and the receiving surface.

The extensible semiconductor component of the present invention can be effectively integrated into a large number of functional devices and device components such as transistors, diodes, lasers, MEMS, NEMS, LEDS, and OLEDS. The extendable semiconductor component of the present invention has certain functional advantages over conventional rigid inorganic semiconductors. First, the extendable semiconductor component can be flexible and, therefore, less susceptible to structural damage caused by flexing, bending, and/or deformation than conventional rigid inorganic semiconductors. Second, because the curved semiconductor structure can be in a slight mechanical strain state to provide a curved inner surface, the extendable semiconductor component of the present invention can exhibit higher intrinsic field effect mobility than conventional strain-free rigid semiconductors. Finally, because the extensible semiconductor component is free to expand and contract during device temperature cycling, it may provide good thermal properties.

Figure 7 shows an image of an array of longitudinally aligned extendable semiconductors having a wavy configuration. As shown in Figure 7, the semiconductor strips are provided in a periodic wave configuration and supported by a single flexible rubber substrate.

8 shows a cross-sectional image of an extensible semiconductor component of the present invention in which a semiconductor structure 776 is supported by the flexible substrate 777. As shown in FIG. 8, the semiconductor structure 776 has an inner surface having a contour shape of a periodic wave. As also shown in FIG. 8, the periodic wave configuration extends through the entire cross-sectional dimension of the semiconductor structure 776.

The present invention also provides an array of extendable electronic circuits, devices, and devices that have good performance when extended, flexed, or deformed. Similar to the above extensible semiconductor component, the present invention provides an extendable circuit and an electronic device comprising a flexible substrate having a support surface having a curved inner surface (such as a curve exhibiting a wavy structure) Surface device, device array or circuit contact. In this structural arrangement, at least a portion of the curved inner surface of the device, device array or circuit structure is bonded to the support surface of the flexible substrate. A device, device array or circuit of this aspect of the invention is a multi-component component comprising a plurality of integrated device components such as semiconductors, dielectrics, electrodes, doped semiconductors, and conductors. In an exemplary embodiment, the flexible circuit, device and device array having a net thickness of less than about 10 microns comprises a plurality of integrated device components, at least a portion of which has a periodic wave curve structure.

In one useful embodiment of the invention, a stand-alone electronic circuit or apparatus comprising a plurality of interconnect components is provided. The inner surface of one of the electronic circuits or devices is in contact with and at least partially bonded to a pre-strained resilient substrate in an expanded state. Pre-straining can be achieved by any method known in the art including, but not limited to, rolling and/or pre-bending the elastic substrate, and by expanding along a single axis or by plural The expansion of the shaft pre-strains the elastic substrate. The bonding can be achieved directly by a covalent bond or a van der Waals force between at least a portion of the inner surface of the electronic circuit or device and the pre-strained elastic substrate, or by using an adhesive or an intermediate bonding layer. After bonding the pre-strained elastic substrate to the electronic circuit or device, the elastic substrate is allowed to at least partially relax to a relaxed state that bends the inner surface of the semiconductor structure. The bending of the inner surface of the electronic circuit or device produces a curved inner surface that, in some useful embodiments, has a periodic or non-periodic configuration. The present invention includes various embodiments in which all components including electronic devices or circuits are present in a one-cycle or non-periodic configuration.

The periodic or non-periodic configuration of the extendable electronic circuit, device, and device array allows it to adhere to an extended or curved configuration without creating large strains on individual components of the circuits or devices. This aspect of the invention provides useful electronic properties of the extendable electronic circuit, device and array of devices when in a bent, extended or deformed state. The period of the periodic wave configuration formed by the present method may vary as follows: (i) the net thickness of the set of integrated components including the circuit or device and (ii) the material including the integrated device component such as Young's mode. The mechanical properties of the number and flexural rigidity.

Figure 9A shows a flow chart illustrating an exemplary method of fabricating an array of extensible thin film transistors. As shown in Figure 9A, an array of freestanding printable film transistors is provided using the techniques of the present invention. The array of thin film transistors is transferred to a PDMS substrate via a dry transfer contact printing process in a manner that exposes the inner surface of the transistors. The exposed inner surface is then contacted with a room temperature cured pre-strained PDMS layer in an expanded state. Subsequent complete curing of the pre-strained PDMS layer combines the inner surface of the transistors with the pre-strained PDMS layer. The pre-strained PDMS layer is allowed to cool and exhibit an at least partially relaxed state. Relaxation of the PDMS layer introduces a periodic wave structure into the transistor in the array, thereby making it extendable. The inset in Figure 9A provides an atomic force micrograph of an extensible thin film transistor array fabricated by the present method. The atomic force micrograph shows a periodic wave structure that provides good electronic performance in an extended or deformed state.

Figure 9B provides an optical micrograph of an extensible thin film transistor array in a relaxed and extended configuration. The array is extended in such a manner that a net strain of about 20% is produced on the array without rupturing or damaging the thin film transistors. It was observed that the conversion from a slack configuration to a strain configuration was a reversible process. Figure 9B also provides a plot of the drain current versus gate voltage for a number of potentials applied to the gate, which demonstrates that the extensible thin film transistors exhibit good performance in both relaxed and extended configurations.

Example 1: Extendable Form Single Crystal Germanium for High Performance Electronic Components on Rubber Substrates

We have fabricated an extensible form of tantalum consisting of submicron single crystal elements constructed to have a micro-scale periodic wavy geometry. When supported by an elastomeric substrate, this "wavy" crucible can reversibly extend and compress to large strain without damaging the crucible. The amplitudes and periods of the waves are varied to accommodate these deformations, thereby avoiding significant strain on the raft itself. Fully integrated dielectric, dopant pattern, electrode and other components to produce fully formed, high performance "wave" metal oxide semiconductor field effect transistors, pn diodes and other devices for An electronic circuit that can be extended or compressed to a similar strain level.

Advances in electronics have been driven primarily by efforts to increase circuit operation speed and bulk density, to reduce power consumption, and (for display systems) to make large-area coverage possible. Recently, one has sought to develop methods and materials for forming high-performance circuits on non-conventional substrates having unusual physical dimensions: flexible plastic substrates for paper displays and optical scanners, and spherical curved support for focal plane arrays. And conformal skin of the integrated robot sensor. Many electronic materials provide good bending when prepared in film form and placed on a thin substrate sheet or near a neutral mechanical plane in a substrate laminate. In these states, the strain experienced by the active materials during bending can be maintained below the typical level (about 1%) required to initiate the fracture. It is a more challenging requirement for devices that can flex, extend or reach extreme bending levels when operating, or for devices that can be isomorphically coated on supports with complex, curved shapes, requiring full extensibility Characteristics of sex. In such systems, the strain at the circuit level can exceed the cracking limit of almost all known electronic materials, especially their well-developed electronic materials for existing applications. To some extent, this problem can be avoided by using an extendable wire to interconnect the circuitry of an electronic component (eg, a transistor) supported by a rigid island. This strategy can be used to obtain valuable results, although it is best suited for applications that can be achieved with relatively low coverage active electronic components. We report a different approach in which extensibility is achieved directly with a high quality single crystal germanium film having a micron-scale, "wave"-like geometry. These structures accommodate large compression and tensile strains via changes in wave amplitude and wavelength rather than through potentially destructive strain in the materials themselves. Integrating such extendable "wavy" germanium elements with dielectrics, dopant patterns, and thin metal films can result in high performance, extendable electronics.

Fig. 10 shows a manufacturing sequence of a corrugated single crystal tantalum tape on an elastomer (i.e., rubber) substrate. The first step (top box) involves photolithography to define a resist layer on a silicon-on-insulator (SOI) wafer, followed by etching to remove the exposed portions of the top germanium. The resist is removed with acetone and then the buried SiO ₂ layer is etched with concentrated hydrofluoric acid to release the strips from the underlying germanium substrate. The ends of the strips are attached to the wafer to prevent it from being washed away in the etchant. The width (5-50 μm) and length (about 15 mm) of the resist lines define the dimensions of the strips. The thickness of the top crucible (20-320 nm) on the SOI wafer defines the strip thickness. In the next step (middle frame), a flat elastomeric substrate (poly(dimethyloxane), PDMS; 1-3 mm thick) is elastically stretched and then brought into contact with the strips. Peeling the PDMS causes the strips to leave the wafer and bond the strips to the PDMS surface. Releasing the strain (i.e., pre-strain) in the PDMS results in surface deformation that causes well-defined corrugations on the surface of the crucible and the PDMS. (Figs. 11A and 11B) sinusoidal curves of the undulating contours between 5 and 50 μm and amplitudes between 100 nm and 1.5 μm (depending on the thickness of the crucible and the pre-strain in the PDMS) Box, Figure 11C). For a given system, the period and amplitude of the waves are within about 5% over a large area (several cm ² ). The smooth morphology of the PDMS between the bands and the absence of correlation in the waveforms of the adjacent bands indicate that the bands are not strongly mechanically coupled. Figure 11C (bottom frame) shows the micro-Raman measurement of the Si spike measured as a function of the distance along one of the undulating bands. These results provide an understanding of the stress distribution.

The nature of this static wavy configuration is consistent with the non-linear analysis of the initial warp geometry in a uniform, thin, high modulus layer on a half-infinite low modulus support:

among them The critical strain of the ridge, the level of the _pre -strain of the ε _pre system, the wavelength of the λ ₀ system and the amplitude of the A ₀ system. The cypress ratio v, the Young's modulus E, and the subscripts refer to the properties of Si or PDMS. The thickness of 矽 is h. This process covers many of the features that are fabricated into wavy structures. For example, Figure 11D shows that when the pre-strain value is fixed (about 0.9% of such data), the wavelength and amplitude are linearly dependent on the thickness of the Si. The wavelength does not depend on the level of the pre-strain (Figure 12). In addition, the calculation of the literature values (E _si = 130 Gpa, E _PDMS = 2 MPa, v _Si = 0.27, v _PDMS = 0.48) using the mechanical properties of Si and PDMS yields about 10% (maximum deviation) of the measured value. The amplitude and wavelength within the range. "Strain" is calculated from the ratio of the effective length of the bands (determined by the wavelength) to its actual length (determined by the surface distance measured by AFM) and produces a value approximately equal to the pre-strain in the PDMS (for up to about 3.5% pre-strain). The strain peak in the 矽 itself (meaning the maximum value) (I call it the 矽 strain) is estimated from the thickness of the belt and the radius of curvature at the limit of the wave according to kh /2 (K-curvature) in the strain region. The presence of these equal waves in the strain zones and the critical strain (about 0.03% for the case herein) is small compared to the strain peaks associated with bending. For the data of Figure 11, the peak strain of the helium is about 0.36 (±0.08)%, which is more than twice the strain of the band. This strain is the same for all strip thicknesses given a pre-strain (Figure 13). The resulting mechanical advantage, where the 矽 strain peak is much less than the band strain, is critical to achieving extensibility. It has been noted that warped films have also been observed in metals and dielectrics that are either evaporated or spin coated onto PDMS (as opposed to preformed, transferred single crystal elements and devices as described herein).

The dynamic response of the wavy structures to compression and tensile strain applied to the elastomeric substrate after manufacture is of the utmost importance to the extendable electronics. To reveal the mechanism of this process, when force is applied to the PDMS to compress or extend the PDMS in a direction parallel to the long dimension of the strips, we measure the geometry of the corrugated Si strip by AFM. Due to the cypress effect, this force produces strain along the zones and perpendicular thereto. These vertical strains primarily result in deformation of the PDMS in the region between the bands. On the other hand, the strain along the bands is adapted by the change in the structure of the waves. The three-dimensional height image and surface profile in Figure 14A are representative of the compressed, unstressed, and extended states (collected from slightly different locations on the sample). In these and other instances, the strips maintain their sinusoidal shape (the line in the box to the right of Figure 14A) during deformation, wherein approximately half of the wave structure is located on the PDMS surface as defined by the area between the strips Below the unstressed position (Figure 15). Figure 14B shows the wavelength and amplitude of the compressive (negative) and tensile (positive) applied strain relative to the unstressed state (zero). These data correspond to the average AFM measurements collected from a large number (>50) of bands at each point. The applied strain is determined by the measured dimensional change between the ends of the PDMS substrate. The direct surface measurement by AFM along with the encirclement integral estimated from the sinusoidal waveforms shows that the applied strain is equal to the strain of the condition examined here (Fig. 16). (Small amplitude (<5 nm) waves that persist at tensile strain greater than the pre-strain minus the critical strain can result from a slight slip of Si during the initial warping process. Here small (or zero) The calculated strain peaks and band strains in the amplitude region are lower than the actual values.) Interestingly, these results indicate that the wavy bands have two different physical responses to the applied strain. When in a state of tension, the waves evolve in a non-intuitive manner: the wavelength does not change significantly with the applied strain, which is consistent with the post-warping mechanism. Instead, the change in amplitude adapts to the strain. In this state, the enthalpy strain becomes smaller as the PDMS is extended; it reaches ~0% when the applied strain is equal to the pre-strain. Conversely, as compression increases, as the applied strain increases, the wavelengths decrease and the amplitude increases. This mechanical response is similar to the mechanical response of an accordion bellows, which is essentially different from the characteristics of the tension. During compression, due to the decrease in the radius of curvature at the peaks and troughs, the enthalpy strain increases as the applied strain increases. However, the rate and magnitude of the increase in enthalpy strain are much lower than the band strain, as shown in Figure 14B. This mechanism makes extensibility possible.

The complete response in the strain range consistent with the wavy geometry can be qualitatively described by the equation giving the dependence of the wavelength λ on its value in the initial ridge state λ ₀ and the applied strain ε _applied :

For example, this tension/compression asymmetry can result from a slight reversible separation between the PDMS and the rising region of Si formed during compression. For this case, as well as for systems that do not exhibit this asymmetrical nature, the wave amplitude A of the tension and compression is given by a single statement that is valid for moderate strain (<10-15%):

Where A ₀ corresponds to the value of the initial ridge state. As shown in Figure 14A, these statements were obtained consistent with the number of experiments without any parameter fit. When accommodating the undulating undulation of the tensile/compressive strain, the 矽 strain peak is controlled by the bending condition and is given by (33)

This is in good agreement with the strain measured by curvature in Figure 14B. (See also Figure 18). This analytical statement helps define the range of strains that the system can withstand without rupturing the raft. For a 0.9% pre-strain, this range is -27% to 2.9% if the 矽 failure strain is assumed to be about 2% (for compression or stretching). Controlling the level of pre-strain allows this strain range (ie, close to 30%) to balance the desired degree of compression and tensile deformation. For example, a 3.5% pre-strain (the maximum value examined) yields a range of -24% to 5.5%. We have noticed that these calculations assume that the strain applied even at extreme deformation levels is equal to the strain. Experimentally, we have found that the results are usually attributed to the ability to adapt the strain outside the ends of the bands and the bands so that the applied strain is not completely transferred to the PDMS of the bands. exceed.

We have established functionality and extendability by including additional steps in the fabrication sequence (Fig. 10, top box) to define patterns, thin metal contacts and dielectric layers of dopants in germanium using conventional processing techniques. Device. Two and three terminal devices, diodes, and transistors fabricated in this manner provide a basic building block for circuits having advanced functionality, respectively. The dual band transfer process in which the integrated tape device is first separated from the SOI onto an undeformed PDMS plate and then to a pre-strained PDMS substrate can establish a wavy device having metal contacts exposed for detection. 17A and 17B show optical images and electrical responses of an extendable pn junction diode for strain applied to various levels of PDMS. We have found no systematic changes in the spread of data in the electrical properties of devices with extension or compression. The deviations in these curves are primarily due to changes in the quality of the probe contacts. These pn junction diodes can be used as a photodetector (in an opposite bias state) or as a photovoltaic device in addition to being a conventional rectifying device. The photocurrent density is about 35 mA/cm ² at a reverse bias of about -1 V. At forward bias, the short circuit current density and open circuit voltage were about 17 mA/cm ² and 0.2 V, respectively, which produced a fill factor of 0.3. The shape of the response is consistent with the modeling (solid line in Figure 17B). The device properties did not change significantly even after about 100 compression, extension and release cycles (Figure 19). Figure 17C shows the current-voltage characteristics of an extendable, undulating Schottky barrier MOSFET (MOSFET) that is similar to the program used for the pn diode and borrows Formed by an integrated thin layer (40 nm) of thermal SiO ₂ as a gate dielectric (33). The device parameters (linear range mobility of approximately 100 cm ² /Vs (possibly limited to contacts) and threshold voltage of approximately -3 V) can be obtained from the electrical measurements of this wavy transistor. The device parameters of the devices formed on the SOI wafer are compared. (Figures 20 and 21). As in pn diodes, such wavy transistors can reversibly extend and compress to large strain levels without damaging the devices or significantly altering electrical properties. In diodes and transistors, deformation of the PDMS beyond the ends of the devices results in straining of the device (tape) that is less than the applied change. The overall extensibility results from the combination of device extensibility and the PDMS deformation of these types. At compressive strains greater than the compressive strain examined here, PDMS tends to bend in a manner that makes detection difficult. At greater tensile strains, depending on the thickness of the crucible, the length of the strip, and the strength of the bond between the crucible and the PDMS, the strips rupture, or slip and remain intact.

These extendable MOSFETs and pn diodes represent only two of many types of "wavy" electronic devices that can be formed. The complete circuit sheet or web can also be structured into a uniaxial or biaxial extendable wavy geometry. In addition to the unique mechanical properties of the wavy device, the coupling of strain and electronic properties that can occur in many semiconductors also provides for the design of device structures that utilize mechanically adjustable, periodic variations in strain to achieve an unusual electronic response. opportunity.

Materials and methods

Sample preparation: Si (20, 50, 100, 205, 290 or 320) on SiO ₂ (thickness of 145 nm, 145 nm, 200 nm, 400 nm, 400 nm or 1 μm) on a Si substrate (Soitec) The thickness of nm) consists of a silicon-on-insulator (SOI) wafer. In one case, we used an SOI wafer of Si (thickness of about 2.5 μm) and SiO ₂ (thickness of about 1.5 μm) on Si (Shin-Etsu). In all cases, the top Si layer doped with boron (P-type) or phosphorus (n-type) has a resistivity between 5 and 20 Ωcm. The top Si of these SOI wafers is patterned with a photoresist (AZ 5214 photoresist, Karl Suss MJB-3 contact mask aligner) and reactive ion etching (RIE) to define the Si band (5-50) Μm wide, 15 mm long) (PlasmaTherm RIE, SF6 40sccm, 50mTorr, 100W). The SiO ₂ layer was removed by undercut etching in HF (49%), which was mainly determined by the width of the Si strip. The lateral etch rate is typically 2 to 3 μm/min. Preparation of poly(dimethyloxane) (PDMS) elastomer by mixing the substrate with a curing agent in a weight ratio of 10:1 and curing at 70 ° C for > 2 hours or at room temperature for > 12 hours Sylgard 184, Dow Corning) board.

These PDMS plates (thickness of 1 to 3 mm) are conformally contacted with Si on the etched SOI wafer to create the wavy structures. Any method of establishing controlled expansion of the PDMS prior to this contact, followed by shrinkage after removal from the wafer, can be used. We check three different technologies. In the first technique, the pre-strain is established for mechanical rolling of the PDMS after contacting the SOI substrate. Although the wavy structure can be formed in this manner, it tends to have a non-uniform wave period and amplitude. In the second technique, the PDMS (thermal expansion coefficient = 3.1 × 10 ^-4 K ^-1 ) is heated to a temperature between 30 ° C and 180 ° C before contact and then cooled after being removed from the SOI, It produces a wavy Si structure with good uniformity over a large area in a highly reproducible manner. In this way, we accurately control the pre-strain level in the PDMS by changing the temperature (Figure 12). The third method uses a PDMS that is extended with a mechanical table prior to contact with the SOI and then physically released after removal. Similar to the thermal method, this method allows for good uniformity and reproducibility, but it is more difficult to finely adjust the pre-strain level than the thermal method.

For devices such as pn junction diodes and transistors, electron beam evaporation (Temescal BJD1800) and photolithographic patterning (via etching or delamination) of the metal layer (Al, Cr, Au) acts as contacts and gates pole. Spin-on dopant (SOD) (for p-type, B-75X, Honeywell, USA; for n-type, P509, Filmtronics, USA) was used for doping the anthracene. The SOD materials were first spin coated (4000 rpm, 20 s) onto a pre-patterned SOI wafer. A cerium oxide layer (300 nm) prepared by plasma enhanced chemical vapor deposition (PECVD) (Plasma Therm) was used as a mask for the SOD. After heating at 950 ° C for 10 seconds, the SOD and mask layers on the SOI wafer were etched away using a 6:1 buffered oxide etchant (BOE). For the transistor device, the thermal growth (dry oxidation of the high purity oxygen in the furnace to a thickness between 25 nm and 45 nm, 1100 ° C, 10-20 minutes) of the cerium oxide provides a gate dielectric. After completing all the device processing steps on the SOI substrate, the Si band (usually 50 μm wide, 15 mm long) with integrated device structure is covered by photoresist (AZ5214 or Shipley S1818) to HF in the underlying SiO ₂ The device layer is protected during etching. After removal of the photoresist layer by oxygen plasma, a flat PDMS (70 ° C, > 4 hour) plate without any pre-strain was used to remove the ribbon device from the SOI substrate in a flat geometry. The partially cured PDMS (>12 hours at room temperature after mixing the substrate with the curing agent) is then contacted with the Si-belt devices on the fully cured PDMS board. The curing of the partially cured PDMS is completed (by heating at 70 ° C), followed by removal of the plate, and the devices are transferred from the first PDMS plate to the new PDMS substrate. The shrinkage associated with cooling to room temperature establishes a pre-strain such that the removal and release establishes the wavy device while the electrodes are exposed for detection.

Measurement: An atomic force micrograph (AFM) (DI-3100, Veeco) was used to accurately measure the properties of the waves (wavelength, amplitude). From the obtained image, the cross-sectional profile along the wavy Si is measured and statistically analyzed. The mechanical and electrical response of the wavy Si/PDMS was measured using a self-contained extension station and an AFM and a semiconductor parameter analyzer (Agilent, 5155C). Raman measurements were performed using a Jobin Yvon HR 800 spectral analyzer using 632.8 nm light from a He-Ne laser. The Raman spectrum is measured at 1 μm intervals along the wavy Si, where the focus is adjusted at each position along the length of the structures to maximize the signal. The measured spectra are fitted by the Loren subfunction to locate the peak wavenumber. Due to the slight dependence of the peak wavenumber on the focus position of the microscope, the Raman results only provide a qualitative understanding of the stress distribution.

Calculation of the length of the line, the strain of the belt and the strain of the enthalpy: These experimental results show that for the material and geometry range explored here, the shape of the wavy Si can be accurately approximated by a simple sine function (ie y=Asin(kx) ) (k = 2π / λ)) to represent. Then press L= To calculate the length of the fence.

Use ε= To calculate the strain of the wavy Si band. The peak value of the 矽 strain is generated at the peaks and troughs of the waves, and is used To calculate, where h is the thickness of Si, and R _c is the radius of curvature at the peak or trough, which is determined by Given, where n is an integer and y" is the second derivative of y with respect to x. Using the sinusoidal approximation of the actual shape, the 矽 strain peak is determined by Given. Figure 12 shows the wavelength as a function of the temperature used to establish the pre-strain. As shown in Figure 13, the strain peak is independent of the Si thickness due to the wave amplitude and the linear dependence of the wavelength versus thickness ( A ~ h , λ ~ h ). Figure 15 illustrates the wavy structure comprising nearly equal upward and downward displacements relative to the horizontal plane of the PDMS surface between the bands. The enthalpy strain is equal to the strain applied by the system examined here (Figure 16).

One accordion bellows model: When 矽 can be separated from PDMS during compression, the system is dominated by the accordion bellows mechanism rather than the ribbing mechanism. In the bellows condition ^, the applied compressive strain (ε _applied ) has a wavelength of λ ₀ (1 ⁺ ε _applied ), where λ is the wavelength in the unstrained configuration, as described in equation (2). Since the length of the enveloping line is approximately the same before and after the compressive strain, we can use the following relationship to determine the wave amplitude A.

This equation is for Asymptotic solution . At small compressive strains, this equation is reduced to equation (3), which is also applicable to the case where the separation of Si and PDMS is not possible, and the system follows the warping mechanism.矽 strain peak by Given. For moderate compressive strains, this statement is approximately the same as equation (4). Within the limits of the application of moderate strain, similar to the wave amplitude, the 矽 strain peak has a similar functional form for the bellows model and the warp model. Figure 18 shows the strain peaks calculated according to the above statement and according to equation (4).

Device Characterization: A semiconductor parameter analyzer (Agilent, 5155C) and a conventional probe station are used for the electrical characterization of the wavy pn junction diodes and transistors. The light response of the Pn diode was measured at an illumination of about 1 W/cm ² as measured by an optical power meter (Ophir Optronics, Laser Power Meter AN/2). We use mechanical stations to measure these devices during and after extension and compression. As a way to explore the reversibility of this process, we measured three different pn dipoles under ambient light before and after about 100 compressions (to about 5% strain), extension (to about 15% strain), and after the release cycle. body. Figure 19 shows the results. Figures 20 and 21 show images, schematic illustrations, and device measurements from a wavy transistor.

Example 2: Warped and Wavy GaAs Tapes for High Performance Electronic Circuits on Elastomeric Substrates

A single crystal GaAs ribbon having a thickness in the submicron range and having a well defined "wavy" and/or "warped" geometry is produced. The resulting structure on the surface of an elastomeric substrate or embedded in an elastomeric substrate exhibits a reversible extensibility and compressibility of >10% strain, which is more than ten times greater than the reversible extension and compressive strain of GaAs itself. By integrating ohmic and Schottky contacts on the GaAs strips of such structures, high performance extendable electronics (e.g., metal semiconductor field effect transistors) can be achieved. Such electronic systems can be used alone or in combination with similarly designed germanium, dielectric and/or metallic materials to form surfaces for requiring high frequency operation as well as extensibility, extreme flexibility, or with complex curved shapes. A circuit that matches the capabilities of the application.

In traditional microelectronics, performance capabilities are measured primarily in terms of speed, power efficiency, and integration levels. Advances in other newer electronic device formats have been driven by the ability to integrate or cover large areas on non-conventional substrates such as low cost plastics, foils, and paper. For example, a new form of X-ray medical diagnosis can be achieved by a large area imager that isomorphically wraps the body to digitally image the desired tissue. Lightweight, wall-sized displays or sensors that can be deployed on a variety of surfaces and surface shapes provide new technologies for architectural design. Various materials including small organic molecules, polymers, amorphous germanium, polycrystalline germanium, single crystal germanium wires, and microstructured tapes have been explored to serve as semiconductor channels for thin film electronic devices that support these and other applications. These materials make it possible to have a mobility that spans a wide range (i.e., from 10 ^-5 to 500 cm ² /V ‧ s) and a mechanically bendable film morphology on a flexible substrate. Applications requiring high speed operation, such as large aperture interferometric synthetic aperture radar (InSAR) and radio frequency (RF) monitoring systems, require semiconductors with very high mobility, such as GaAs, or InP. The fragility of single crystal composite semiconductors creates several manufacturing challenges that must be overcome in order to fabricate high speed, flexible transistors with such semiconductors. We have established a practical method by constructing a metal semiconductor field effect transistor (MESFET) on a plastic substrate using a printed GaAs line array built from high quality bulk wafers. These devices exhibit good mechanical flexibility and f _T ' near 2 GHz even in medium scale devices (e.g., micro-gate lengths). This example shows a GaAs-based MESFET (as opposed to a wire device) that is designed with a special geometry that not only provides bendability but also provides a strain level that is significantly above the inherent yield point of the GaAs itself (about 2%) (about 10 %) mechanical extensibility. The resulting type of extensible high performance electronic system provides a very high level of flexibility and the ability to integrate contours with curved surfaces. This example of a GaAs system expands the "wavy" described by us in four important ways: (i) it exhibits the extensibility of GaAs (a material that is more mechanically weaker than Si under actual conditions), and (ii) its Introducing a new "warping" geometry that can be used to achieve extensibility in conjunction with the previously described "wavy" configuration or independent of the previously described "wavy" configuration, (iii) achieving a new type An extendable device (ie MESFET), and (iv) it exhibits an extension that can extend over a larger range than 矽 and has greater symmetry in compression/tension.

Figure 22 illustrates the steps for fabricating an extensible GaAs ribbon on an elastomeric substrate made from poly(dimethyloxane) (PDMS). The strips are produced from a high quality GaAs bulk wafer having a plurality of epitaxial layers. The wafer is grown by growing a 200 nm thick AlAs layer on a (100) semi-insulating GaAs (Si-GaAs) wafer, followed by sequentially depositing a Si-GaAs layer having a thickness of 150 nm and having a thickness of 120 nm and 4 Prepared by a Si-doped n-type GaAs layer of ×10 ¹⁷ cm ^{-3 at a} carrier concentration. The pattern of photoresist lines defined in parallel with the (0 ii) crystallographic direction acts as a mask for the chemical etching of the epitaxial layers (including GaAs and AlAs). Anisotropic etching of an aqueous etchant using H ₃ PO ₄ and H ₂ O ₂ isolating the top layers into individual strips having lengths and orientations defined by photoresist and having sidewalls at acute angles relative to the wafer surface Piece. After removing the photoresist after the anisotropic etching and then immersing the wafer in an ethanol solution of HF (volume ratio of 2:1 between ethanol and 49% aqueous HF), the AlAs layer and the GaAs strip can be removed. (n-GaAs/Sl-GaAs). In this step, the use of ethanol instead of water reduces cracking that can occur in such frangible zones due to the action of capillary forces during drying. The lower surface tension of ethanol compared to water also minimizes the disorder caused by drying in the spatial layout of the GaAs ribbons. In the next step, the wafer with the released GaAs ribbon is brought into contact with the surface of a pre-stretched PDMS panel to align the ribbons in the direction of extension. Under such conditions, Van der Valli dominates the interaction between PDMS and GaAs. For conditions requiring stronger interaction strength, a thin layer of SiO _{2 is} deposited onto the GaAs and the PDMS is exposed to ultraviolet-induced ozone (i.e., the product of oxygen in the air) shortly before the contact. Ozone produces a -Si-OH group on the surface of the PDMS which upon contact reacts with the surface of the SiO ₂ to form a bridged siloxane-Si-O-Si- linkage. Due to the geometry of the sides of the strips, the deposited SiO ₂ is discontinuous at the edges of each strip. For both weak and strong bonding procedures, stripping the PDMS from the mother wafer transfers all of the tape to the surface of the PDMS. Pre-strain relaxation in the PDMS can result in spontaneous formation of large-scale ridges and/or sinusoidal structures along the zones. The geometry of the strips greatly depends on the pre-strain applied to the stamp (defined by Δ L /L), the interaction between the PDMS and the strip, and the flexural rigidity of the strips. For the bands studied here, the small pre-strain (<2%) produces a highly sinusoidal "wave" with relatively small wavelengths and amplitudes for both strong and weak interactions (Fig. 22 right border, middle frame). These geometries in GaAs are similar to the geometries reported for Si. Higher pre-strains (e.g., up to about 15%) can be applied to create similar types of waves where there is a strong bond between the strips and the substrate. Different types of geometries composed of a periodless "warping" having a relatively large amplitude and width are formed under the condition of weak interaction strength and large pre-strain (Fig. 22 right border, top frame). In addition, our findings suggest that two types of structures (warping and waves) can coexist in a single band with varying flexural stiffness along their length (eg, due to thickness variations associated with device structure).

Figure 23 shows a thickness of 270 nm (including n -GaAs and Si-GaAs layers) and 100 μm formed by a strong bond between PDMS (about 5 mm thickness) and the strip (all the bands discussed in this example) Several micrographs of a wavy GaAs strip having a width of 100 μm width. Using a 2-nm Ti and 28-nm SiO ₂ layer on GaAs, the fabrication follows a strong bonding procedure. A biaxial pre-strain of about 1.9% (calculated from the thermal response of PDMS) was established in PDMS by thermal expansion (heating to 90 ° C in an oven) shortly before or during bonding. This heating also accelerates the formation of interfacial aerobic bonds. The PDMS was cooled to room temperature (about 27 ° C) after transfer of the GaAs tape, thereby releasing the pre-strain. Frames A, B, and C of Figure 23 show images collected from the same sample by optical microscopy, electron scanning microscopy (SEM), and atomic force microscopy (AFM), respectively. These images show the formation of periodic, wavy structures in the GaAs strips. The waves are quantitatively analyzed by estimating the cut lines from the AFM image (Fig. 23D) (Figs. 23E and 23F). The perimeter line parallel to the longitudinal direction of the strip clearly shows a periodic, wavy profile consistent with the calculated fit of the sine wave (dashed line of Figure 23E). This result is consistent with a non-linear analysis of the initial warp geometry in a uniform, thin, high modulus layer on a semi-infinite low modulus support. The peak-to-peak amplitude and wavelength associated with this function were determined to be 2.56 and 35.0 μm, respectively. The strain calculated from the ratio between the horizontal distance between the two peaks (ie, the wavelength) and the actual line length between the peaks (ie, the surface distance measured by AFM) on the seal (I call it For strained strains, a value smaller than the expected change in the PDMS (ie, 1.3%) is produced. This difference can be attributed to the low shear modulus of the PDMS and the island effect associated with the length of the GaAs strip that is shorter than the length of the PDMS substrate. The surface strain of the GaAs strip at the peaks and troughs (which we call the maximum GaAs strain) is obtained from the strip thickness and the radius of curvature of the peaks or troughs of the waves according to k h /2 (where K is the curvature). In this estimation, because the PDMS can be regarded as a half-infinite support with a lower modulus than the modulus of GaAs (Young's modulus of GaAs: 85.5 GPa vs. Young's modulus of PDMS: 2 MPa), The direct effect of strain on GaAs in the PDMS stamp can be ignored. For the data of Figure 23E, the maximum GaAs strain is about 0.62%, which is more than twice the band strain (ie, 1.3%). This mechanical advantage provides extensibility in GaAs tapes with physical properties similar to wavy Si.

As shown in Fig. 23F, the peaks and trough regions of the bands are higher and lower than the contour level (the right portion of the green curve) of the surface (i.e., the unbanded region) of the original PDMS, respectively. This result implies that the PDMS under GaAs takes a wavy profile as a result of the upward and downward forces applied to the PDMS by the GaAs strips in the peaks and troughs, respectively. The exact geometry of the PDMS near the peaks of the waves is difficult to estimate directly. I suspect that in addition to upward deformation, there is also a lateral necking caused by the cypress effect. The wavy band on the PDMS printer can be extended and compressed by applying strain to the PDMS (so-called applied strain is expressed as positive for extension and negative for compression, respectively). The insets of Figures 23A and 23B show images of a strip deformed to its original flat geometry when a relatively small extension strain (i.e., about 1.5%) is applied. A further extension transfers more tension strain to the flat GaAs strip, causing damage to the strip when this excess strain reaches the strain strain of GaAs. The compressive strain applied to the substrate reduces the wavelength of the undulating bands and increases the amplitude of the undulating bands. Compression failure occurs when the bending strain at the peak (and trough) exceeds the failure strain. This variation with the wavelength of the strain is consistent with the observations in the previous 且 and is different from the prediction of the wavelength invariance derived from the ideal model.

The extensibility of the corrugated GaAs tape can be improved by increasing the pre-strain applied to the PDMS by using a mechanical stage (as opposed to thermal expansion). For example, transferring a GaAs band with a SiO ₂ layer onto a surface having a 7.8% pre-strained PDMS stamp produces a wavy band without any observable rupture in GaAs (Fig. 24A). In this case, the bending strain at the peak is estimated to be about 1.2%, which is lower than the failure strain of GaAs (that is, about 2%). Similar to this low pre-strain condition, the undulating bands operate like an accordion when extending and compressing the system: wavelength and amplitude changes to accommodate the applied strain. As shown in Figure 24A, the wavelengths increase with tensile strain until the bands become flat and as the compressive strain decreases until the bands break. These deformations are fully reversible and do not include any measurable slip of GaAs on the PDMS. Compared to the slightly asymmetrical nature observed in Si bands with weak bonding and much lower pre-strain, the wavelength varies linearly with compression applied in compression and stretching (see black line in Figure 24B). And symbols).

In practical applications, it may be useful to encapsulate the GaAs tapes and devices in a manner that preserves their extensibility. As a simple demonstration of one possibility, we cast and cure the PDMS prepolymer on a sample such as that shown in Figure 24A to embed the ribbons into the PDMS. The embedded system exhibits mechanical properties similar to those of an unembedded system, meaning that the wavelength is extended when the system is extended and the wavelength is reduced when the system is compressed (red lines and symbols in Figure 24B). A moderate amount of additional strain (about 1%) is due to shrinkage of the cured second PDMS layer. This strain causes a slight decrease in the wavelength of the wavy bands, which in turn slightly extends the range of extensibility. Figure 24B shows this difference. In general, a system produced with a pre-strain of about 7.8% can be stretched or compressed to a strain of up to about 10% without causing any observable breakage in GaAs.

The corrugated GaAs ribbon on the PDMS substrate can be used to fabricate high performance electronic devices, such as MESFETs, whose electrodes are formed via metallization and processing on the wafer prior to transfer to PDMS. These metal layers change the flexural rigidity of the strips in a spatially dependent manner. Figure 25A shows a GaAs ribbon integrated with ohmic strips (source and drain) and Schottky contacts (gate) after transfer to a PDMS substrate having a pre-strain of about 1.9%. The ohmic contacts are comprised of a metal stack comprising AuGe (70 nm) / Ni (10 nm) / Au (70 nm), the metal stack is defined by a lithographic mask and in a flow with N ₂ The wafer is annealed in a quartz tube at a high temperature (that is, 450 ° C for 1 min) to form an initial wafer. These ohmic sections have a length of 500 μm. The distance between two adjacent ohmic contacts is 500 μm (meaning channel length). A Schottky contact having a length of 240 μm (that is, a gate length) is produced by directly depositing a 75-nm Cr layer and a 75-nm Au layer by electron beam evaporation according to a mask of photolithography. The electrodes have a width equal to the width of the GaAs strips, meaning 100 μm; their relatively large size facilitates detection. The size of the electrodes and semiconductor channels can be significantly reduced to achieve enhanced device performance. As shown in Figure 25A, these extendable GaAs MESFETs exhibit short-range periodic waves only in areas without electrodes. The absence of waves in thicker regions is caused by the enhanced flexural rigidity of the regions that are primarily attributed to the extra thickness associated with the metals. The periodic wave can be initiated in a thicker region by using a pre-strain greater than about 3%. However, under such conditions, the bands tend to rupture at the edges of the metal electrodes due to critical enthalpy and/or high strain peaks near the edges of the metal electrodes. This failure mode limits extensibility.

To overcome this limitation, we have reduced the strength of the interaction between the MESFET and the PDMS by eliminating the siloxane coupling. For these examples, due to the detachment of the strips from the PDMS surface, a pre-strain of > 3% produces a large, non-periodic ridge with a relatively large width and amplitude. Figure 25B presents a system of this type (e.g., prepared with a pre-strain of about 7%) wherein the large ridges are formed in the thinner regions of the devices. As indicated by the vertical lines, the detachment appears to extend slightly to a thicker region with ohmic strips. The contrast variation along the band is due to reflection and refraction associated with light passing through the GaAs segment of the curve. The SEM image (Fig. 25C) clearly shows the formation of curved ridges and flat, unstressed PDMS. These ribs indicate that the tail extends to an asymmetrical profile with the sides of the ohmic contacts (as indicated by the red curve). This asymmetry can be attributed to the unequal lengths of the ohmic strips and Schottky contacts of the individual transistors (500 μm vs. 240 μm). Such a warped MESFET can be extended to its original flat state by an applied extended strain of between about 6% and about 7% (Fig. 25D). However, due to the weak bond, compressing the system shown in Figure 25B results in a continuous detachment of the tape from the PDMS surface to create a larger ridge. Embedding such devices into PDMS according to the previously described procedures eliminates such uncontrolled nature. Figure 25B shows the system in which a liquid PDMS precursor fills the gap below the ribs. The fully enclosed PDMS defines the bands and prevents them from slipping and escaping. The embedding device can reversibly extend and compress to strains up to about 6% without damaging the bands. It is worth noting that when the embedded system is compressed by -5.83% (the top frame of Fig. 25E), a periodic small wave shape is formed in the region having the metal electrode and a new corrugation is formed in the warp region. The formation of these new wavelets (in combination with these large ridges) enhances compressibility. Extending the system forces the slanted regions to compress and extend the PDMS in such a manner that the ridges are flattened, thereby elongating the extended length of the strips (bottom frame of Figure 25E). These results indicate that an embedded device with large ridges (distinct geometry and wavy) represents a combination of wavy methods or independent of the wavy method for achieving extensibility and compressibility. Promising approach.

The performance of the warp device can be evaluated by directly detecting the current from the source to the drain. Figure 26A shows a GaAs tape device fabricated on a wafer, picked up using a flat PDMS stamp and transferred to a PDMS substrate with 4.7% pre-strain. In this configuration, the metal electrode is exposed to air for electrical detection. After relaxing the pre-stretched PDMS to a strain of 3.4%, a periodic wavelet is formed in the thin region of the MESFET (Fig. 26A: second box from the top). When the pre-stretched PDMS stamp is completely relaxed, the wavelets in each section of pure GaAs merge into individual large ridges (Fig. 26A: third box from the top). By applying an elongation strain of 4.7%, the warping devices can be extended to their flattened state (Fig. 26A: bottom frame). The IV curves of the same device with the applied strain of 0.0% (Fig. 26A: third frame from the top) and 4.7% (Fig. 26A: bottom frame) are plotted in red and black, respectively, in Fig. 26B. These results indicate that the current from the source to the drain of the warped MESFET on the PDMS substrate can be well regulated by the voltage applied to the gate, and the applied extension strain has only a minor effect on device performance.

In summary, this example discloses a "warping" and "wavy" GaAs tape for forming "warping" and "wavy" GaAs tapes on a PDMS elastomer substrate and forming a PDMS elastomer substrate. method. The geometric configuration of these bands depends on the pre-strain level used in the manufacturing, the strength of the interaction between the PDMS and the tape, and the thickness and type of material used. The ability to adjust the geometry of the ribbed and wavy strips in a manner that accommodates the applied strain without transferring the strain to the material itself, the GaAs multilayer stack and the fully formed MESFET device And the wavy band exhibits a higher level of compressibility/extensibility. Successfully achieving high levels of mechanical extensibility in a material that is inherently weak in GaAs (and, as a result, other attractive mechanical properties such as extreme bendability) provides a wide range of other material types that can be applied to a wide range of materials. A similar strategy.

The thermally induced pre-strain system is attributed to the thermal expansion of the PDMS stamp, which has a bulk linear thermal expansion coefficient of α _L = 3.1 × 10 ^-4 μm / μm / ° C. On the other hand, the thermal expansion coefficient of GaAs is only 5.73 × 10 ^-6 μm / μm / °C. Therefore, for samples prepared at 90 ° C and cooled to 27 ° C, the pre-strain on the PDMS (relative GaAs band) is based on Δα _L × Δ T = (3.1 × 10 ^{-4 -} 5.73 × 10 ^-6 ) × (90-27 ) = 1.9% to determine.

Method: A GaAs wafer with a user-designed epitaxial layer was purchased from IQE Corporation (Bethleton, PA). The lithography process uses AZ photoresist (ie AZ 5214 and AZ nLOF 2020 for positive and negative imaging, respectively). Anisotropically etched with photoresist in an etchant cooled in an ice water bath (4 mL H ₃ PO ₄ (85 wt%), 52 mL H ₂ O ₂ (30 wt%), and 48 mL deionized water) A GaAs wafer with a mask pattern. Dilute HF solution with ethanol (volume ratio 1:2) (Fisher Chemicals) dissolves the AlAs layer. A sample of the tape having the release on the parent wafer was dried in a fume hood. The dried sample was placed in a chamber of an electron beam evaporator (Temescal FC-1800) and a layer of 2-nm Ti and 28-nm SiO _{2 was} plated. The metal for the MESFET device is deposited by electron beam evaporation prior to removal of the AlAs layer. By pouring a mixture of low modulus PDMS (A: B = 1:10, Sylgard 184, Dow Corning) to (tris-fluorenyl-1,1,2,2-tetrahydrooctyl)-1-three A single layer of pre-modified monoterpene wafer of chlorodecane was then baked at 65 ° C for 4 hours to prepare a PDMS printer having a thickness of about 5 mm. To create a strong bond, the seals were exposed to UV light for 5 minutes. During the transfer, the stamps are extended via thermal expansion (in the oven) and/or mechanical force. The wafer with the released tape was then laminated to the surface of the extended PDMS stamp and allowed to remain in contact for 5 minutes at high temperatures (depending on the desired pre-strain). The parent wafer is stripped from the stamps and all strips are transferred to the stamp. The pre-strain applied to the stamp is released by cooling to room temperature and/or removing such mechanical forces, resulting in the formation of undulating contours along the strip. In these mechanical evaluations, a specially designed stage is used to extend and compress the PDMS stamp with "wavy" and "warped" GaAs strips.

Example 3: Two-dimensional extensible semiconductor

The present invention provides extendable semiconductors and extendable electronic devices that are capable of extending, compressing, and/or flexing in a plurality of directions, including directions oriented orthogonally to one another. The extendable semiconductor and extendable electronic device of this aspect of the invention exhibit good mechanical and electronic properties and/or device performance when extended and/or compressed in multiple directions.

27A-C provide images of the present invention showing two-dimensional extensibility of extensible germanium semiconductors at different levels of magnification. The extensible semiconductor shown in Figures 27A-B is prepared by pre-straining an elastic substrate through thermal expansion.

28A-C provide images of three different structural configurations of the present invention showing a two-dimensional extensible extensible semiconductor. As shown, the semiconductor structure of Figure 28A exhibits an edge line wavy configuration, the semiconductor structure of Figure 28B exhibits a herringbone wavy configuration, and the semiconductor structure of Figure 28C exhibits a random wavy configuration.

29A-D provide an image of an extensible semiconductor of the present invention fabricated by pre-straining an elastic substrate by thermal expansion.

Figure 30 shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility prepared by pre-straining an elastic substrate by thermal expansion. Figure 30 shows an image corresponding to a variety of extension and compression conditions.

31A shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility fabricated by pre-straining an elastic substrate by thermal expansion. Figures 31B and 31C provide experimental results regarding the mechanical properties of the extensible semiconductor shown in Figure 31A.

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Statement on the incorporation and change by reference

The following references relate to self-assembly techniques that can be used in the methods of the present invention to transfer, assemble, and interconnect printable semiconductor components via contact printing and/or solution printing techniques, and are incorporated herein by reference in their entirety: 1) "Guided molecular self-assembly: a review of recent efforts", Jiyun C Huie Smart Mater. Struct. (2003) 12,264-271; (2) "Large-Scale Hierarchical Organization of Nanowire Arrays for Integrated Nanosystems", Whang, D.;Jin,S.;Wu,Y.;Lieber,CM Nano Lett. (2003) 3(9), 1255-1259; (3) "Directed Assembly of One-Dimensional Nanostructures into Functional Networks", Yu Huang, Xiangfeng Duan, Qingqiao Wei, and Charles M. Lieber, Science (2001) 291, 630-633; and (4) "Electric-field assisted assembly and alignment of metallic nanowires", Peter A. Smith et al., Appl. Phys. Lett. (2000) 77(9), 1399-1401.

All references throughout this application, such as patent documents including patents granted or granted, or equivalents thereof; patent application publications; unpublished patent applications; and non-patent literature or other information source materials, full text The manner in which they are incorporated is incorporated by reference to the extent of the extent of the extent of the disclosure of the disclosure of the disclosure of each of the of Inconsistent parts are incorporated herein by reference.

Any of the appendices herein are hereby incorporated by reference herein in its entirety in its entirety in its entirety herein.

Where the terms "comprise", "comprises", "comprised", "comprising" are used herein, the expression should be understood to mean the stated features, integers, The presence of steps, or components, does not exclude the presence or addition of one or more other features, integers, steps, components, or groups thereof. In the terms "comprising" or "comprise (s)" or "comprised" may be grammatically similar terms, such as "consisting of" or "substance". It is also contemplated that the individual embodiments of the invention are intended to be encompassed by the <RTIgt;

The invention has been described with reference to various specific and preferred embodiments and techniques. However, it will be appreciated that various changes and modifications can be made while remaining within the spirit and scope of the invention. It will be apparent to those skilled in the art that compositions, methods, devices, device components, materials, procedures, and techniques other than those specifically described herein may be applied to the practice of the invention as broadly disclosed herein without resorting to In inappropriate experimentation. All of the functional equivalents of the compositions, methods, devices, device components, materials, procedures, and techniques described herein are intended to be included in the present invention. Whenever a range is revealed, it is desirable to include all sub-ranges and individual values as if they were presented independently. The present invention is not limited by the disclosed embodiments (including those shown in the drawings or exemplified in the specification), which are given by way of illustration or description. The scope of the invention should be limited only by the scope of the patent application.

700. . . Semiconductor component

705. . . Flexible substrate

710. . . Support surface

715. . . Curved semiconductor structure

720. . . Curved inner surface

730. . . Deformation axis

750. . . Concave area

760. . . Fluctuating feature

776. . . Printable semiconductor structure

777. . . Flexible substrate

Figure 1 provides an atomic force micrograph showing an extensible semiconductor structure of the present invention.

Figure 2 shows an atomic force micrograph showing an expanded view of a semiconductor structure having a curved inner surface.

3 shows an atomic force micrograph of an array of extensible semiconductor structures of the present invention.

4 shows an optical micrograph of an extensible semiconductor structure of the present invention.

Figure 5 shows an atomic force micrograph of an extensible semiconductor structure having a semiconductor structure in accordance with the present invention in combination with a flexible substrate having a three-dimensional relief pattern on a support surface of the substrate.

Figure 6 shows a flow chart illustrating an exemplary method of fabricating the extensible semiconductor component of the present invention.

Figure 7 shows an image of an array of extendable semiconductor structures having longitudinal alignment of the inner surface of a curved curve supported by a flexible rubber substrate.

8 shows a cross-sectional image of an extensible semiconductor structure of the present invention, wherein the printable semiconductor structure 776 is supported by a flexible substrate 777. As shown in FIG. 8, the printable semiconductor structure 776 has an inner surface having a contour shape in the form of a periodic wave.

Figure 9A shows a flow chart illustrating an exemplary method of fabricating an array of extensible thin film transistors. Figure 9B shows an optical micrograph of an array of extensible thin film transistors in a relaxed and extended configuration.

Figure 10: Schematic illustration of a process for constructing an extendable single crystal germanium device on an elastomeric substrate. The first step (top box) involves the fabrication of a single crystal thin (between 20 and 320 nm thickness) components or a complete integrated device (ie, a transistor, a diode, etc.) by conventional micro Movies process followed by etching and the top silicon wafer of silicon (SOI) layer on an insulator of SiO ₂ to complete. After these procedures, the ribbon structure is supported by the underlying wafer but not bonded to it (top frame). A pre-strained elastomeric substrate (poly(dimethyloxane) PDMS, extended by dL) is brought into contact with the leads of the ribbons to cause bonding between the materials (middle frame). The PDMS is stripped to bond the strips to its surface, and then the pre-strain is released such that the PDMS relaxes back to its unconstrained state (no stress length L). This relaxation results in the spontaneous formation of a well-controlled, highly periodic, extendable "waveform" structure (bottom frame) in the bands.

Figure 11: (A) Optical image of a massively aligned array of one of the wavy single crystal ruthenium bands (width = 20 μm; pitch = 20 μm; thickness = 100 nm) on PDMS. (B) An angled scanning electron micrograph of four corrugated ankle bands taken from the array shown in (A). The wavelengths and amplitudes of the equal wave structures are extremely uniform in the array. (C) The surface height (top frame) as a function of the position of a wavy Si band on the PDMS and the wave number (bottom frame) of the Si Raman peak were measured by atomic force and Raman microscopy, respectively. These lines represent the sinusoidal fit of the data. (D) The amplitude (top frame) and wavelength (bottom frame) of the wavy band as a function of the thickness of the crucible are all pre-strained for positioning in the PDMS. These lines correspond to calculations without any fitting parameters.

Figure 12: Warping wavelength as a function of temperature. The slight decrease in wavelength with temperature is attributed to the thermal shrinkage of the PDMS, which results in a shorter wavelength of the sample prepared at the higher temperature.

Figure 13: Peak strain of 矽 as a function of 矽 thickness, for a pre-strain value of about 0.9%. The red symbol corresponds to the bending strain calculated using the wavelength and amplitude, which are taken based on the equation describing the warping process. The black symbol corresponds to a similar calculation, but uses the wavelength and amplitude measured by AFM.

Figure 14: (A) Atomic force micrograph (AFM; left border) and undulating contour (right border; wavy experimental data of a wavy single crystal 矽 tape (width = 20 μm; thickness = 100 nm) on a PDMS substrate Sinusoidal fit). The top, middle, and bottom portions correspond to configurations when PDMS is subjected to strains of -7% (compression), 0% (unstressed), and 4.7% (extension) along the length of the strip. (B) Average amplitude (black) and wavelength change (red) of the wavy band as a function of the strain applied to the PDMS substrate (top frame). For wavelength measurement, different substrates are used for tensioning (circumference) and compression (squares). The 矽 strain peak is a function of the applied strain (bottom box). The lines in these figures represent calculations without any free-fitting parameters.

Figure 15: AFM top view image of the wavy ankle band on the PDMS, and the cut line estimated at an angle relative to the long dimension of the bands.

Figure 16: Tensile strain as a function of applied strain. The red symbol corresponds to the strain calculated using the numerical integration of the wavelength and amplitude by the length of the contour, which is obtained using an equation describing the warping process. The black symbol corresponds to the strain measured along the wavy Si band in the AFM surface profile in proportion to the surface to horizontal distance.

Figure 17: (A) Optical image of a stretchable single crystal 矽 pn diode on a PDMS substrate with applied -11% (top), 0% (middle) and 11% (bottom) strain. The aluminum region corresponds to a thin (20 nm) Al electrode; the pink and green regions correspond to the n (boron) and p (phosphorus) doped regions of germanium. (B) Current density as a function of the bias of the extendable 矽 pn diode, measured at various applied strain levels. The curves labeled "Bright" and "Dark" correspond to devices that are exposed to ambient light or shaded to ambient light, respectively. The solid line shows the modeled results. (C) Current-voltage characteristics of an extendable Schottky barrier MOSFET measured at -9.9%, 0%, and 9.9% strain applied (gate voltage varies from 0 V to -5 in 1 V steps) V).

Figure 18: Peak strain of enthalpy as a function of applied strain. The blue line is based on an accordion bellows model, and the black line is one of the small strains, which is also consistent with the rib mechanism.

Figure 19: Electrical measurements of wavy pn diodes, compression (about 5% applied strain), extension (about 15% applied strain) in three different devices (#1, #2, and #3) And about 100 cycles before (before the cycle) and after (after the cycle) are estimated in three different devices. This data indicates that there is no systematic change in the nature of the device. The level of change observed is comparable to the level of change obtained by a single device that does not change the applied strain, and may be due to a slight difference in probe contacts.

Figure 20: Optical image (top frame) of a corrugated Schottky barrier MOSFET in an unstressed (middle) and compressed (top) and tensioned (bottom) state. A schematic illustration of the device (bottom frame).

Figure 21: Transfer curve measured in a "wavy" 矽 Schottky barrier MOSFET at different applied strains.

Figure 22: Schematic illustration of the steps used to create "warped" and "wavy" GaAs strips on a PDMS substrate. The left bottom frame shows the deposition of thin SiO ₂ on the surface of the strips to promote strong bonding with the PDMS. This combination results in the formation of a wavy geometric shape shown in the middle middle frame. The weak Van der Waals force combination (and medium to high level pre-strain) results in a warp geometry as shown in the upper right frame.

Figure 23: Image of a corrugated GaAs strip formed on a PDMS substrate with a pre-strain of about 1.9% generated by thermal expansion. Optical (A), SEM (B), three-dimensional AFM (C) and topographic AFM (D) images of the same sample. The SEM image was obtained by tilting the sample stage at an angle of 45° between the surface of the sample and the direction of detection. (The points on the strips may be the residues of the sacrificial AlAs layers.) The surface height distributions (E, F) plotted along the blue and green lines shown in (D), respectively.

Figure 24: (A) Optical micrograph of a wavy GaAs ribbon formed at 7.8% pre-strain and strongly bonded to the PDMS, collected under different applied strains. The blue bars on the left and right highlight some of the peaks in the structure; the change in distance between the bars indicates the dependence of the wavelength on the applied strain. (B) Wavelength change as a function of applied strain of the wavy GaAs strip shown in (A), plotted in black; similar data for the system of sample (A) after embedding PDMS, plotted in red.

Figure 25: Image of a GaAs strip integrated with ohmic (source and drain) and Schottky (gate) contacts to form a complete MESFET. (A) An optical micrograph of a wavy band formed using a pre-strain of 1.9% and a strong bond with the PDMS, which shows the formation of periodic waves only in the electrodeless region (gray). (B) Optical image and (C) SEM image of the warp strip formed by pre-strain of about 7% and weak combination with the PDMS. (D), the optical image of the two ribs shown in (B) after it is extended to flat. (E), the individual tape devices shown in (B) have different externally applied strains (ie, from top to bottom, 5.83% compressive strain, no applied strain, and 5.83% extended strain) are embedded in A set of optical images after PDMS.

Figure 26: (A), an optical image of a GaAs-band MESFET with different strains on a PDMS stamp constructed in a PDMS substrate. The pre-strain applied to the PDMS seal before the devices were transferred to the surface of the PDMS stamp was 4.7%. (B) Comparison of the I-V curves of the devices shown in (A) before and after the system was applied with an elongation strain of 4.7%.

27A-C provide images of the extendable semiconductors of the present invention exhibiting two-dimensional extensibility at different levels of magnification.

Figures 28A-C provide images of three different structural configurations of the extensible semiconductor of the present invention showing two-dimensional extensibility.

29A-D provide images of the extensible semiconductor of the present invention prepared by pre-straining the elastic substrate by thermal expansion.

Figure 30 shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility in a varying extended and compressed state.

31A shows an optical image of an extensible semiconductor exhibiting two-dimensional extensibility fabricated by pre-straining an elastic substrate by thermal expansion.

Figures 31B and 31C provide experimental results regarding the mechanical properties of the extensible semiconductor shown in Figure 31A.

(no component symbol description)

Claims (44)

An extendable semiconductor component comprising: an elastic substrate having a support surface; and a semiconductor structure having a curved inner surface, wherein a plurality of discrete points of the curved inner surface are bonded to the support surface of the elastic substrate, And combining the discrete points with each other by a warp region not directly bonded to the elastic substrate, wherein the warped region is not physically in contact with the substrate, and wherein the curved inner surface has at least one raised region, At least one recessed area or at least one raised area is combined with one of the at least one recessed area. The extendable semiconductor component of claim 1, wherein the warped region is under strain. The extendable semiconductor component of claim 2, wherein the strain system is selected from the range of 1% to 30%. An extendable semiconductor device according to claim 1, wherein the inner surface of the curve has a contour shape including a periodic wave or a periodic wave. The extendable semiconductor component of claim 1, wherein the warped semiconductor structure has a periodic wave configuration that extends at least a portion of the length of the structure. An extendable semiconductor device according to claim 5, wherein the warped semiconductor structure has a sinusoidal configuration having a period selected from the range of 5 micrometers to 50 micrometers and a period selected from 100 nanometers to 1.5 The amplitude of the range of microns. An extendable semiconductor component according to claim 1, wherein the warped semiconductor junction The structure has a configuration comprising a plurality of warps extending along the length of the structure. An extendable semiconductor component according to claim 1, wherein the semiconductor structure comprises a strip. An extendable semiconductor component according to claim 1, wherein the warped semiconductor structure has a spatially varying configuration in one or two dimensions, wherein the inner surface has a contour shape that varies spatially in one or two dimensions. The extendable semiconductor component of claim 1, wherein the semiconductor structure has a thickness selected from the range of 20 nm to 320 nm. The extendable semiconductor component of claim 1, wherein the elastic substrate comprises a polymer. An extendable semiconductor component according to claim 1, wherein the semiconductor structure is a single crystal inorganic semiconductor material. The extensible semiconductor device of claim 1, wherein the semiconductor structure comprises a material selected from the group consisting of germanium, germanium, tantalum carbide, aluminum phosphide, aluminum arsenide, aluminum telluride, and nitride. Gallium, gallium phosphide, gallium arsenide, gallium antimonide, indium phosphide, indium arsenide, indium antimonide, zinc oxide, zinc selenide, zinc telluride, cadmium sulfide, cadmium selenide, cadmium telluride, silver sulfide , lead sulfide, lead selenide, lead telluride, aluminum gallium arsenide, aluminum indium arsenide, aluminum indium phosphide, gallium arsenide, gallium arsenide, gallium phosphide indium, arsenide aluminum gallium arsenide, phosphating Aluminum gallium indium, gallium arsenide phosphide, carbon nanotubes and graphite sheets. The extendable semiconductor component of claim 1, wherein the semiconductor structure comprises a printable semiconductor component. An extendable semiconductor component according to claim 1, further comprising one and the An encapsulating layer in contact with a semiconductor structure having a curved inner surface. An extendable semiconductor component according to claim 1, wherein the semiconductor structure is bonded to the elastic substrate via an adhesive layer, coating or film that is located between the semiconductor structure and the elastic substrate. An extendable semiconductor component according to claim 1, wherein the semiconductor structure is bonded to the elastic substrate via a hydrogen bond, a van der Waals interaction or a dipole-to-dipole interaction between the semiconductor structure and the elastic substrate. An extendable semiconductor component according to claim 1 comprising a plurality of semiconductor structural strips, each strip having a curved inner surface, wherein the substrate is flat between the strips. The extendable semiconductor component of claim 6, wherein the period and the amplitude are within 5% of a surface of the substrate of 1 square centimeter. An extendable semiconductor component according to claim 2, wherein the strain is greater than 0.5%. The extendable semiconductor component of claim 2, wherein the strain is greater than 1%. The extensible semiconductor component of claim 2, wherein the strain is greater than 2%. The extendable semiconductor component of claim 2, wherein the strain is less than 30%. The extendable semiconductor component of claim 2, wherein the strain is less than 10%. The extendable semiconductor component of claim 2, wherein the strain is less than 1%. An extendable electronic circuit comprising: an elastic substrate having a support surface; and an electronic circuit having a curved inner surface, wherein a plurality of discrete points of the curved inner surface are coupled to the support surface of the elastic substrate, Knot And the discrete points are separated from each other by a warpage region that is not directly bonded to the elastic substrate, wherein the warped region is not in physical contact with the substrate, and wherein the curved inner surface has a periodic wave or a A periodic wave is characterized by a contour shape. An extendable electronic circuit as in claim 26, wherein the electronic circuit is a printable electronic circuit. An extendable electronic circuit as claimed in claim 26, wherein the electronic circuit comprises a plurality of integrated device components selected from the group consisting of: a semiconductor component, a dielectric component, an electrode, a conductive element, and a doped semiconductor element. An extendable electronic circuit as in claim 26, wherein the warped region is under strain. The extendable semiconductor component of claim 29, wherein the strain system is selected from the range of 1% to 30%. The extendable electronic circuit of claim 26, wherein the warped region has a configuration comprising a periodic wave that extends at least a portion of the length of the electronic circuit. An extendable electronic circuit as claimed in claim 26, wherein the warped region has a sinusoidal configuration having a period selected from the range of 5 microns to 50 microns and a selected from 100 nm to 1.5 microns The amplitude of the range. An extendable electronic circuit as in claim 26, wherein the warped region has a configuration comprising a plurality of warps extending along a length of the electronic circuit. An extendable electronic circuit as claimed in claim 26, wherein the warped region has a A spatially varying configuration in one or two dimensions, wherein the inner surface has a contour shape that varies spatially in one or two dimensions. An extendable electronic circuit as claimed in claim 26, wherein the electronic circuit has a thickness selected from the range of 20 nm to 320 nm. An extendable electronic circuit according to claim 26, wherein the electronic circuit is bonded to the elastic substrate via an adhesive layer, coating or film that is located between the electronic circuit and the elastic substrate. The extendable electronic circuit of claim 26, further comprising an encapsulation layer in contact with the electronic circuit having a curved inner surface. A method for fabricating an extendable semiconductor device, the method comprising the steps of: providing a plurality of ribbons attached to a wafer; conformally contacting a top surface of the ribbons with a flat pre-strained elastic substrate Stripping the elastic substrate in a direction away from the wafer to lift the strips apart from the wafer, and bonding to the elastic substrate; releasing the pre-strain on the elastic substrate to be produced in the ribbons a plurality of warps, wherein the ankle straps have a curved inner surface, wherein a plurality of discrete points of the inner surface of the curved surface are bonded to a support surface of the elastic substrate, and the discrete points are combined by one without direct bonding The warp regions of the elastic substrate are separated from each other. A method of claim 38 for fabricating an extendable semiconductor component, wherein the flexible substrate is planar between the strips. A method of claim 38 for fabricating an extensible semiconductor device, wherein the extensible semiconductor device comprises a pn junction diode. A method of claim 40 for fabricating an extensible semiconductor device, wherein the pn junction bipolar system is part of a photovoltaic device. A method of claim 38 for fabricating an extensible semiconductor device, wherein the extensible semiconductor device comprises a field effect transistor. The method of claim 38 for fabricating an extendable semiconductor device, wherein the plurality of straps are provided by defining a photoresist layer on a wafer over the insulator, thereby defining the plurality of straps Dimensions; removing the photoresist layer; and releasing a central portion of the strip from the underlying wafer by etching while maintaining attachment of the plurality of ends of the strip to the wafer. A dual transfer method for fabricating an extendable semiconductor device, the method comprising the steps of: providing a plurality of ribbons connected to a wafer; conforming a top surface of the ribbons to a flat unstrained elastic substrate Ground contact; peeling the elastic substrate away from the wafer to lift the strips apart from the wafer, and bonding the strips to the unstrained elastic substrate; bonding to the unstrained elastic substrate A top surface of the isolating tape is in conformal contact with a pre-strained elastic substrate; the pre-strained elastic substrate is peeled away from the unstrained elastic substrate to enhance the separation of the strip from the unstrained elastic substrate, and bonding The Equiring to the pre-strained elastic substrate; and releasing the pre-strain on the elastic substrate to produce a plurality of warpages in the slings, wherein the slings have a curved inner surface, wherein the inner surface of the curved surface A plurality of discrete points are bonded to a support surface of the elastic substrate, and the discrete points are separated from each other by a warpage region that is not directly bonded to the elastic substrate.