TWI470752B - 應用於電子元件之電容式連接結構 - Google Patents

應用於電子元件之電容式連接結構 Download PDF

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TWI470752B
TWI470752B TW100145554A TW100145554A TWI470752B TW I470752 B TWI470752 B TW I470752B TW 100145554 A TW100145554 A TW 100145554A TW 100145554 A TW100145554 A TW 100145554A TW I470752 B TWI470752 B TW I470752B
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connection structure
capacitor
signal line
connection
signal
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TW100145554A
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TW201324707A (zh
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Eric S Li
Yu Shao Shiao
Tzi Hong Chiueh
shu yang Chen
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Univ Nat Taipei Technology
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Description

應用於電子元件之電容式連接結構
本發明係關於一種連接結構，特別是關於一種應用於電子元件的電容式連接結構。
近年來，伴隨著無線通訊技術的進步，各國無線通訊服務的開放，及其與網際網路的密切結合，無線通訊市場的蓬勃發展已是時代趨勢。各式各樣的無線通訊產品係由各種主/被動電子元件及相關電路所構成，其中作用於高頻工作區間之電子元件特性，對於無線通訊產品之品質更扮演著舉足輕重的關鍵。為了有效確保無線通訊產品的品質，元件內的製程便顯得十分重要。
為了因應元件製程階段之需求，需要將一元件晶片連接至一例如微帶線結構之平面傳輸線。習知之微帶線結構與元件晶片間之連接方式係主要包括下列三種：打線連接(Wire Bonding)法、帶狀連接(Ribbon Bonding)法及覆晶連接(Flip Chip)法。
打線連接(Wire Bonding)法係為傳統最常見的作法，並且其具有成本低廉之優點。如第一圖所示，係為習知之採用打線連接(Wire Bonding)法之連接結構的示意圖。連接結構100a係用以連接一元件晶片120及一微帶線結構130，其更包括一金屬底板110、一直流阻隔電容(DC Block Capacitor)140及一金線150a。元件晶片120置於金屬底板110之上，以方便連接。微帶線結構130係置於金屬底板110上，且不與元件晶片120重疊。直流阻隔電容140係置放於微帶線結構130 上之一信號線131不連續處的上方，以連接中斷之信號線131。藉由線寬為1密耳(千分之一吋，mil)的金線150a直接將元件晶片120之信號墊片121及微帶線結構130之信號線131作電性連接。然而，由於連接元件晶片120與微帶線結構130之間的金線150a的線長約為60密耳，此金線150a的線長在高頻的工作區間會產生寄生電感效應，造成元件在信號傳輸過程中，而產生嚴重的連接耗損。
為了解決打線連接法可能造成信號傳遞之連接耗損的問題，如第二圖所示，係為習知之採用帶狀連接(Ribbon Bonding)法之連接結構的示意圖。連接結構100b包括一金屬底板110、一元件晶片120、一微帶線結構130、一直流阻隔電容140及一帶狀鋁線150b。元件晶片120置於金屬底板110之上，以方便連接。微帶線結構130係置於金屬底板110上，且不與元件晶片120重疊。直流阻隔電容140係設置於微帶線結構130上之一信號線131的不連續處上方，以連接中斷之信號線131。採用帶狀鋁線150b來取代上述打線連接法之金線150a，以降低在高頻工作區間內所產生之寄生電感效應，以減少連接耗損。然而，帶狀鋁線150b之線寬尺寸過大，因此在製程中，將不易與信號墊片121及信號線131做電性連接，而產生連接時易脫落的問題。
為了改善打線連接法及帶狀連接法之缺點，習知之覆晶連接(Flip Chip)法是採用一鉛錫合金球體150c取代先前的金線150a及帶狀鋁線150b，來做為元件晶片120與微帶線結構130之間的連接實體。如第三圖所示，係為習知之採用覆晶連接法之連接結構的示意圖。連接結構100c包括一金屬 底板110、一元件晶片120、一微帶線結構130、一直流阻隔電容140及一鉛錫合金球體150c。微帶線結構130係置於金屬底板110上。直流阻隔電容140係設置於微帶線結構130之信號線131的不連續處上方，以連接中斷的信號線131。藉由將直徑5密耳之鉛錫合金球體150c設置於信號線131上，並且將元件晶片120藉由信號墊片121直接附著於鉛錫合金球體150c上，即可將元件晶片120與信號線131做電性連接。覆晶連接法雖然可降低連接耗損，並且具有不易脫落之優點，然而，由於鉛錫合金球體150c之結構製程不易，會使得其製程成本過高。
綜上所述，習知之打線連接法及帶狀連接法雖具有成本低廉且製程簡易之優點，但是在元件的製程中需要搭配一直流阻隔電容，以阻絕直流電源。此外，打線連接法之連接結構100a在高頻工作區間時，會導致元件產生嚴重的連接耗損。至於，帶狀連接法之連接結構100b，其帶狀鋁線之線寬尺寸過大，將不易使信號線與元件晶片作連接，而容易有附著性不佳的問題。習知之覆晶連接(Flip Chip)法雖具有在高頻工作區間仍有較低之連接耗損，及良好的附著性等優點。然而，在元件的製程中仍需要搭配一直流阻隔電容，以阻絕直流電源，並且其製程成本較高。
因此，如何提供一種具有低成本、良好附著性及電性連接且低連接耗損的連接結構，是本技術領域亟欲解決之問題。
本發明之一目的係在於提供一種應用於電子元件之連接結構，藉由一電容來做為連接實體，以電性連接一元件晶片 及一微帶線結構，以降低在高頻工作區間容易造成之連接耗損，並且提供良好之附著性。
本發明的其他目的和優點可以從本發明所揭露的技術特徵中得到進一步的了解。
為達上述之一或部份或全部目的或是其他目的，本發明之一實施例係為一種電子元件之電容式連接結構，其包括一金屬底板、一元件晶片、一微帶線結構及一電容，並且係適用於將元件晶片及微帶線結構作連接。元件晶片係位於金屬底板上。微帶線結構係位於金屬底板之上，且不與元件晶片重疊，且微帶線結構上具有一信號線。特別地是，電容用以連接元件晶片上一信號墊片及微帶線結構之信號線。
在一實施例中，微帶線結構包括信號線、一介電材料層及一接地層，且介電材料層係設置於信號線和接地層之間。其中，信號線之材料係為一金屬，接地層亦為一金屬，且設置於金屬底板上，而元件晶片之信號墊片係藉由電容而電性連接至信號線。此外，電容可藉由一導電黏著法，而與信號墊片與微帶線結構之信號線作連接。
在一實施例中，微帶線結構亦可由一共平面波導傳輸線或一接地共平面波導傳輸線來取代。此外，微帶線結構之信號線的線寬可根據介電材料層之一介電係數及其厚度來調變，並且具有足夠的線寬以供電容與信號線，來進行一表面焊接。
在一實施例中，電容之電容值範圍係根據元件晶片之一工作頻率所決定，至於電容之可工作頻率範圍係根據元件晶 片之一操作頻率所決定，且其中電容之可工作頻率範圍必須大於或等於元件晶片之操作頻率。
相較於習知，本發明實施例係使用電容作為連接元件晶片及微帶線結構間之連接實體，故在高頻工作區間時，可減少其寄生電感效應，而可有效降低連接耗損。此外，電容本身具有阻隔直流電源之功能，而可保護與其連接的其他電路，因此，無須於微帶線結構之信號線的輸入/輸出埠上再焊上額外之直流阻隔電容，而可將連接結構簡單化。
有關本發明之前述及其他技術內容、特點與功效，在以下配合參考圖式之一較佳實施例的詳細說明中，將可清楚地呈現。以下實施例中所提到的方向用語，例如：上、下、左、右、前或後等，僅是用於參照隨附圖式的方向。因此，該等方向用語僅是用於說明並非是用於限制本發明。
請參照第四圖，係為本發明實施例之連接結構的俯視圖。一種應用於電子元件之電容式連接結構200，係用以連接一元件晶片220及一微帶線結構230。連接結構200除包含元件晶片220及微帶線結構230，更包括一金屬底板210以及一電容240。元件晶片220係設置於金屬底板210上，且具有一信號墊片221，以便連接。微帶線結構230係設置於金屬底板210上，且不與元件晶片220重疊，並且微帶線結構230上具有一信號線231。特別地是，電容240係設置於元件晶片220及微帶線結構230之間，並且將元件晶片220上之信號墊片221及微帶線結構230之信號線231作電性連接。
請參照第五圖，係為本發明實施例之微帶線結構的截面剖視圖。微帶線結構230係依序地由信號線231、一介電材料層232及一接地層233堆疊而成，其中信號線231之材料係為一金屬。本發明實施例中，微帶線結構230亦可由一共平面波導傳輸線(Coplanar Waveguide)或一接地共平面波導傳輸線(Grounded Coplanar Waveguide)來取代，其中，共平面波導傳輸線其下方並不需要金屬底板210。至於，微帶線結構230之信號線231的線寬係可根據介電材料層232之一介電係數及其厚度來決定，並且信號線231的線寬具有足夠的寬度，以供電容240與信號線231作表面焊接。此外，微帶線結構230具有製程簡易、成本低廉、可靠度佳與微型化等優點。
同時參考第六及六A圖，分別係為本發明實施例之電容式連接結構的部份示意圖及其截面剖視圖。於本實施例中，電容240係採用一貼片型電容(chip capacitor)，貼片型電容240例如為一0402規格電容，一尺寸稍大於0402規格之電容或一尺寸稍小於0402規格之電容，一0603規格電容，亦或一0201規格電容，而可利用一導電黏著法以連接信號墊片221與信號線231之上方，而達到穩定附著的效果。其中，電容240之電容值範圍係根據元件晶片220之一工作頻率所決定，至於電容240之可工作頻率範圍係根據元件晶片220之一操作頻率，其中電容240之可工作頻率範圍必須大於或等於元件晶片220之操作頻率。
於一實施例中，貼片型電容240之尺寸係採用一長度為40密耳，且寬度為20密耳之0402型電容，並且由於0402 型電容已係廣為應用之電子產品，因此具有成本低廉之優點。此外，藉由電容240作為微帶線結構230及信號墊片221之連接實體，會使得本發明實施例之連接結構200具有阻隔直流電源之功能，而可有效保護與此連接結構相連接的其他電路，而不必如習知之連接結構中在微帶線結構之信號線的輸入或輸出埠上再焊上額外之直流阻隔電容，將可有效降低元件製造成本、結構簡單化。
無論採用何種連接結構，當電子元件在高頻工作區之環境下，將會因為連接結構之尺寸所造成的連接距離，而產生電感效應，進而使得電子元件之工作效能大幅降低。因此，針對上述問題，本發明實施例藉由電容240作為連接實體，而能有效減少電感效應的產生，並且減少元件晶片220與微帶線結構230之間的連接距離。
以下藉由一實施例作頻譜響應的比較。其中，微帶線結構230之介電常數係為3.38，其厚度係為0.2056毫米，其長度係為3毫米且其寬度係為2.5毫米。微帶線結構230之信號線231的線寬係為0.44毫米，其特徵阻抗為50歐姆。元件晶片220之長度係為1毫米，其寬度係為1毫米且其高度係為0.3毫米，且其信號墊片221之長度係為80微米，並且其寬度80微米。至於，電容240於本實施例中係採用0402規格，其長度係為1毫米，且其寬度係為0.5毫米，而其電容值為200奈法(10-9 法拉，nF)。
如第七圖所示，係為採用本發明實施例之電容式連接結構與採用習知之連接結構之頻譜響應的比較圖。其中，橫軸代表操作頻率，且其單位為千兆赫茲(GHz)；縱軸代表信號耗 損值，其數值係為連接結構中輸出功率與輸入功率的差異值(dB)。曲線A係採用習知之打線連接法之連接結構的頻譜響應曲線；曲線B係採用習知之帶狀連接法之連接結構的頻譜響應曲線；曲線C係採用習知之覆晶連接法之連接結構的頻譜響應曲線；以及，曲線D係採用本發明實施例之電容式連接結構的頻譜響應曲線。
若以1dB的傳輸通帶作為參考標準，由第七圖可知，採用習知之打線連接法之連接結構的可用頻率範圍為0至5GHz；採用習知之帶狀連接法之連接結構的可用頻率範圍為0至25GHz；採用習知之覆晶連接法之連接結構的可用頻率範圍為0至60GHz；至於，採用本發明實施例之電容式連接結構的可用頻率範圍亦為0至60GHz。
由上述比較可知，本發明實施例之連接結構的效能明顯優於採用習知之打線連接法及帶狀連接法的連接結構，其操作頻率之工作區間無論於高頻或是低頻，皆具有良好的低耗損特質。至於採用習知之覆晶連接法之連接結構的效能與本發明實施例之電容式連接結構差異不大，但是其製造成本相較本發明實施例來得高。
綜上所述，上述實施例具有下列優點：
一、此連接結構具有較低之製造成本。
二、此連接結構具有較低之連接耗損，故在高頻工作區間依然有良好之效能。
三、此連接結構具有良好之附著性，不易因為脫落而造成連接結構失效。
四、此連接結構本身已具有阻隔直流電源之功能，不需額外再加入一直流阻隔電容，故可以將結構簡單化，並降低製程成本。
惟以上所述者，僅為本發明之較佳實施例而已，當不能以此限定本發明實施之範圍，即大凡依本發明申請專利範圍及發明說明內容所作之簡單的等效變化與修飾，皆仍屬本發明專利涵蓋之範圍內。另外本發明的任一實施例或申請專利範圍不須達成本發明所揭露之全部目的或優點或特點。此外，摘要部分和標題僅是用來輔助專利文件搜尋之用，並非用來限制本發明之權利範圍。
100a、100b、100c‧‧‧(習知之)連接結構
110‧‧‧金屬底板
120、220‧‧‧元件晶片
121、221‧‧‧信號墊片
130‧‧‧微帶線結構
131‧‧‧信號線
140‧‧‧直流阻隔電容
150a‧‧‧金線
150b‧‧‧帶狀鋁線
150c‧‧‧鉛錫合金球體
200‧‧‧連接結構
210‧‧‧金屬底板
230‧‧‧微帶線結構
231‧‧‧信號線
232‧‧‧介電材料層
233‧‧‧接地層
240‧‧‧電容
A、B、C、D‧‧‧(頻譜響應之)曲線
第一圖，係習知之採用打線連接法之連接結構的示意圖。
第二圖，係習知之採用帶狀連接法之連接結構的示意圖。
第三圖，係習知之採用覆晶連接法之連接結構的示意圖。
第四圖，係為本發明實施例之電容式連接結構的俯視圖。
第五圖，係為本發明實施例之微帶線結構的截面剖視圖。
第六圖，係為本發明實施例之電容式連接結構的部份示意圖。
第六A圖，係為本發明實施例之電容式連接結構的截面剖視圖。
第七圖，係為本發明實施例與習知連接結構之頻譜響應的比較圖。
200‧‧‧連接結構
210‧‧‧金屬底板
220‧‧‧元件晶片
221‧‧‧信號墊片
230‧‧‧微帶線結構
231‧‧‧信號線
232‧‧‧介電材料層
233‧‧‧接地層
240‧‧‧電容

Claims (9)

  1. 一種應用於電子元件之電容式連接結構，用以連接一元件晶片及一接地共平面波導傳輸線，且該元件晶片具有一信號墊片，該連接結構包括：一金屬底板，其中該元件晶片係設置於該金屬底板上；該接地共平面波導傳輸線，係位於該金屬底板之上，該接地共平面波導傳輸線不與該元件晶片重疊，且該接地共平面波導傳輸線上設置有一信號線；以及一電容，係電性連接於該信號墊片及該接地共平面波導傳輸線之該信號線之間。
  2. 如申請專利範圍第1項所述之應用於電子元件之電容式連接結構，其中該接地共平面波導傳輸線包括該信號線、一介電材料層和一接地層，該介電材料層係設置於該信號線和該接地層之間。
  3. 如申請專利範圍第1項所述之應用於電子元件之電容式連接結構，其中該信號線之材料包括一金屬，且該信號墊片係藉由該電容而電性連接至該信號線。
  4. 如申請專利範圍第2項所述之應用於電子元件之電容式連接結構，其中該接地層係設置於該金屬底板上，且該接地層之材料包括一金屬。
  5. 如申請專利範圍第2項所述之應用於電子元件之電容式連接結構，其中該介電材料層具有一介電係數及一厚度，該信號線之線寬係根據該介電係數及該厚度來決定。
  6. 如申請專利範圍第1項所述之應用於電子元件之電容 式連接結構，其中該電容係採用一導電黏著法，以電性連接該信號墊片與該信號線。
  7. 如申請專利範圍第1項所述之應用於電子元件之電容式連接結構，其中該電容係為一貼片式電容。
  8. 如申請專利範圍第1項所述之應用於電子元件之電容式連接結構，其中該電容之一電容值範圍係根據該元件晶片之一工作頻率所決定。
  9. 如申請專利範圍第1項所述之應用於電子元件之電容式連接結構，其中該電容之一可工作頻率範圍係根據該元件晶片之一操作頻率所決定，且該可工作頻率範圍係大於或等於該操作頻率。
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