TWI457063B - 多層配線基板 - Google Patents

多層配線基板 Download PDF

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Publication number
TWI457063B
TWI457063B TW100139888A TW100139888A TWI457063B TW I457063 B TWI457063 B TW I457063B TW 100139888 A TW100139888 A TW 100139888A TW 100139888 A TW100139888 A TW 100139888A TW I457063 B TWI457063 B TW I457063B
Authority
TW
Taiwan
Prior art keywords
substrate
surface side
conductor
main surface
layer
Prior art date
Application number
TW100139888A
Other languages
English (en)
Other versions
TW201225776A (en
Inventor
Shinnosuke Maeda
Original Assignee
Ngk Spark Plug Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ngk Spark Plug Co filed Critical Ngk Spark Plug Co
Publication of TW201225776A publication Critical patent/TW201225776A/zh
Application granted granted Critical
Publication of TWI457063B publication Critical patent/TWI457063B/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0183—Dielectric layers
    • H05K2201/0191—Dielectric layers wherein the thickness of the dielectric plays an important role
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0335—Layered conductors or foils
    • H05K2201/0352—Differences between the conductors of different layers of a multilayer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09136—Means for correcting warpage

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structure Of Printed Boards (AREA)

Claims (2)

  1. 一種多層配線基板，係具有基板主面及基板背面，並具有積層複數個樹脂絕緣層及複數個導體層而形成的構造，且用以對晶片零件之端子進行面連接之複數個主面側連接端子係配設於該基板主面上，該多層配線基板之特徵為：該多層配線基板係以使用相同材料而形成之該樹脂絕緣層的積層數作為基準，將位於中心之樹脂絕緣層作為中心層，該複數個導體層中，以該中心層作為基準而設於該基板背面側之背面側導體層的平均面積率係形成比設於該基板主面側之主面側導體層的平均面積率更高；並以使用相同材料而形成之該樹脂絕緣層的積層數作為基準，將位於中心之導體層作為中心導體，在以相同材料作為主體之樹脂絕緣層中，以該中心導體作為基準而設於該基板背面側之該複數個樹脂絕緣層，係平均厚度形成比設於該基板主面側之該複數樹脂絕緣層的平均厚度更厚，在該基板背面側形成面積率80%以上、用作為接地層的該導體層，並且在該背面側中與該接地層之雙面連接之樹脂絕緣層比該主面側之樹脂絕緣層更厚。
  2. 如申請專利範圍第1項之多層配線基板，其中有關設於該基板背面側之導體層，用作為接地層之至少一導體層係比設於該基板主面側之導體層更厚的導體層。
TW100139888A 2010-11-04 2011-11-02 多層配線基板 TWI457063B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010247114A JP5587139B2 (ja) 2010-11-04 2010-11-04 多層配線基板

Publications (2)

Publication Number Publication Date
TW201225776A TW201225776A (en) 2012-06-16
TWI457063B true TWI457063B (zh) 2014-10-11

Family

ID=46018541

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100139888A TWI457063B (zh) 2010-11-04 2011-11-02 多層配線基板

Country Status (5)

Country Link
US (1) US8450617B2 (zh)
JP (1) JP5587139B2 (zh)
KR (1) KR101584831B1 (zh)
CN (1) CN102573278B (zh)
TW (1) TWI457063B (zh)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013135080A (ja) * 2011-12-26 2013-07-08 Ngk Spark Plug Co Ltd 多層配線基板の製造方法
JP6127674B2 (ja) * 2013-04-12 2017-05-17 富士通株式会社 基板設計支援装置、基板設計支援方法、及び基板設計支援プログラム
JP6170832B2 (ja) * 2013-12-20 2017-07-26 新光電気工業株式会社 配線基板、半導体装置及び配線基板の製造方法
CN105722303B (zh) * 2014-12-04 2019-01-25 中山台光电子材料有限公司 多层印刷电路板
US10561459B2 (en) 2015-06-03 2020-02-18 Richard P. Fleenor Multi-feature electrosurgical instrument
JP6439636B2 (ja) 2015-09-10 2018-12-19 株式会社デンソー プリント基板の製造方法
US10257932B2 (en) * 2016-02-16 2019-04-09 Microsoft Technology Licensing, Llc. Laser diode chip on printed circuit board
US10993333B2 (en) * 2017-07-15 2021-04-27 Sanmina Corporation Methods of manufacturing ultra thin dielectric printed circuit boards with thin laminates
EP3964824B1 (en) 2020-09-02 2024-02-14 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Expansion coefficient determination with deformation measurement and simulation
CN113923871A (zh) * 2021-09-26 2022-01-11 东莞康源电子有限公司 一种新型无芯基板承载层的封边设计和制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4473935B1 (ja) * 2009-07-06 2010-06-02 新光電気工業株式会社 多層配線基板

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02143583A (ja) * 1988-11-25 1990-06-01 Mitsubishi Electric Corp メモリモジュール
JP3750832B2 (ja) * 1997-04-17 2006-03-01 シャープ株式会社 多層配線板
JP2001217514A (ja) * 2000-02-03 2001-08-10 Denso Corp 多層配線基板
JP2003179330A (ja) * 2001-12-12 2003-06-27 Hitachi Chem Co Ltd 多層印刷配線板とその製造方法
KR100631922B1 (ko) * 2004-02-23 2006-10-04 삼성전자주식회사 개선된 열 확산 성능을 갖는 다층 회로 보오드 및 그에따른 제조방법
KR100854614B1 (ko) * 2004-06-11 2008-08-27 이비덴 가부시키가이샤 플렉스리지드 배선판과 그 제조 방법
TW200704298A (en) * 2005-04-28 2007-01-16 Matsushita Electric Ind Co Ltd Multilayer wiring board and method for producing the same
JP4072176B2 (ja) 2005-08-29 2008-04-09 新光電気工業株式会社 多層配線基板の製造方法
JP4452222B2 (ja) * 2005-09-07 2010-04-21 新光電気工業株式会社 多層配線基板及びその製造方法
US8227703B2 (en) * 2007-04-03 2012-07-24 Sumitomo Bakelite Company, Ltd. Multilayered circuit board and semiconductor device
US8072732B2 (en) * 2007-04-10 2011-12-06 Ngk Spark Plug Co., Ltd. Capacitor and wiring board including the capacitor
US7759787B2 (en) * 2007-11-06 2010-07-20 International Business Machines Corporation Packaging substrate having pattern-matched metal layers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4473935B1 (ja) * 2009-07-06 2010-06-02 新光電気工業株式会社 多層配線基板

Also Published As

Publication number Publication date
US20120111624A1 (en) 2012-05-10
JP2012099692A (ja) 2012-05-24
CN102573278A (zh) 2012-07-11
JP5587139B2 (ja) 2014-09-10
KR20120047826A (ko) 2012-05-14
CN102573278B (zh) 2014-10-15
TW201225776A (en) 2012-06-16
KR101584831B1 (ko) 2016-01-13
US8450617B2 (en) 2013-05-28

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