TWI446429B - 半導體裝置及其製造方法 - Google Patents

半導體裝置及其製造方法 Download PDF

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Publication number
TWI446429B
TWI446429B TW100111754A TW100111754A TWI446429B TW I446429 B TWI446429 B TW I446429B TW 100111754 A TW100111754 A TW 100111754A TW 100111754 A TW100111754 A TW 100111754A TW I446429 B TWI446429 B TW I446429B
Authority
TW
Taiwan
Prior art keywords
wafer
main surface
metal film
circuit pattern
forming
Prior art date
Application number
TW100111754A
Other languages
English (en)
Chinese (zh)
Other versions
TW201205656A (en
Inventor
金谷康
塚原良洋
渡邊伸介
Original Assignee
三菱電機股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 三菱電機股份有限公司 filed Critical 三菱電機股份有限公司
Publication of TW201205656A publication Critical patent/TW201205656A/zh
Application granted granted Critical
Publication of TWI446429B publication Critical patent/TWI446429B/zh

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Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00—Packaging processes not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117—Shapes of semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H10W76/12—Containers or parts thereof characterised by their shape
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60—Seals
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/944—Dispositions of multiple bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
  • Semiconductor Integrated Circuits (AREA)
TW100111754A 2010-07-29 2011-04-06 半導體裝置及其製造方法 TWI446429B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010170570A JP5521862B2 (ja) 2010-07-29 2010-07-29 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
TW201205656A TW201205656A (en) 2012-02-01
TWI446429B true TWI446429B (zh) 2014-07-21

Family

ID=45525895

Family Applications (1)

Application Number Title Priority Date Filing Date
TW100111754A TWI446429B (zh) 2010-07-29 2011-04-06 半導體裝置及其製造方法

Country Status (5)

Country Link
US (1) US8728866B2 (https=)
JP (1) JP5521862B2 (https=)
CN (1) CN102347243B (https=)
DE (2) DE102011122918B3 (https=)
TW (1) TWI446429B (https=)

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* Cited by examiner, † Cited by third party
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CN105428255B (zh) * 2013-03-29 2019-02-15 日月光半导体制造股份有限公司 透光壳体及其制造方法与应用其的光学组件
JP2015115446A (ja) 2013-12-11 2015-06-22 株式会社東芝 半導体装置の製造方法
JP6221736B2 (ja) * 2013-12-25 2017-11-01 三菱電機株式会社 半導体装置
JP6215755B2 (ja) * 2014-04-14 2017-10-18 ルネサスエレクトロニクス株式会社 半導体装置
TWI566288B (zh) * 2014-07-14 2017-01-11 矽品精密工業股份有限公司 切割用載具及切割方法
JP6314731B2 (ja) 2014-08-01 2018-04-25 株式会社ソシオネクスト 半導体装置及び半導体装置の製造方法
US10277271B2 (en) 2015-07-28 2019-04-30 Nippon Telegraph And Telephone Corporation Optical module
WO2017029822A1 (ja) * 2015-08-18 2017-02-23 三菱電機株式会社 半導体装置
US10393532B2 (en) * 2015-10-20 2019-08-27 International Business Machines Corporation Emergency responsive navigation
JP6935807B2 (ja) * 2017-02-02 2021-09-15 昭和電工マテリアルズ株式会社 電子部品の製造方法、仮保護用樹脂組成物及び仮保護用樹脂フィルム
JP2019192729A (ja) * 2018-04-23 2019-10-31 株式会社村田製作所 半導体装置
CN112189251B (zh) * 2018-05-28 2023-12-26 三菱电机株式会社 半导体装置的制造方法
JP7034105B2 (ja) * 2019-01-18 2022-03-11 三菱電機株式会社 電力用半導体装置の製造方法、電力用半導体装置および電力変換装置
KR102785840B1 (ko) 2019-12-13 2025-03-26 삼성전자주식회사 반도체 패키지
US11948893B2 (en) 2021-12-21 2024-04-02 Qorvo Us, Inc. Electronic component with lid to manage radiation feedback

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JP2501279B2 (ja) 1991-11-29 1996-05-29 株式会社東芝 半導体パッケ―ジ
JP2001024079A (ja) 1999-07-05 2001-01-26 Seiko Epson Corp 電子部品の封止構造
US7026223B2 (en) 2002-03-28 2006-04-11 M/A-Com, Inc Hermetic electric component package
JP4342174B2 (ja) 2002-12-27 2009-10-14 新光電気工業株式会社 電子デバイス及びその製造方法
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JP4312631B2 (ja) 2004-03-03 2009-08-12 三菱電機株式会社 ウエハレベルパッケージ構造体とその製造方法、及びそのウエハレベルパッケージ構造体から分割された素子
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JP5344336B2 (ja) * 2008-02-27 2013-11-20 株式会社ザイキューブ 半導体装置

Also Published As

Publication number Publication date
CN102347243A (zh) 2012-02-08
CN102347243B (zh) 2014-08-20
DE102011079105A1 (de) 2012-04-12
TW201205656A (en) 2012-02-01
DE102011122918B3 (de) 2016-05-19
JP2012033615A (ja) 2012-02-16
US20120025366A1 (en) 2012-02-02
US8728866B2 (en) 2014-05-20
JP5521862B2 (ja) 2014-06-18

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