CN102347243B - 半导体装置及其制造方法 - Google Patents

半导体装置及其制造方法 Download PDF

Info

Publication number
CN102347243B
CN102347243B CN201110213254.8A CN201110213254A CN102347243B CN 102347243 B CN102347243 B CN 102347243B CN 201110213254 A CN201110213254 A CN 201110213254A CN 102347243 B CN102347243 B CN 102347243B
Authority
CN
China
Prior art keywords
wafer
metal film
main body
interarea
hole
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN201110213254.8A
Other languages
English (en)
Chinese (zh)
Other versions
CN102347243A (zh
Inventor
金谷康
塚原良洋
渡边伸介
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of CN102347243A publication Critical patent/CN102347243A/zh
Application granted granted Critical
Publication of CN102347243B publication Critical patent/CN102347243B/zh
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W95/00Packaging processes not covered by the other groups of this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/117Shapes of semiconductor bodies
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00Arrangements for protection of devices
    • H10W42/20Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10Containers or parts thereof
    • H10W76/12Containers or parts thereof characterised by their shape
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/60Seals
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/01Manufacture or treatment
    • H10W72/0198Manufacture or treatment batch processes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/20Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/29Bond pads specially adapted therefor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/942Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/944Dispositions of multiple bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Dicing (AREA)
  • Semiconductor Integrated Circuits (AREA)
CN201110213254.8A 2010-07-29 2011-07-28 半导体装置及其制造方法 Expired - Fee Related CN102347243B (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2010170570A JP5521862B2 (ja) 2010-07-29 2010-07-29 半導体装置の製造方法
JP2010-170570 2010-07-29

Publications (2)

Publication Number Publication Date
CN102347243A CN102347243A (zh) 2012-02-08
CN102347243B true CN102347243B (zh) 2014-08-20

Family

ID=45525895

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201110213254.8A Expired - Fee Related CN102347243B (zh) 2010-07-29 2011-07-28 半导体装置及其制造方法

Country Status (5)

Country Link
US (1) US8728866B2 (https=)
JP (1) JP5521862B2 (https=)
CN (1) CN102347243B (https=)
DE (2) DE102011122918B3 (https=)
TW (1) TWI446429B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107924881A (zh) * 2015-08-18 2018-04-17 三菱电机株式会社 半导体装置

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105428255B (zh) * 2013-03-29 2019-02-15 日月光半导体制造股份有限公司 透光壳体及其制造方法与应用其的光学组件
JP2015115446A (ja) 2013-12-11 2015-06-22 株式会社東芝 半導体装置の製造方法
JP6221736B2 (ja) * 2013-12-25 2017-11-01 三菱電機株式会社 半導体装置
JP6215755B2 (ja) * 2014-04-14 2017-10-18 ルネサスエレクトロニクス株式会社 半導体装置
TWI566288B (zh) * 2014-07-14 2017-01-11 矽品精密工業股份有限公司 切割用載具及切割方法
JP6314731B2 (ja) 2014-08-01 2018-04-25 株式会社ソシオネクスト 半導体装置及び半導体装置の製造方法
US10277271B2 (en) 2015-07-28 2019-04-30 Nippon Telegraph And Telephone Corporation Optical module
US10393532B2 (en) * 2015-10-20 2019-08-27 International Business Machines Corporation Emergency responsive navigation
JP6935807B2 (ja) * 2017-02-02 2021-09-15 昭和電工マテリアルズ株式会社 電子部品の製造方法、仮保護用樹脂組成物及び仮保護用樹脂フィルム
JP2019192729A (ja) * 2018-04-23 2019-10-31 株式会社村田製作所 半導体装置
CN112189251B (zh) * 2018-05-28 2023-12-26 三菱电机株式会社 半导体装置的制造方法
JP7034105B2 (ja) * 2019-01-18 2022-03-11 三菱電機株式会社 電力用半導体装置の製造方法、電力用半導体装置および電力変換装置
KR102785840B1 (ko) 2019-12-13 2025-03-26 삼성전자주식회사 반도체 패키지
US11948893B2 (en) 2021-12-21 2024-04-02 Qorvo Us, Inc. Electronic component with lid to manage radiation feedback

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100446224C (zh) * 2004-05-28 2008-12-24 三洋电机株式会社 配线基体部件及其制造方法

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0544329A3 (en) 1991-11-28 1993-09-01 Kabushiki Kaisha Toshiba Semiconductor package
JP2501279B2 (ja) 1991-11-29 1996-05-29 株式会社東芝 半導体パッケ―ジ
JP2001024079A (ja) 1999-07-05 2001-01-26 Seiko Epson Corp 電子部品の封止構造
US7026223B2 (en) 2002-03-28 2006-04-11 M/A-Com, Inc Hermetic electric component package
JP4342174B2 (ja) 2002-12-27 2009-10-14 新光電気工業株式会社 電子デバイス及びその製造方法
JP2005057136A (ja) 2003-08-06 2005-03-03 Matsushita Electric Ind Co Ltd 半導体装置
JP4312631B2 (ja) 2004-03-03 2009-08-12 三菱電機株式会社 ウエハレベルパッケージ構造体とその製造方法、及びそのウエハレベルパッケージ構造体から分割された素子
KR100594716B1 (ko) 2004-07-27 2006-06-30 삼성전자주식회사 공동부를 구비한 캡 웨이퍼, 이를 이용한 반도체 칩, 및그 제조방법
FR2879889B1 (fr) 2004-12-20 2007-01-26 United Monolithic Semiconduct Boitier miniature hyperfrequence et procede de fabrication du boitier
CN100514591C (zh) * 2005-03-02 2009-07-15 皇家飞利浦电子股份有限公司 半导体封装的制造方法及所制成的封装
US7495462B2 (en) 2005-03-24 2009-02-24 Memsic, Inc. Method of wafer-level packaging using low-aspect ratio through-wafer holes
JP2007005948A (ja) * 2005-06-22 2007-01-11 Alps Electric Co Ltd 電子部品及びその製造方法
US20070004079A1 (en) 2005-06-30 2007-01-04 Geefay Frank S Method for making contact through via contact to an offset contactor inside a cap for the wafer level packaging of FBAR chips
JP2007019107A (ja) * 2005-07-05 2007-01-25 Shinko Electric Ind Co Ltd 半導体装置および半導体装置の製造方法
KR100752713B1 (ko) * 2005-10-10 2007-08-29 삼성전기주식회사 이미지센서의 웨이퍼 레벨 칩 스케일 패키지 및 그제조방법
US7393758B2 (en) * 2005-11-03 2008-07-01 Maxim Integrated Products, Inc. Wafer level packaging process
KR100831405B1 (ko) 2006-10-02 2008-05-21 (주) 파이오닉스 웨이퍼 본딩 패키징 방법
JP4860552B2 (ja) 2007-06-08 2012-01-25 日本オプネクスト株式会社 半導体装置
JP5344336B2 (ja) * 2008-02-27 2013-11-20 株式会社ザイキューブ 半導体装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100446224C (zh) * 2004-05-28 2008-12-24 三洋电机株式会社 配线基体部件及其制造方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
JP特开2001-24079A 2001.01.26

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107924881A (zh) * 2015-08-18 2018-04-17 三菱电机株式会社 半导体装置
CN107924881B (zh) * 2015-08-18 2020-07-31 三菱电机株式会社 半导体装置

Also Published As

Publication number Publication date
CN102347243A (zh) 2012-02-08
DE102011079105A1 (de) 2012-04-12
TW201205656A (en) 2012-02-01
DE102011122918B3 (de) 2016-05-19
JP2012033615A (ja) 2012-02-16
US20120025366A1 (en) 2012-02-02
TWI446429B (zh) 2014-07-21
US8728866B2 (en) 2014-05-20
JP5521862B2 (ja) 2014-06-18

Similar Documents

Publication Publication Date Title
CN102347243B (zh) 半导体装置及其制造方法
CN103367268B (zh) 基于pcb的射频功率封装窗口框架
US20170317002A1 (en) Power amplifier module
CN115552600A (zh) 包括无源装置的多级射频rf集成电路组件
JP2790033B2 (ja) 半導体装置
JP5640892B2 (ja) 半導体装置
US12015004B2 (en) Hybrid device assemblies and method of fabrication
CN113571501B (zh) 半导体设备封装和其制造方法
EP4160668A1 (en) Leadless power amplifier package including topside termination arrangements
TW201946245A (zh) 半導體封裝體及包含半導體封裝體之裝置
CN110556365A (zh) 用于集成电路晶片的匹配电路
US6507110B1 (en) Microwave device and method for making same
JP2001332656A (ja) 高周波信号増幅装置およびその製造方法
JP2011097526A (ja) ミリ波無線装置
KR102694122B1 (ko) 반도체 장치
JP2020088468A (ja) 増幅器及び増幅装置
US6933603B2 (en) Multi-substrate layer semiconductor packages and method for making same
JP2010186959A (ja) 半導体パッケージおよびその作製方法
TW202345315A (zh) 半導體裝置及其之製造方法
JP2010034212A (ja) 高周波セラミックパッケージおよびその作製方法
JP6952913B2 (ja) 半導体装置及びアンテナ装置
CN103311180B (zh) 一种改善mmic功率放大器性能的芯片布局方法
JP2000106386A (ja) 高周波増幅器
CN102194782A (zh) 半导体封装、基板、电子部件及安装半导体封装的方法
WO2024100726A1 (ja) 高周波回路および半導体装置

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
CF01 Termination of patent right due to non-payment of annual fee
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20140820